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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/mach-omap1/io.c
4 *
5 * OMAP1 I/O mapping code
6 */
7
8#include <linux/module.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/omap-dma.h>
13
14#include <asm/tlb.h>
15#include <asm/mach/map.h>
16
17#include "tc.h"
18#include "iomap.h"
19#include "common.h"
20
21/*
22 * The machine specific code may provide the extra mapping besides the
23 * default mapping provided here.
24 */
25static struct map_desc omap1_io_desc[] __initdata = {
26 {
27 .virtual = OMAP1_IO_VIRT,
28 .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
29 .length = OMAP1_IO_SIZE,
30 .type = MT_DEVICE
31 }, {
32 .virtual = OMAP1_DSP_BASE,
33 .pfn = __phys_to_pfn(OMAP1_DSP_START),
34 .length = OMAP1_DSP_SIZE,
35 .type = MT_DEVICE
36 }, {
37 .virtual = OMAP1_DSPREG_BASE,
38 .pfn = __phys_to_pfn(OMAP1_DSPREG_START),
39 .length = OMAP1_DSPREG_SIZE,
40 .type = MT_DEVICE
41 }
42};
43
44/*
45 * Maps common IO regions for omap1
46 */
47void __init omap1_map_io(void)
48{
49 iotable_init(omap1_io_desc, ARRAY_SIZE(omap1_io_desc));
50}
51
52/*
53 * Common low-level hardware init for omap1.
54 */
55void __init omap1_init_early(void)
56{
57 omap_check_revision();
58
59 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
60 * on a Posted Write in the TIPB Bridge".
61 */
62 omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
63 omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
64}
65
66void __init omap1_init_late(void)
67{
68 omap_serial_wakeup_init();
69}
70
71/*
72 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
73 */
74
75u8 omap_readb(u32 pa)
76{
77 return __raw_readb(OMAP1_IO_ADDRESS(pa));
78}
79EXPORT_SYMBOL(omap_readb);
80
81u16 omap_readw(u32 pa)
82{
83 return __raw_readw(OMAP1_IO_ADDRESS(pa));
84}
85EXPORT_SYMBOL(omap_readw);
86
87u32 omap_readl(u32 pa)
88{
89 return __raw_readl(OMAP1_IO_ADDRESS(pa));
90}
91EXPORT_SYMBOL(omap_readl);
92
93void omap_writeb(u8 v, u32 pa)
94{
95 __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
96}
97EXPORT_SYMBOL(omap_writeb);
98
99void omap_writew(u16 v, u32 pa)
100{
101 __raw_writew(v, OMAP1_IO_ADDRESS(pa));
102}
103EXPORT_SYMBOL(omap_writew);
104
105void omap_writel(u32 v, u32 pa)
106{
107 __raw_writel(v, OMAP1_IO_ADDRESS(pa));
108}
109EXPORT_SYMBOL(omap_writel);
1/*
2 * linux/arch/arm/mach-omap1/io.c
3 *
4 * OMAP1 I/O mapping code
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/io.h>
15
16#include <asm/tlb.h>
17#include <asm/mach/map.h>
18#include <plat/mux.h>
19#include <plat/tc.h>
20
21#include "clock.h"
22
23extern void omap_check_revision(void);
24extern void omap_sram_init(void);
25
26/*
27 * The machine specific code may provide the extra mapping besides the
28 * default mapping provided here.
29 */
30static struct map_desc omap_io_desc[] __initdata = {
31 {
32 .virtual = OMAP1_IO_VIRT,
33 .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
34 .length = OMAP1_IO_SIZE,
35 .type = MT_DEVICE
36 }
37};
38
39#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
40static struct map_desc omap7xx_io_desc[] __initdata = {
41 {
42 .virtual = OMAP7XX_DSP_BASE,
43 .pfn = __phys_to_pfn(OMAP7XX_DSP_START),
44 .length = OMAP7XX_DSP_SIZE,
45 .type = MT_DEVICE
46 }, {
47 .virtual = OMAP7XX_DSPREG_BASE,
48 .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START),
49 .length = OMAP7XX_DSPREG_SIZE,
50 .type = MT_DEVICE
51 }
52};
53#endif
54
55#ifdef CONFIG_ARCH_OMAP15XX
56static struct map_desc omap1510_io_desc[] __initdata = {
57 {
58 .virtual = OMAP1510_DSP_BASE,
59 .pfn = __phys_to_pfn(OMAP1510_DSP_START),
60 .length = OMAP1510_DSP_SIZE,
61 .type = MT_DEVICE
62 }, {
63 .virtual = OMAP1510_DSPREG_BASE,
64 .pfn = __phys_to_pfn(OMAP1510_DSPREG_START),
65 .length = OMAP1510_DSPREG_SIZE,
66 .type = MT_DEVICE
67 }
68};
69#endif
70
71#if defined(CONFIG_ARCH_OMAP16XX)
72static struct map_desc omap16xx_io_desc[] __initdata = {
73 {
74 .virtual = OMAP16XX_DSP_BASE,
75 .pfn = __phys_to_pfn(OMAP16XX_DSP_START),
76 .length = OMAP16XX_DSP_SIZE,
77 .type = MT_DEVICE
78 }, {
79 .virtual = OMAP16XX_DSPREG_BASE,
80 .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START),
81 .length = OMAP16XX_DSPREG_SIZE,
82 .type = MT_DEVICE
83 }
84};
85#endif
86
87/*
88 * Maps common IO regions for omap1. This should only get called from
89 * board specific init.
90 */
91void __init omap1_map_common_io(void)
92{
93 iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
94
95 /* Normally devicemaps_init() would flush caches and tlb after
96 * mdesc->map_io(), but we must also do it here because of the CPU
97 * revision check below.
98 */
99 local_flush_tlb_all();
100 flush_cache_all();
101
102 /* We want to check CPU revision early for cpu_is_omapxxxx() macros.
103 * IO space mapping must be initialized before we can do that.
104 */
105 omap_check_revision();
106
107#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
108 if (cpu_is_omap7xx()) {
109 iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
110 }
111#endif
112#ifdef CONFIG_ARCH_OMAP15XX
113 if (cpu_is_omap15xx()) {
114 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
115 }
116#endif
117#if defined(CONFIG_ARCH_OMAP16XX)
118 if (cpu_is_omap16xx()) {
119 iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
120 }
121#endif
122
123 omap_sram_init();
124}
125
126/*
127 * Common low-level hardware init for omap1. This should only get called from
128 * board specific init.
129 */
130void __init omap1_init_common_hw(void)
131{
132 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
133 * on a Posted Write in the TIPB Bridge".
134 */
135 omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
136 omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
137
138 /* Must init clocks early to assure that timer interrupt works
139 */
140 omap1_clk_init();
141
142 omap1_mux_init();
143}
144
145/*
146 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
147 */
148
149u8 omap_readb(u32 pa)
150{
151 return __raw_readb(OMAP1_IO_ADDRESS(pa));
152}
153EXPORT_SYMBOL(omap_readb);
154
155u16 omap_readw(u32 pa)
156{
157 return __raw_readw(OMAP1_IO_ADDRESS(pa));
158}
159EXPORT_SYMBOL(omap_readw);
160
161u32 omap_readl(u32 pa)
162{
163 return __raw_readl(OMAP1_IO_ADDRESS(pa));
164}
165EXPORT_SYMBOL(omap_readl);
166
167void omap_writeb(u8 v, u32 pa)
168{
169 __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
170}
171EXPORT_SYMBOL(omap_writeb);
172
173void omap_writew(u16 v, u32 pa)
174{
175 __raw_writew(v, OMAP1_IO_ADDRESS(pa));
176}
177EXPORT_SYMBOL(omap_writew);
178
179void omap_writel(u32 v, u32 pa)
180{
181 __raw_writel(v, OMAP1_IO_ADDRESS(pa));
182}
183EXPORT_SYMBOL(omap_writel);