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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/mach-omap1/io.c
4 *
5 * OMAP1 I/O mapping code
6 */
7
8#include <linux/module.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/omap-dma.h>
13
14#include <asm/tlb.h>
15#include <asm/mach/map.h>
16
17#include "tc.h"
18#include "iomap.h"
19#include "common.h"
20
21/*
22 * The machine specific code may provide the extra mapping besides the
23 * default mapping provided here.
24 */
25static struct map_desc omap1_io_desc[] __initdata = {
26 {
27 .virtual = OMAP1_IO_VIRT,
28 .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
29 .length = OMAP1_IO_SIZE,
30 .type = MT_DEVICE
31 }, {
32 .virtual = OMAP1_DSP_BASE,
33 .pfn = __phys_to_pfn(OMAP1_DSP_START),
34 .length = OMAP1_DSP_SIZE,
35 .type = MT_DEVICE
36 }, {
37 .virtual = OMAP1_DSPREG_BASE,
38 .pfn = __phys_to_pfn(OMAP1_DSPREG_START),
39 .length = OMAP1_DSPREG_SIZE,
40 .type = MT_DEVICE
41 }
42};
43
44/*
45 * Maps common IO regions for omap1
46 */
47void __init omap1_map_io(void)
48{
49 iotable_init(omap1_io_desc, ARRAY_SIZE(omap1_io_desc));
50}
51
52/*
53 * Common low-level hardware init for omap1.
54 */
55void __init omap1_init_early(void)
56{
57 omap_check_revision();
58
59 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
60 * on a Posted Write in the TIPB Bridge".
61 */
62 omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
63 omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
64}
65
66void __init omap1_init_late(void)
67{
68 omap_serial_wakeup_init();
69}
70
71/*
72 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
73 */
74
75u8 omap_readb(u32 pa)
76{
77 return __raw_readb(OMAP1_IO_ADDRESS(pa));
78}
79EXPORT_SYMBOL(omap_readb);
80
81u16 omap_readw(u32 pa)
82{
83 return __raw_readw(OMAP1_IO_ADDRESS(pa));
84}
85EXPORT_SYMBOL(omap_readw);
86
87u32 omap_readl(u32 pa)
88{
89 return __raw_readl(OMAP1_IO_ADDRESS(pa));
90}
91EXPORT_SYMBOL(omap_readl);
92
93void omap_writeb(u8 v, u32 pa)
94{
95 __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
96}
97EXPORT_SYMBOL(omap_writeb);
98
99void omap_writew(u16 v, u32 pa)
100{
101 __raw_writew(v, OMAP1_IO_ADDRESS(pa));
102}
103EXPORT_SYMBOL(omap_writew);
104
105void omap_writel(u32 v, u32 pa)
106{
107 __raw_writel(v, OMAP1_IO_ADDRESS(pa));
108}
109EXPORT_SYMBOL(omap_writel);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/mach-omap1/io.c
4 *
5 * OMAP1 I/O mapping code
6 */
7
8#include <linux/module.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/omap-dma.h>
13
14#include <asm/tlb.h>
15#include <asm/mach/map.h>
16
17#include "tc.h"
18#include "iomap.h"
19#include "common.h"
20
21/*
22 * The machine specific code may provide the extra mapping besides the
23 * default mapping provided here.
24 */
25#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
26static struct map_desc omap7xx_io_desc[] __initdata = {
27 {
28 .virtual = OMAP1_IO_VIRT,
29 .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
30 .length = OMAP1_IO_SIZE,
31 .type = MT_DEVICE
32 },
33 {
34 .virtual = OMAP7XX_DSP_BASE,
35 .pfn = __phys_to_pfn(OMAP7XX_DSP_START),
36 .length = OMAP7XX_DSP_SIZE,
37 .type = MT_DEVICE
38 }, {
39 .virtual = OMAP7XX_DSPREG_BASE,
40 .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START),
41 .length = OMAP7XX_DSPREG_SIZE,
42 .type = MT_DEVICE
43 }
44};
45#endif
46
47#ifdef CONFIG_ARCH_OMAP15XX
48static struct map_desc omap1510_io_desc[] __initdata = {
49 {
50 .virtual = OMAP1_IO_VIRT,
51 .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
52 .length = OMAP1_IO_SIZE,
53 .type = MT_DEVICE
54 },
55 {
56 .virtual = OMAP1510_DSP_BASE,
57 .pfn = __phys_to_pfn(OMAP1510_DSP_START),
58 .length = OMAP1510_DSP_SIZE,
59 .type = MT_DEVICE
60 }, {
61 .virtual = OMAP1510_DSPREG_BASE,
62 .pfn = __phys_to_pfn(OMAP1510_DSPREG_START),
63 .length = OMAP1510_DSPREG_SIZE,
64 .type = MT_DEVICE
65 }
66};
67#endif
68
69#if defined(CONFIG_ARCH_OMAP16XX)
70static struct map_desc omap16xx_io_desc[] __initdata = {
71 {
72 .virtual = OMAP1_IO_VIRT,
73 .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
74 .length = OMAP1_IO_SIZE,
75 .type = MT_DEVICE
76 },
77 {
78 .virtual = OMAP16XX_DSP_BASE,
79 .pfn = __phys_to_pfn(OMAP16XX_DSP_START),
80 .length = OMAP16XX_DSP_SIZE,
81 .type = MT_DEVICE
82 }, {
83 .virtual = OMAP16XX_DSPREG_BASE,
84 .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START),
85 .length = OMAP16XX_DSPREG_SIZE,
86 .type = MT_DEVICE
87 }
88};
89#endif
90
91#if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
92void __init omap7xx_map_io(void)
93{
94 iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
95}
96#endif
97
98#ifdef CONFIG_ARCH_OMAP15XX
99void __init omap15xx_map_io(void)
100{
101 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
102}
103#endif
104
105#if defined(CONFIG_ARCH_OMAP16XX)
106void __init omap16xx_map_io(void)
107{
108 iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
109}
110#endif
111
112/*
113 * Common low-level hardware init for omap1.
114 */
115void __init omap1_init_early(void)
116{
117 omap_check_revision();
118
119 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
120 * on a Posted Write in the TIPB Bridge".
121 */
122 omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
123 omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
124}
125
126void __init omap1_init_late(void)
127{
128 omap_serial_wakeup_init();
129}
130
131/*
132 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
133 */
134
135u8 omap_readb(u32 pa)
136{
137 return __raw_readb(OMAP1_IO_ADDRESS(pa));
138}
139EXPORT_SYMBOL(omap_readb);
140
141u16 omap_readw(u32 pa)
142{
143 return __raw_readw(OMAP1_IO_ADDRESS(pa));
144}
145EXPORT_SYMBOL(omap_readw);
146
147u32 omap_readl(u32 pa)
148{
149 return __raw_readl(OMAP1_IO_ADDRESS(pa));
150}
151EXPORT_SYMBOL(omap_readl);
152
153void omap_writeb(u8 v, u32 pa)
154{
155 __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
156}
157EXPORT_SYMBOL(omap_writeb);
158
159void omap_writew(u16 v, u32 pa)
160{
161 __raw_writew(v, OMAP1_IO_ADDRESS(pa));
162}
163EXPORT_SYMBOL(omap_writew);
164
165void omap_writel(u32 v, u32 pa)
166{
167 __raw_writel(v, OMAP1_IO_ADDRESS(pa));
168}
169EXPORT_SYMBOL(omap_writel);