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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11#include <linux/cpu.h>
12#include <linux/interrupt.h>
13#include <linux/module.h>
14#include <linux/profile.h>
15#include <linux/smp.h>
16#include <linux/sched.h>
17#include <linux/seq_file.h>
18#include <linux/delay.h>
19#include <linux/irq_work.h>
20
21#include <asm/sbi.h>
22#include <asm/tlbflush.h>
23#include <asm/cacheflush.h>
24
25enum ipi_message_type {
26 IPI_RESCHEDULE,
27 IPI_CALL_FUNC,
28 IPI_CPU_STOP,
29 IPI_IRQ_WORK,
30 IPI_MAX
31};
32
33unsigned long __cpuid_to_hartid_map[NR_CPUS] = {
34 [0 ... NR_CPUS-1] = INVALID_HARTID
35};
36
37void __init smp_setup_processor_id(void)
38{
39 cpuid_to_hartid_map(0) = boot_cpu_hartid;
40}
41
42/* A collection of single bit ipi messages. */
43static struct {
44 unsigned long stats[IPI_MAX] ____cacheline_aligned;
45 unsigned long bits ____cacheline_aligned;
46} ipi_data[NR_CPUS] __cacheline_aligned;
47
48int riscv_hartid_to_cpuid(int hartid)
49{
50 int i;
51
52 for (i = 0; i < NR_CPUS; i++)
53 if (cpuid_to_hartid_map(i) == hartid)
54 return i;
55
56 pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
57 return i;
58}
59
60void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
61{
62 int cpu;
63
64 cpumask_clear(out);
65 for_each_cpu(cpu, in)
66 cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
67}
68EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
69
70bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
71{
72 return phys_id == cpuid_to_hartid_map(cpu);
73}
74
75/* Unsupported */
76int setup_profiling_timer(unsigned int multiplier)
77{
78 return -EINVAL;
79}
80
81static void ipi_stop(void)
82{
83 set_cpu_online(smp_processor_id(), false);
84 while (1)
85 wait_for_interrupt();
86}
87
88static struct riscv_ipi_ops *ipi_ops;
89
90void riscv_set_ipi_ops(struct riscv_ipi_ops *ops)
91{
92 ipi_ops = ops;
93}
94EXPORT_SYMBOL_GPL(riscv_set_ipi_ops);
95
96void riscv_clear_ipi(void)
97{
98 if (ipi_ops && ipi_ops->ipi_clear)
99 ipi_ops->ipi_clear();
100
101 csr_clear(CSR_IP, IE_SIE);
102}
103EXPORT_SYMBOL_GPL(riscv_clear_ipi);
104
105static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
106{
107 int cpu;
108
109 smp_mb__before_atomic();
110 for_each_cpu(cpu, mask)
111 set_bit(op, &ipi_data[cpu].bits);
112 smp_mb__after_atomic();
113
114 if (ipi_ops && ipi_ops->ipi_inject)
115 ipi_ops->ipi_inject(mask);
116 else
117 pr_warn("SMP: IPI inject method not available\n");
118}
119
120static void send_ipi_single(int cpu, enum ipi_message_type op)
121{
122 smp_mb__before_atomic();
123 set_bit(op, &ipi_data[cpu].bits);
124 smp_mb__after_atomic();
125
126 if (ipi_ops && ipi_ops->ipi_inject)
127 ipi_ops->ipi_inject(cpumask_of(cpu));
128 else
129 pr_warn("SMP: IPI inject method not available\n");
130}
131
132#ifdef CONFIG_IRQ_WORK
133void arch_irq_work_raise(void)
134{
135 send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
136}
137#endif
138
139void handle_IPI(struct pt_regs *regs)
140{
141 struct pt_regs *old_regs = set_irq_regs(regs);
142 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
143 unsigned long *stats = ipi_data[smp_processor_id()].stats;
144
145 irq_enter();
146
147 riscv_clear_ipi();
148
149 while (true) {
150 unsigned long ops;
151
152 /* Order bit clearing and data access. */
153 mb();
154
155 ops = xchg(pending_ipis, 0);
156 if (ops == 0)
157 goto done;
158
159 if (ops & (1 << IPI_RESCHEDULE)) {
160 stats[IPI_RESCHEDULE]++;
161 scheduler_ipi();
162 }
163
164 if (ops & (1 << IPI_CALL_FUNC)) {
165 stats[IPI_CALL_FUNC]++;
166 generic_smp_call_function_interrupt();
167 }
168
169 if (ops & (1 << IPI_CPU_STOP)) {
170 stats[IPI_CPU_STOP]++;
171 ipi_stop();
172 }
173
174 if (ops & (1 << IPI_IRQ_WORK)) {
175 stats[IPI_IRQ_WORK]++;
176 irq_work_run();
177 }
178
179 BUG_ON((ops >> IPI_MAX) != 0);
180
181 /* Order data access and bit testing. */
182 mb();
183 }
184
185done:
186 irq_exit();
187 set_irq_regs(old_regs);
188}
189
190static const char * const ipi_names[] = {
191 [IPI_RESCHEDULE] = "Rescheduling interrupts",
192 [IPI_CALL_FUNC] = "Function call interrupts",
193 [IPI_CPU_STOP] = "CPU stop interrupts",
194 [IPI_IRQ_WORK] = "IRQ work interrupts",
195};
196
197void show_ipi_stats(struct seq_file *p, int prec)
198{
199 unsigned int cpu, i;
200
201 for (i = 0; i < IPI_MAX; i++) {
202 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
203 prec >= 4 ? " " : "");
204 for_each_online_cpu(cpu)
205 seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
206 seq_printf(p, " %s\n", ipi_names[i]);
207 }
208}
209
210void arch_send_call_function_ipi_mask(struct cpumask *mask)
211{
212 send_ipi_mask(mask, IPI_CALL_FUNC);
213}
214
215void arch_send_call_function_single_ipi(int cpu)
216{
217 send_ipi_single(cpu, IPI_CALL_FUNC);
218}
219
220void smp_send_stop(void)
221{
222 unsigned long timeout;
223
224 if (num_online_cpus() > 1) {
225 cpumask_t mask;
226
227 cpumask_copy(&mask, cpu_online_mask);
228 cpumask_clear_cpu(smp_processor_id(), &mask);
229
230 if (system_state <= SYSTEM_RUNNING)
231 pr_crit("SMP: stopping secondary CPUs\n");
232 send_ipi_mask(&mask, IPI_CPU_STOP);
233 }
234
235 /* Wait up to one second for other CPUs to stop */
236 timeout = USEC_PER_SEC;
237 while (num_online_cpus() > 1 && timeout--)
238 udelay(1);
239
240 if (num_online_cpus() > 1)
241 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
242 cpumask_pr_args(cpu_online_mask));
243}
244
245void smp_send_reschedule(int cpu)
246{
247 send_ipi_single(cpu, IPI_RESCHEDULE);
248}
249EXPORT_SYMBOL_GPL(smp_send_reschedule);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11#include <linux/cpu.h>
12#include <linux/clockchips.h>
13#include <linux/interrupt.h>
14#include <linux/module.h>
15#include <linux/kexec.h>
16#include <linux/percpu.h>
17#include <linux/profile.h>
18#include <linux/smp.h>
19#include <linux/sched.h>
20#include <linux/seq_file.h>
21#include <linux/delay.h>
22#include <linux/irq.h>
23#include <linux/irq_work.h>
24
25#include <asm/tlbflush.h>
26#include <asm/cacheflush.h>
27#include <asm/cpu_ops.h>
28
29enum ipi_message_type {
30 IPI_RESCHEDULE,
31 IPI_CALL_FUNC,
32 IPI_CPU_STOP,
33 IPI_CPU_CRASH_STOP,
34 IPI_IRQ_WORK,
35 IPI_TIMER,
36 IPI_MAX
37};
38
39unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = {
40 [0 ... NR_CPUS-1] = INVALID_HARTID
41};
42
43void __init smp_setup_processor_id(void)
44{
45 cpuid_to_hartid_map(0) = boot_cpu_hartid;
46}
47
48static DEFINE_PER_CPU_READ_MOSTLY(int, ipi_dummy_dev);
49static int ipi_virq_base __ro_after_init;
50static int nr_ipi __ro_after_init = IPI_MAX;
51static struct irq_desc *ipi_desc[IPI_MAX] __read_mostly;
52
53int riscv_hartid_to_cpuid(unsigned long hartid)
54{
55 int i;
56
57 for (i = 0; i < NR_CPUS; i++)
58 if (cpuid_to_hartid_map(i) == hartid)
59 return i;
60
61 return -ENOENT;
62}
63
64static void ipi_stop(void)
65{
66 set_cpu_online(smp_processor_id(), false);
67 while (1)
68 wait_for_interrupt();
69}
70
71#ifdef CONFIG_KEXEC_CORE
72static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
73
74static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
75{
76 crash_save_cpu(regs, cpu);
77
78 atomic_dec(&waiting_for_crash_ipi);
79
80 local_irq_disable();
81
82#ifdef CONFIG_HOTPLUG_CPU
83 if (cpu_has_hotplug(cpu))
84 cpu_ops->cpu_stop();
85#endif
86
87 for(;;)
88 wait_for_interrupt();
89}
90#else
91static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
92{
93 unreachable();
94}
95#endif
96
97static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
98{
99 __ipi_send_mask(ipi_desc[op], mask);
100}
101
102static void send_ipi_single(int cpu, enum ipi_message_type op)
103{
104 __ipi_send_mask(ipi_desc[op], cpumask_of(cpu));
105}
106
107#ifdef CONFIG_IRQ_WORK
108void arch_irq_work_raise(void)
109{
110 send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
111}
112#endif
113
114static irqreturn_t handle_IPI(int irq, void *data)
115{
116 int ipi = irq - ipi_virq_base;
117
118 switch (ipi) {
119 case IPI_RESCHEDULE:
120 scheduler_ipi();
121 break;
122 case IPI_CALL_FUNC:
123 generic_smp_call_function_interrupt();
124 break;
125 case IPI_CPU_STOP:
126 ipi_stop();
127 break;
128 case IPI_CPU_CRASH_STOP:
129 ipi_cpu_crash_stop(smp_processor_id(), get_irq_regs());
130 break;
131 case IPI_IRQ_WORK:
132 irq_work_run();
133 break;
134#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
135 case IPI_TIMER:
136 tick_receive_broadcast();
137 break;
138#endif
139 default:
140 pr_warn("CPU%d: unhandled IPI%d\n", smp_processor_id(), ipi);
141 break;
142 }
143
144 return IRQ_HANDLED;
145}
146
147void riscv_ipi_enable(void)
148{
149 int i;
150
151 if (WARN_ON_ONCE(!ipi_virq_base))
152 return;
153
154 for (i = 0; i < nr_ipi; i++)
155 enable_percpu_irq(ipi_virq_base + i, 0);
156}
157
158void riscv_ipi_disable(void)
159{
160 int i;
161
162 if (WARN_ON_ONCE(!ipi_virq_base))
163 return;
164
165 for (i = 0; i < nr_ipi; i++)
166 disable_percpu_irq(ipi_virq_base + i);
167}
168
169bool riscv_ipi_have_virq_range(void)
170{
171 return (ipi_virq_base) ? true : false;
172}
173
174DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
175EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence);
176
177void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence)
178{
179 int i, err;
180
181 if (WARN_ON(ipi_virq_base))
182 return;
183
184 WARN_ON(nr < IPI_MAX);
185 nr_ipi = min(nr, IPI_MAX);
186 ipi_virq_base = virq;
187
188 /* Request IPIs */
189 for (i = 0; i < nr_ipi; i++) {
190 err = request_percpu_irq(ipi_virq_base + i, handle_IPI,
191 "IPI", &ipi_dummy_dev);
192 WARN_ON(err);
193
194 ipi_desc[i] = irq_to_desc(ipi_virq_base + i);
195 irq_set_status_flags(ipi_virq_base + i, IRQ_HIDDEN);
196 }
197
198 /* Enabled IPIs for boot CPU immediately */
199 riscv_ipi_enable();
200
201 /* Update RFENCE static key */
202 if (use_for_rfence)
203 static_branch_enable(&riscv_ipi_for_rfence);
204 else
205 static_branch_disable(&riscv_ipi_for_rfence);
206}
207
208static const char * const ipi_names[] = {
209 [IPI_RESCHEDULE] = "Rescheduling interrupts",
210 [IPI_CALL_FUNC] = "Function call interrupts",
211 [IPI_CPU_STOP] = "CPU stop interrupts",
212 [IPI_CPU_CRASH_STOP] = "CPU stop (for crash dump) interrupts",
213 [IPI_IRQ_WORK] = "IRQ work interrupts",
214 [IPI_TIMER] = "Timer broadcast interrupts",
215};
216
217void show_ipi_stats(struct seq_file *p, int prec)
218{
219 unsigned int cpu, i;
220
221 for (i = 0; i < IPI_MAX; i++) {
222 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
223 prec >= 4 ? " " : "");
224 for_each_online_cpu(cpu)
225 seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
226 seq_printf(p, " %s\n", ipi_names[i]);
227 }
228}
229
230void arch_send_call_function_ipi_mask(struct cpumask *mask)
231{
232 send_ipi_mask(mask, IPI_CALL_FUNC);
233}
234
235void arch_send_call_function_single_ipi(int cpu)
236{
237 send_ipi_single(cpu, IPI_CALL_FUNC);
238}
239
240#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
241void tick_broadcast(const struct cpumask *mask)
242{
243 send_ipi_mask(mask, IPI_TIMER);
244}
245#endif
246
247void smp_send_stop(void)
248{
249 unsigned long timeout;
250
251 if (num_online_cpus() > 1) {
252 cpumask_t mask;
253
254 cpumask_copy(&mask, cpu_online_mask);
255 cpumask_clear_cpu(smp_processor_id(), &mask);
256
257 if (system_state <= SYSTEM_RUNNING)
258 pr_crit("SMP: stopping secondary CPUs\n");
259 send_ipi_mask(&mask, IPI_CPU_STOP);
260 }
261
262 /* Wait up to one second for other CPUs to stop */
263 timeout = USEC_PER_SEC;
264 while (num_online_cpus() > 1 && timeout--)
265 udelay(1);
266
267 if (num_online_cpus() > 1)
268 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
269 cpumask_pr_args(cpu_online_mask));
270}
271
272#ifdef CONFIG_KEXEC_CORE
273/*
274 * The number of CPUs online, not counting this CPU (which may not be
275 * fully online and so not counted in num_online_cpus()).
276 */
277static inline unsigned int num_other_online_cpus(void)
278{
279 unsigned int this_cpu_online = cpu_online(smp_processor_id());
280
281 return num_online_cpus() - this_cpu_online;
282}
283
284void crash_smp_send_stop(void)
285{
286 static int cpus_stopped;
287 cpumask_t mask;
288 unsigned long timeout;
289
290 /*
291 * This function can be called twice in panic path, but obviously
292 * we execute this only once.
293 */
294 if (cpus_stopped)
295 return;
296
297 cpus_stopped = 1;
298
299 /*
300 * If this cpu is the only one alive at this point in time, online or
301 * not, there are no stop messages to be sent around, so just back out.
302 */
303 if (num_other_online_cpus() == 0)
304 return;
305
306 cpumask_copy(&mask, cpu_online_mask);
307 cpumask_clear_cpu(smp_processor_id(), &mask);
308
309 atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
310
311 pr_crit("SMP: stopping secondary CPUs\n");
312 send_ipi_mask(&mask, IPI_CPU_CRASH_STOP);
313
314 /* Wait up to one second for other CPUs to stop */
315 timeout = USEC_PER_SEC;
316 while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
317 udelay(1);
318
319 if (atomic_read(&waiting_for_crash_ipi) > 0)
320 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
321 cpumask_pr_args(&mask));
322}
323
324bool smp_crash_stop_failed(void)
325{
326 return (atomic_read(&waiting_for_crash_ipi) > 0);
327}
328#endif
329
330void arch_smp_send_reschedule(int cpu)
331{
332 send_ipi_single(cpu, IPI_RESCHEDULE);
333}
334EXPORT_SYMBOL_GPL(arch_smp_send_reschedule);