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v5.9
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * SMP initialisation and IPI support
  4 * Based on arch/arm64/kernel/smp.c
  5 *
  6 * Copyright (C) 2012 ARM Ltd.
  7 * Copyright (C) 2015 Regents of the University of California
  8 * Copyright (C) 2017 SiFive
  9 */
 10
 11#include <linux/cpu.h>
 
 12#include <linux/interrupt.h>
 13#include <linux/module.h>
 
 
 
 14#include <linux/profile.h>
 15#include <linux/smp.h>
 16#include <linux/sched.h>
 17#include <linux/seq_file.h>
 18#include <linux/delay.h>
 
 19#include <linux/irq_work.h>
 
 20
 21#include <asm/sbi.h>
 22#include <asm/tlbflush.h>
 23#include <asm/cacheflush.h>
 
 24
 25enum ipi_message_type {
 26	IPI_RESCHEDULE,
 27	IPI_CALL_FUNC,
 28	IPI_CPU_STOP,
 
 29	IPI_IRQ_WORK,
 
 
 
 30	IPI_MAX
 31};
 32
 33unsigned long __cpuid_to_hartid_map[NR_CPUS] = {
 34	[0 ... NR_CPUS-1] = INVALID_HARTID
 35};
 36
 37void __init smp_setup_processor_id(void)
 38{
 39	cpuid_to_hartid_map(0) = boot_cpu_hartid;
 40}
 41
 42/* A collection of single bit ipi messages.  */
 43static struct {
 44	unsigned long stats[IPI_MAX] ____cacheline_aligned;
 45	unsigned long bits ____cacheline_aligned;
 46} ipi_data[NR_CPUS] __cacheline_aligned;
 47
 48int riscv_hartid_to_cpuid(int hartid)
 49{
 50	int i;
 51
 52	for (i = 0; i < NR_CPUS; i++)
 53		if (cpuid_to_hartid_map(i) == hartid)
 54			return i;
 55
 56	pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
 57	return i;
 58}
 59
 60void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
 61{
 62	int cpu;
 63
 64	cpumask_clear(out);
 65	for_each_cpu(cpu, in)
 66		cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
 67}
 68EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
 69
 70bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 71{
 72	return phys_id == cpuid_to_hartid_map(cpu);
 73}
 74
 75/* Unsupported */
 76int setup_profiling_timer(unsigned int multiplier)
 77{
 78	return -EINVAL;
 79}
 80
 81static void ipi_stop(void)
 82{
 83	set_cpu_online(smp_processor_id(), false);
 84	while (1)
 85		wait_for_interrupt();
 86}
 87
 88static struct riscv_ipi_ops *ipi_ops;
 
 89
 90void riscv_set_ipi_ops(struct riscv_ipi_ops *ops)
 91{
 92	ipi_ops = ops;
 93}
 94EXPORT_SYMBOL_GPL(riscv_set_ipi_ops);
 95
 96void riscv_clear_ipi(void)
 97{
 98	if (ipi_ops && ipi_ops->ipi_clear)
 99		ipi_ops->ipi_clear();
 
 
 
 
100
101	csr_clear(CSR_IP, IE_SIE);
 
102}
103EXPORT_SYMBOL_GPL(riscv_clear_ipi);
 
 
 
 
 
104
105static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
106{
107	int cpu;
108
109	smp_mb__before_atomic();
110	for_each_cpu(cpu, mask)
111		set_bit(op, &ipi_data[cpu].bits);
112	smp_mb__after_atomic();
113
114	if (ipi_ops && ipi_ops->ipi_inject)
115		ipi_ops->ipi_inject(mask);
116	else
117		pr_warn("SMP: IPI inject method not available\n");
118}
119
120static void send_ipi_single(int cpu, enum ipi_message_type op)
121{
122	smp_mb__before_atomic();
123	set_bit(op, &ipi_data[cpu].bits);
124	smp_mb__after_atomic();
125
126	if (ipi_ops && ipi_ops->ipi_inject)
127		ipi_ops->ipi_inject(cpumask_of(cpu));
128	else
129		pr_warn("SMP: IPI inject method not available\n");
130}
131
132#ifdef CONFIG_IRQ_WORK
133void arch_irq_work_raise(void)
134{
135	send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
136}
137#endif
138
139void handle_IPI(struct pt_regs *regs)
140{
141	struct pt_regs *old_regs = set_irq_regs(regs);
142	unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
143	unsigned long *stats = ipi_data[smp_processor_id()].stats;
144
145	irq_enter();
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
146
147	riscv_clear_ipi();
 
148
149	while (true) {
150		unsigned long ops;
 
151
152		/* Order bit clearing and data access. */
153		mb();
154
155		ops = xchg(pending_ipis, 0);
156		if (ops == 0)
157			goto done;
158
159		if (ops & (1 << IPI_RESCHEDULE)) {
160			stats[IPI_RESCHEDULE]++;
161			scheduler_ipi();
162		}
163
164		if (ops & (1 << IPI_CALL_FUNC)) {
165			stats[IPI_CALL_FUNC]++;
166			generic_smp_call_function_interrupt();
167		}
168
169		if (ops & (1 << IPI_CPU_STOP)) {
170			stats[IPI_CPU_STOP]++;
171			ipi_stop();
172		}
173
174		if (ops & (1 << IPI_IRQ_WORK)) {
175			stats[IPI_IRQ_WORK]++;
176			irq_work_run();
177		}
 
 
 
 
178
179		BUG_ON((ops >> IPI_MAX) != 0);
 
180
181		/* Order data access and bit testing. */
182		mb();
 
 
 
 
 
 
 
 
 
 
183	}
184
185done:
186	irq_exit();
187	set_irq_regs(old_regs);
188}
189
190static const char * const ipi_names[] = {
191	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
192	[IPI_CALL_FUNC]		= "Function call interrupts",
193	[IPI_CPU_STOP]		= "CPU stop interrupts",
 
194	[IPI_IRQ_WORK]		= "IRQ work interrupts",
 
 
 
195};
196
197void show_ipi_stats(struct seq_file *p, int prec)
198{
199	unsigned int cpu, i;
200
201	for (i = 0; i < IPI_MAX; i++) {
202		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
203			   prec >= 4 ? " " : "");
204		for_each_online_cpu(cpu)
205			seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
206		seq_printf(p, " %s\n", ipi_names[i]);
207	}
208}
209
210void arch_send_call_function_ipi_mask(struct cpumask *mask)
211{
212	send_ipi_mask(mask, IPI_CALL_FUNC);
213}
214
215void arch_send_call_function_single_ipi(int cpu)
216{
217	send_ipi_single(cpu, IPI_CALL_FUNC);
218}
219
 
 
 
 
 
 
 
220void smp_send_stop(void)
221{
222	unsigned long timeout;
223
224	if (num_online_cpus() > 1) {
225		cpumask_t mask;
226
227		cpumask_copy(&mask, cpu_online_mask);
228		cpumask_clear_cpu(smp_processor_id(), &mask);
229
230		if (system_state <= SYSTEM_RUNNING)
231			pr_crit("SMP: stopping secondary CPUs\n");
232		send_ipi_mask(&mask, IPI_CPU_STOP);
233	}
234
235	/* Wait up to one second for other CPUs to stop */
236	timeout = USEC_PER_SEC;
237	while (num_online_cpus() > 1 && timeout--)
238		udelay(1);
239
240	if (num_online_cpus() > 1)
241		pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
242			   cpumask_pr_args(cpu_online_mask));
243}
244
245void smp_send_reschedule(int cpu)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
246{
247	send_ipi_single(cpu, IPI_RESCHEDULE);
248}
249EXPORT_SYMBOL_GPL(smp_send_reschedule);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * SMP initialisation and IPI support
  4 * Based on arch/arm64/kernel/smp.c
  5 *
  6 * Copyright (C) 2012 ARM Ltd.
  7 * Copyright (C) 2015 Regents of the University of California
  8 * Copyright (C) 2017 SiFive
  9 */
 10
 11#include <linux/cpu.h>
 12#include <linux/clockchips.h>
 13#include <linux/interrupt.h>
 14#include <linux/module.h>
 15#include <linux/kexec.h>
 16#include <linux/kgdb.h>
 17#include <linux/percpu.h>
 18#include <linux/profile.h>
 19#include <linux/smp.h>
 20#include <linux/sched.h>
 21#include <linux/seq_file.h>
 22#include <linux/delay.h>
 23#include <linux/irq.h>
 24#include <linux/irq_work.h>
 25#include <linux/nmi.h>
 26
 
 27#include <asm/tlbflush.h>
 28#include <asm/cacheflush.h>
 29#include <asm/cpu_ops.h>
 30
 31enum ipi_message_type {
 32	IPI_RESCHEDULE,
 33	IPI_CALL_FUNC,
 34	IPI_CPU_STOP,
 35	IPI_CPU_CRASH_STOP,
 36	IPI_IRQ_WORK,
 37	IPI_TIMER,
 38	IPI_CPU_BACKTRACE,
 39	IPI_KGDB_ROUNDUP,
 40	IPI_MAX
 41};
 42
 43unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = {
 44	[0 ... NR_CPUS-1] = INVALID_HARTID
 45};
 46
 47void __init smp_setup_processor_id(void)
 48{
 49	cpuid_to_hartid_map(0) = boot_cpu_hartid;
 50}
 51
 52static DEFINE_PER_CPU_READ_MOSTLY(int, ipi_dummy_dev);
 53static int ipi_virq_base __ro_after_init;
 54static int nr_ipi __ro_after_init = IPI_MAX;
 55static struct irq_desc *ipi_desc[IPI_MAX] __read_mostly;
 
 56
 57int riscv_hartid_to_cpuid(unsigned long hartid)
 58{
 59	int i;
 60
 61	for (i = 0; i < NR_CPUS; i++)
 62		if (cpuid_to_hartid_map(i) == hartid)
 63			return i;
 64
 65	return -ENOENT;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 66}
 67
 68static void ipi_stop(void)
 69{
 70	set_cpu_online(smp_processor_id(), false);
 71	while (1)
 72		wait_for_interrupt();
 73}
 74
 75#ifdef CONFIG_KEXEC_CORE
 76static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
 77
 78static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
 79{
 80	crash_save_cpu(regs, cpu);
 
 
 81
 82	atomic_dec(&waiting_for_crash_ipi);
 83
 84	local_irq_disable();
 85
 86#ifdef CONFIG_HOTPLUG_CPU
 87	if (cpu_has_hotplug(cpu))
 88		cpu_ops->cpu_stop();
 89#endif
 90
 91	for(;;)
 92		wait_for_interrupt();
 93}
 94#else
 95static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
 96{
 97	unreachable();
 98}
 99#endif
100
101static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
102{
103	__ipi_send_mask(ipi_desc[op], mask);
 
 
 
 
 
 
 
 
 
 
104}
105
106static void send_ipi_single(int cpu, enum ipi_message_type op)
107{
108	__ipi_send_mask(ipi_desc[op], cpumask_of(cpu));
 
 
 
 
 
 
 
109}
110
111#ifdef CONFIG_IRQ_WORK
112void arch_irq_work_raise(void)
113{
114	send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
115}
116#endif
117
118static irqreturn_t handle_IPI(int irq, void *data)
119{
120	unsigned int cpu = smp_processor_id();
121	int ipi = irq - ipi_virq_base;
 
122
123	switch (ipi) {
124	case IPI_RESCHEDULE:
125		scheduler_ipi();
126		break;
127	case IPI_CALL_FUNC:
128		generic_smp_call_function_interrupt();
129		break;
130	case IPI_CPU_STOP:
131		ipi_stop();
132		break;
133	case IPI_CPU_CRASH_STOP:
134		ipi_cpu_crash_stop(cpu, get_irq_regs());
135		break;
136	case IPI_IRQ_WORK:
137		irq_work_run();
138		break;
139#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
140	case IPI_TIMER:
141		tick_receive_broadcast();
142		break;
143#endif
144	case IPI_CPU_BACKTRACE:
145		nmi_cpu_backtrace(get_irq_regs());
146		break;
147	case IPI_KGDB_ROUNDUP:
148		kgdb_nmicallback(cpu, get_irq_regs());
149		break;
150	default:
151		pr_warn("CPU%d: unhandled IPI%d\n", cpu, ipi);
152		break;
153	}
154
155	return IRQ_HANDLED;
156}
157
158void riscv_ipi_enable(void)
159{
160	int i;
161
162	if (WARN_ON_ONCE(!ipi_virq_base))
163		return;
164
165	for (i = 0; i < nr_ipi; i++)
166		enable_percpu_irq(ipi_virq_base + i, 0);
167}
168
169void riscv_ipi_disable(void)
170{
171	int i;
 
172
173	if (WARN_ON_ONCE(!ipi_virq_base))
174		return;
 
 
175
176	for (i = 0; i < nr_ipi; i++)
177		disable_percpu_irq(ipi_virq_base + i);
178}
 
179
180bool riscv_ipi_have_virq_range(void)
181{
182	return (ipi_virq_base) ? true : false;
183}
184
185void riscv_ipi_set_virq_range(int virq, int nr)
186{
187	int i, err;
188
189	if (WARN_ON(ipi_virq_base))
190		return;
191
192	WARN_ON(nr < IPI_MAX);
193	nr_ipi = min(nr, IPI_MAX);
194	ipi_virq_base = virq;
195
196	/* Request IPIs */
197	for (i = 0; i < nr_ipi; i++) {
198		err = request_percpu_irq(ipi_virq_base + i, handle_IPI,
199					 "IPI", &ipi_dummy_dev);
200		WARN_ON(err);
201
202		ipi_desc[i] = irq_to_desc(ipi_virq_base + i);
203		irq_set_status_flags(ipi_virq_base + i, IRQ_HIDDEN);
204	}
205
206	/* Enabled IPIs for boot CPU immediately */
207	riscv_ipi_enable();
 
208}
209
210static const char * const ipi_names[] = {
211	[IPI_RESCHEDULE]	= "Rescheduling interrupts",
212	[IPI_CALL_FUNC]		= "Function call interrupts",
213	[IPI_CPU_STOP]		= "CPU stop interrupts",
214	[IPI_CPU_CRASH_STOP]	= "CPU stop (for crash dump) interrupts",
215	[IPI_IRQ_WORK]		= "IRQ work interrupts",
216	[IPI_TIMER]		= "Timer broadcast interrupts",
217	[IPI_CPU_BACKTRACE]     = "CPU backtrace interrupts",
218	[IPI_KGDB_ROUNDUP]	= "KGDB roundup interrupts",
219};
220
221void show_ipi_stats(struct seq_file *p, int prec)
222{
223	unsigned int cpu, i;
224
225	for (i = 0; i < IPI_MAX; i++) {
226		seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
227			   prec >= 4 ? " " : "");
228		for_each_online_cpu(cpu)
229			seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
230		seq_printf(p, " %s\n", ipi_names[i]);
231	}
232}
233
234void arch_send_call_function_ipi_mask(struct cpumask *mask)
235{
236	send_ipi_mask(mask, IPI_CALL_FUNC);
237}
238
239void arch_send_call_function_single_ipi(int cpu)
240{
241	send_ipi_single(cpu, IPI_CALL_FUNC);
242}
243
244#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
245void tick_broadcast(const struct cpumask *mask)
246{
247	send_ipi_mask(mask, IPI_TIMER);
248}
249#endif
250
251void smp_send_stop(void)
252{
253	unsigned long timeout;
254
255	if (num_online_cpus() > 1) {
256		cpumask_t mask;
257
258		cpumask_copy(&mask, cpu_online_mask);
259		cpumask_clear_cpu(smp_processor_id(), &mask);
260
261		if (system_state <= SYSTEM_RUNNING)
262			pr_crit("SMP: stopping secondary CPUs\n");
263		send_ipi_mask(&mask, IPI_CPU_STOP);
264	}
265
266	/* Wait up to one second for other CPUs to stop */
267	timeout = USEC_PER_SEC;
268	while (num_online_cpus() > 1 && timeout--)
269		udelay(1);
270
271	if (num_online_cpus() > 1)
272		pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
273			   cpumask_pr_args(cpu_online_mask));
274}
275
276#ifdef CONFIG_KEXEC_CORE
277/*
278 * The number of CPUs online, not counting this CPU (which may not be
279 * fully online and so not counted in num_online_cpus()).
280 */
281static inline unsigned int num_other_online_cpus(void)
282{
283	unsigned int this_cpu_online = cpu_online(smp_processor_id());
284
285	return num_online_cpus() - this_cpu_online;
286}
287
288void crash_smp_send_stop(void)
289{
290	static int cpus_stopped;
291	cpumask_t mask;
292	unsigned long timeout;
293
294	/*
295	 * This function can be called twice in panic path, but obviously
296	 * we execute this only once.
297	 */
298	if (cpus_stopped)
299		return;
300
301	cpus_stopped = 1;
302
303	/*
304	 * If this cpu is the only one alive at this point in time, online or
305	 * not, there are no stop messages to be sent around, so just back out.
306	 */
307	if (num_other_online_cpus() == 0)
308		return;
309
310	cpumask_copy(&mask, cpu_online_mask);
311	cpumask_clear_cpu(smp_processor_id(), &mask);
312
313	atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
314
315	pr_crit("SMP: stopping secondary CPUs\n");
316	send_ipi_mask(&mask, IPI_CPU_CRASH_STOP);
317
318	/* Wait up to one second for other CPUs to stop */
319	timeout = USEC_PER_SEC;
320	while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
321		udelay(1);
322
323	if (atomic_read(&waiting_for_crash_ipi) > 0)
324		pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
325			cpumask_pr_args(&mask));
326}
327
328bool smp_crash_stop_failed(void)
329{
330	return (atomic_read(&waiting_for_crash_ipi) > 0);
331}
332#endif
333
334void arch_smp_send_reschedule(int cpu)
335{
336	send_ipi_single(cpu, IPI_RESCHEDULE);
337}
338EXPORT_SYMBOL_GPL(arch_smp_send_reschedule);
339
340static void riscv_backtrace_ipi(cpumask_t *mask)
341{
342	send_ipi_mask(mask, IPI_CPU_BACKTRACE);
343}
344
345void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu)
346{
347	nmi_trigger_cpumask_backtrace(mask, exclude_cpu, riscv_backtrace_ipi);
348}
349
350#ifdef CONFIG_KGDB
351void kgdb_roundup_cpus(void)
352{
353	int this_cpu = raw_smp_processor_id();
354	int cpu;
355
356	for_each_online_cpu(cpu) {
357		/* No need to roundup ourselves */
358		if (cpu == this_cpu)
359			continue;
360
361		send_ipi_single(cpu, IPI_KGDB_ROUNDUP);
362	}
363}
364#endif