Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * An rtc driver for the Dallas DS1511
4 *
5 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
6 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
7 *
8 * Real time clock driver for the Dallas 1511 chip, which also
9 * contains a watchdog timer. There is a tiny amount of code that
10 * platform code could use to mess with the watchdog device a little
11 * bit, but not a full watchdog driver.
12 */
13
14#include <linux/bcd.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/gfp.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/module.h>
24
25enum ds1511reg {
26 DS1511_SEC = 0x0,
27 DS1511_MIN = 0x1,
28 DS1511_HOUR = 0x2,
29 DS1511_DOW = 0x3,
30 DS1511_DOM = 0x4,
31 DS1511_MONTH = 0x5,
32 DS1511_YEAR = 0x6,
33 DS1511_CENTURY = 0x7,
34 DS1511_AM1_SEC = 0x8,
35 DS1511_AM2_MIN = 0x9,
36 DS1511_AM3_HOUR = 0xa,
37 DS1511_AM4_DATE = 0xb,
38 DS1511_WD_MSEC = 0xc,
39 DS1511_WD_SEC = 0xd,
40 DS1511_CONTROL_A = 0xe,
41 DS1511_CONTROL_B = 0xf,
42 DS1511_RAMADDR_LSB = 0x10,
43 DS1511_RAMDATA = 0x13
44};
45
46#define DS1511_BLF1 0x80
47#define DS1511_BLF2 0x40
48#define DS1511_PRS 0x20
49#define DS1511_PAB 0x10
50#define DS1511_TDF 0x08
51#define DS1511_KSF 0x04
52#define DS1511_WDF 0x02
53#define DS1511_IRQF 0x01
54#define DS1511_TE 0x80
55#define DS1511_CS 0x40
56#define DS1511_BME 0x20
57#define DS1511_TPE 0x10
58#define DS1511_TIE 0x08
59#define DS1511_KIE 0x04
60#define DS1511_WDE 0x02
61#define DS1511_WDS 0x01
62#define DS1511_RAM_MAX 0x100
63
64#define RTC_CMD DS1511_CONTROL_B
65#define RTC_CMD1 DS1511_CONTROL_A
66
67#define RTC_ALARM_SEC DS1511_AM1_SEC
68#define RTC_ALARM_MIN DS1511_AM2_MIN
69#define RTC_ALARM_HOUR DS1511_AM3_HOUR
70#define RTC_ALARM_DATE DS1511_AM4_DATE
71
72#define RTC_SEC DS1511_SEC
73#define RTC_MIN DS1511_MIN
74#define RTC_HOUR DS1511_HOUR
75#define RTC_DOW DS1511_DOW
76#define RTC_DOM DS1511_DOM
77#define RTC_MON DS1511_MONTH
78#define RTC_YEAR DS1511_YEAR
79#define RTC_CENTURY DS1511_CENTURY
80
81#define RTC_TIE DS1511_TIE
82#define RTC_TE DS1511_TE
83
84struct rtc_plat_data {
85 struct rtc_device *rtc;
86 void __iomem *ioaddr; /* virtual base address */
87 int irq;
88 unsigned int irqen;
89 int alrm_sec;
90 int alrm_min;
91 int alrm_hour;
92 int alrm_mday;
93 spinlock_t lock;
94};
95
96static DEFINE_SPINLOCK(ds1511_lock);
97
98static __iomem char *ds1511_base;
99static u32 reg_spacing = 1;
100
101static noinline void
102rtc_write(uint8_t val, uint32_t reg)
103{
104 writeb(val, ds1511_base + (reg * reg_spacing));
105}
106
107static inline void
108rtc_write_alarm(uint8_t val, enum ds1511reg reg)
109{
110 rtc_write((val | 0x80), reg);
111}
112
113static noinline uint8_t
114rtc_read(enum ds1511reg reg)
115{
116 return readb(ds1511_base + (reg * reg_spacing));
117}
118
119static inline void
120rtc_disable_update(void)
121{
122 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
123}
124
125static void
126rtc_enable_update(void)
127{
128 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
129}
130
131/*
132 * #define DS1511_WDOG_RESET_SUPPORT
133 *
134 * Uncomment this if you want to use these routines in
135 * some platform code.
136 */
137#ifdef DS1511_WDOG_RESET_SUPPORT
138/*
139 * just enough code to set the watchdog timer so that it
140 * will reboot the system
141 */
142void
143ds1511_wdog_set(unsigned long deciseconds)
144{
145 /*
146 * the wdog timer can take 99.99 seconds
147 */
148 deciseconds %= 10000;
149 /*
150 * set the wdog values in the wdog registers
151 */
152 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
153 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
154 /*
155 * set wdog enable and wdog 'steering' bit to issue a reset
156 */
157 rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
158}
159
160void
161ds1511_wdog_disable(void)
162{
163 /*
164 * clear wdog enable and wdog 'steering' bits
165 */
166 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
167 /*
168 * clear the wdog counter
169 */
170 rtc_write(0, DS1511_WD_MSEC);
171 rtc_write(0, DS1511_WD_SEC);
172}
173#endif
174
175/*
176 * set the rtc chip's idea of the time.
177 * stupidly, some callers call with year unmolested;
178 * and some call with year = year - 1900. thanks.
179 */
180static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
181{
182 u8 mon, day, dow, hrs, min, sec, yrs, cen;
183 unsigned long flags;
184
185 /*
186 * won't have to change this for a while
187 */
188 if (rtc_tm->tm_year < 1900)
189 rtc_tm->tm_year += 1900;
190
191 if (rtc_tm->tm_year < 1970)
192 return -EINVAL;
193
194 yrs = rtc_tm->tm_year % 100;
195 cen = rtc_tm->tm_year / 100;
196 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
197 day = rtc_tm->tm_mday;
198 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
199 hrs = rtc_tm->tm_hour;
200 min = rtc_tm->tm_min;
201 sec = rtc_tm->tm_sec;
202
203 if ((mon > 12) || (day == 0))
204 return -EINVAL;
205
206 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
207 return -EINVAL;
208
209 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
210 return -EINVAL;
211
212 /*
213 * each register is a different number of valid bits
214 */
215 sec = bin2bcd(sec) & 0x7f;
216 min = bin2bcd(min) & 0x7f;
217 hrs = bin2bcd(hrs) & 0x3f;
218 day = bin2bcd(day) & 0x3f;
219 mon = bin2bcd(mon) & 0x1f;
220 yrs = bin2bcd(yrs) & 0xff;
221 cen = bin2bcd(cen) & 0xff;
222
223 spin_lock_irqsave(&ds1511_lock, flags);
224 rtc_disable_update();
225 rtc_write(cen, RTC_CENTURY);
226 rtc_write(yrs, RTC_YEAR);
227 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
228 rtc_write(day, RTC_DOM);
229 rtc_write(hrs, RTC_HOUR);
230 rtc_write(min, RTC_MIN);
231 rtc_write(sec, RTC_SEC);
232 rtc_write(dow, RTC_DOW);
233 rtc_enable_update();
234 spin_unlock_irqrestore(&ds1511_lock, flags);
235
236 return 0;
237}
238
239static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
240{
241 unsigned int century;
242 unsigned long flags;
243
244 spin_lock_irqsave(&ds1511_lock, flags);
245 rtc_disable_update();
246
247 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
248 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
249 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
250 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
251 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
252 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
253 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
254 century = rtc_read(RTC_CENTURY);
255
256 rtc_enable_update();
257 spin_unlock_irqrestore(&ds1511_lock, flags);
258
259 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
260 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
261 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
262 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
263 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
264 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
265 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
266 century = bcd2bin(century) * 100;
267
268 /*
269 * Account for differences between how the RTC uses the values
270 * and how they are defined in a struct rtc_time;
271 */
272 century += rtc_tm->tm_year;
273 rtc_tm->tm_year = century - 1900;
274
275 rtc_tm->tm_mon--;
276
277 return 0;
278}
279
280/*
281 * write the alarm register settings
282 *
283 * we only have the use to interrupt every second, otherwise
284 * known as the update interrupt, or the interrupt if the whole
285 * date/hours/mins/secs matches. the ds1511 has many more
286 * permutations, but the kernel doesn't.
287 */
288static void
289ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
290{
291 unsigned long flags;
292
293 spin_lock_irqsave(&pdata->lock, flags);
294 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
295 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
296 RTC_ALARM_DATE);
297 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
298 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
299 RTC_ALARM_HOUR);
300 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
301 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
302 RTC_ALARM_MIN);
303 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
304 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
305 RTC_ALARM_SEC);
306 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
307 rtc_read(RTC_CMD1); /* clear interrupts */
308 spin_unlock_irqrestore(&pdata->lock, flags);
309}
310
311static int
312ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
313{
314 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
315
316 if (pdata->irq <= 0)
317 return -EINVAL;
318
319 pdata->alrm_mday = alrm->time.tm_mday;
320 pdata->alrm_hour = alrm->time.tm_hour;
321 pdata->alrm_min = alrm->time.tm_min;
322 pdata->alrm_sec = alrm->time.tm_sec;
323 if (alrm->enabled)
324 pdata->irqen |= RTC_AF;
325
326 ds1511_rtc_update_alarm(pdata);
327 return 0;
328}
329
330static int
331ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
332{
333 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
334
335 if (pdata->irq <= 0)
336 return -EINVAL;
337
338 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
339 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
340 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
341 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
342 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
343 return 0;
344}
345
346static irqreturn_t
347ds1511_interrupt(int irq, void *dev_id)
348{
349 struct platform_device *pdev = dev_id;
350 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
351 unsigned long events = 0;
352
353 spin_lock(&pdata->lock);
354 /*
355 * read and clear interrupt
356 */
357 if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
358 events = RTC_IRQF;
359 if (rtc_read(RTC_ALARM_SEC) & 0x80)
360 events |= RTC_UF;
361 else
362 events |= RTC_AF;
363 rtc_update_irq(pdata->rtc, 1, events);
364 }
365 spin_unlock(&pdata->lock);
366 return events ? IRQ_HANDLED : IRQ_NONE;
367}
368
369static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
370{
371 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
372
373 if (pdata->irq <= 0)
374 return -EINVAL;
375 if (enabled)
376 pdata->irqen |= RTC_AF;
377 else
378 pdata->irqen &= ~RTC_AF;
379 ds1511_rtc_update_alarm(pdata);
380 return 0;
381}
382
383static const struct rtc_class_ops ds1511_rtc_ops = {
384 .read_time = ds1511_rtc_read_time,
385 .set_time = ds1511_rtc_set_time,
386 .read_alarm = ds1511_rtc_read_alarm,
387 .set_alarm = ds1511_rtc_set_alarm,
388 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
389};
390
391static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
392 size_t size)
393{
394 int i;
395
396 rtc_write(pos, DS1511_RAMADDR_LSB);
397 for (i = 0; i < size; i++)
398 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
399
400 return 0;
401}
402
403static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
404 size_t size)
405{
406 int i;
407
408 rtc_write(pos, DS1511_RAMADDR_LSB);
409 for (i = 0; i < size; i++)
410 rtc_write(*(char *)buf++, DS1511_RAMDATA);
411
412 return 0;
413}
414
415static int ds1511_rtc_probe(struct platform_device *pdev)
416{
417 struct rtc_plat_data *pdata;
418 int ret = 0;
419 struct nvmem_config ds1511_nvmem_cfg = {
420 .name = "ds1511_nvram",
421 .word_size = 1,
422 .stride = 1,
423 .size = DS1511_RAM_MAX,
424 .reg_read = ds1511_nvram_read,
425 .reg_write = ds1511_nvram_write,
426 .priv = &pdev->dev,
427 };
428
429 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
430 if (!pdata)
431 return -ENOMEM;
432
433 ds1511_base = devm_platform_ioremap_resource(pdev, 0);
434 if (IS_ERR(ds1511_base))
435 return PTR_ERR(ds1511_base);
436 pdata->ioaddr = ds1511_base;
437 pdata->irq = platform_get_irq(pdev, 0);
438
439 /*
440 * turn on the clock and the crystal, etc.
441 */
442 rtc_write(DS1511_BME, RTC_CMD);
443 rtc_write(0, RTC_CMD1);
444 /*
445 * clear the wdog counter
446 */
447 rtc_write(0, DS1511_WD_MSEC);
448 rtc_write(0, DS1511_WD_SEC);
449 /*
450 * start the clock
451 */
452 rtc_enable_update();
453
454 /*
455 * check for a dying bat-tree
456 */
457 if (rtc_read(RTC_CMD1) & DS1511_BLF1)
458 dev_warn(&pdev->dev, "voltage-low detected.\n");
459
460 spin_lock_init(&pdata->lock);
461 platform_set_drvdata(pdev, pdata);
462
463 pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
464 if (IS_ERR(pdata->rtc))
465 return PTR_ERR(pdata->rtc);
466
467 pdata->rtc->ops = &ds1511_rtc_ops;
468
469 pdata->rtc->nvram_old_abi = true;
470
471 ret = rtc_register_device(pdata->rtc);
472 if (ret)
473 return ret;
474
475 rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
476
477 /*
478 * if the platform has an interrupt in mind for this device,
479 * then by all means, set it
480 */
481 if (pdata->irq > 0) {
482 rtc_read(RTC_CMD1);
483 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
484 IRQF_SHARED, pdev->name, pdev) < 0) {
485
486 dev_warn(&pdev->dev, "interrupt not available.\n");
487 pdata->irq = 0;
488 }
489 }
490
491 return 0;
492}
493
494/* work with hotplug and coldplug */
495MODULE_ALIAS("platform:ds1511");
496
497static struct platform_driver ds1511_rtc_driver = {
498 .probe = ds1511_rtc_probe,
499 .driver = {
500 .name = "ds1511",
501 },
502};
503
504module_platform_driver(ds1511_rtc_driver);
505
506MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
507MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
508MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * An rtc driver for the Dallas DS1511
4 *
5 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
6 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
7 *
8 * Real time clock driver for the Dallas 1511 chip, which also
9 * contains a watchdog timer. There is a tiny amount of code that
10 * platform code could use to mess with the watchdog device a little
11 * bit, but not a full watchdog driver.
12 */
13
14#include <linux/bcd.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/gfp.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/module.h>
24
25enum ds1511reg {
26 DS1511_SEC = 0x0,
27 DS1511_MIN = 0x1,
28 DS1511_HOUR = 0x2,
29 DS1511_DOW = 0x3,
30 DS1511_DOM = 0x4,
31 DS1511_MONTH = 0x5,
32 DS1511_YEAR = 0x6,
33 DS1511_CENTURY = 0x7,
34 DS1511_AM1_SEC = 0x8,
35 DS1511_AM2_MIN = 0x9,
36 DS1511_AM3_HOUR = 0xa,
37 DS1511_AM4_DATE = 0xb,
38 DS1511_WD_MSEC = 0xc,
39 DS1511_WD_SEC = 0xd,
40 DS1511_CONTROL_A = 0xe,
41 DS1511_CONTROL_B = 0xf,
42 DS1511_RAMADDR_LSB = 0x10,
43 DS1511_RAMDATA = 0x13
44};
45
46#define DS1511_BLF1 0x80
47#define DS1511_BLF2 0x40
48#define DS1511_PRS 0x20
49#define DS1511_PAB 0x10
50#define DS1511_TDF 0x08
51#define DS1511_KSF 0x04
52#define DS1511_WDF 0x02
53#define DS1511_IRQF 0x01
54#define DS1511_TE 0x80
55#define DS1511_CS 0x40
56#define DS1511_BME 0x20
57#define DS1511_TPE 0x10
58#define DS1511_TIE 0x08
59#define DS1511_KIE 0x04
60#define DS1511_WDE 0x02
61#define DS1511_WDS 0x01
62#define DS1511_RAM_MAX 0x100
63
64#define RTC_CMD DS1511_CONTROL_B
65#define RTC_CMD1 DS1511_CONTROL_A
66
67#define RTC_ALARM_SEC DS1511_AM1_SEC
68#define RTC_ALARM_MIN DS1511_AM2_MIN
69#define RTC_ALARM_HOUR DS1511_AM3_HOUR
70#define RTC_ALARM_DATE DS1511_AM4_DATE
71
72#define RTC_SEC DS1511_SEC
73#define RTC_MIN DS1511_MIN
74#define RTC_HOUR DS1511_HOUR
75#define RTC_DOW DS1511_DOW
76#define RTC_DOM DS1511_DOM
77#define RTC_MON DS1511_MONTH
78#define RTC_YEAR DS1511_YEAR
79#define RTC_CENTURY DS1511_CENTURY
80
81#define RTC_TIE DS1511_TIE
82#define RTC_TE DS1511_TE
83
84struct rtc_plat_data {
85 struct rtc_device *rtc;
86 void __iomem *ioaddr; /* virtual base address */
87 int irq;
88 unsigned int irqen;
89 int alrm_sec;
90 int alrm_min;
91 int alrm_hour;
92 int alrm_mday;
93 spinlock_t lock;
94};
95
96static DEFINE_SPINLOCK(ds1511_lock);
97
98static __iomem char *ds1511_base;
99static u32 reg_spacing = 1;
100
101static noinline void
102rtc_write(uint8_t val, uint32_t reg)
103{
104 writeb(val, ds1511_base + (reg * reg_spacing));
105}
106
107static noinline uint8_t
108rtc_read(enum ds1511reg reg)
109{
110 return readb(ds1511_base + (reg * reg_spacing));
111}
112
113static inline void
114rtc_disable_update(void)
115{
116 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
117}
118
119static void
120rtc_enable_update(void)
121{
122 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
123}
124
125/*
126 * #define DS1511_WDOG_RESET_SUPPORT
127 *
128 * Uncomment this if you want to use these routines in
129 * some platform code.
130 */
131#ifdef DS1511_WDOG_RESET_SUPPORT
132/*
133 * just enough code to set the watchdog timer so that it
134 * will reboot the system
135 */
136void
137ds1511_wdog_set(unsigned long deciseconds)
138{
139 /*
140 * the wdog timer can take 99.99 seconds
141 */
142 deciseconds %= 10000;
143 /*
144 * set the wdog values in the wdog registers
145 */
146 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
147 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
148 /*
149 * set wdog enable and wdog 'steering' bit to issue a reset
150 */
151 rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
152}
153
154void
155ds1511_wdog_disable(void)
156{
157 /*
158 * clear wdog enable and wdog 'steering' bits
159 */
160 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
161 /*
162 * clear the wdog counter
163 */
164 rtc_write(0, DS1511_WD_MSEC);
165 rtc_write(0, DS1511_WD_SEC);
166}
167#endif
168
169/*
170 * set the rtc chip's idea of the time.
171 * stupidly, some callers call with year unmolested;
172 * and some call with year = year - 1900. thanks.
173 */
174static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
175{
176 u8 mon, day, dow, hrs, min, sec, yrs, cen;
177 unsigned long flags;
178
179 /*
180 * won't have to change this for a while
181 */
182 if (rtc_tm->tm_year < 1900)
183 rtc_tm->tm_year += 1900;
184
185 if (rtc_tm->tm_year < 1970)
186 return -EINVAL;
187
188 yrs = rtc_tm->tm_year % 100;
189 cen = rtc_tm->tm_year / 100;
190 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
191 day = rtc_tm->tm_mday;
192 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
193 hrs = rtc_tm->tm_hour;
194 min = rtc_tm->tm_min;
195 sec = rtc_tm->tm_sec;
196
197 if ((mon > 12) || (day == 0))
198 return -EINVAL;
199
200 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
201 return -EINVAL;
202
203 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
204 return -EINVAL;
205
206 /*
207 * each register is a different number of valid bits
208 */
209 sec = bin2bcd(sec) & 0x7f;
210 min = bin2bcd(min) & 0x7f;
211 hrs = bin2bcd(hrs) & 0x3f;
212 day = bin2bcd(day) & 0x3f;
213 mon = bin2bcd(mon) & 0x1f;
214 yrs = bin2bcd(yrs) & 0xff;
215 cen = bin2bcd(cen) & 0xff;
216
217 spin_lock_irqsave(&ds1511_lock, flags);
218 rtc_disable_update();
219 rtc_write(cen, RTC_CENTURY);
220 rtc_write(yrs, RTC_YEAR);
221 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
222 rtc_write(day, RTC_DOM);
223 rtc_write(hrs, RTC_HOUR);
224 rtc_write(min, RTC_MIN);
225 rtc_write(sec, RTC_SEC);
226 rtc_write(dow, RTC_DOW);
227 rtc_enable_update();
228 spin_unlock_irqrestore(&ds1511_lock, flags);
229
230 return 0;
231}
232
233static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
234{
235 unsigned int century;
236 unsigned long flags;
237
238 spin_lock_irqsave(&ds1511_lock, flags);
239 rtc_disable_update();
240
241 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
242 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
243 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
244 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
245 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
246 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
247 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
248 century = rtc_read(RTC_CENTURY);
249
250 rtc_enable_update();
251 spin_unlock_irqrestore(&ds1511_lock, flags);
252
253 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
254 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
255 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
256 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
257 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
258 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
259 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
260 century = bcd2bin(century) * 100;
261
262 /*
263 * Account for differences between how the RTC uses the values
264 * and how they are defined in a struct rtc_time;
265 */
266 century += rtc_tm->tm_year;
267 rtc_tm->tm_year = century - 1900;
268
269 rtc_tm->tm_mon--;
270
271 return 0;
272}
273
274/*
275 * write the alarm register settings
276 *
277 * we only have the use to interrupt every second, otherwise
278 * known as the update interrupt, or the interrupt if the whole
279 * date/hours/mins/secs matches. the ds1511 has many more
280 * permutations, but the kernel doesn't.
281 */
282static void
283ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
284{
285 unsigned long flags;
286
287 spin_lock_irqsave(&pdata->lock, flags);
288 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
289 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
290 RTC_ALARM_DATE);
291 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
292 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
293 RTC_ALARM_HOUR);
294 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
295 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
296 RTC_ALARM_MIN);
297 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
298 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
299 RTC_ALARM_SEC);
300 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
301 rtc_read(RTC_CMD1); /* clear interrupts */
302 spin_unlock_irqrestore(&pdata->lock, flags);
303}
304
305static int
306ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
307{
308 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
309
310 if (pdata->irq <= 0)
311 return -EINVAL;
312
313 pdata->alrm_mday = alrm->time.tm_mday;
314 pdata->alrm_hour = alrm->time.tm_hour;
315 pdata->alrm_min = alrm->time.tm_min;
316 pdata->alrm_sec = alrm->time.tm_sec;
317 if (alrm->enabled)
318 pdata->irqen |= RTC_AF;
319
320 ds1511_rtc_update_alarm(pdata);
321 return 0;
322}
323
324static int
325ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
326{
327 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
328
329 if (pdata->irq <= 0)
330 return -EINVAL;
331
332 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
333 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
334 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
335 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
336 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
337 return 0;
338}
339
340static irqreturn_t
341ds1511_interrupt(int irq, void *dev_id)
342{
343 struct platform_device *pdev = dev_id;
344 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
345 unsigned long events = 0;
346
347 spin_lock(&pdata->lock);
348 /*
349 * read and clear interrupt
350 */
351 if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
352 events = RTC_IRQF;
353 if (rtc_read(RTC_ALARM_SEC) & 0x80)
354 events |= RTC_UF;
355 else
356 events |= RTC_AF;
357 rtc_update_irq(pdata->rtc, 1, events);
358 }
359 spin_unlock(&pdata->lock);
360 return events ? IRQ_HANDLED : IRQ_NONE;
361}
362
363static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
364{
365 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
366
367 if (pdata->irq <= 0)
368 return -EINVAL;
369 if (enabled)
370 pdata->irqen |= RTC_AF;
371 else
372 pdata->irqen &= ~RTC_AF;
373 ds1511_rtc_update_alarm(pdata);
374 return 0;
375}
376
377static const struct rtc_class_ops ds1511_rtc_ops = {
378 .read_time = ds1511_rtc_read_time,
379 .set_time = ds1511_rtc_set_time,
380 .read_alarm = ds1511_rtc_read_alarm,
381 .set_alarm = ds1511_rtc_set_alarm,
382 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
383};
384
385static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
386 size_t size)
387{
388 int i;
389
390 rtc_write(pos, DS1511_RAMADDR_LSB);
391 for (i = 0; i < size; i++)
392 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
393
394 return 0;
395}
396
397static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
398 size_t size)
399{
400 int i;
401
402 rtc_write(pos, DS1511_RAMADDR_LSB);
403 for (i = 0; i < size; i++)
404 rtc_write(*(char *)buf++, DS1511_RAMDATA);
405
406 return 0;
407}
408
409static int ds1511_rtc_probe(struct platform_device *pdev)
410{
411 struct rtc_plat_data *pdata;
412 int ret = 0;
413 struct nvmem_config ds1511_nvmem_cfg = {
414 .name = "ds1511_nvram",
415 .word_size = 1,
416 .stride = 1,
417 .size = DS1511_RAM_MAX,
418 .reg_read = ds1511_nvram_read,
419 .reg_write = ds1511_nvram_write,
420 .priv = &pdev->dev,
421 };
422
423 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
424 if (!pdata)
425 return -ENOMEM;
426
427 ds1511_base = devm_platform_ioremap_resource(pdev, 0);
428 if (IS_ERR(ds1511_base))
429 return PTR_ERR(ds1511_base);
430 pdata->ioaddr = ds1511_base;
431 pdata->irq = platform_get_irq(pdev, 0);
432
433 /*
434 * turn on the clock and the crystal, etc.
435 */
436 rtc_write(DS1511_BME, RTC_CMD);
437 rtc_write(0, RTC_CMD1);
438 /*
439 * clear the wdog counter
440 */
441 rtc_write(0, DS1511_WD_MSEC);
442 rtc_write(0, DS1511_WD_SEC);
443 /*
444 * start the clock
445 */
446 rtc_enable_update();
447
448 /*
449 * check for a dying bat-tree
450 */
451 if (rtc_read(RTC_CMD1) & DS1511_BLF1)
452 dev_warn(&pdev->dev, "voltage-low detected.\n");
453
454 spin_lock_init(&pdata->lock);
455 platform_set_drvdata(pdev, pdata);
456
457 pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
458 if (IS_ERR(pdata->rtc))
459 return PTR_ERR(pdata->rtc);
460
461 pdata->rtc->ops = &ds1511_rtc_ops;
462
463 ret = devm_rtc_register_device(pdata->rtc);
464 if (ret)
465 return ret;
466
467 devm_rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
468
469 /*
470 * if the platform has an interrupt in mind for this device,
471 * then by all means, set it
472 */
473 if (pdata->irq > 0) {
474 rtc_read(RTC_CMD1);
475 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
476 IRQF_SHARED, pdev->name, pdev) < 0) {
477
478 dev_warn(&pdev->dev, "interrupt not available.\n");
479 pdata->irq = 0;
480 }
481 }
482
483 return 0;
484}
485
486/* work with hotplug and coldplug */
487MODULE_ALIAS("platform:ds1511");
488
489static struct platform_driver ds1511_rtc_driver = {
490 .probe = ds1511_rtc_probe,
491 .driver = {
492 .name = "ds1511",
493 },
494};
495
496module_platform_driver(ds1511_rtc_driver);
497
498MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
499MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
500MODULE_LICENSE("GPL");