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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * An rtc driver for the Dallas DS1511
4 *
5 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
6 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
7 *
8 * Real time clock driver for the Dallas 1511 chip, which also
9 * contains a watchdog timer. There is a tiny amount of code that
10 * platform code could use to mess with the watchdog device a little
11 * bit, but not a full watchdog driver.
12 */
13
14#include <linux/bcd.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/gfp.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <linux/rtc.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/module.h>
24
25enum ds1511reg {
26 DS1511_SEC = 0x0,
27 DS1511_MIN = 0x1,
28 DS1511_HOUR = 0x2,
29 DS1511_DOW = 0x3,
30 DS1511_DOM = 0x4,
31 DS1511_MONTH = 0x5,
32 DS1511_YEAR = 0x6,
33 DS1511_CENTURY = 0x7,
34 DS1511_AM1_SEC = 0x8,
35 DS1511_AM2_MIN = 0x9,
36 DS1511_AM3_HOUR = 0xa,
37 DS1511_AM4_DATE = 0xb,
38 DS1511_WD_MSEC = 0xc,
39 DS1511_WD_SEC = 0xd,
40 DS1511_CONTROL_A = 0xe,
41 DS1511_CONTROL_B = 0xf,
42 DS1511_RAMADDR_LSB = 0x10,
43 DS1511_RAMDATA = 0x13
44};
45
46#define DS1511_BLF1 0x80
47#define DS1511_BLF2 0x40
48#define DS1511_PRS 0x20
49#define DS1511_PAB 0x10
50#define DS1511_TDF 0x08
51#define DS1511_KSF 0x04
52#define DS1511_WDF 0x02
53#define DS1511_IRQF 0x01
54#define DS1511_TE 0x80
55#define DS1511_CS 0x40
56#define DS1511_BME 0x20
57#define DS1511_TPE 0x10
58#define DS1511_TIE 0x08
59#define DS1511_KIE 0x04
60#define DS1511_WDE 0x02
61#define DS1511_WDS 0x01
62#define DS1511_RAM_MAX 0x100
63
64#define RTC_CMD DS1511_CONTROL_B
65#define RTC_CMD1 DS1511_CONTROL_A
66
67#define RTC_ALARM_SEC DS1511_AM1_SEC
68#define RTC_ALARM_MIN DS1511_AM2_MIN
69#define RTC_ALARM_HOUR DS1511_AM3_HOUR
70#define RTC_ALARM_DATE DS1511_AM4_DATE
71
72#define RTC_SEC DS1511_SEC
73#define RTC_MIN DS1511_MIN
74#define RTC_HOUR DS1511_HOUR
75#define RTC_DOW DS1511_DOW
76#define RTC_DOM DS1511_DOM
77#define RTC_MON DS1511_MONTH
78#define RTC_YEAR DS1511_YEAR
79#define RTC_CENTURY DS1511_CENTURY
80
81#define RTC_TIE DS1511_TIE
82#define RTC_TE DS1511_TE
83
84struct rtc_plat_data {
85 struct rtc_device *rtc;
86 void __iomem *ioaddr; /* virtual base address */
87 int irq;
88 unsigned int irqen;
89 int alrm_sec;
90 int alrm_min;
91 int alrm_hour;
92 int alrm_mday;
93 spinlock_t lock;
94};
95
96static DEFINE_SPINLOCK(ds1511_lock);
97
98static __iomem char *ds1511_base;
99static u32 reg_spacing = 1;
100
101static noinline void
102rtc_write(uint8_t val, uint32_t reg)
103{
104 writeb(val, ds1511_base + (reg * reg_spacing));
105}
106
107static inline void
108rtc_write_alarm(uint8_t val, enum ds1511reg reg)
109{
110 rtc_write((val | 0x80), reg);
111}
112
113static noinline uint8_t
114rtc_read(enum ds1511reg reg)
115{
116 return readb(ds1511_base + (reg * reg_spacing));
117}
118
119static inline void
120rtc_disable_update(void)
121{
122 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
123}
124
125static void
126rtc_enable_update(void)
127{
128 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
129}
130
131/*
132 * #define DS1511_WDOG_RESET_SUPPORT
133 *
134 * Uncomment this if you want to use these routines in
135 * some platform code.
136 */
137#ifdef DS1511_WDOG_RESET_SUPPORT
138/*
139 * just enough code to set the watchdog timer so that it
140 * will reboot the system
141 */
142void
143ds1511_wdog_set(unsigned long deciseconds)
144{
145 /*
146 * the wdog timer can take 99.99 seconds
147 */
148 deciseconds %= 10000;
149 /*
150 * set the wdog values in the wdog registers
151 */
152 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
153 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
154 /*
155 * set wdog enable and wdog 'steering' bit to issue a reset
156 */
157 rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
158}
159
160void
161ds1511_wdog_disable(void)
162{
163 /*
164 * clear wdog enable and wdog 'steering' bits
165 */
166 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
167 /*
168 * clear the wdog counter
169 */
170 rtc_write(0, DS1511_WD_MSEC);
171 rtc_write(0, DS1511_WD_SEC);
172}
173#endif
174
175/*
176 * set the rtc chip's idea of the time.
177 * stupidly, some callers call with year unmolested;
178 * and some call with year = year - 1900. thanks.
179 */
180static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
181{
182 u8 mon, day, dow, hrs, min, sec, yrs, cen;
183 unsigned long flags;
184
185 /*
186 * won't have to change this for a while
187 */
188 if (rtc_tm->tm_year < 1900)
189 rtc_tm->tm_year += 1900;
190
191 if (rtc_tm->tm_year < 1970)
192 return -EINVAL;
193
194 yrs = rtc_tm->tm_year % 100;
195 cen = rtc_tm->tm_year / 100;
196 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
197 day = rtc_tm->tm_mday;
198 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
199 hrs = rtc_tm->tm_hour;
200 min = rtc_tm->tm_min;
201 sec = rtc_tm->tm_sec;
202
203 if ((mon > 12) || (day == 0))
204 return -EINVAL;
205
206 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
207 return -EINVAL;
208
209 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
210 return -EINVAL;
211
212 /*
213 * each register is a different number of valid bits
214 */
215 sec = bin2bcd(sec) & 0x7f;
216 min = bin2bcd(min) & 0x7f;
217 hrs = bin2bcd(hrs) & 0x3f;
218 day = bin2bcd(day) & 0x3f;
219 mon = bin2bcd(mon) & 0x1f;
220 yrs = bin2bcd(yrs) & 0xff;
221 cen = bin2bcd(cen) & 0xff;
222
223 spin_lock_irqsave(&ds1511_lock, flags);
224 rtc_disable_update();
225 rtc_write(cen, RTC_CENTURY);
226 rtc_write(yrs, RTC_YEAR);
227 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
228 rtc_write(day, RTC_DOM);
229 rtc_write(hrs, RTC_HOUR);
230 rtc_write(min, RTC_MIN);
231 rtc_write(sec, RTC_SEC);
232 rtc_write(dow, RTC_DOW);
233 rtc_enable_update();
234 spin_unlock_irqrestore(&ds1511_lock, flags);
235
236 return 0;
237}
238
239static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
240{
241 unsigned int century;
242 unsigned long flags;
243
244 spin_lock_irqsave(&ds1511_lock, flags);
245 rtc_disable_update();
246
247 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
248 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
249 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
250 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
251 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
252 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
253 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
254 century = rtc_read(RTC_CENTURY);
255
256 rtc_enable_update();
257 spin_unlock_irqrestore(&ds1511_lock, flags);
258
259 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
260 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
261 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
262 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
263 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
264 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
265 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
266 century = bcd2bin(century) * 100;
267
268 /*
269 * Account for differences between how the RTC uses the values
270 * and how they are defined in a struct rtc_time;
271 */
272 century += rtc_tm->tm_year;
273 rtc_tm->tm_year = century - 1900;
274
275 rtc_tm->tm_mon--;
276
277 return 0;
278}
279
280/*
281 * write the alarm register settings
282 *
283 * we only have the use to interrupt every second, otherwise
284 * known as the update interrupt, or the interrupt if the whole
285 * date/hours/mins/secs matches. the ds1511 has many more
286 * permutations, but the kernel doesn't.
287 */
288static void
289ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
290{
291 unsigned long flags;
292
293 spin_lock_irqsave(&pdata->lock, flags);
294 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
295 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
296 RTC_ALARM_DATE);
297 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
298 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
299 RTC_ALARM_HOUR);
300 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
301 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
302 RTC_ALARM_MIN);
303 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
304 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
305 RTC_ALARM_SEC);
306 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
307 rtc_read(RTC_CMD1); /* clear interrupts */
308 spin_unlock_irqrestore(&pdata->lock, flags);
309}
310
311static int
312ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
313{
314 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
315
316 if (pdata->irq <= 0)
317 return -EINVAL;
318
319 pdata->alrm_mday = alrm->time.tm_mday;
320 pdata->alrm_hour = alrm->time.tm_hour;
321 pdata->alrm_min = alrm->time.tm_min;
322 pdata->alrm_sec = alrm->time.tm_sec;
323 if (alrm->enabled)
324 pdata->irqen |= RTC_AF;
325
326 ds1511_rtc_update_alarm(pdata);
327 return 0;
328}
329
330static int
331ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
332{
333 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
334
335 if (pdata->irq <= 0)
336 return -EINVAL;
337
338 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
339 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
340 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
341 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
342 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
343 return 0;
344}
345
346static irqreturn_t
347ds1511_interrupt(int irq, void *dev_id)
348{
349 struct platform_device *pdev = dev_id;
350 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
351 unsigned long events = 0;
352
353 spin_lock(&pdata->lock);
354 /*
355 * read and clear interrupt
356 */
357 if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
358 events = RTC_IRQF;
359 if (rtc_read(RTC_ALARM_SEC) & 0x80)
360 events |= RTC_UF;
361 else
362 events |= RTC_AF;
363 rtc_update_irq(pdata->rtc, 1, events);
364 }
365 spin_unlock(&pdata->lock);
366 return events ? IRQ_HANDLED : IRQ_NONE;
367}
368
369static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
370{
371 struct rtc_plat_data *pdata = dev_get_drvdata(dev);
372
373 if (pdata->irq <= 0)
374 return -EINVAL;
375 if (enabled)
376 pdata->irqen |= RTC_AF;
377 else
378 pdata->irqen &= ~RTC_AF;
379 ds1511_rtc_update_alarm(pdata);
380 return 0;
381}
382
383static const struct rtc_class_ops ds1511_rtc_ops = {
384 .read_time = ds1511_rtc_read_time,
385 .set_time = ds1511_rtc_set_time,
386 .read_alarm = ds1511_rtc_read_alarm,
387 .set_alarm = ds1511_rtc_set_alarm,
388 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
389};
390
391static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
392 size_t size)
393{
394 int i;
395
396 rtc_write(pos, DS1511_RAMADDR_LSB);
397 for (i = 0; i < size; i++)
398 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
399
400 return 0;
401}
402
403static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
404 size_t size)
405{
406 int i;
407
408 rtc_write(pos, DS1511_RAMADDR_LSB);
409 for (i = 0; i < size; i++)
410 rtc_write(*(char *)buf++, DS1511_RAMDATA);
411
412 return 0;
413}
414
415static int ds1511_rtc_probe(struct platform_device *pdev)
416{
417 struct rtc_plat_data *pdata;
418 int ret = 0;
419 struct nvmem_config ds1511_nvmem_cfg = {
420 .name = "ds1511_nvram",
421 .word_size = 1,
422 .stride = 1,
423 .size = DS1511_RAM_MAX,
424 .reg_read = ds1511_nvram_read,
425 .reg_write = ds1511_nvram_write,
426 .priv = &pdev->dev,
427 };
428
429 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
430 if (!pdata)
431 return -ENOMEM;
432
433 ds1511_base = devm_platform_ioremap_resource(pdev, 0);
434 if (IS_ERR(ds1511_base))
435 return PTR_ERR(ds1511_base);
436 pdata->ioaddr = ds1511_base;
437 pdata->irq = platform_get_irq(pdev, 0);
438
439 /*
440 * turn on the clock and the crystal, etc.
441 */
442 rtc_write(DS1511_BME, RTC_CMD);
443 rtc_write(0, RTC_CMD1);
444 /*
445 * clear the wdog counter
446 */
447 rtc_write(0, DS1511_WD_MSEC);
448 rtc_write(0, DS1511_WD_SEC);
449 /*
450 * start the clock
451 */
452 rtc_enable_update();
453
454 /*
455 * check for a dying bat-tree
456 */
457 if (rtc_read(RTC_CMD1) & DS1511_BLF1)
458 dev_warn(&pdev->dev, "voltage-low detected.\n");
459
460 spin_lock_init(&pdata->lock);
461 platform_set_drvdata(pdev, pdata);
462
463 pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
464 if (IS_ERR(pdata->rtc))
465 return PTR_ERR(pdata->rtc);
466
467 pdata->rtc->ops = &ds1511_rtc_ops;
468
469 pdata->rtc->nvram_old_abi = true;
470
471 ret = rtc_register_device(pdata->rtc);
472 if (ret)
473 return ret;
474
475 rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
476
477 /*
478 * if the platform has an interrupt in mind for this device,
479 * then by all means, set it
480 */
481 if (pdata->irq > 0) {
482 rtc_read(RTC_CMD1);
483 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
484 IRQF_SHARED, pdev->name, pdev) < 0) {
485
486 dev_warn(&pdev->dev, "interrupt not available.\n");
487 pdata->irq = 0;
488 }
489 }
490
491 return 0;
492}
493
494/* work with hotplug and coldplug */
495MODULE_ALIAS("platform:ds1511");
496
497static struct platform_driver ds1511_rtc_driver = {
498 .probe = ds1511_rtc_probe,
499 .driver = {
500 .name = "ds1511",
501 },
502};
503
504module_platform_driver(ds1511_rtc_driver);
505
506MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
507MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
508MODULE_LICENSE("GPL");
1/*
2 * An rtc driver for the Dallas DS1511
3 *
4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
5 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Real time clock driver for the Dallas 1511 chip, which also
12 * contains a watchdog timer. There is a tiny amount of code that
13 * platform code could use to mess with the watchdog device a little
14 * bit, but not a full watchdog driver.
15 */
16
17#include <linux/bcd.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/gfp.h>
21#include <linux/delay.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/module.h>
27
28#define DRV_VERSION "0.6"
29
30enum ds1511reg {
31 DS1511_SEC = 0x0,
32 DS1511_MIN = 0x1,
33 DS1511_HOUR = 0x2,
34 DS1511_DOW = 0x3,
35 DS1511_DOM = 0x4,
36 DS1511_MONTH = 0x5,
37 DS1511_YEAR = 0x6,
38 DS1511_CENTURY = 0x7,
39 DS1511_AM1_SEC = 0x8,
40 DS1511_AM2_MIN = 0x9,
41 DS1511_AM3_HOUR = 0xa,
42 DS1511_AM4_DATE = 0xb,
43 DS1511_WD_MSEC = 0xc,
44 DS1511_WD_SEC = 0xd,
45 DS1511_CONTROL_A = 0xe,
46 DS1511_CONTROL_B = 0xf,
47 DS1511_RAMADDR_LSB = 0x10,
48 DS1511_RAMDATA = 0x13
49};
50
51#define DS1511_BLF1 0x80
52#define DS1511_BLF2 0x40
53#define DS1511_PRS 0x20
54#define DS1511_PAB 0x10
55#define DS1511_TDF 0x08
56#define DS1511_KSF 0x04
57#define DS1511_WDF 0x02
58#define DS1511_IRQF 0x01
59#define DS1511_TE 0x80
60#define DS1511_CS 0x40
61#define DS1511_BME 0x20
62#define DS1511_TPE 0x10
63#define DS1511_TIE 0x08
64#define DS1511_KIE 0x04
65#define DS1511_WDE 0x02
66#define DS1511_WDS 0x01
67#define DS1511_RAM_MAX 0x100
68
69#define RTC_CMD DS1511_CONTROL_B
70#define RTC_CMD1 DS1511_CONTROL_A
71
72#define RTC_ALARM_SEC DS1511_AM1_SEC
73#define RTC_ALARM_MIN DS1511_AM2_MIN
74#define RTC_ALARM_HOUR DS1511_AM3_HOUR
75#define RTC_ALARM_DATE DS1511_AM4_DATE
76
77#define RTC_SEC DS1511_SEC
78#define RTC_MIN DS1511_MIN
79#define RTC_HOUR DS1511_HOUR
80#define RTC_DOW DS1511_DOW
81#define RTC_DOM DS1511_DOM
82#define RTC_MON DS1511_MONTH
83#define RTC_YEAR DS1511_YEAR
84#define RTC_CENTURY DS1511_CENTURY
85
86#define RTC_TIE DS1511_TIE
87#define RTC_TE DS1511_TE
88
89struct rtc_plat_data {
90 struct rtc_device *rtc;
91 void __iomem *ioaddr; /* virtual base address */
92 int irq;
93 unsigned int irqen;
94 int alrm_sec;
95 int alrm_min;
96 int alrm_hour;
97 int alrm_mday;
98 spinlock_t lock;
99};
100
101static DEFINE_SPINLOCK(ds1511_lock);
102
103static __iomem char *ds1511_base;
104static u32 reg_spacing = 1;
105
106static noinline void
107rtc_write(uint8_t val, uint32_t reg)
108{
109 writeb(val, ds1511_base + (reg * reg_spacing));
110}
111
112static inline void
113rtc_write_alarm(uint8_t val, enum ds1511reg reg)
114{
115 rtc_write((val | 0x80), reg);
116}
117
118static noinline uint8_t
119rtc_read(enum ds1511reg reg)
120{
121 return readb(ds1511_base + (reg * reg_spacing));
122}
123
124static inline void
125rtc_disable_update(void)
126{
127 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
128}
129
130static void
131rtc_enable_update(void)
132{
133 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
134}
135
136/*
137 * #define DS1511_WDOG_RESET_SUPPORT
138 *
139 * Uncomment this if you want to use these routines in
140 * some platform code.
141 */
142#ifdef DS1511_WDOG_RESET_SUPPORT
143/*
144 * just enough code to set the watchdog timer so that it
145 * will reboot the system
146 */
147void
148ds1511_wdog_set(unsigned long deciseconds)
149{
150 /*
151 * the wdog timer can take 99.99 seconds
152 */
153 deciseconds %= 10000;
154 /*
155 * set the wdog values in the wdog registers
156 */
157 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
158 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
159 /*
160 * set wdog enable and wdog 'steering' bit to issue a reset
161 */
162 rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
163}
164
165void
166ds1511_wdog_disable(void)
167{
168 /*
169 * clear wdog enable and wdog 'steering' bits
170 */
171 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
172 /*
173 * clear the wdog counter
174 */
175 rtc_write(0, DS1511_WD_MSEC);
176 rtc_write(0, DS1511_WD_SEC);
177}
178#endif
179
180/*
181 * set the rtc chip's idea of the time.
182 * stupidly, some callers call with year unmolested;
183 * and some call with year = year - 1900. thanks.
184 */
185static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
186{
187 u8 mon, day, dow, hrs, min, sec, yrs, cen;
188 unsigned long flags;
189
190 /*
191 * won't have to change this for a while
192 */
193 if (rtc_tm->tm_year < 1900)
194 rtc_tm->tm_year += 1900;
195
196 if (rtc_tm->tm_year < 1970)
197 return -EINVAL;
198
199 yrs = rtc_tm->tm_year % 100;
200 cen = rtc_tm->tm_year / 100;
201 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
202 day = rtc_tm->tm_mday;
203 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
204 hrs = rtc_tm->tm_hour;
205 min = rtc_tm->tm_min;
206 sec = rtc_tm->tm_sec;
207
208 if ((mon > 12) || (day == 0))
209 return -EINVAL;
210
211 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
212 return -EINVAL;
213
214 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
215 return -EINVAL;
216
217 /*
218 * each register is a different number of valid bits
219 */
220 sec = bin2bcd(sec) & 0x7f;
221 min = bin2bcd(min) & 0x7f;
222 hrs = bin2bcd(hrs) & 0x3f;
223 day = bin2bcd(day) & 0x3f;
224 mon = bin2bcd(mon) & 0x1f;
225 yrs = bin2bcd(yrs) & 0xff;
226 cen = bin2bcd(cen) & 0xff;
227
228 spin_lock_irqsave(&ds1511_lock, flags);
229 rtc_disable_update();
230 rtc_write(cen, RTC_CENTURY);
231 rtc_write(yrs, RTC_YEAR);
232 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
233 rtc_write(day, RTC_DOM);
234 rtc_write(hrs, RTC_HOUR);
235 rtc_write(min, RTC_MIN);
236 rtc_write(sec, RTC_SEC);
237 rtc_write(dow, RTC_DOW);
238 rtc_enable_update();
239 spin_unlock_irqrestore(&ds1511_lock, flags);
240
241 return 0;
242}
243
244static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
245{
246 unsigned int century;
247 unsigned long flags;
248
249 spin_lock_irqsave(&ds1511_lock, flags);
250 rtc_disable_update();
251
252 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
253 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
254 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
255 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
256 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
257 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
258 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
259 century = rtc_read(RTC_CENTURY);
260
261 rtc_enable_update();
262 spin_unlock_irqrestore(&ds1511_lock, flags);
263
264 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
265 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
266 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
267 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
268 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
269 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
270 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
271 century = bcd2bin(century) * 100;
272
273 /*
274 * Account for differences between how the RTC uses the values
275 * and how they are defined in a struct rtc_time;
276 */
277 century += rtc_tm->tm_year;
278 rtc_tm->tm_year = century - 1900;
279
280 rtc_tm->tm_mon--;
281
282 if (rtc_valid_tm(rtc_tm) < 0) {
283 dev_err(dev, "retrieved date/time is not valid.\n");
284 rtc_time_to_tm(0, rtc_tm);
285 }
286 return 0;
287}
288
289/*
290 * write the alarm register settings
291 *
292 * we only have the use to interrupt every second, otherwise
293 * known as the update interrupt, or the interrupt if the whole
294 * date/hours/mins/secs matches. the ds1511 has many more
295 * permutations, but the kernel doesn't.
296 */
297static void
298ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
299{
300 unsigned long flags;
301
302 spin_lock_irqsave(&pdata->lock, flags);
303 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
304 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
305 RTC_ALARM_DATE);
306 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
307 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
308 RTC_ALARM_HOUR);
309 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
310 0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
311 RTC_ALARM_MIN);
312 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
313 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
314 RTC_ALARM_SEC);
315 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
316 rtc_read(RTC_CMD1); /* clear interrupts */
317 spin_unlock_irqrestore(&pdata->lock, flags);
318}
319
320static int
321ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
322{
323 struct platform_device *pdev = to_platform_device(dev);
324 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
325
326 if (pdata->irq <= 0)
327 return -EINVAL;
328
329 pdata->alrm_mday = alrm->time.tm_mday;
330 pdata->alrm_hour = alrm->time.tm_hour;
331 pdata->alrm_min = alrm->time.tm_min;
332 pdata->alrm_sec = alrm->time.tm_sec;
333 if (alrm->enabled)
334 pdata->irqen |= RTC_AF;
335
336 ds1511_rtc_update_alarm(pdata);
337 return 0;
338}
339
340static int
341ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
342{
343 struct platform_device *pdev = to_platform_device(dev);
344 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
345
346 if (pdata->irq <= 0)
347 return -EINVAL;
348
349 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
350 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
351 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
352 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
353 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
354 return 0;
355}
356
357static irqreturn_t
358ds1511_interrupt(int irq, void *dev_id)
359{
360 struct platform_device *pdev = dev_id;
361 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
362 unsigned long events = 0;
363
364 spin_lock(&pdata->lock);
365 /*
366 * read and clear interrupt
367 */
368 if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
369 events = RTC_IRQF;
370 if (rtc_read(RTC_ALARM_SEC) & 0x80)
371 events |= RTC_UF;
372 else
373 events |= RTC_AF;
374 rtc_update_irq(pdata->rtc, 1, events);
375 }
376 spin_unlock(&pdata->lock);
377 return events ? IRQ_HANDLED : IRQ_NONE;
378}
379
380static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
381{
382 struct platform_device *pdev = to_platform_device(dev);
383 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
384
385 if (pdata->irq <= 0)
386 return -EINVAL;
387 if (enabled)
388 pdata->irqen |= RTC_AF;
389 else
390 pdata->irqen &= ~RTC_AF;
391 ds1511_rtc_update_alarm(pdata);
392 return 0;
393}
394
395static const struct rtc_class_ops ds1511_rtc_ops = {
396 .read_time = ds1511_rtc_read_time,
397 .set_time = ds1511_rtc_set_time,
398 .read_alarm = ds1511_rtc_read_alarm,
399 .set_alarm = ds1511_rtc_set_alarm,
400 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable,
401};
402
403static ssize_t
404ds1511_nvram_read(struct file *filp, struct kobject *kobj,
405 struct bin_attribute *ba,
406 char *buf, loff_t pos, size_t size)
407{
408 ssize_t count;
409
410 rtc_write(pos, DS1511_RAMADDR_LSB);
411 for (count = 0; count < size; count++)
412 *buf++ = rtc_read(DS1511_RAMDATA);
413
414 return count;
415}
416
417static ssize_t
418ds1511_nvram_write(struct file *filp, struct kobject *kobj,
419 struct bin_attribute *bin_attr,
420 char *buf, loff_t pos, size_t size)
421{
422 ssize_t count;
423
424 rtc_write(pos, DS1511_RAMADDR_LSB);
425 for (count = 0; count < size; count++)
426 rtc_write(*buf++, DS1511_RAMDATA);
427
428 return count;
429}
430
431static struct bin_attribute ds1511_nvram_attr = {
432 .attr = {
433 .name = "nvram",
434 .mode = S_IRUGO | S_IWUSR,
435 },
436 .size = DS1511_RAM_MAX,
437 .read = ds1511_nvram_read,
438 .write = ds1511_nvram_write,
439};
440
441static int ds1511_rtc_probe(struct platform_device *pdev)
442{
443 struct resource *res;
444 struct rtc_plat_data *pdata;
445 int ret = 0;
446
447 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
448 if (!pdata)
449 return -ENOMEM;
450
451 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
452 ds1511_base = devm_ioremap_resource(&pdev->dev, res);
453 if (IS_ERR(ds1511_base))
454 return PTR_ERR(ds1511_base);
455 pdata->ioaddr = ds1511_base;
456 pdata->irq = platform_get_irq(pdev, 0);
457
458 /*
459 * turn on the clock and the crystal, etc.
460 */
461 rtc_write(DS1511_BME, RTC_CMD);
462 rtc_write(0, RTC_CMD1);
463 /*
464 * clear the wdog counter
465 */
466 rtc_write(0, DS1511_WD_MSEC);
467 rtc_write(0, DS1511_WD_SEC);
468 /*
469 * start the clock
470 */
471 rtc_enable_update();
472
473 /*
474 * check for a dying bat-tree
475 */
476 if (rtc_read(RTC_CMD1) & DS1511_BLF1)
477 dev_warn(&pdev->dev, "voltage-low detected.\n");
478
479 spin_lock_init(&pdata->lock);
480 platform_set_drvdata(pdev, pdata);
481
482 pdata->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
483 &ds1511_rtc_ops, THIS_MODULE);
484 if (IS_ERR(pdata->rtc))
485 return PTR_ERR(pdata->rtc);
486
487 /*
488 * if the platform has an interrupt in mind for this device,
489 * then by all means, set it
490 */
491 if (pdata->irq > 0) {
492 rtc_read(RTC_CMD1);
493 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
494 IRQF_SHARED, pdev->name, pdev) < 0) {
495
496 dev_warn(&pdev->dev, "interrupt not available.\n");
497 pdata->irq = 0;
498 }
499 }
500
501 ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
502 if (ret)
503 dev_err(&pdev->dev, "Unable to create sysfs entry: %s\n",
504 ds1511_nvram_attr.attr.name);
505
506 return 0;
507}
508
509static int ds1511_rtc_remove(struct platform_device *pdev)
510{
511 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
512
513 sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
514 if (pdata->irq > 0) {
515 /*
516 * disable the alarm interrupt
517 */
518 rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
519 rtc_read(RTC_CMD1);
520 }
521 return 0;
522}
523
524/* work with hotplug and coldplug */
525MODULE_ALIAS("platform:ds1511");
526
527static struct platform_driver ds1511_rtc_driver = {
528 .probe = ds1511_rtc_probe,
529 .remove = ds1511_rtc_remove,
530 .driver = {
531 .name = "ds1511",
532 },
533};
534
535module_platform_driver(ds1511_rtc_driver);
536
537MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
538MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
539MODULE_LICENSE("GPL");
540MODULE_VERSION(DRV_VERSION);