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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * SPI master driver using generic bitbanged GPIO
4 *
5 * Copyright (C) 2006,2008 David Brownell
6 * Copyright (C) 2017 Linus Walleij
7 */
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/gpio/consumer.h>
12#include <linux/of.h>
13#include <linux/of_device.h>
14
15#include <linux/spi/spi.h>
16#include <linux/spi/spi_bitbang.h>
17#include <linux/spi/spi_gpio.h>
18
19
20/*
21 * This bitbanging SPI master driver should help make systems usable
22 * when a native hardware SPI engine is not available, perhaps because
23 * its driver isn't yet working or because the I/O pins it requires
24 * are used for other purposes.
25 *
26 * platform_device->driver_data ... points to spi_gpio
27 *
28 * spi->controller_state ... reserved for bitbang framework code
29 *
30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
31 */
32
33struct spi_gpio {
34 struct spi_bitbang bitbang;
35 struct gpio_desc *sck;
36 struct gpio_desc *miso;
37 struct gpio_desc *mosi;
38 struct gpio_desc **cs_gpios;
39};
40
41/*----------------------------------------------------------------------*/
42
43/*
44 * Because the overhead of going through four GPIO procedure calls
45 * per transferred bit can make performance a problem, this code
46 * is set up so that you can use it in either of two ways:
47 *
48 * - The slow generic way: set up platform_data to hold the GPIO
49 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
50 * each of them. This driver can handle several such busses.
51 *
52 * - The quicker inlined way: only helps with platform GPIO code
53 * that inlines operations for constant GPIOs. This can give
54 * you tight (fast!) inner loops, but each such bus needs a
55 * new driver. You'll define a new C file, with Makefile and
56 * Kconfig support; the C code can be a total of six lines:
57 *
58 * #define DRIVER_NAME "myboard_spi2"
59 * #define SPI_MISO_GPIO 119
60 * #define SPI_MOSI_GPIO 120
61 * #define SPI_SCK_GPIO 121
62 * #define SPI_N_CHIPSEL 4
63 * #include "spi-gpio.c"
64 */
65
66#ifndef DRIVER_NAME
67#define DRIVER_NAME "spi_gpio"
68
69#define GENERIC_BITBANG /* vs tight inlines */
70
71#endif
72
73/*----------------------------------------------------------------------*/
74
75static inline struct spi_gpio *__pure
76spi_to_spi_gpio(const struct spi_device *spi)
77{
78 const struct spi_bitbang *bang;
79 struct spi_gpio *spi_gpio;
80
81 bang = spi_master_get_devdata(spi->master);
82 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
83 return spi_gpio;
84}
85
86/* These helpers are in turn called by the bitbang inlines */
87static inline void setsck(const struct spi_device *spi, int is_on)
88{
89 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
90
91 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
92}
93
94static inline void setmosi(const struct spi_device *spi, int is_on)
95{
96 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
97
98 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
99}
100
101static inline int getmiso(const struct spi_device *spi)
102{
103 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
104
105 if (spi->mode & SPI_3WIRE)
106 return !!gpiod_get_value_cansleep(spi_gpio->mosi);
107 else
108 return !!gpiod_get_value_cansleep(spi_gpio->miso);
109}
110
111/*
112 * NOTE: this clocks "as fast as we can". It "should" be a function of the
113 * requested device clock. Software overhead means we usually have trouble
114 * reaching even one Mbit/sec (except when we can inline bitops), so for now
115 * we'll just assume we never need additional per-bit slowdowns.
116 */
117#define spidelay(nsecs) do {} while (0)
118
119#include "spi-bitbang-txrx.h"
120
121/*
122 * These functions can leverage inline expansion of GPIO calls to shrink
123 * costs for a txrx bit, often by factors of around ten (by instruction
124 * count). That is particularly visible for larger word sizes, but helps
125 * even with default 8-bit words.
126 *
127 * REVISIT overheads calling these functions for each word also have
128 * significant performance costs. Having txrx_bufs() calls that inline
129 * the txrx_word() logic would help performance, e.g. on larger blocks
130 * used with flash storage or MMC/SD. There should also be ways to make
131 * GCC be less stupid about reloading registers inside the I/O loops,
132 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
133 */
134
135static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
136 unsigned nsecs, u32 word, u8 bits, unsigned flags)
137{
138 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
139}
140
141static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
142 unsigned nsecs, u32 word, u8 bits, unsigned flags)
143{
144 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
145}
146
147static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
148 unsigned nsecs, u32 word, u8 bits, unsigned flags)
149{
150 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
151}
152
153static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
154 unsigned nsecs, u32 word, u8 bits, unsigned flags)
155{
156 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
157}
158
159/*
160 * These functions do not call setmosi or getmiso if respective flag
161 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
162 * call when such pin is not present or defined in the controller.
163 * A separate set of callbacks is defined to get highest possible
164 * speed in the generic case (when both MISO and MOSI lines are
165 * available), as optimiser will remove the checks when argument is
166 * constant.
167 */
168
169static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
170 unsigned nsecs, u32 word, u8 bits, unsigned flags)
171{
172 flags = spi->master->flags;
173 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
174}
175
176static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
177 unsigned nsecs, u32 word, u8 bits, unsigned flags)
178{
179 flags = spi->master->flags;
180 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
181}
182
183static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
184 unsigned nsecs, u32 word, u8 bits, unsigned flags)
185{
186 flags = spi->master->flags;
187 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
188}
189
190static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
191 unsigned nsecs, u32 word, u8 bits, unsigned flags)
192{
193 flags = spi->master->flags;
194 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
195}
196
197/*----------------------------------------------------------------------*/
198
199static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
200{
201 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
202
203 /* set initial clock line level */
204 if (is_active)
205 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
206
207 /* Drive chip select line, if we have one */
208 if (spi_gpio->cs_gpios) {
209 struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
210
211 /* SPI chip selects are normally active-low */
212 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
213 }
214}
215
216static int spi_gpio_setup(struct spi_device *spi)
217{
218 struct gpio_desc *cs;
219 int status = 0;
220 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
221
222 /*
223 * The CS GPIOs have already been
224 * initialized from the descriptor lookup.
225 */
226 if (spi_gpio->cs_gpios) {
227 cs = spi_gpio->cs_gpios[spi->chip_select];
228 if (!spi->controller_state && cs)
229 status = gpiod_direction_output(cs,
230 !(spi->mode & SPI_CS_HIGH));
231 }
232
233 if (!status)
234 status = spi_bitbang_setup(spi);
235
236 return status;
237}
238
239static int spi_gpio_set_direction(struct spi_device *spi, bool output)
240{
241 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
242 int ret;
243
244 if (output)
245 return gpiod_direction_output(spi_gpio->mosi, 1);
246
247 ret = gpiod_direction_input(spi_gpio->mosi);
248 if (ret)
249 return ret;
250 /*
251 * Send a turnaround high impedance cycle when switching
252 * from output to input. Theoretically there should be
253 * a clock delay here, but as has been noted above, the
254 * nsec delay function for bit-banged GPIO is simply
255 * {} because bit-banging just doesn't get fast enough
256 * anyway.
257 */
258 if (spi->mode & SPI_3WIRE_HIZ) {
259 gpiod_set_value_cansleep(spi_gpio->sck,
260 !(spi->mode & SPI_CPOL));
261 gpiod_set_value_cansleep(spi_gpio->sck,
262 !!(spi->mode & SPI_CPOL));
263 }
264 return 0;
265}
266
267static void spi_gpio_cleanup(struct spi_device *spi)
268{
269 spi_bitbang_cleanup(spi);
270}
271
272/*
273 * It can be convenient to use this driver with pins that have alternate
274 * functions associated with a "native" SPI controller if a driver for that
275 * controller is not available, or is missing important functionality.
276 *
277 * On platforms which can do so, configure MISO with a weak pullup unless
278 * there's an external pullup on that signal. That saves power by avoiding
279 * floating signals. (A weak pulldown would save power too, but many
280 * drivers expect to see all-ones data as the no slave "response".)
281 */
282static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
283{
284 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
285 if (IS_ERR(spi_gpio->mosi))
286 return PTR_ERR(spi_gpio->mosi);
287
288 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
289 if (IS_ERR(spi_gpio->miso))
290 return PTR_ERR(spi_gpio->miso);
291
292 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
293 return PTR_ERR_OR_ZERO(spi_gpio->sck);
294}
295
296#ifdef CONFIG_OF
297static const struct of_device_id spi_gpio_dt_ids[] = {
298 { .compatible = "spi-gpio" },
299 {}
300};
301MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
302
303static int spi_gpio_probe_dt(struct platform_device *pdev,
304 struct spi_master *master)
305{
306 master->dev.of_node = pdev->dev.of_node;
307 master->use_gpio_descriptors = true;
308
309 return 0;
310}
311#else
312static inline int spi_gpio_probe_dt(struct platform_device *pdev,
313 struct spi_master *master)
314{
315 return 0;
316}
317#endif
318
319static int spi_gpio_probe_pdata(struct platform_device *pdev,
320 struct spi_master *master)
321{
322 struct device *dev = &pdev->dev;
323 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
324 struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
325 int i;
326
327#ifdef GENERIC_BITBANG
328 if (!pdata || !pdata->num_chipselect)
329 return -ENODEV;
330#endif
331 /*
332 * The master needs to think there is a chipselect even if not
333 * connected
334 */
335 master->num_chipselect = pdata->num_chipselect ?: 1;
336
337 spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
338 sizeof(*spi_gpio->cs_gpios),
339 GFP_KERNEL);
340 if (!spi_gpio->cs_gpios)
341 return -ENOMEM;
342
343 for (i = 0; i < master->num_chipselect; i++) {
344 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
345 GPIOD_OUT_HIGH);
346 if (IS_ERR(spi_gpio->cs_gpios[i]))
347 return PTR_ERR(spi_gpio->cs_gpios[i]);
348 }
349
350 return 0;
351}
352
353static void spi_gpio_put(void *data)
354{
355 spi_master_put(data);
356}
357
358static int spi_gpio_probe(struct platform_device *pdev)
359{
360 int status;
361 struct spi_master *master;
362 struct spi_gpio *spi_gpio;
363 struct device *dev = &pdev->dev;
364 struct spi_bitbang *bb;
365
366 master = spi_alloc_master(dev, sizeof(*spi_gpio));
367 if (!master)
368 return -ENOMEM;
369
370 status = devm_add_action_or_reset(&pdev->dev, spi_gpio_put, master);
371 if (status) {
372 spi_master_put(master);
373 return status;
374 }
375
376 if (pdev->dev.of_node)
377 status = spi_gpio_probe_dt(pdev, master);
378 else
379 status = spi_gpio_probe_pdata(pdev, master);
380
381 if (status)
382 return status;
383
384 spi_gpio = spi_master_get_devdata(master);
385
386 status = spi_gpio_request(dev, spi_gpio);
387 if (status)
388 return status;
389
390 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
391 master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
392 SPI_CS_HIGH;
393 if (!spi_gpio->mosi) {
394 /* HW configuration without MOSI pin
395 *
396 * No setting SPI_MASTER_NO_RX here - if there is only
397 * a MOSI pin connected the host can still do RX by
398 * changing the direction of the line.
399 */
400 master->flags = SPI_MASTER_NO_TX;
401 }
402
403 master->bus_num = pdev->id;
404 master->setup = spi_gpio_setup;
405 master->cleanup = spi_gpio_cleanup;
406
407 bb = &spi_gpio->bitbang;
408 bb->master = master;
409 /*
410 * There is some additional business, apart from driving the CS GPIO
411 * line, that we need to do on selection. This makes the local
412 * callback for chipselect always get called.
413 */
414 master->flags |= SPI_MASTER_GPIO_SS;
415 bb->chipselect = spi_gpio_chipselect;
416 bb->set_line_direction = spi_gpio_set_direction;
417
418 if (master->flags & SPI_MASTER_NO_TX) {
419 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
420 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
421 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
422 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
423 } else {
424 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
425 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
426 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
427 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
428 }
429 bb->setup_transfer = spi_bitbang_setup_transfer;
430
431 status = spi_bitbang_init(&spi_gpio->bitbang);
432 if (status)
433 return status;
434
435 return devm_spi_register_master(&pdev->dev, spi_master_get(master));
436}
437
438MODULE_ALIAS("platform:" DRIVER_NAME);
439
440static struct platform_driver spi_gpio_driver = {
441 .driver = {
442 .name = DRIVER_NAME,
443 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
444 },
445 .probe = spi_gpio_probe,
446};
447module_platform_driver(spi_gpio_driver);
448
449MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
450MODULE_AUTHOR("David Brownell");
451MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * SPI master driver using generic bitbanged GPIO
4 *
5 * Copyright (C) 2006,2008 David Brownell
6 * Copyright (C) 2017 Linus Walleij
7 */
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/gpio/consumer.h>
12#include <linux/of.h>
13#include <linux/of_device.h>
14
15#include <linux/spi/spi.h>
16#include <linux/spi/spi_bitbang.h>
17#include <linux/spi/spi_gpio.h>
18
19
20/*
21 * This bitbanging SPI master driver should help make systems usable
22 * when a native hardware SPI engine is not available, perhaps because
23 * its driver isn't yet working or because the I/O pins it requires
24 * are used for other purposes.
25 *
26 * platform_device->driver_data ... points to spi_gpio
27 *
28 * spi->controller_state ... reserved for bitbang framework code
29 *
30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
31 */
32
33struct spi_gpio {
34 struct spi_bitbang bitbang;
35 struct gpio_desc *sck;
36 struct gpio_desc *miso;
37 struct gpio_desc *mosi;
38 struct gpio_desc **cs_gpios;
39};
40
41/*----------------------------------------------------------------------*/
42
43/*
44 * Because the overhead of going through four GPIO procedure calls
45 * per transferred bit can make performance a problem, this code
46 * is set up so that you can use it in either of two ways:
47 *
48 * - The slow generic way: set up platform_data to hold the GPIO
49 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
50 * each of them. This driver can handle several such busses.
51 *
52 * - The quicker inlined way: only helps with platform GPIO code
53 * that inlines operations for constant GPIOs. This can give
54 * you tight (fast!) inner loops, but each such bus needs a
55 * new driver. You'll define a new C file, with Makefile and
56 * Kconfig support; the C code can be a total of six lines:
57 *
58 * #define DRIVER_NAME "myboard_spi2"
59 * #define SPI_MISO_GPIO 119
60 * #define SPI_MOSI_GPIO 120
61 * #define SPI_SCK_GPIO 121
62 * #define SPI_N_CHIPSEL 4
63 * #include "spi-gpio.c"
64 */
65
66#ifndef DRIVER_NAME
67#define DRIVER_NAME "spi_gpio"
68
69#define GENERIC_BITBANG /* vs tight inlines */
70
71#endif
72
73/*----------------------------------------------------------------------*/
74
75static inline struct spi_gpio *__pure
76spi_to_spi_gpio(const struct spi_device *spi)
77{
78 const struct spi_bitbang *bang;
79 struct spi_gpio *spi_gpio;
80
81 bang = spi_master_get_devdata(spi->master);
82 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
83 return spi_gpio;
84}
85
86/* These helpers are in turn called by the bitbang inlines */
87static inline void setsck(const struct spi_device *spi, int is_on)
88{
89 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
90
91 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
92}
93
94static inline void setmosi(const struct spi_device *spi, int is_on)
95{
96 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
97
98 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
99}
100
101static inline int getmiso(const struct spi_device *spi)
102{
103 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
104
105 if (spi->mode & SPI_3WIRE)
106 return !!gpiod_get_value_cansleep(spi_gpio->mosi);
107 else
108 return !!gpiod_get_value_cansleep(spi_gpio->miso);
109}
110
111/*
112 * NOTE: this clocks "as fast as we can". It "should" be a function of the
113 * requested device clock. Software overhead means we usually have trouble
114 * reaching even one Mbit/sec (except when we can inline bitops), so for now
115 * we'll just assume we never need additional per-bit slowdowns.
116 */
117#define spidelay(nsecs) do {} while (0)
118
119#include "spi-bitbang-txrx.h"
120
121/*
122 * These functions can leverage inline expansion of GPIO calls to shrink
123 * costs for a txrx bit, often by factors of around ten (by instruction
124 * count). That is particularly visible for larger word sizes, but helps
125 * even with default 8-bit words.
126 *
127 * REVISIT overheads calling these functions for each word also have
128 * significant performance costs. Having txrx_bufs() calls that inline
129 * the txrx_word() logic would help performance, e.g. on larger blocks
130 * used with flash storage or MMC/SD. There should also be ways to make
131 * GCC be less stupid about reloading registers inside the I/O loops,
132 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
133 */
134
135static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
136 unsigned nsecs, u32 word, u8 bits, unsigned flags)
137{
138 if (unlikely(spi->mode & SPI_LSB_FIRST))
139 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
140 else
141 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
142}
143
144static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
145 unsigned nsecs, u32 word, u8 bits, unsigned flags)
146{
147 if (unlikely(spi->mode & SPI_LSB_FIRST))
148 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
149 else
150 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
151}
152
153static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
154 unsigned nsecs, u32 word, u8 bits, unsigned flags)
155{
156 if (unlikely(spi->mode & SPI_LSB_FIRST))
157 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
158 else
159 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
160}
161
162static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
163 unsigned nsecs, u32 word, u8 bits, unsigned flags)
164{
165 if (unlikely(spi->mode & SPI_LSB_FIRST))
166 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
167 else
168 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
169}
170
171/*
172 * These functions do not call setmosi or getmiso if respective flag
173 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
174 * call when such pin is not present or defined in the controller.
175 * A separate set of callbacks is defined to get highest possible
176 * speed in the generic case (when both MISO and MOSI lines are
177 * available), as optimiser will remove the checks when argument is
178 * constant.
179 */
180
181static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
182 unsigned nsecs, u32 word, u8 bits, unsigned flags)
183{
184 flags = spi->master->flags;
185 if (unlikely(spi->mode & SPI_LSB_FIRST))
186 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
187 else
188 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
189}
190
191static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
192 unsigned nsecs, u32 word, u8 bits, unsigned flags)
193{
194 flags = spi->master->flags;
195 if (unlikely(spi->mode & SPI_LSB_FIRST))
196 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
197 else
198 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
199}
200
201static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
202 unsigned nsecs, u32 word, u8 bits, unsigned flags)
203{
204 flags = spi->master->flags;
205 if (unlikely(spi->mode & SPI_LSB_FIRST))
206 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
207 else
208 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
209}
210
211static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
212 unsigned nsecs, u32 word, u8 bits, unsigned flags)
213{
214 flags = spi->master->flags;
215 if (unlikely(spi->mode & SPI_LSB_FIRST))
216 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
217 else
218 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
219}
220
221/*----------------------------------------------------------------------*/
222
223static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
224{
225 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
226
227 /* set initial clock line level */
228 if (is_active)
229 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
230
231 /* Drive chip select line, if we have one */
232 if (spi_gpio->cs_gpios) {
233 struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
234
235 /* SPI chip selects are normally active-low */
236 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
237 }
238}
239
240static int spi_gpio_setup(struct spi_device *spi)
241{
242 struct gpio_desc *cs;
243 int status = 0;
244 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
245
246 /*
247 * The CS GPIOs have already been
248 * initialized from the descriptor lookup.
249 */
250 if (spi_gpio->cs_gpios) {
251 cs = spi_gpio->cs_gpios[spi->chip_select];
252 if (!spi->controller_state && cs)
253 status = gpiod_direction_output(cs,
254 !(spi->mode & SPI_CS_HIGH));
255 }
256
257 if (!status)
258 status = spi_bitbang_setup(spi);
259
260 return status;
261}
262
263static int spi_gpio_set_direction(struct spi_device *spi, bool output)
264{
265 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
266 int ret;
267
268 if (output)
269 return gpiod_direction_output(spi_gpio->mosi, 1);
270
271 /*
272 * Only change MOSI to an input if using 3WIRE mode.
273 * Otherwise, MOSI could be left floating if there is
274 * no pull resistor connected to the I/O pin, or could
275 * be left logic high if there is a pull-up. Transmitting
276 * logic high when only clocking MISO data in can put some
277 * SPI devices in to a bad state.
278 */
279 if (spi->mode & SPI_3WIRE) {
280 ret = gpiod_direction_input(spi_gpio->mosi);
281 if (ret)
282 return ret;
283 }
284 /*
285 * Send a turnaround high impedance cycle when switching
286 * from output to input. Theoretically there should be
287 * a clock delay here, but as has been noted above, the
288 * nsec delay function for bit-banged GPIO is simply
289 * {} because bit-banging just doesn't get fast enough
290 * anyway.
291 */
292 if (spi->mode & SPI_3WIRE_HIZ) {
293 gpiod_set_value_cansleep(spi_gpio->sck,
294 !(spi->mode & SPI_CPOL));
295 gpiod_set_value_cansleep(spi_gpio->sck,
296 !!(spi->mode & SPI_CPOL));
297 }
298 return 0;
299}
300
301static void spi_gpio_cleanup(struct spi_device *spi)
302{
303 spi_bitbang_cleanup(spi);
304}
305
306/*
307 * It can be convenient to use this driver with pins that have alternate
308 * functions associated with a "native" SPI controller if a driver for that
309 * controller is not available, or is missing important functionality.
310 *
311 * On platforms which can do so, configure MISO with a weak pullup unless
312 * there's an external pullup on that signal. That saves power by avoiding
313 * floating signals. (A weak pulldown would save power too, but many
314 * drivers expect to see all-ones data as the no slave "response".)
315 */
316static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
317{
318 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
319 if (IS_ERR(spi_gpio->mosi))
320 return PTR_ERR(spi_gpio->mosi);
321
322 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
323 if (IS_ERR(spi_gpio->miso))
324 return PTR_ERR(spi_gpio->miso);
325
326 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
327 return PTR_ERR_OR_ZERO(spi_gpio->sck);
328}
329
330#ifdef CONFIG_OF
331static const struct of_device_id spi_gpio_dt_ids[] = {
332 { .compatible = "spi-gpio" },
333 {}
334};
335MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
336
337static int spi_gpio_probe_dt(struct platform_device *pdev,
338 struct spi_master *master)
339{
340 master->dev.of_node = pdev->dev.of_node;
341 master->use_gpio_descriptors = true;
342
343 return 0;
344}
345#else
346static inline int spi_gpio_probe_dt(struct platform_device *pdev,
347 struct spi_master *master)
348{
349 return 0;
350}
351#endif
352
353static int spi_gpio_probe_pdata(struct platform_device *pdev,
354 struct spi_master *master)
355{
356 struct device *dev = &pdev->dev;
357 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
358 struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
359 int i;
360
361#ifdef GENERIC_BITBANG
362 if (!pdata || !pdata->num_chipselect)
363 return -ENODEV;
364#endif
365 /*
366 * The master needs to think there is a chipselect even if not
367 * connected
368 */
369 master->num_chipselect = pdata->num_chipselect ?: 1;
370
371 spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
372 sizeof(*spi_gpio->cs_gpios),
373 GFP_KERNEL);
374 if (!spi_gpio->cs_gpios)
375 return -ENOMEM;
376
377 for (i = 0; i < master->num_chipselect; i++) {
378 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
379 GPIOD_OUT_HIGH);
380 if (IS_ERR(spi_gpio->cs_gpios[i]))
381 return PTR_ERR(spi_gpio->cs_gpios[i]);
382 }
383
384 return 0;
385}
386
387static int spi_gpio_probe(struct platform_device *pdev)
388{
389 int status;
390 struct spi_master *master;
391 struct spi_gpio *spi_gpio;
392 struct device *dev = &pdev->dev;
393 struct spi_bitbang *bb;
394
395 master = devm_spi_alloc_master(dev, sizeof(*spi_gpio));
396 if (!master)
397 return -ENOMEM;
398
399 if (pdev->dev.of_node)
400 status = spi_gpio_probe_dt(pdev, master);
401 else
402 status = spi_gpio_probe_pdata(pdev, master);
403
404 if (status)
405 return status;
406
407 spi_gpio = spi_master_get_devdata(master);
408
409 status = spi_gpio_request(dev, spi_gpio);
410 if (status)
411 return status;
412
413 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
414 master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
415 SPI_CS_HIGH | SPI_LSB_FIRST;
416 if (!spi_gpio->mosi) {
417 /* HW configuration without MOSI pin
418 *
419 * No setting SPI_MASTER_NO_RX here - if there is only
420 * a MOSI pin connected the host can still do RX by
421 * changing the direction of the line.
422 */
423 master->flags = SPI_MASTER_NO_TX;
424 }
425
426 master->bus_num = pdev->id;
427 master->setup = spi_gpio_setup;
428 master->cleanup = spi_gpio_cleanup;
429
430 bb = &spi_gpio->bitbang;
431 bb->master = master;
432 /*
433 * There is some additional business, apart from driving the CS GPIO
434 * line, that we need to do on selection. This makes the local
435 * callback for chipselect always get called.
436 */
437 master->flags |= SPI_MASTER_GPIO_SS;
438 bb->chipselect = spi_gpio_chipselect;
439 bb->set_line_direction = spi_gpio_set_direction;
440
441 if (master->flags & SPI_MASTER_NO_TX) {
442 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
443 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
444 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
445 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
446 } else {
447 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
448 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
449 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
450 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
451 }
452 bb->setup_transfer = spi_bitbang_setup_transfer;
453
454 status = spi_bitbang_init(&spi_gpio->bitbang);
455 if (status)
456 return status;
457
458 return devm_spi_register_master(&pdev->dev, master);
459}
460
461MODULE_ALIAS("platform:" DRIVER_NAME);
462
463static struct platform_driver spi_gpio_driver = {
464 .driver = {
465 .name = DRIVER_NAME,
466 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
467 },
468 .probe = spi_gpio_probe,
469};
470module_platform_driver(spi_gpio_driver);
471
472MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
473MODULE_AUTHOR("David Brownell");
474MODULE_LICENSE("GPL");