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v5.9
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * SPI master driver using generic bitbanged GPIO
  4 *
  5 * Copyright (C) 2006,2008 David Brownell
  6 * Copyright (C) 2017 Linus Walleij
 
 
 
 
 
 
 
 
 
 
  7 */
  8#include <linux/kernel.h>
  9#include <linux/module.h>
 10#include <linux/platform_device.h>
 11#include <linux/gpio/consumer.h>
 12#include <linux/of.h>
 13#include <linux/of_device.h>
 14
 15#include <linux/spi/spi.h>
 16#include <linux/spi/spi_bitbang.h>
 17#include <linux/spi/spi_gpio.h>
 18
 19
 20/*
 21 * This bitbanging SPI master driver should help make systems usable
 22 * when a native hardware SPI engine is not available, perhaps because
 23 * its driver isn't yet working or because the I/O pins it requires
 24 * are used for other purposes.
 25 *
 26 * platform_device->driver_data ... points to spi_gpio
 27 *
 28 * spi->controller_state ... reserved for bitbang framework code
 
 29 *
 30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
 31 */
 32
 33struct spi_gpio {
 34	struct spi_bitbang		bitbang;
 
 
 35	struct gpio_desc		*sck;
 36	struct gpio_desc		*miso;
 37	struct gpio_desc		*mosi;
 38	struct gpio_desc		**cs_gpios;
 
 39};
 40
 41/*----------------------------------------------------------------------*/
 42
 43/*
 44 * Because the overhead of going through four GPIO procedure calls
 45 * per transferred bit can make performance a problem, this code
 46 * is set up so that you can use it in either of two ways:
 47 *
 48 *   - The slow generic way:  set up platform_data to hold the GPIO
 49 *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
 50 *     each of them.  This driver can handle several such busses.
 51 *
 52 *   - The quicker inlined way:  only helps with platform GPIO code
 53 *     that inlines operations for constant GPIOs.  This can give
 54 *     you tight (fast!) inner loops, but each such bus needs a
 55 *     new driver.  You'll define a new C file, with Makefile and
 56 *     Kconfig support; the C code can be a total of six lines:
 57 *
 58 *		#define DRIVER_NAME	"myboard_spi2"
 59 *		#define	SPI_MISO_GPIO	119
 60 *		#define	SPI_MOSI_GPIO	120
 61 *		#define	SPI_SCK_GPIO	121
 62 *		#define	SPI_N_CHIPSEL	4
 63 *		#include "spi-gpio.c"
 64 */
 65
 66#ifndef DRIVER_NAME
 67#define DRIVER_NAME	"spi_gpio"
 68
 69#define GENERIC_BITBANG	/* vs tight inlines */
 70
 71#endif
 72
 73/*----------------------------------------------------------------------*/
 74
 75static inline struct spi_gpio *__pure
 76spi_to_spi_gpio(const struct spi_device *spi)
 77{
 78	const struct spi_bitbang	*bang;
 79	struct spi_gpio			*spi_gpio;
 80
 81	bang = spi_master_get_devdata(spi->master);
 82	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
 83	return spi_gpio;
 84}
 85
 
 
 
 
 
 
 86/* These helpers are in turn called by the bitbang inlines */
 87static inline void setsck(const struct spi_device *spi, int is_on)
 88{
 89	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 90
 91	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
 92}
 93
 94static inline void setmosi(const struct spi_device *spi, int is_on)
 95{
 96	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 97
 98	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
 99}
100
101static inline int getmiso(const struct spi_device *spi)
102{
103	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
104
105	if (spi->mode & SPI_3WIRE)
106		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
107	else
108		return !!gpiod_get_value_cansleep(spi_gpio->miso);
109}
110
111/*
112 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
113 * requested device clock.  Software overhead means we usually have trouble
114 * reaching even one Mbit/sec (except when we can inline bitops), so for now
115 * we'll just assume we never need additional per-bit slowdowns.
116 */
117#define spidelay(nsecs)	do {} while (0)
118
119#include "spi-bitbang-txrx.h"
120
121/*
122 * These functions can leverage inline expansion of GPIO calls to shrink
123 * costs for a txrx bit, often by factors of around ten (by instruction
124 * count).  That is particularly visible for larger word sizes, but helps
125 * even with default 8-bit words.
126 *
127 * REVISIT overheads calling these functions for each word also have
128 * significant performance costs.  Having txrx_bufs() calls that inline
129 * the txrx_word() logic would help performance, e.g. on larger blocks
130 * used with flash storage or MMC/SD.  There should also be ways to make
131 * GCC be less stupid about reloading registers inside the I/O loops,
132 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
133 */
134
135static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
136		unsigned nsecs, u32 word, u8 bits, unsigned flags)
137{
138	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
139}
140
141static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
142		unsigned nsecs, u32 word, u8 bits, unsigned flags)
143{
144	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
145}
146
147static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
148		unsigned nsecs, u32 word, u8 bits, unsigned flags)
149{
150	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
151}
152
153static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
154		unsigned nsecs, u32 word, u8 bits, unsigned flags)
155{
156	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
157}
158
159/*
160 * These functions do not call setmosi or getmiso if respective flag
161 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
162 * call when such pin is not present or defined in the controller.
163 * A separate set of callbacks is defined to get highest possible
164 * speed in the generic case (when both MISO and MOSI lines are
165 * available), as optimiser will remove the checks when argument is
166 * constant.
167 */
168
169static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
170		unsigned nsecs, u32 word, u8 bits, unsigned flags)
171{
172	flags = spi->master->flags;
173	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
174}
175
176static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
177		unsigned nsecs, u32 word, u8 bits, unsigned flags)
178{
179	flags = spi->master->flags;
180	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
181}
182
183static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
184		unsigned nsecs, u32 word, u8 bits, unsigned flags)
185{
186	flags = spi->master->flags;
187	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
188}
189
190static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
191		unsigned nsecs, u32 word, u8 bits, unsigned flags)
192{
193	flags = spi->master->flags;
194	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
195}
196
197/*----------------------------------------------------------------------*/
198
199static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
200{
201	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
202
203	/* set initial clock line level */
204	if (is_active)
205		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
206
207	/* Drive chip select line, if we have one */
208	if (spi_gpio->cs_gpios) {
209		struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
210
211		/* SPI chip selects are normally active-low */
212		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
213	}
214}
215
216static int spi_gpio_setup(struct spi_device *spi)
217{
218	struct gpio_desc	*cs;
219	int			status = 0;
220	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
221
222	/*
223	 * The CS GPIOs have already been
224	 * initialized from the descriptor lookup.
225	 */
226	if (spi_gpio->cs_gpios) {
227		cs = spi_gpio->cs_gpios[spi->chip_select];
228		if (!spi->controller_state && cs)
229			status = gpiod_direction_output(cs,
230						  !(spi->mode & SPI_CS_HIGH));
231	}
232
233	if (!status)
234		status = spi_bitbang_setup(spi);
235
236	return status;
237}
238
239static int spi_gpio_set_direction(struct spi_device *spi, bool output)
240{
241	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
242	int ret;
243
244	if (output)
245		return gpiod_direction_output(spi_gpio->mosi, 1);
246
247	ret = gpiod_direction_input(spi_gpio->mosi);
248	if (ret)
249		return ret;
250	/*
251	 * Send a turnaround high impedance cycle when switching
252	 * from output to input. Theoretically there should be
253	 * a clock delay here, but as has been noted above, the
254	 * nsec delay function for bit-banged GPIO is simply
255	 * {} because bit-banging just doesn't get fast enough
256	 * anyway.
257	 */
258	if (spi->mode & SPI_3WIRE_HIZ) {
259		gpiod_set_value_cansleep(spi_gpio->sck,
260					 !(spi->mode & SPI_CPOL));
261		gpiod_set_value_cansleep(spi_gpio->sck,
262					 !!(spi->mode & SPI_CPOL));
263	}
264	return 0;
265}
266
267static void spi_gpio_cleanup(struct spi_device *spi)
268{
269	spi_bitbang_cleanup(spi);
270}
271
272/*
273 * It can be convenient to use this driver with pins that have alternate
274 * functions associated with a "native" SPI controller if a driver for that
275 * controller is not available, or is missing important functionality.
276 *
277 * On platforms which can do so, configure MISO with a weak pullup unless
278 * there's an external pullup on that signal.  That saves power by avoiding
279 * floating signals.  (A weak pulldown would save power too, but many
280 * drivers expect to see all-ones data as the no slave "response".)
281 */
282static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
 
 
 
283{
 
 
284	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
285	if (IS_ERR(spi_gpio->mosi))
286		return PTR_ERR(spi_gpio->mosi);
 
 
 
287
288	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
289	if (IS_ERR(spi_gpio->miso))
290		return PTR_ERR(spi_gpio->miso);
 
 
 
291
292	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
293	return PTR_ERR_OR_ZERO(spi_gpio->sck);
 
 
 
 
 
 
 
 
 
 
294}
295
296#ifdef CONFIG_OF
297static const struct of_device_id spi_gpio_dt_ids[] = {
298	{ .compatible = "spi-gpio" },
299	{}
300};
301MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
302
303static int spi_gpio_probe_dt(struct platform_device *pdev,
304			     struct spi_master *master)
305{
306	master->dev.of_node = pdev->dev.of_node;
307	master->use_gpio_descriptors = true;
308
309	return 0;
310}
311#else
312static inline int spi_gpio_probe_dt(struct platform_device *pdev,
313				    struct spi_master *master)
314{
315	return 0;
316}
317#endif
318
319static int spi_gpio_probe_pdata(struct platform_device *pdev,
320				struct spi_master *master)
321{
322	struct device *dev = &pdev->dev;
323	struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
324	struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
325	int i;
 
 
326
327#ifdef GENERIC_BITBANG
328	if (!pdata || !pdata->num_chipselect)
329		return -ENODEV;
330#endif
331	/*
332	 * The master needs to think there is a chipselect even if not
333	 * connected
334	 */
335	master->num_chipselect = pdata->num_chipselect ?: 1;
336
337	spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
338					  sizeof(*spi_gpio->cs_gpios),
339					  GFP_KERNEL);
340	if (!spi_gpio->cs_gpios)
341		return -ENOMEM;
342
343	for (i = 0; i < master->num_chipselect; i++) {
344		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
345							     GPIOD_OUT_HIGH);
346		if (IS_ERR(spi_gpio->cs_gpios[i]))
347			return PTR_ERR(spi_gpio->cs_gpios[i]);
348	}
349
350	return 0;
351}
 
 
352
353static void spi_gpio_put(void *data)
 
 
 
 
 
354{
355	spi_master_put(data);
356}
 
357
358static int spi_gpio_probe(struct platform_device *pdev)
359{
360	int				status;
361	struct spi_master		*master;
362	struct spi_gpio			*spi_gpio;
363	struct device			*dev = &pdev->dev;
364	struct spi_bitbang		*bb;
 
365
366	master = spi_alloc_master(dev, sizeof(*spi_gpio));
 
 
 
 
 
 
 
 
 
 
 
 
367	if (!master)
368		return -ENOMEM;
369
370	status = devm_add_action_or_reset(&pdev->dev, spi_gpio_put, master);
371	if (status) {
372		spi_master_put(master);
373		return status;
374	}
 
 
375
376	if (pdev->dev.of_node)
377		status = spi_gpio_probe_dt(pdev, master);
378	else
379		status = spi_gpio_probe_pdata(pdev, master);
380
381	if (status)
382		return status;
383
384	spi_gpio = spi_master_get_devdata(master);
 
 
385
386	status = spi_gpio_request(dev, spi_gpio);
 
387	if (status)
388		return status;
389
390	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
391	master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
392			    SPI_CS_HIGH;
393	if (!spi_gpio->mosi) {
394		/* HW configuration without MOSI pin
395		 *
396		 * No setting SPI_MASTER_NO_RX here - if there is only
397		 * a MOSI pin connected the host can still do RX by
398		 * changing the direction of the line.
399		 */
400		master->flags = SPI_MASTER_NO_TX;
401	}
402
403	master->bus_num = pdev->id;
 
 
404	master->setup = spi_gpio_setup;
405	master->cleanup = spi_gpio_cleanup;
 
 
 
406
407	bb = &spi_gpio->bitbang;
408	bb->master = master;
409	/*
410	 * There is some additional business, apart from driving the CS GPIO
411	 * line, that we need to do on selection. This makes the local
412	 * callback for chipselect always get called.
413	 */
414	master->flags |= SPI_MASTER_GPIO_SS;
415	bb->chipselect = spi_gpio_chipselect;
416	bb->set_line_direction = spi_gpio_set_direction;
417
418	if (master->flags & SPI_MASTER_NO_TX) {
419		bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
420		bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
421		bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
422		bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
423	} else {
424		bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
425		bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
426		bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
427		bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
428	}
429	bb->setup_transfer = spi_bitbang_setup_transfer;
 
430
431	status = spi_bitbang_init(&spi_gpio->bitbang);
432	if (status)
433		return status;
 
 
 
 
 
 
 
 
 
 
 
434
435	return devm_spi_register_master(&pdev->dev, spi_master_get(master));
 
 
 
 
 
436}
437
438MODULE_ALIAS("platform:" DRIVER_NAME);
439
440static struct platform_driver spi_gpio_driver = {
441	.driver = {
442		.name	= DRIVER_NAME,
443		.of_match_table = of_match_ptr(spi_gpio_dt_ids),
444	},
445	.probe		= spi_gpio_probe,
 
446};
447module_platform_driver(spi_gpio_driver);
448
449MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
450MODULE_AUTHOR("David Brownell");
451MODULE_LICENSE("GPL");
v4.17
 
  1/*
  2 * SPI master driver using generic bitbanged GPIO
  3 *
  4 * Copyright (C) 2006,2008 David Brownell
  5 * Copyright (C) 2017 Linus Walleij
  6 *
  7 * This program is free software; you can redistribute it and/or modify
  8 * it under the terms of the GNU General Public License as published by
  9 * the Free Software Foundation; either version 2 of the License, or
 10 * (at your option) any later version.
 11 *
 12 * This program is distributed in the hope that it will be useful,
 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15 * GNU General Public License for more details.
 16 */
 17#include <linux/kernel.h>
 18#include <linux/module.h>
 19#include <linux/platform_device.h>
 20#include <linux/gpio/consumer.h>
 21#include <linux/of.h>
 22#include <linux/of_device.h>
 23
 24#include <linux/spi/spi.h>
 25#include <linux/spi/spi_bitbang.h>
 26#include <linux/spi/spi_gpio.h>
 27
 28
 29/*
 30 * This bitbanging SPI master driver should help make systems usable
 31 * when a native hardware SPI engine is not available, perhaps because
 32 * its driver isn't yet working or because the I/O pins it requires
 33 * are used for other purposes.
 34 *
 35 * platform_device->driver_data ... points to spi_gpio
 36 *
 37 * spi->controller_state ... reserved for bitbang framework code
 38 * spi->controller_data ... holds chipselect GPIO
 39 *
 40 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
 41 */
 42
 43struct spi_gpio {
 44	struct spi_bitbang		bitbang;
 45	struct spi_gpio_platform_data	pdata;
 46	struct platform_device		*pdev;
 47	struct gpio_desc		*sck;
 48	struct gpio_desc		*miso;
 49	struct gpio_desc		*mosi;
 50	struct gpio_desc		**cs_gpios;
 51	bool				has_cs;
 52};
 53
 54/*----------------------------------------------------------------------*/
 55
 56/*
 57 * Because the overhead of going through four GPIO procedure calls
 58 * per transferred bit can make performance a problem, this code
 59 * is set up so that you can use it in either of two ways:
 60 *
 61 *   - The slow generic way:  set up platform_data to hold the GPIO
 62 *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
 63 *     each of them.  This driver can handle several such busses.
 64 *
 65 *   - The quicker inlined way:  only helps with platform GPIO code
 66 *     that inlines operations for constant GPIOs.  This can give
 67 *     you tight (fast!) inner loops, but each such bus needs a
 68 *     new driver.  You'll define a new C file, with Makefile and
 69 *     Kconfig support; the C code can be a total of six lines:
 70 *
 71 *		#define DRIVER_NAME	"myboard_spi2"
 72 *		#define	SPI_MISO_GPIO	119
 73 *		#define	SPI_MOSI_GPIO	120
 74 *		#define	SPI_SCK_GPIO	121
 75 *		#define	SPI_N_CHIPSEL	4
 76 *		#include "spi-gpio.c"
 77 */
 78
 79#ifndef DRIVER_NAME
 80#define DRIVER_NAME	"spi_gpio"
 81
 82#define GENERIC_BITBANG	/* vs tight inlines */
 83
 84#endif
 85
 86/*----------------------------------------------------------------------*/
 87
 88static inline struct spi_gpio *__pure
 89spi_to_spi_gpio(const struct spi_device *spi)
 90{
 91	const struct spi_bitbang	*bang;
 92	struct spi_gpio			*spi_gpio;
 93
 94	bang = spi_master_get_devdata(spi->master);
 95	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
 96	return spi_gpio;
 97}
 98
 99static inline struct spi_gpio_platform_data *__pure
100spi_to_pdata(const struct spi_device *spi)
101{
102	return &spi_to_spi_gpio(spi)->pdata;
103}
104
105/* These helpers are in turn called by the bitbang inlines */
106static inline void setsck(const struct spi_device *spi, int is_on)
107{
108	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
109
110	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
111}
112
113static inline void setmosi(const struct spi_device *spi, int is_on)
114{
115	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
116
117	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
118}
119
120static inline int getmiso(const struct spi_device *spi)
121{
122	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
123
124	return !!gpiod_get_value_cansleep(spi_gpio->miso);
 
 
 
125}
126
127/*
128 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
129 * requested device clock.  Software overhead means we usually have trouble
130 * reaching even one Mbit/sec (except when we can inline bitops), so for now
131 * we'll just assume we never need additional per-bit slowdowns.
132 */
133#define spidelay(nsecs)	do {} while (0)
134
135#include "spi-bitbang-txrx.h"
136
137/*
138 * These functions can leverage inline expansion of GPIO calls to shrink
139 * costs for a txrx bit, often by factors of around ten (by instruction
140 * count).  That is particularly visible for larger word sizes, but helps
141 * even with default 8-bit words.
142 *
143 * REVISIT overheads calling these functions for each word also have
144 * significant performance costs.  Having txrx_bufs() calls that inline
145 * the txrx_word() logic would help performance, e.g. on larger blocks
146 * used with flash storage or MMC/SD.  There should also be ways to make
147 * GCC be less stupid about reloading registers inside the I/O loops,
148 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
149 */
150
151static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
152		unsigned nsecs, u32 word, u8 bits)
153{
154	return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
155}
156
157static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
158		unsigned nsecs, u32 word, u8 bits)
159{
160	return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
161}
162
163static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
164		unsigned nsecs, u32 word, u8 bits)
165{
166	return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
167}
168
169static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
170		unsigned nsecs, u32 word, u8 bits)
171{
172	return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
173}
174
175/*
176 * These functions do not call setmosi or getmiso if respective flag
177 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
178 * call when such pin is not present or defined in the controller.
179 * A separate set of callbacks is defined to get highest possible
180 * speed in the generic case (when both MISO and MOSI lines are
181 * available), as optimiser will remove the checks when argument is
182 * constant.
183 */
184
185static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
186		unsigned nsecs, u32 word, u8 bits)
187{
188	unsigned flags = spi->master->flags;
189	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
190}
191
192static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
193		unsigned nsecs, u32 word, u8 bits)
194{
195	unsigned flags = spi->master->flags;
196	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
197}
198
199static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
200		unsigned nsecs, u32 word, u8 bits)
201{
202	unsigned flags = spi->master->flags;
203	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
204}
205
206static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
207		unsigned nsecs, u32 word, u8 bits)
208{
209	unsigned flags = spi->master->flags;
210	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
211}
212
213/*----------------------------------------------------------------------*/
214
215static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
216{
217	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
218
219	/* set initial clock line level */
220	if (is_active)
221		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
222
223	/* Drive chip select line, if we have one */
224	if (spi_gpio->has_cs) {
225		struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
226
227		/* SPI chip selects are normally active-low */
228		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
229	}
230}
231
232static int spi_gpio_setup(struct spi_device *spi)
233{
234	struct gpio_desc	*cs;
235	int			status = 0;
236	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
237
238	/*
239	 * The CS GPIOs have already been
240	 * initialized from the descriptor lookup.
241	 */
242	cs = spi_gpio->cs_gpios[spi->chip_select];
243	if (!spi->controller_state && cs)
244		status = gpiod_direction_output(cs,
245						!(spi->mode & SPI_CS_HIGH));
 
 
246
247	if (!status)
248		status = spi_bitbang_setup(spi);
249
250	return status;
251}
252
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
253static void spi_gpio_cleanup(struct spi_device *spi)
254{
255	spi_bitbang_cleanup(spi);
256}
257
258/*
259 * It can be convenient to use this driver with pins that have alternate
260 * functions associated with a "native" SPI controller if a driver for that
261 * controller is not available, or is missing important functionality.
262 *
263 * On platforms which can do so, configure MISO with a weak pullup unless
264 * there's an external pullup on that signal.  That saves power by avoiding
265 * floating signals.  (A weak pulldown would save power too, but many
266 * drivers expect to see all-ones data as the no slave "response".)
267 */
268static int spi_gpio_request(struct device *dev,
269			    struct spi_gpio *spi_gpio,
270			    unsigned int num_chipselects,
271			    u16 *mflags)
272{
273	int i;
274
275	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
276	if (IS_ERR(spi_gpio->mosi))
277		return PTR_ERR(spi_gpio->mosi);
278	if (!spi_gpio->mosi)
279		/* HW configuration without MOSI pin */
280		*mflags |= SPI_MASTER_NO_TX;
281
282	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
283	if (IS_ERR(spi_gpio->miso))
284		return PTR_ERR(spi_gpio->miso);
285	if (!spi_gpio->miso)
286		/* HW configuration without MISO pin */
287		*mflags |= SPI_MASTER_NO_RX;
288
289	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
290	if (IS_ERR(spi_gpio->mosi))
291		return PTR_ERR(spi_gpio->mosi);
292
293	for (i = 0; i < num_chipselects; i++) {
294		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",
295							     i, GPIOD_OUT_HIGH);
296		if (IS_ERR(spi_gpio->cs_gpios[i]))
297			return PTR_ERR(spi_gpio->cs_gpios[i]);
298	}
299
300	return 0;
301}
302
303#ifdef CONFIG_OF
304static const struct of_device_id spi_gpio_dt_ids[] = {
305	{ .compatible = "spi-gpio" },
306	{}
307};
308MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
309
310static int spi_gpio_probe_dt(struct platform_device *pdev)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
311{
312	int ret;
313	u32 tmp;
314	struct spi_gpio_platform_data	*pdata;
315	struct device_node *np = pdev->dev.of_node;
316	const struct of_device_id *of_id =
317			of_match_device(spi_gpio_dt_ids, &pdev->dev);
318
319	if (!of_id)
320		return 0;
 
 
 
 
 
 
 
321
322	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
323	if (!pdata)
 
 
324		return -ENOMEM;
325
326
327	ret = of_property_read_u32(np, "num-chipselects", &tmp);
328	if (ret < 0) {
329		dev_err(&pdev->dev, "num-chipselects property not found\n");
330		goto error_free;
331	}
332
333	pdata->num_chipselect = tmp;
334	pdev->dev.platform_data = pdata;
335
336	return 1;
337
338error_free:
339	devm_kfree(&pdev->dev, pdata);
340	return ret;
341}
342#else
343static inline int spi_gpio_probe_dt(struct platform_device *pdev)
344{
345	return 0;
346}
347#endif
348
349static int spi_gpio_probe(struct platform_device *pdev)
350{
351	int				status;
352	struct spi_master		*master;
353	struct spi_gpio			*spi_gpio;
354	struct spi_gpio_platform_data	*pdata;
355	u16 master_flags = 0;
356	bool use_of = 0;
357
358	status = spi_gpio_probe_dt(pdev);
359	if (status < 0)
360		return status;
361	if (status > 0)
362		use_of = 1;
363
364	pdata = dev_get_platdata(&pdev->dev);
365#ifdef GENERIC_BITBANG
366	if (!pdata || (!use_of && !pdata->num_chipselect))
367		return -ENODEV;
368#endif
369
370	master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio));
371	if (!master)
372		return -ENOMEM;
373
374	spi_gpio = spi_master_get_devdata(master);
375
376	spi_gpio->cs_gpios = devm_kzalloc(&pdev->dev,
377				pdata->num_chipselect * sizeof(*spi_gpio->cs_gpios),
378				GFP_KERNEL);
379	if (!spi_gpio->cs_gpios)
380		return -ENOMEM;
381
382	platform_set_drvdata(pdev, spi_gpio);
 
 
 
383
384	/* Determine if we have chip selects connected */
385	spi_gpio->has_cs = !!pdata->num_chipselect;
386
387	spi_gpio->pdev = pdev;
388	if (pdata)
389		spi_gpio->pdata = *pdata;
390
391	status = spi_gpio_request(&pdev->dev, spi_gpio,
392				  pdata->num_chipselect, &master_flags);
393	if (status)
394		return status;
395
396	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
397	master->flags = master_flags;
 
 
 
 
 
 
 
 
 
 
 
398	master->bus_num = pdev->id;
399	/* The master needs to think there is a chipselect even if not connected */
400	master->num_chipselect = spi_gpio->has_cs ? pdata->num_chipselect : 1;
401	master->setup = spi_gpio_setup;
402	master->cleanup = spi_gpio_cleanup;
403#ifdef CONFIG_OF
404	master->dev.of_node = pdev->dev.of_node;
405#endif
406
407	spi_gpio->bitbang.master = master;
408	spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
409
410	if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) {
411		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
412		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
413		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
414		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
 
 
 
 
 
 
 
 
415	} else {
416		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
417		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
418		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
419		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
420	}
421	spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
422	spi_gpio->bitbang.flags = SPI_CS_HIGH;
423
424	status = spi_bitbang_start(&spi_gpio->bitbang);
425	if (status)
426		spi_master_put(master);
427
428	return status;
429}
430
431static int spi_gpio_remove(struct platform_device *pdev)
432{
433	struct spi_gpio			*spi_gpio;
434	struct spi_gpio_platform_data	*pdata;
435
436	spi_gpio = platform_get_drvdata(pdev);
437	pdata = dev_get_platdata(&pdev->dev);
438
439	/* stop() unregisters child devices too */
440	spi_bitbang_stop(&spi_gpio->bitbang);
441
442	spi_master_put(spi_gpio->bitbang.master);
443
444	return 0;
445}
446
447MODULE_ALIAS("platform:" DRIVER_NAME);
448
449static struct platform_driver spi_gpio_driver = {
450	.driver = {
451		.name	= DRIVER_NAME,
452		.of_match_table = of_match_ptr(spi_gpio_dt_ids),
453	},
454	.probe		= spi_gpio_probe,
455	.remove		= spi_gpio_remove,
456};
457module_platform_driver(spi_gpio_driver);
458
459MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
460MODULE_AUTHOR("David Brownell");
461MODULE_LICENSE("GPL");