Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OF helpers for IOMMU
4 *
5 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 */
7
8#include <linux/export.h>
9#include <linux/iommu.h>
10#include <linux/limits.h>
11#include <linux/module.h>
12#include <linux/msi.h>
13#include <linux/of.h>
14#include <linux/of_iommu.h>
15#include <linux/of_pci.h>
16#include <linux/pci.h>
17#include <linux/slab.h>
18#include <linux/fsl/mc.h>
19
20#define NO_IOMMU 1
21
22/**
23 * of_get_dma_window - Parse *dma-window property and returns 0 if found.
24 *
25 * @dn: device node
26 * @prefix: prefix for property name if any
27 * @index: index to start to parse
28 * @busno: Returns busno if supported. Otherwise pass NULL
29 * @addr: Returns address that DMA starts
30 * @size: Returns the range that DMA can handle
31 *
32 * This supports different formats flexibly. "prefix" can be
33 * configured if any. "busno" and "index" are optionally
34 * specified. Set 0(or NULL) if not used.
35 */
36int of_get_dma_window(struct device_node *dn, const char *prefix, int index,
37 unsigned long *busno, dma_addr_t *addr, size_t *size)
38{
39 const __be32 *dma_window, *end;
40 int bytes, cur_index = 0;
41 char propname[NAME_MAX], addrname[NAME_MAX], sizename[NAME_MAX];
42
43 if (!dn || !addr || !size)
44 return -EINVAL;
45
46 if (!prefix)
47 prefix = "";
48
49 snprintf(propname, sizeof(propname), "%sdma-window", prefix);
50 snprintf(addrname, sizeof(addrname), "%s#dma-address-cells", prefix);
51 snprintf(sizename, sizeof(sizename), "%s#dma-size-cells", prefix);
52
53 dma_window = of_get_property(dn, propname, &bytes);
54 if (!dma_window)
55 return -ENODEV;
56 end = dma_window + bytes / sizeof(*dma_window);
57
58 while (dma_window < end) {
59 u32 cells;
60 const void *prop;
61
62 /* busno is one cell if supported */
63 if (busno)
64 *busno = be32_to_cpup(dma_window++);
65
66 prop = of_get_property(dn, addrname, NULL);
67 if (!prop)
68 prop = of_get_property(dn, "#address-cells", NULL);
69
70 cells = prop ? be32_to_cpup(prop) : of_n_addr_cells(dn);
71 if (!cells)
72 return -EINVAL;
73 *addr = of_read_number(dma_window, cells);
74 dma_window += cells;
75
76 prop = of_get_property(dn, sizename, NULL);
77 cells = prop ? be32_to_cpup(prop) : of_n_size_cells(dn);
78 if (!cells)
79 return -EINVAL;
80 *size = of_read_number(dma_window, cells);
81 dma_window += cells;
82
83 if (cur_index++ == index)
84 break;
85 }
86 return 0;
87}
88EXPORT_SYMBOL_GPL(of_get_dma_window);
89
90static int of_iommu_xlate(struct device *dev,
91 struct of_phandle_args *iommu_spec)
92{
93 const struct iommu_ops *ops;
94 struct fwnode_handle *fwnode = &iommu_spec->np->fwnode;
95 int ret;
96
97 ops = iommu_ops_from_fwnode(fwnode);
98 if ((ops && !ops->of_xlate) ||
99 !of_device_is_available(iommu_spec->np))
100 return NO_IOMMU;
101
102 ret = iommu_fwspec_init(dev, &iommu_spec->np->fwnode, ops);
103 if (ret)
104 return ret;
105 /*
106 * The otherwise-empty fwspec handily serves to indicate the specific
107 * IOMMU device we're waiting for, which will be useful if we ever get
108 * a proper probe-ordering dependency mechanism in future.
109 */
110 if (!ops)
111 return driver_deferred_probe_check_state(dev);
112
113 if (!try_module_get(ops->owner))
114 return -ENODEV;
115
116 ret = ops->of_xlate(dev, iommu_spec);
117 module_put(ops->owner);
118 return ret;
119}
120
121static int of_iommu_configure_dev_id(struct device_node *master_np,
122 struct device *dev,
123 const u32 *id)
124{
125 struct of_phandle_args iommu_spec = { .args_count = 1 };
126 int err;
127
128 err = of_map_id(master_np, *id, "iommu-map",
129 "iommu-map-mask", &iommu_spec.np,
130 iommu_spec.args);
131 if (err)
132 return err == -ENODEV ? NO_IOMMU : err;
133
134 err = of_iommu_xlate(dev, &iommu_spec);
135 of_node_put(iommu_spec.np);
136 return err;
137}
138
139static int of_iommu_configure_dev(struct device_node *master_np,
140 struct device *dev)
141{
142 struct of_phandle_args iommu_spec;
143 int err = NO_IOMMU, idx = 0;
144
145 while (!of_parse_phandle_with_args(master_np, "iommus",
146 "#iommu-cells",
147 idx, &iommu_spec)) {
148 err = of_iommu_xlate(dev, &iommu_spec);
149 of_node_put(iommu_spec.np);
150 idx++;
151 if (err)
152 break;
153 }
154
155 return err;
156}
157
158struct of_pci_iommu_alias_info {
159 struct device *dev;
160 struct device_node *np;
161};
162
163static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
164{
165 struct of_pci_iommu_alias_info *info = data;
166 u32 input_id = alias;
167
168 return of_iommu_configure_dev_id(info->np, info->dev, &input_id);
169}
170
171static int of_iommu_configure_device(struct device_node *master_np,
172 struct device *dev, const u32 *id)
173{
174 return (id) ? of_iommu_configure_dev_id(master_np, dev, id) :
175 of_iommu_configure_dev(master_np, dev);
176}
177
178const struct iommu_ops *of_iommu_configure(struct device *dev,
179 struct device_node *master_np,
180 const u32 *id)
181{
182 const struct iommu_ops *ops = NULL;
183 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
184 int err = NO_IOMMU;
185
186 if (!master_np)
187 return NULL;
188
189 if (fwspec) {
190 if (fwspec->ops)
191 return fwspec->ops;
192
193 /* In the deferred case, start again from scratch */
194 iommu_fwspec_free(dev);
195 }
196
197 /*
198 * We don't currently walk up the tree looking for a parent IOMMU.
199 * See the `Notes:' section of
200 * Documentation/devicetree/bindings/iommu/iommu.txt
201 */
202 if (dev_is_pci(dev)) {
203 struct of_pci_iommu_alias_info info = {
204 .dev = dev,
205 .np = master_np,
206 };
207
208 pci_request_acs();
209 err = pci_for_each_dma_alias(to_pci_dev(dev),
210 of_pci_iommu_init, &info);
211 } else {
212 err = of_iommu_configure_device(master_np, dev, id);
213
214 fwspec = dev_iommu_fwspec_get(dev);
215 if (!err && fwspec)
216 of_property_read_u32(master_np, "pasid-num-bits",
217 &fwspec->num_pasid_bits);
218 }
219
220 /*
221 * Two success conditions can be represented by non-negative err here:
222 * >0 : there is no IOMMU, or one was unavailable for non-fatal reasons
223 * 0 : we found an IOMMU, and dev->fwspec is initialised appropriately
224 * <0 : any actual error
225 */
226 if (!err) {
227 /* The fwspec pointer changed, read it again */
228 fwspec = dev_iommu_fwspec_get(dev);
229 ops = fwspec->ops;
230 }
231 /*
232 * If we have reason to believe the IOMMU driver missed the initial
233 * probe for dev, replay it to get things in order.
234 */
235 if (!err && dev->bus && !device_iommu_mapped(dev))
236 err = iommu_probe_device(dev);
237
238 /* Ignore all other errors apart from EPROBE_DEFER */
239 if (err == -EPROBE_DEFER) {
240 ops = ERR_PTR(err);
241 } else if (err < 0) {
242 dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);
243 ops = NULL;
244 }
245
246 return ops;
247}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OF helpers for IOMMU
4 *
5 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 */
7
8#include <linux/export.h>
9#include <linux/iommu.h>
10#include <linux/limits.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_address.h>
14#include <linux/of_iommu.h>
15#include <linux/of_pci.h>
16#include <linux/pci.h>
17#include <linux/slab.h>
18#include <linux/fsl/mc.h>
19
20#include "iommu-priv.h"
21
22static int of_iommu_xlate(struct device *dev,
23 struct of_phandle_args *iommu_spec)
24{
25 const struct iommu_ops *ops;
26 int ret;
27
28 if (!of_device_is_available(iommu_spec->np))
29 return -ENODEV;
30
31 ret = iommu_fwspec_init(dev, of_fwnode_handle(iommu_spec->np));
32 if (ret == -EPROBE_DEFER)
33 return driver_deferred_probe_check_state(dev);
34 if (ret)
35 return ret;
36
37 ops = iommu_ops_from_fwnode(&iommu_spec->np->fwnode);
38 if (!ops->of_xlate || !try_module_get(ops->owner))
39 return -ENODEV;
40
41 ret = ops->of_xlate(dev, iommu_spec);
42 module_put(ops->owner);
43 return ret;
44}
45
46static int of_iommu_configure_dev_id(struct device_node *master_np,
47 struct device *dev,
48 const u32 *id)
49{
50 struct of_phandle_args iommu_spec = { .args_count = 1 };
51 int err;
52
53 err = of_map_id(master_np, *id, "iommu-map",
54 "iommu-map-mask", &iommu_spec.np,
55 iommu_spec.args);
56 if (err)
57 return err;
58
59 err = of_iommu_xlate(dev, &iommu_spec);
60 of_node_put(iommu_spec.np);
61 return err;
62}
63
64static int of_iommu_configure_dev(struct device_node *master_np,
65 struct device *dev)
66{
67 struct of_phandle_args iommu_spec;
68 int err = -ENODEV, idx = 0;
69
70 while (!of_parse_phandle_with_args(master_np, "iommus",
71 "#iommu-cells",
72 idx, &iommu_spec)) {
73 err = of_iommu_xlate(dev, &iommu_spec);
74 of_node_put(iommu_spec.np);
75 idx++;
76 if (err)
77 break;
78 }
79
80 return err;
81}
82
83struct of_pci_iommu_alias_info {
84 struct device *dev;
85 struct device_node *np;
86};
87
88static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
89{
90 struct of_pci_iommu_alias_info *info = data;
91 u32 input_id = alias;
92
93 return of_iommu_configure_dev_id(info->np, info->dev, &input_id);
94}
95
96static int of_iommu_configure_device(struct device_node *master_np,
97 struct device *dev, const u32 *id)
98{
99 return (id) ? of_iommu_configure_dev_id(master_np, dev, id) :
100 of_iommu_configure_dev(master_np, dev);
101}
102
103static void of_pci_check_device_ats(struct device *dev, struct device_node *np)
104{
105 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
106
107 if (fwspec && of_property_read_bool(np, "ats-supported"))
108 fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
109}
110
111/*
112 * Returns:
113 * 0 on success, an iommu was configured
114 * -ENODEV if the device does not have any IOMMU
115 * -EPROBEDEFER if probing should be tried again
116 * -errno fatal errors
117 */
118int of_iommu_configure(struct device *dev, struct device_node *master_np,
119 const u32 *id)
120{
121 int err;
122
123 if (!master_np)
124 return -ENODEV;
125
126 /* Serialise to make dev->iommu stable under our potential fwspec */
127 mutex_lock(&iommu_probe_device_lock);
128 if (dev_iommu_fwspec_get(dev)) {
129 mutex_unlock(&iommu_probe_device_lock);
130 return 0;
131 }
132
133 /*
134 * We don't currently walk up the tree looking for a parent IOMMU.
135 * See the `Notes:' section of
136 * Documentation/devicetree/bindings/iommu/iommu.txt
137 */
138 if (dev_is_pci(dev)) {
139 struct of_pci_iommu_alias_info info = {
140 .dev = dev,
141 .np = master_np,
142 };
143
144 pci_request_acs();
145 err = pci_for_each_dma_alias(to_pci_dev(dev),
146 of_pci_iommu_init, &info);
147 of_pci_check_device_ats(dev, master_np);
148 } else {
149 err = of_iommu_configure_device(master_np, dev, id);
150 }
151
152 if (err)
153 iommu_fwspec_free(dev);
154 mutex_unlock(&iommu_probe_device_lock);
155
156 if (!err && dev->bus)
157 err = iommu_probe_device(dev);
158
159 if (err && err != -EPROBE_DEFER)
160 dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);
161
162 return err;
163}
164
165static enum iommu_resv_type __maybe_unused
166iommu_resv_region_get_type(struct device *dev,
167 struct resource *phys,
168 phys_addr_t start, size_t length)
169{
170 phys_addr_t end = start + length - 1;
171
172 /*
173 * IOMMU regions without an associated physical region cannot be
174 * mapped and are simply reservations.
175 */
176 if (phys->start >= phys->end)
177 return IOMMU_RESV_RESERVED;
178
179 /* may be IOMMU_RESV_DIRECT_RELAXABLE for certain cases */
180 if (start == phys->start && end == phys->end)
181 return IOMMU_RESV_DIRECT;
182
183 dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n", phys,
184 &start, &end);
185 return IOMMU_RESV_RESERVED;
186}
187
188/**
189 * of_iommu_get_resv_regions - reserved region driver helper for device tree
190 * @dev: device for which to get reserved regions
191 * @list: reserved region list
192 *
193 * IOMMU drivers can use this to implement their .get_resv_regions() callback
194 * for memory regions attached to a device tree node. See the reserved-memory
195 * device tree bindings on how to use these:
196 *
197 * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
198 */
199void of_iommu_get_resv_regions(struct device *dev, struct list_head *list)
200{
201#if IS_ENABLED(CONFIG_OF_ADDRESS)
202 struct of_phandle_iterator it;
203 int err;
204
205 of_for_each_phandle(&it, err, dev->of_node, "memory-region", NULL, 0) {
206 const __be32 *maps, *end;
207 struct resource phys;
208 int size;
209
210 memset(&phys, 0, sizeof(phys));
211
212 /*
213 * The "reg" property is optional and can be omitted by reserved-memory regions
214 * that represent reservations in the IOVA space, which are regions that should
215 * not be mapped.
216 */
217 if (of_property_present(it.node, "reg")) {
218 err = of_address_to_resource(it.node, 0, &phys);
219 if (err < 0) {
220 dev_err(dev, "failed to parse memory region %pOF: %d\n",
221 it.node, err);
222 continue;
223 }
224 }
225
226 maps = of_get_property(it.node, "iommu-addresses", &size);
227 if (!maps)
228 continue;
229
230 end = maps + size / sizeof(__be32);
231
232 while (maps < end) {
233 struct device_node *np;
234 u32 phandle;
235
236 phandle = be32_to_cpup(maps++);
237 np = of_find_node_by_phandle(phandle);
238
239 if (np == dev->of_node) {
240 int prot = IOMMU_READ | IOMMU_WRITE;
241 struct iommu_resv_region *region;
242 enum iommu_resv_type type;
243 phys_addr_t iova;
244 size_t length;
245
246 if (of_dma_is_coherent(dev->of_node))
247 prot |= IOMMU_CACHE;
248
249 maps = of_translate_dma_region(np, maps, &iova, &length);
250 if (length == 0) {
251 dev_warn(dev, "Cannot reserve IOVA region of 0 size\n");
252 continue;
253 }
254 type = iommu_resv_region_get_type(dev, &phys, iova, length);
255
256 region = iommu_alloc_resv_region(iova, length, prot, type,
257 GFP_KERNEL);
258 if (region)
259 list_add_tail(®ion->list, list);
260 }
261 }
262 }
263#endif
264}
265EXPORT_SYMBOL(of_iommu_get_resv_regions);