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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
4 * Copyright (c) 2015, Google Inc.
5 */
6
7#ifndef __PHY_TEGRA_XUSB_H
8#define __PHY_TEGRA_XUSB_H
9
10#include <linux/io.h>
11#include <linux/mutex.h>
12#include <linux/workqueue.h>
13
14#include <linux/usb/otg.h>
15#include <linux/usb/role.h>
16
17/* legacy entry points for backwards-compatibility */
18int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
19int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
20
21struct phy;
22struct phy_provider;
23struct platform_device;
24struct regulator;
25
26/*
27 * lanes
28 */
29struct tegra_xusb_lane_soc {
30 const char *name;
31
32 unsigned int offset;
33 unsigned int shift;
34 unsigned int mask;
35
36 const char * const *funcs;
37 unsigned int num_funcs;
38};
39
40struct tegra_xusb_lane {
41 const struct tegra_xusb_lane_soc *soc;
42 struct tegra_xusb_pad *pad;
43 struct device_node *np;
44 struct list_head list;
45 unsigned int function;
46 unsigned int index;
47};
48
49int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
50 struct device_node *np);
51
52struct tegra_xusb_usb3_lane {
53 struct tegra_xusb_lane base;
54};
55
56static inline struct tegra_xusb_usb3_lane *
57to_usb3_lane(struct tegra_xusb_lane *lane)
58{
59 return container_of(lane, struct tegra_xusb_usb3_lane, base);
60}
61
62struct tegra_xusb_usb2_lane {
63 struct tegra_xusb_lane base;
64
65 u32 hs_curr_level_offset;
66 bool powered_on;
67};
68
69static inline struct tegra_xusb_usb2_lane *
70to_usb2_lane(struct tegra_xusb_lane *lane)
71{
72 return container_of(lane, struct tegra_xusb_usb2_lane, base);
73}
74
75struct tegra_xusb_ulpi_lane {
76 struct tegra_xusb_lane base;
77};
78
79static inline struct tegra_xusb_ulpi_lane *
80to_ulpi_lane(struct tegra_xusb_lane *lane)
81{
82 return container_of(lane, struct tegra_xusb_ulpi_lane, base);
83}
84
85struct tegra_xusb_hsic_lane {
86 struct tegra_xusb_lane base;
87
88 u32 strobe_trim;
89 u32 rx_strobe_trim;
90 u32 rx_data_trim;
91 u32 tx_rtune_n;
92 u32 tx_rtune_p;
93 u32 tx_rslew_n;
94 u32 tx_rslew_p;
95 bool auto_term;
96};
97
98static inline struct tegra_xusb_hsic_lane *
99to_hsic_lane(struct tegra_xusb_lane *lane)
100{
101 return container_of(lane, struct tegra_xusb_hsic_lane, base);
102}
103
104struct tegra_xusb_pcie_lane {
105 struct tegra_xusb_lane base;
106};
107
108static inline struct tegra_xusb_pcie_lane *
109to_pcie_lane(struct tegra_xusb_lane *lane)
110{
111 return container_of(lane, struct tegra_xusb_pcie_lane, base);
112}
113
114struct tegra_xusb_sata_lane {
115 struct tegra_xusb_lane base;
116};
117
118static inline struct tegra_xusb_sata_lane *
119to_sata_lane(struct tegra_xusb_lane *lane)
120{
121 return container_of(lane, struct tegra_xusb_sata_lane, base);
122}
123
124struct tegra_xusb_lane_ops {
125 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
126 struct device_node *np,
127 unsigned int index);
128 void (*remove)(struct tegra_xusb_lane *lane);
129};
130
131/*
132 * pads
133 */
134struct tegra_xusb_pad_soc;
135struct tegra_xusb_padctl;
136
137struct tegra_xusb_pad_ops {
138 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
139 const struct tegra_xusb_pad_soc *soc,
140 struct device_node *np);
141 void (*remove)(struct tegra_xusb_pad *pad);
142};
143
144struct tegra_xusb_pad_soc {
145 const char *name;
146
147 const struct tegra_xusb_lane_soc *lanes;
148 unsigned int num_lanes;
149
150 const struct tegra_xusb_pad_ops *ops;
151};
152
153struct tegra_xusb_pad {
154 const struct tegra_xusb_pad_soc *soc;
155 struct tegra_xusb_padctl *padctl;
156 struct phy_provider *provider;
157 struct phy **lanes;
158 struct device dev;
159
160 const struct tegra_xusb_lane_ops *ops;
161
162 struct list_head list;
163};
164
165static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
166{
167 return container_of(dev, struct tegra_xusb_pad, dev);
168}
169
170int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
171 struct tegra_xusb_padctl *padctl,
172 struct device_node *np);
173int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
174 const struct phy_ops *ops);
175void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
176
177struct tegra_xusb_usb3_pad {
178 struct tegra_xusb_pad base;
179
180 unsigned int enable;
181 struct mutex lock;
182};
183
184static inline struct tegra_xusb_usb3_pad *
185to_usb3_pad(struct tegra_xusb_pad *pad)
186{
187 return container_of(pad, struct tegra_xusb_usb3_pad, base);
188}
189
190struct tegra_xusb_usb2_pad {
191 struct tegra_xusb_pad base;
192
193 struct clk *clk;
194 unsigned int enable;
195 struct mutex lock;
196};
197
198static inline struct tegra_xusb_usb2_pad *
199to_usb2_pad(struct tegra_xusb_pad *pad)
200{
201 return container_of(pad, struct tegra_xusb_usb2_pad, base);
202}
203
204struct tegra_xusb_ulpi_pad {
205 struct tegra_xusb_pad base;
206};
207
208static inline struct tegra_xusb_ulpi_pad *
209to_ulpi_pad(struct tegra_xusb_pad *pad)
210{
211 return container_of(pad, struct tegra_xusb_ulpi_pad, base);
212}
213
214struct tegra_xusb_hsic_pad {
215 struct tegra_xusb_pad base;
216
217 struct regulator *supply;
218 struct clk *clk;
219};
220
221static inline struct tegra_xusb_hsic_pad *
222to_hsic_pad(struct tegra_xusb_pad *pad)
223{
224 return container_of(pad, struct tegra_xusb_hsic_pad, base);
225}
226
227struct tegra_xusb_pcie_pad {
228 struct tegra_xusb_pad base;
229
230 struct reset_control *rst;
231 struct clk *pll;
232
233 unsigned int enable;
234};
235
236static inline struct tegra_xusb_pcie_pad *
237to_pcie_pad(struct tegra_xusb_pad *pad)
238{
239 return container_of(pad, struct tegra_xusb_pcie_pad, base);
240}
241
242struct tegra_xusb_sata_pad {
243 struct tegra_xusb_pad base;
244
245 struct reset_control *rst;
246 struct clk *pll;
247
248 unsigned int enable;
249};
250
251static inline struct tegra_xusb_sata_pad *
252to_sata_pad(struct tegra_xusb_pad *pad)
253{
254 return container_of(pad, struct tegra_xusb_sata_pad, base);
255}
256
257/*
258 * ports
259 */
260struct tegra_xusb_port_ops;
261
262struct tegra_xusb_port {
263 struct tegra_xusb_padctl *padctl;
264 struct tegra_xusb_lane *lane;
265 unsigned int index;
266
267 struct list_head list;
268 struct device dev;
269
270 struct usb_role_switch *usb_role_sw;
271 struct work_struct usb_phy_work;
272 struct usb_phy usb_phy;
273
274 const struct tegra_xusb_port_ops *ops;
275};
276
277static inline struct tegra_xusb_port *to_tegra_xusb_port(struct device *dev)
278{
279 return container_of(dev, struct tegra_xusb_port, dev);
280}
281
282struct tegra_xusb_lane_map {
283 unsigned int port;
284 const char *type;
285 unsigned int index;
286 const char *func;
287};
288
289struct tegra_xusb_lane *
290tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
291 const struct tegra_xusb_lane_map *map,
292 const char *function);
293
294struct tegra_xusb_port *
295tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
296 unsigned int index);
297
298struct tegra_xusb_usb2_port {
299 struct tegra_xusb_port base;
300
301 struct regulator *supply;
302 enum usb_dr_mode mode;
303 bool internal;
304 int usb3_port_fake;
305};
306
307static inline struct tegra_xusb_usb2_port *
308to_usb2_port(struct tegra_xusb_port *port)
309{
310 return container_of(port, struct tegra_xusb_usb2_port, base);
311}
312
313struct tegra_xusb_usb2_port *
314tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
315 unsigned int index);
316void tegra_xusb_usb2_port_release(struct tegra_xusb_port *port);
317void tegra_xusb_usb2_port_remove(struct tegra_xusb_port *port);
318
319struct tegra_xusb_ulpi_port {
320 struct tegra_xusb_port base;
321
322 struct regulator *supply;
323 bool internal;
324};
325
326static inline struct tegra_xusb_ulpi_port *
327to_ulpi_port(struct tegra_xusb_port *port)
328{
329 return container_of(port, struct tegra_xusb_ulpi_port, base);
330}
331
332void tegra_xusb_ulpi_port_release(struct tegra_xusb_port *port);
333
334struct tegra_xusb_hsic_port {
335 struct tegra_xusb_port base;
336};
337
338static inline struct tegra_xusb_hsic_port *
339to_hsic_port(struct tegra_xusb_port *port)
340{
341 return container_of(port, struct tegra_xusb_hsic_port, base);
342}
343
344void tegra_xusb_hsic_port_release(struct tegra_xusb_port *port);
345
346struct tegra_xusb_usb3_port {
347 struct tegra_xusb_port base;
348 struct regulator *supply;
349 bool context_saved;
350 unsigned int port;
351 bool internal;
352 bool disable_gen2;
353
354 u32 tap1;
355 u32 amp;
356 u32 ctle_z;
357 u32 ctle_g;
358};
359
360static inline struct tegra_xusb_usb3_port *
361to_usb3_port(struct tegra_xusb_port *port)
362{
363 return container_of(port, struct tegra_xusb_usb3_port, base);
364}
365
366struct tegra_xusb_usb3_port *
367tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
368 unsigned int index);
369void tegra_xusb_usb3_port_release(struct tegra_xusb_port *port);
370void tegra_xusb_usb3_port_remove(struct tegra_xusb_port *port);
371
372struct tegra_xusb_port_ops {
373 void (*release)(struct tegra_xusb_port *port);
374 void (*remove)(struct tegra_xusb_port *port);
375 int (*enable)(struct tegra_xusb_port *port);
376 void (*disable)(struct tegra_xusb_port *port);
377 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
378};
379
380/*
381 * pad controller
382 */
383struct tegra_xusb_padctl_soc;
384
385struct tegra_xusb_padctl_ops {
386 struct tegra_xusb_padctl *
387 (*probe)(struct device *dev,
388 const struct tegra_xusb_padctl_soc *soc);
389 void (*remove)(struct tegra_xusb_padctl *padctl);
390
391 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
392 unsigned int index);
393 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
394 unsigned int index, bool idle);
395 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
396 unsigned int index, bool enable);
397 int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set);
398 int (*utmi_port_reset)(struct phy *phy);
399};
400
401struct tegra_xusb_padctl_soc {
402 const struct tegra_xusb_pad_soc * const *pads;
403 unsigned int num_pads;
404
405 struct {
406 struct {
407 const struct tegra_xusb_port_ops *ops;
408 unsigned int count;
409 } usb2, ulpi, hsic, usb3;
410 } ports;
411
412 const struct tegra_xusb_padctl_ops *ops;
413
414 const char * const *supply_names;
415 unsigned int num_supplies;
416 bool supports_gen2;
417 bool need_fake_usb3_port;
418};
419
420struct tegra_xusb_padctl {
421 struct device *dev;
422 void __iomem *regs;
423 struct mutex lock;
424 struct reset_control *rst;
425
426 const struct tegra_xusb_padctl_soc *soc;
427
428 struct tegra_xusb_pad *pcie;
429 struct tegra_xusb_pad *sata;
430 struct tegra_xusb_pad *ulpi;
431 struct tegra_xusb_pad *usb2;
432 struct tegra_xusb_pad *hsic;
433
434 struct list_head ports;
435 struct list_head lanes;
436 struct list_head pads;
437
438 unsigned int enable;
439
440 struct clk *clk;
441
442 struct regulator_bulk_data *supplies;
443};
444
445static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
446 unsigned long offset)
447{
448 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
449 writel(value, padctl->regs + offset);
450}
451
452static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
453 unsigned long offset)
454{
455 u32 value = readl(padctl->regs + offset);
456 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
457 return value;
458}
459
460struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
461 const char *name,
462 unsigned int index);
463
464#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
465extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
466#endif
467#if defined(CONFIG_ARCH_TEGRA_210_SOC)
468extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
469#endif
470#if defined(CONFIG_ARCH_TEGRA_186_SOC)
471extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
472#endif
473#if defined(CONFIG_ARCH_TEGRA_194_SOC)
474extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
475#endif
476
477#endif /* __PHY_TEGRA_XUSB_H */
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
4 * Copyright (c) 2015, Google Inc.
5 */
6
7#ifndef __PHY_TEGRA_XUSB_H
8#define __PHY_TEGRA_XUSB_H
9
10#include <linux/io.h>
11#include <linux/mutex.h>
12#include <linux/workqueue.h>
13
14#include <linux/usb/ch9.h>
15#include <linux/usb/otg.h>
16#include <linux/usb/role.h>
17
18/* legacy entry points for backwards-compatibility */
19int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev);
20int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev);
21
22struct phy;
23struct phy_provider;
24struct platform_device;
25struct regulator;
26
27/*
28 * lanes
29 */
30struct tegra_xusb_lane_soc {
31 const char *name;
32
33 unsigned int offset;
34 unsigned int shift;
35 unsigned int mask;
36
37 const char * const *funcs;
38 unsigned int num_funcs;
39
40 struct {
41 unsigned int misc_ctl2;
42 } regs;
43};
44
45struct tegra_xusb_lane {
46 const struct tegra_xusb_lane_soc *soc;
47 struct tegra_xusb_pad *pad;
48 struct device_node *np;
49 struct list_head list;
50 unsigned int function;
51 unsigned int index;
52};
53
54int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
55 struct device_node *np);
56
57struct tegra_xusb_usb3_lane {
58 struct tegra_xusb_lane base;
59};
60
61static inline struct tegra_xusb_usb3_lane *
62to_usb3_lane(struct tegra_xusb_lane *lane)
63{
64 return container_of(lane, struct tegra_xusb_usb3_lane, base);
65}
66
67struct tegra_xusb_usb2_lane {
68 struct tegra_xusb_lane base;
69
70 u32 hs_curr_level_offset;
71 bool powered_on;
72};
73
74static inline struct tegra_xusb_usb2_lane *
75to_usb2_lane(struct tegra_xusb_lane *lane)
76{
77 return container_of(lane, struct tegra_xusb_usb2_lane, base);
78}
79
80struct tegra_xusb_ulpi_lane {
81 struct tegra_xusb_lane base;
82};
83
84static inline struct tegra_xusb_ulpi_lane *
85to_ulpi_lane(struct tegra_xusb_lane *lane)
86{
87 return container_of(lane, struct tegra_xusb_ulpi_lane, base);
88}
89
90struct tegra_xusb_hsic_lane {
91 struct tegra_xusb_lane base;
92
93 u32 strobe_trim;
94 u32 rx_strobe_trim;
95 u32 rx_data_trim;
96 u32 tx_rtune_n;
97 u32 tx_rtune_p;
98 u32 tx_rslew_n;
99 u32 tx_rslew_p;
100 bool auto_term;
101};
102
103static inline struct tegra_xusb_hsic_lane *
104to_hsic_lane(struct tegra_xusb_lane *lane)
105{
106 return container_of(lane, struct tegra_xusb_hsic_lane, base);
107}
108
109struct tegra_xusb_pcie_lane {
110 struct tegra_xusb_lane base;
111};
112
113static inline struct tegra_xusb_pcie_lane *
114to_pcie_lane(struct tegra_xusb_lane *lane)
115{
116 return container_of(lane, struct tegra_xusb_pcie_lane, base);
117}
118
119struct tegra_xusb_sata_lane {
120 struct tegra_xusb_lane base;
121};
122
123static inline struct tegra_xusb_sata_lane *
124to_sata_lane(struct tegra_xusb_lane *lane)
125{
126 return container_of(lane, struct tegra_xusb_sata_lane, base);
127}
128
129struct tegra_xusb_lane_ops {
130 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad,
131 struct device_node *np,
132 unsigned int index);
133 void (*remove)(struct tegra_xusb_lane *lane);
134 void (*iddq_enable)(struct tegra_xusb_lane *lane);
135 void (*iddq_disable)(struct tegra_xusb_lane *lane);
136 int (*enable_phy_sleepwalk)(struct tegra_xusb_lane *lane, enum usb_device_speed speed);
137 int (*disable_phy_sleepwalk)(struct tegra_xusb_lane *lane);
138 int (*enable_phy_wake)(struct tegra_xusb_lane *lane);
139 int (*disable_phy_wake)(struct tegra_xusb_lane *lane);
140 bool (*remote_wake_detected)(struct tegra_xusb_lane *lane);
141};
142
143bool tegra_xusb_lane_check(struct tegra_xusb_lane *lane, const char *function);
144
145/*
146 * pads
147 */
148struct tegra_xusb_pad_soc;
149struct tegra_xusb_padctl;
150
151struct tegra_xusb_pad_ops {
152 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl,
153 const struct tegra_xusb_pad_soc *soc,
154 struct device_node *np);
155 void (*remove)(struct tegra_xusb_pad *pad);
156};
157
158struct tegra_xusb_pad_soc {
159 const char *name;
160
161 const struct tegra_xusb_lane_soc *lanes;
162 unsigned int num_lanes;
163
164 const struct tegra_xusb_pad_ops *ops;
165};
166
167struct tegra_xusb_pad {
168 const struct tegra_xusb_pad_soc *soc;
169 struct tegra_xusb_padctl *padctl;
170 struct phy_provider *provider;
171 struct phy **lanes;
172 struct device dev;
173
174 const struct tegra_xusb_lane_ops *ops;
175
176 struct list_head list;
177};
178
179static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev)
180{
181 return container_of(dev, struct tegra_xusb_pad, dev);
182}
183
184int tegra_xusb_pad_init(struct tegra_xusb_pad *pad,
185 struct tegra_xusb_padctl *padctl,
186 struct device_node *np);
187int tegra_xusb_pad_register(struct tegra_xusb_pad *pad,
188 const struct phy_ops *ops);
189void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad);
190
191struct tegra_xusb_usb3_pad {
192 struct tegra_xusb_pad base;
193
194 unsigned int enable;
195 struct mutex lock;
196};
197
198static inline struct tegra_xusb_usb3_pad *
199to_usb3_pad(struct tegra_xusb_pad *pad)
200{
201 return container_of(pad, struct tegra_xusb_usb3_pad, base);
202}
203
204struct tegra_xusb_usb2_pad {
205 struct tegra_xusb_pad base;
206
207 struct clk *clk;
208 unsigned int enable;
209 struct mutex lock;
210};
211
212static inline struct tegra_xusb_usb2_pad *
213to_usb2_pad(struct tegra_xusb_pad *pad)
214{
215 return container_of(pad, struct tegra_xusb_usb2_pad, base);
216}
217
218struct tegra_xusb_ulpi_pad {
219 struct tegra_xusb_pad base;
220};
221
222static inline struct tegra_xusb_ulpi_pad *
223to_ulpi_pad(struct tegra_xusb_pad *pad)
224{
225 return container_of(pad, struct tegra_xusb_ulpi_pad, base);
226}
227
228struct tegra_xusb_hsic_pad {
229 struct tegra_xusb_pad base;
230
231 struct regulator *supply;
232 struct clk *clk;
233};
234
235static inline struct tegra_xusb_hsic_pad *
236to_hsic_pad(struct tegra_xusb_pad *pad)
237{
238 return container_of(pad, struct tegra_xusb_hsic_pad, base);
239}
240
241struct tegra_xusb_pcie_pad {
242 struct tegra_xusb_pad base;
243
244 struct reset_control *rst;
245 struct clk *pll;
246
247 bool enable;
248};
249
250static inline struct tegra_xusb_pcie_pad *
251to_pcie_pad(struct tegra_xusb_pad *pad)
252{
253 return container_of(pad, struct tegra_xusb_pcie_pad, base);
254}
255
256struct tegra_xusb_sata_pad {
257 struct tegra_xusb_pad base;
258
259 struct reset_control *rst;
260 struct clk *pll;
261
262 bool enable;
263};
264
265static inline struct tegra_xusb_sata_pad *
266to_sata_pad(struct tegra_xusb_pad *pad)
267{
268 return container_of(pad, struct tegra_xusb_sata_pad, base);
269}
270
271/*
272 * ports
273 */
274struct tegra_xusb_port_ops;
275
276struct tegra_xusb_port {
277 struct tegra_xusb_padctl *padctl;
278 struct tegra_xusb_lane *lane;
279 unsigned int index;
280
281 struct list_head list;
282 struct device dev;
283
284 struct usb_role_switch *usb_role_sw;
285 struct work_struct usb_phy_work;
286 struct usb_phy usb_phy;
287
288 const struct tegra_xusb_port_ops *ops;
289};
290
291static inline struct tegra_xusb_port *to_tegra_xusb_port(struct device *dev)
292{
293 return container_of(dev, struct tegra_xusb_port, dev);
294}
295
296struct tegra_xusb_lane_map {
297 unsigned int port;
298 const char *type;
299 unsigned int index;
300 const char *func;
301};
302
303struct tegra_xusb_lane *
304tegra_xusb_port_find_lane(struct tegra_xusb_port *port,
305 const struct tegra_xusb_lane_map *map,
306 const char *function);
307
308struct tegra_xusb_port *
309tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type,
310 unsigned int index);
311
312struct tegra_xusb_usb2_port {
313 struct tegra_xusb_port base;
314
315 struct regulator *supply;
316 enum usb_dr_mode mode;
317 bool internal;
318 int usb3_port_fake;
319};
320
321static inline struct tegra_xusb_usb2_port *
322to_usb2_port(struct tegra_xusb_port *port)
323{
324 return container_of(port, struct tegra_xusb_usb2_port, base);
325}
326
327struct tegra_xusb_usb2_port *
328tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl,
329 unsigned int index);
330void tegra_xusb_usb2_port_release(struct tegra_xusb_port *port);
331void tegra_xusb_usb2_port_remove(struct tegra_xusb_port *port);
332
333struct tegra_xusb_ulpi_port {
334 struct tegra_xusb_port base;
335
336 struct regulator *supply;
337 bool internal;
338};
339
340static inline struct tegra_xusb_ulpi_port *
341to_ulpi_port(struct tegra_xusb_port *port)
342{
343 return container_of(port, struct tegra_xusb_ulpi_port, base);
344}
345
346void tegra_xusb_ulpi_port_release(struct tegra_xusb_port *port);
347
348struct tegra_xusb_hsic_port {
349 struct tegra_xusb_port base;
350};
351
352static inline struct tegra_xusb_hsic_port *
353to_hsic_port(struct tegra_xusb_port *port)
354{
355 return container_of(port, struct tegra_xusb_hsic_port, base);
356}
357
358void tegra_xusb_hsic_port_release(struct tegra_xusb_port *port);
359
360struct tegra_xusb_usb3_port {
361 struct tegra_xusb_port base;
362 struct regulator *supply;
363 bool context_saved;
364 unsigned int port;
365 bool internal;
366 bool disable_gen2;
367
368 u32 tap1;
369 u32 amp;
370 u32 ctle_z;
371 u32 ctle_g;
372};
373
374static inline struct tegra_xusb_usb3_port *
375to_usb3_port(struct tegra_xusb_port *port)
376{
377 return container_of(port, struct tegra_xusb_usb3_port, base);
378}
379
380struct tegra_xusb_usb3_port *
381tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl,
382 unsigned int index);
383void tegra_xusb_usb3_port_release(struct tegra_xusb_port *port);
384void tegra_xusb_usb3_port_remove(struct tegra_xusb_port *port);
385
386struct tegra_xusb_port_ops {
387 void (*release)(struct tegra_xusb_port *port);
388 void (*remove)(struct tegra_xusb_port *port);
389 int (*enable)(struct tegra_xusb_port *port);
390 void (*disable)(struct tegra_xusb_port *port);
391 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port);
392};
393
394/*
395 * pad controller
396 */
397struct tegra_xusb_padctl_soc;
398
399struct tegra_xusb_padctl_ops {
400 struct tegra_xusb_padctl *
401 (*probe)(struct device *dev,
402 const struct tegra_xusb_padctl_soc *soc);
403 void (*remove)(struct tegra_xusb_padctl *padctl);
404
405 int (*suspend_noirq)(struct tegra_xusb_padctl *padctl);
406 int (*resume_noirq)(struct tegra_xusb_padctl *padctl);
407 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl,
408 unsigned int index);
409 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl,
410 unsigned int index, bool idle);
411 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl,
412 unsigned int index, bool enable);
413 int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set);
414 int (*utmi_port_reset)(struct phy *phy);
415};
416
417struct tegra_xusb_padctl_soc {
418 const struct tegra_xusb_pad_soc * const *pads;
419 unsigned int num_pads;
420
421 struct {
422 struct {
423 const struct tegra_xusb_port_ops *ops;
424 unsigned int count;
425 } usb2, ulpi, hsic, usb3;
426 } ports;
427
428 const struct tegra_xusb_padctl_ops *ops;
429
430 const char * const *supply_names;
431 unsigned int num_supplies;
432 bool supports_gen2;
433 bool need_fake_usb3_port;
434};
435
436struct tegra_xusb_padctl {
437 struct device *dev;
438 void __iomem *regs;
439 struct mutex lock;
440 struct reset_control *rst;
441
442 const struct tegra_xusb_padctl_soc *soc;
443
444 struct tegra_xusb_pad *pcie;
445 struct tegra_xusb_pad *sata;
446 struct tegra_xusb_pad *ulpi;
447 struct tegra_xusb_pad *usb2;
448 struct tegra_xusb_pad *hsic;
449
450 struct list_head ports;
451 struct list_head lanes;
452 struct list_head pads;
453
454 unsigned int enable;
455
456 struct clk *clk;
457
458 struct regulator_bulk_data *supplies;
459};
460
461static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value,
462 unsigned long offset)
463{
464 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value);
465 writel(value, padctl->regs + offset);
466}
467
468static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl,
469 unsigned long offset)
470{
471 u32 value = readl(padctl->regs + offset);
472 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value);
473 return value;
474}
475
476struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl,
477 const char *name,
478 unsigned int index);
479
480#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
481extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc;
482#endif
483#if defined(CONFIG_ARCH_TEGRA_210_SOC)
484extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc;
485#endif
486#if defined(CONFIG_ARCH_TEGRA_186_SOC)
487extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc;
488#endif
489#if defined(CONFIG_ARCH_TEGRA_194_SOC)
490extern const struct tegra_xusb_padctl_soc tegra194_xusb_padctl_soc;
491#endif
492
493#endif /* __PHY_TEGRA_XUSB_H */