1/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
 2/* Copyright(c) 2015-17 Intel Corporation. */
 3
 4#ifndef __SDW_INTEL_LOCAL_H
 5#define __SDW_INTEL_LOCAL_H
 6
 7/**
 8 * struct sdw_intel_link_res - Soundwire Intel link resource structure,
 9 * typically populated by the controller driver.
10 * @pdev: platform_device
11 * @mmio_base: mmio base of SoundWire registers
12 * @registers: Link IO registers base
13 * @shim: Audio shim pointer
14 * @alh: ALH (Audio Link Hub) pointer
15 * @irq: Interrupt line
16 * @ops: Shim callback ops
17 * @dev: device implementing hw_params and free callbacks
18 * @shim_lock: mutex to handle access to shared SHIM registers
19 * @shim_mask: global pointer to check SHIM register initialization
 
 
20 * @cdns: Cadence master descriptor
21 * @list: used to walk-through all masters exposed by the same controller
22 */
23struct sdw_intel_link_res {
24	struct platform_device *pdev;
25	void __iomem *mmio_base; /* not strictly needed, useful for debug */
26	void __iomem *registers;
27	void __iomem *shim;
28	void __iomem *alh;
29	int irq;
30	const struct sdw_intel_ops *ops;
31	struct device *dev;
32	struct mutex *shim_lock; /* protect shared registers */
33	u32 *shim_mask;
 
 
34	struct sdw_cdns *cdns;
35	struct list_head list;
36};
37
38struct sdw_intel {
39	struct sdw_cdns cdns;
40	int instance;
41	struct sdw_intel_link_res *link_res;
42#ifdef CONFIG_DEBUG_FS
43	struct dentry *debugfs;
44#endif
45};
46
47#define SDW_INTEL_QUIRK_MASK_BUS_DISABLE      BIT(1)
 
48
49int intel_master_startup(struct platform_device *pdev);
50int intel_master_process_wakeen_event(struct platform_device *pdev);
 
 
 
 
 
51
52#endif /* __SDW_INTEL_LOCAL_H */

 1/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
 2/* Copyright(c) 2015-17 Intel Corporation. */
 3
 4#ifndef __SDW_INTEL_LOCAL_H
 5#define __SDW_INTEL_LOCAL_H
 6
 7/**
 8 * struct sdw_intel_link_res - Soundwire Intel link resource structure,
 9 * typically populated by the controller driver.
 
10 * @mmio_base: mmio base of SoundWire registers
11 * @registers: Link IO registers base
12 * @shim: Audio shim pointer
13 * @alh: ALH (Audio Link Hub) pointer
14 * @irq: Interrupt line
15 * @ops: Shim callback ops
16 * @dev: device implementing hw_params and free callbacks
17 * @shim_lock: mutex to handle access to shared SHIM registers
18 * @shim_mask: global pointer to check SHIM register initialization
19 * @clock_stop_quirks: mask defining requested behavior on pm_suspend
20 * @link_mask: global mask needed for power-up/down sequences
21 * @cdns: Cadence master descriptor
22 * @list: used to walk-through all masters exposed by the same controller
23 */
24struct sdw_intel_link_res {
 
25	void __iomem *mmio_base; /* not strictly needed, useful for debug */
26	void __iomem *registers;
27	void __iomem *shim;
28	void __iomem *alh;
29	int irq;
30	const struct sdw_intel_ops *ops;
31	struct device *dev;
32	struct mutex *shim_lock; /* protect shared registers */
33	u32 *shim_mask;
34	u32 clock_stop_quirks;
35	u32 link_mask;
36	struct sdw_cdns *cdns;
37	struct list_head list;
38};
39
40struct sdw_intel {
41	struct sdw_cdns cdns;
42	int instance;
43	struct sdw_intel_link_res *link_res;
44#ifdef CONFIG_DEBUG_FS
45	struct dentry *debugfs;
46#endif
47};
48
49int intel_link_startup(struct auxiliary_device *auxdev);
50int intel_link_process_wakeen_event(struct auxiliary_device *auxdev);
51
52struct sdw_intel_link_dev {
53	struct auxiliary_device auxdev;
54	struct sdw_intel_link_res link_res;
55};
56
57#define auxiliary_dev_to_sdw_intel_link_dev(auxiliary_dev) \
58	container_of(auxiliary_dev, struct sdw_intel_link_dev, auxdev)
59
60#endif /* __SDW_INTEL_LOCAL_H */