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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5 *
6 * This file contains the core interrupt handling code, for irq-chip based
7 * architectures. Detailed information is available in
8 * Documentation/core-api/genericirq.rst
9 */
10
11#include <linux/irq.h>
12#include <linux/msi.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/kernel_stat.h>
16#include <linux/irqdomain.h>
17
18#include <trace/events/irq.h>
19
20#include "internals.h"
21
22static irqreturn_t bad_chained_irq(int irq, void *dev_id)
23{
24 WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
25 return IRQ_NONE;
26}
27
28/*
29 * Chained handlers should never call action on their IRQ. This default
30 * action will emit warning if such thing happens.
31 */
32struct irqaction chained_action = {
33 .handler = bad_chained_irq,
34};
35
36/**
37 * irq_set_chip - set the irq chip for an irq
38 * @irq: irq number
39 * @chip: pointer to irq chip description structure
40 */
41int irq_set_chip(unsigned int irq, struct irq_chip *chip)
42{
43 unsigned long flags;
44 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
45
46 if (!desc)
47 return -EINVAL;
48
49 if (!chip)
50 chip = &no_irq_chip;
51
52 desc->irq_data.chip = chip;
53 irq_put_desc_unlock(desc, flags);
54 /*
55 * For !CONFIG_SPARSE_IRQ make the irq show up in
56 * allocated_irqs.
57 */
58 irq_mark_irq(irq);
59 return 0;
60}
61EXPORT_SYMBOL(irq_set_chip);
62
63/**
64 * irq_set_type - set the irq trigger type for an irq
65 * @irq: irq number
66 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
67 */
68int irq_set_irq_type(unsigned int irq, unsigned int type)
69{
70 unsigned long flags;
71 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
72 int ret = 0;
73
74 if (!desc)
75 return -EINVAL;
76
77 ret = __irq_set_trigger(desc, type);
78 irq_put_desc_busunlock(desc, flags);
79 return ret;
80}
81EXPORT_SYMBOL(irq_set_irq_type);
82
83/**
84 * irq_set_handler_data - set irq handler data for an irq
85 * @irq: Interrupt number
86 * @data: Pointer to interrupt specific data
87 *
88 * Set the hardware irq controller data for an irq
89 */
90int irq_set_handler_data(unsigned int irq, void *data)
91{
92 unsigned long flags;
93 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
94
95 if (!desc)
96 return -EINVAL;
97 desc->irq_common_data.handler_data = data;
98 irq_put_desc_unlock(desc, flags);
99 return 0;
100}
101EXPORT_SYMBOL(irq_set_handler_data);
102
103/**
104 * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
105 * @irq_base: Interrupt number base
106 * @irq_offset: Interrupt number offset
107 * @entry: Pointer to MSI descriptor data
108 *
109 * Set the MSI descriptor entry for an irq at offset
110 */
111int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
112 struct msi_desc *entry)
113{
114 unsigned long flags;
115 struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
116
117 if (!desc)
118 return -EINVAL;
119 desc->irq_common_data.msi_desc = entry;
120 if (entry && !irq_offset)
121 entry->irq = irq_base;
122 irq_put_desc_unlock(desc, flags);
123 return 0;
124}
125
126/**
127 * irq_set_msi_desc - set MSI descriptor data for an irq
128 * @irq: Interrupt number
129 * @entry: Pointer to MSI descriptor data
130 *
131 * Set the MSI descriptor entry for an irq
132 */
133int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
134{
135 return irq_set_msi_desc_off(irq, 0, entry);
136}
137
138/**
139 * irq_set_chip_data - set irq chip data for an irq
140 * @irq: Interrupt number
141 * @data: Pointer to chip specific data
142 *
143 * Set the hardware irq chip data for an irq
144 */
145int irq_set_chip_data(unsigned int irq, void *data)
146{
147 unsigned long flags;
148 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
149
150 if (!desc)
151 return -EINVAL;
152 desc->irq_data.chip_data = data;
153 irq_put_desc_unlock(desc, flags);
154 return 0;
155}
156EXPORT_SYMBOL(irq_set_chip_data);
157
158struct irq_data *irq_get_irq_data(unsigned int irq)
159{
160 struct irq_desc *desc = irq_to_desc(irq);
161
162 return desc ? &desc->irq_data : NULL;
163}
164EXPORT_SYMBOL_GPL(irq_get_irq_data);
165
166static void irq_state_clr_disabled(struct irq_desc *desc)
167{
168 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
169}
170
171static void irq_state_clr_masked(struct irq_desc *desc)
172{
173 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
174}
175
176static void irq_state_clr_started(struct irq_desc *desc)
177{
178 irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
179}
180
181static void irq_state_set_started(struct irq_desc *desc)
182{
183 irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
184}
185
186enum {
187 IRQ_STARTUP_NORMAL,
188 IRQ_STARTUP_MANAGED,
189 IRQ_STARTUP_ABORT,
190};
191
192#ifdef CONFIG_SMP
193static int
194__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
195{
196 struct irq_data *d = irq_desc_get_irq_data(desc);
197
198 if (!irqd_affinity_is_managed(d))
199 return IRQ_STARTUP_NORMAL;
200
201 irqd_clr_managed_shutdown(d);
202
203 if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
204 /*
205 * Catch code which fiddles with enable_irq() on a managed
206 * and potentially shutdown IRQ. Chained interrupt
207 * installment or irq auto probing should not happen on
208 * managed irqs either.
209 */
210 if (WARN_ON_ONCE(force))
211 return IRQ_STARTUP_ABORT;
212 /*
213 * The interrupt was requested, but there is no online CPU
214 * in it's affinity mask. Put it into managed shutdown
215 * state and let the cpu hotplug mechanism start it up once
216 * a CPU in the mask becomes available.
217 */
218 return IRQ_STARTUP_ABORT;
219 }
220 /*
221 * Managed interrupts have reserved resources, so this should not
222 * happen.
223 */
224 if (WARN_ON(irq_domain_activate_irq(d, false)))
225 return IRQ_STARTUP_ABORT;
226 return IRQ_STARTUP_MANAGED;
227}
228#else
229static __always_inline int
230__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
231{
232 return IRQ_STARTUP_NORMAL;
233}
234#endif
235
236static int __irq_startup(struct irq_desc *desc)
237{
238 struct irq_data *d = irq_desc_get_irq_data(desc);
239 int ret = 0;
240
241 /* Warn if this interrupt is not activated but try nevertheless */
242 WARN_ON_ONCE(!irqd_is_activated(d));
243
244 if (d->chip->irq_startup) {
245 ret = d->chip->irq_startup(d);
246 irq_state_clr_disabled(desc);
247 irq_state_clr_masked(desc);
248 } else {
249 irq_enable(desc);
250 }
251 irq_state_set_started(desc);
252 return ret;
253}
254
255int irq_startup(struct irq_desc *desc, bool resend, bool force)
256{
257 struct irq_data *d = irq_desc_get_irq_data(desc);
258 struct cpumask *aff = irq_data_get_affinity_mask(d);
259 int ret = 0;
260
261 desc->depth = 0;
262
263 if (irqd_is_started(d)) {
264 irq_enable(desc);
265 } else {
266 switch (__irq_startup_managed(desc, aff, force)) {
267 case IRQ_STARTUP_NORMAL:
268 ret = __irq_startup(desc);
269 irq_setup_affinity(desc);
270 break;
271 case IRQ_STARTUP_MANAGED:
272 irq_do_set_affinity(d, aff, false);
273 ret = __irq_startup(desc);
274 break;
275 case IRQ_STARTUP_ABORT:
276 irqd_set_managed_shutdown(d);
277 return 0;
278 }
279 }
280 if (resend)
281 check_irq_resend(desc, false);
282
283 return ret;
284}
285
286int irq_activate(struct irq_desc *desc)
287{
288 struct irq_data *d = irq_desc_get_irq_data(desc);
289
290 if (!irqd_affinity_is_managed(d))
291 return irq_domain_activate_irq(d, false);
292 return 0;
293}
294
295int irq_activate_and_startup(struct irq_desc *desc, bool resend)
296{
297 if (WARN_ON(irq_activate(desc)))
298 return 0;
299 return irq_startup(desc, resend, IRQ_START_FORCE);
300}
301
302static void __irq_disable(struct irq_desc *desc, bool mask);
303
304void irq_shutdown(struct irq_desc *desc)
305{
306 if (irqd_is_started(&desc->irq_data)) {
307 desc->depth = 1;
308 if (desc->irq_data.chip->irq_shutdown) {
309 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
310 irq_state_set_disabled(desc);
311 irq_state_set_masked(desc);
312 } else {
313 __irq_disable(desc, true);
314 }
315 irq_state_clr_started(desc);
316 }
317}
318
319
320void irq_shutdown_and_deactivate(struct irq_desc *desc)
321{
322 irq_shutdown(desc);
323 /*
324 * This must be called even if the interrupt was never started up,
325 * because the activation can happen before the interrupt is
326 * available for request/startup. It has it's own state tracking so
327 * it's safe to call it unconditionally.
328 */
329 irq_domain_deactivate_irq(&desc->irq_data);
330}
331
332void irq_enable(struct irq_desc *desc)
333{
334 if (!irqd_irq_disabled(&desc->irq_data)) {
335 unmask_irq(desc);
336 } else {
337 irq_state_clr_disabled(desc);
338 if (desc->irq_data.chip->irq_enable) {
339 desc->irq_data.chip->irq_enable(&desc->irq_data);
340 irq_state_clr_masked(desc);
341 } else {
342 unmask_irq(desc);
343 }
344 }
345}
346
347static void __irq_disable(struct irq_desc *desc, bool mask)
348{
349 if (irqd_irq_disabled(&desc->irq_data)) {
350 if (mask)
351 mask_irq(desc);
352 } else {
353 irq_state_set_disabled(desc);
354 if (desc->irq_data.chip->irq_disable) {
355 desc->irq_data.chip->irq_disable(&desc->irq_data);
356 irq_state_set_masked(desc);
357 } else if (mask) {
358 mask_irq(desc);
359 }
360 }
361}
362
363/**
364 * irq_disable - Mark interrupt disabled
365 * @desc: irq descriptor which should be disabled
366 *
367 * If the chip does not implement the irq_disable callback, we
368 * use a lazy disable approach. That means we mark the interrupt
369 * disabled, but leave the hardware unmasked. That's an
370 * optimization because we avoid the hardware access for the
371 * common case where no interrupt happens after we marked it
372 * disabled. If an interrupt happens, then the interrupt flow
373 * handler masks the line at the hardware level and marks it
374 * pending.
375 *
376 * If the interrupt chip does not implement the irq_disable callback,
377 * a driver can disable the lazy approach for a particular irq line by
378 * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
379 * be used for devices which cannot disable the interrupt at the
380 * device level under certain circumstances and have to use
381 * disable_irq[_nosync] instead.
382 */
383void irq_disable(struct irq_desc *desc)
384{
385 __irq_disable(desc, irq_settings_disable_unlazy(desc));
386}
387
388void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
389{
390 if (desc->irq_data.chip->irq_enable)
391 desc->irq_data.chip->irq_enable(&desc->irq_data);
392 else
393 desc->irq_data.chip->irq_unmask(&desc->irq_data);
394 cpumask_set_cpu(cpu, desc->percpu_enabled);
395}
396
397void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
398{
399 if (desc->irq_data.chip->irq_disable)
400 desc->irq_data.chip->irq_disable(&desc->irq_data);
401 else
402 desc->irq_data.chip->irq_mask(&desc->irq_data);
403 cpumask_clear_cpu(cpu, desc->percpu_enabled);
404}
405
406static inline void mask_ack_irq(struct irq_desc *desc)
407{
408 if (desc->irq_data.chip->irq_mask_ack) {
409 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
410 irq_state_set_masked(desc);
411 } else {
412 mask_irq(desc);
413 if (desc->irq_data.chip->irq_ack)
414 desc->irq_data.chip->irq_ack(&desc->irq_data);
415 }
416}
417
418void mask_irq(struct irq_desc *desc)
419{
420 if (irqd_irq_masked(&desc->irq_data))
421 return;
422
423 if (desc->irq_data.chip->irq_mask) {
424 desc->irq_data.chip->irq_mask(&desc->irq_data);
425 irq_state_set_masked(desc);
426 }
427}
428
429void unmask_irq(struct irq_desc *desc)
430{
431 if (!irqd_irq_masked(&desc->irq_data))
432 return;
433
434 if (desc->irq_data.chip->irq_unmask) {
435 desc->irq_data.chip->irq_unmask(&desc->irq_data);
436 irq_state_clr_masked(desc);
437 }
438}
439
440void unmask_threaded_irq(struct irq_desc *desc)
441{
442 struct irq_chip *chip = desc->irq_data.chip;
443
444 if (chip->flags & IRQCHIP_EOI_THREADED)
445 chip->irq_eoi(&desc->irq_data);
446
447 unmask_irq(desc);
448}
449
450/*
451 * handle_nested_irq - Handle a nested irq from a irq thread
452 * @irq: the interrupt number
453 *
454 * Handle interrupts which are nested into a threaded interrupt
455 * handler. The handler function is called inside the calling
456 * threads context.
457 */
458void handle_nested_irq(unsigned int irq)
459{
460 struct irq_desc *desc = irq_to_desc(irq);
461 struct irqaction *action;
462 irqreturn_t action_ret;
463
464 might_sleep();
465
466 raw_spin_lock_irq(&desc->lock);
467
468 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
469
470 action = desc->action;
471 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
472 desc->istate |= IRQS_PENDING;
473 goto out_unlock;
474 }
475
476 kstat_incr_irqs_this_cpu(desc);
477 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
478 raw_spin_unlock_irq(&desc->lock);
479
480 action_ret = IRQ_NONE;
481 for_each_action_of_desc(desc, action)
482 action_ret |= action->thread_fn(action->irq, action->dev_id);
483
484 if (!noirqdebug)
485 note_interrupt(desc, action_ret);
486
487 raw_spin_lock_irq(&desc->lock);
488 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
489
490out_unlock:
491 raw_spin_unlock_irq(&desc->lock);
492}
493EXPORT_SYMBOL_GPL(handle_nested_irq);
494
495static bool irq_check_poll(struct irq_desc *desc)
496{
497 if (!(desc->istate & IRQS_POLL_INPROGRESS))
498 return false;
499 return irq_wait_for_poll(desc);
500}
501
502static bool irq_may_run(struct irq_desc *desc)
503{
504 unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
505
506 /*
507 * If the interrupt is not in progress and is not an armed
508 * wakeup interrupt, proceed.
509 */
510 if (!irqd_has_set(&desc->irq_data, mask))
511 return true;
512
513 /*
514 * If the interrupt is an armed wakeup source, mark it pending
515 * and suspended, disable it and notify the pm core about the
516 * event.
517 */
518 if (irq_pm_check_wakeup(desc))
519 return false;
520
521 /*
522 * Handle a potential concurrent poll on a different core.
523 */
524 return irq_check_poll(desc);
525}
526
527/**
528 * handle_simple_irq - Simple and software-decoded IRQs.
529 * @desc: the interrupt description structure for this irq
530 *
531 * Simple interrupts are either sent from a demultiplexing interrupt
532 * handler or come from hardware, where no interrupt hardware control
533 * is necessary.
534 *
535 * Note: The caller is expected to handle the ack, clear, mask and
536 * unmask issues if necessary.
537 */
538void handle_simple_irq(struct irq_desc *desc)
539{
540 raw_spin_lock(&desc->lock);
541
542 if (!irq_may_run(desc))
543 goto out_unlock;
544
545 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
546
547 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
548 desc->istate |= IRQS_PENDING;
549 goto out_unlock;
550 }
551
552 kstat_incr_irqs_this_cpu(desc);
553 handle_irq_event(desc);
554
555out_unlock:
556 raw_spin_unlock(&desc->lock);
557}
558EXPORT_SYMBOL_GPL(handle_simple_irq);
559
560/**
561 * handle_untracked_irq - Simple and software-decoded IRQs.
562 * @desc: the interrupt description structure for this irq
563 *
564 * Untracked interrupts are sent from a demultiplexing interrupt
565 * handler when the demultiplexer does not know which device it its
566 * multiplexed irq domain generated the interrupt. IRQ's handled
567 * through here are not subjected to stats tracking, randomness, or
568 * spurious interrupt detection.
569 *
570 * Note: Like handle_simple_irq, the caller is expected to handle
571 * the ack, clear, mask and unmask issues if necessary.
572 */
573void handle_untracked_irq(struct irq_desc *desc)
574{
575 unsigned int flags = 0;
576
577 raw_spin_lock(&desc->lock);
578
579 if (!irq_may_run(desc))
580 goto out_unlock;
581
582 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
583
584 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
585 desc->istate |= IRQS_PENDING;
586 goto out_unlock;
587 }
588
589 desc->istate &= ~IRQS_PENDING;
590 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
591 raw_spin_unlock(&desc->lock);
592
593 __handle_irq_event_percpu(desc, &flags);
594
595 raw_spin_lock(&desc->lock);
596 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
597
598out_unlock:
599 raw_spin_unlock(&desc->lock);
600}
601EXPORT_SYMBOL_GPL(handle_untracked_irq);
602
603/*
604 * Called unconditionally from handle_level_irq() and only for oneshot
605 * interrupts from handle_fasteoi_irq()
606 */
607static void cond_unmask_irq(struct irq_desc *desc)
608{
609 /*
610 * We need to unmask in the following cases:
611 * - Standard level irq (IRQF_ONESHOT is not set)
612 * - Oneshot irq which did not wake the thread (caused by a
613 * spurious interrupt or a primary handler handling it
614 * completely).
615 */
616 if (!irqd_irq_disabled(&desc->irq_data) &&
617 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
618 unmask_irq(desc);
619}
620
621/**
622 * handle_level_irq - Level type irq handler
623 * @desc: the interrupt description structure for this irq
624 *
625 * Level type interrupts are active as long as the hardware line has
626 * the active level. This may require to mask the interrupt and unmask
627 * it after the associated handler has acknowledged the device, so the
628 * interrupt line is back to inactive.
629 */
630void handle_level_irq(struct irq_desc *desc)
631{
632 raw_spin_lock(&desc->lock);
633 mask_ack_irq(desc);
634
635 if (!irq_may_run(desc))
636 goto out_unlock;
637
638 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
639
640 /*
641 * If its disabled or no action available
642 * keep it masked and get out of here
643 */
644 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
645 desc->istate |= IRQS_PENDING;
646 goto out_unlock;
647 }
648
649 kstat_incr_irqs_this_cpu(desc);
650 handle_irq_event(desc);
651
652 cond_unmask_irq(desc);
653
654out_unlock:
655 raw_spin_unlock(&desc->lock);
656}
657EXPORT_SYMBOL_GPL(handle_level_irq);
658
659static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
660{
661 if (!(desc->istate & IRQS_ONESHOT)) {
662 chip->irq_eoi(&desc->irq_data);
663 return;
664 }
665 /*
666 * We need to unmask in the following cases:
667 * - Oneshot irq which did not wake the thread (caused by a
668 * spurious interrupt or a primary handler handling it
669 * completely).
670 */
671 if (!irqd_irq_disabled(&desc->irq_data) &&
672 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
673 chip->irq_eoi(&desc->irq_data);
674 unmask_irq(desc);
675 } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
676 chip->irq_eoi(&desc->irq_data);
677 }
678}
679
680/**
681 * handle_fasteoi_irq - irq handler for transparent controllers
682 * @desc: the interrupt description structure for this irq
683 *
684 * Only a single callback will be issued to the chip: an ->eoi()
685 * call when the interrupt has been serviced. This enables support
686 * for modern forms of interrupt handlers, which handle the flow
687 * details in hardware, transparently.
688 */
689void handle_fasteoi_irq(struct irq_desc *desc)
690{
691 struct irq_chip *chip = desc->irq_data.chip;
692
693 raw_spin_lock(&desc->lock);
694
695 if (!irq_may_run(desc))
696 goto out;
697
698 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
699
700 /*
701 * If its disabled or no action available
702 * then mask it and get out of here:
703 */
704 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
705 desc->istate |= IRQS_PENDING;
706 mask_irq(desc);
707 goto out;
708 }
709
710 kstat_incr_irqs_this_cpu(desc);
711 if (desc->istate & IRQS_ONESHOT)
712 mask_irq(desc);
713
714 handle_irq_event(desc);
715
716 cond_unmask_eoi_irq(desc, chip);
717
718 raw_spin_unlock(&desc->lock);
719 return;
720out:
721 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
722 chip->irq_eoi(&desc->irq_data);
723 raw_spin_unlock(&desc->lock);
724}
725EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
726
727/**
728 * handle_fasteoi_nmi - irq handler for NMI interrupt lines
729 * @desc: the interrupt description structure for this irq
730 *
731 * A simple NMI-safe handler, considering the restrictions
732 * from request_nmi.
733 *
734 * Only a single callback will be issued to the chip: an ->eoi()
735 * call when the interrupt has been serviced. This enables support
736 * for modern forms of interrupt handlers, which handle the flow
737 * details in hardware, transparently.
738 */
739void handle_fasteoi_nmi(struct irq_desc *desc)
740{
741 struct irq_chip *chip = irq_desc_get_chip(desc);
742 struct irqaction *action = desc->action;
743 unsigned int irq = irq_desc_get_irq(desc);
744 irqreturn_t res;
745
746 __kstat_incr_irqs_this_cpu(desc);
747
748 trace_irq_handler_entry(irq, action);
749 /*
750 * NMIs cannot be shared, there is only one action.
751 */
752 res = action->handler(irq, action->dev_id);
753 trace_irq_handler_exit(irq, action, res);
754
755 if (chip->irq_eoi)
756 chip->irq_eoi(&desc->irq_data);
757}
758EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
759
760/**
761 * handle_edge_irq - edge type IRQ handler
762 * @desc: the interrupt description structure for this irq
763 *
764 * Interrupt occures on the falling and/or rising edge of a hardware
765 * signal. The occurrence is latched into the irq controller hardware
766 * and must be acked in order to be reenabled. After the ack another
767 * interrupt can happen on the same source even before the first one
768 * is handled by the associated event handler. If this happens it
769 * might be necessary to disable (mask) the interrupt depending on the
770 * controller hardware. This requires to reenable the interrupt inside
771 * of the loop which handles the interrupts which have arrived while
772 * the handler was running. If all pending interrupts are handled, the
773 * loop is left.
774 */
775void handle_edge_irq(struct irq_desc *desc)
776{
777 raw_spin_lock(&desc->lock);
778
779 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
780
781 if (!irq_may_run(desc)) {
782 desc->istate |= IRQS_PENDING;
783 mask_ack_irq(desc);
784 goto out_unlock;
785 }
786
787 /*
788 * If its disabled or no action available then mask it and get
789 * out of here.
790 */
791 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
792 desc->istate |= IRQS_PENDING;
793 mask_ack_irq(desc);
794 goto out_unlock;
795 }
796
797 kstat_incr_irqs_this_cpu(desc);
798
799 /* Start handling the irq */
800 desc->irq_data.chip->irq_ack(&desc->irq_data);
801
802 do {
803 if (unlikely(!desc->action)) {
804 mask_irq(desc);
805 goto out_unlock;
806 }
807
808 /*
809 * When another irq arrived while we were handling
810 * one, we could have masked the irq.
811 * Renable it, if it was not disabled in meantime.
812 */
813 if (unlikely(desc->istate & IRQS_PENDING)) {
814 if (!irqd_irq_disabled(&desc->irq_data) &&
815 irqd_irq_masked(&desc->irq_data))
816 unmask_irq(desc);
817 }
818
819 handle_irq_event(desc);
820
821 } while ((desc->istate & IRQS_PENDING) &&
822 !irqd_irq_disabled(&desc->irq_data));
823
824out_unlock:
825 raw_spin_unlock(&desc->lock);
826}
827EXPORT_SYMBOL(handle_edge_irq);
828
829#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
830/**
831 * handle_edge_eoi_irq - edge eoi type IRQ handler
832 * @desc: the interrupt description structure for this irq
833 *
834 * Similar as the above handle_edge_irq, but using eoi and w/o the
835 * mask/unmask logic.
836 */
837void handle_edge_eoi_irq(struct irq_desc *desc)
838{
839 struct irq_chip *chip = irq_desc_get_chip(desc);
840
841 raw_spin_lock(&desc->lock);
842
843 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
844
845 if (!irq_may_run(desc)) {
846 desc->istate |= IRQS_PENDING;
847 goto out_eoi;
848 }
849
850 /*
851 * If its disabled or no action available then mask it and get
852 * out of here.
853 */
854 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
855 desc->istate |= IRQS_PENDING;
856 goto out_eoi;
857 }
858
859 kstat_incr_irqs_this_cpu(desc);
860
861 do {
862 if (unlikely(!desc->action))
863 goto out_eoi;
864
865 handle_irq_event(desc);
866
867 } while ((desc->istate & IRQS_PENDING) &&
868 !irqd_irq_disabled(&desc->irq_data));
869
870out_eoi:
871 chip->irq_eoi(&desc->irq_data);
872 raw_spin_unlock(&desc->lock);
873}
874#endif
875
876/**
877 * handle_percpu_irq - Per CPU local irq handler
878 * @desc: the interrupt description structure for this irq
879 *
880 * Per CPU interrupts on SMP machines without locking requirements
881 */
882void handle_percpu_irq(struct irq_desc *desc)
883{
884 struct irq_chip *chip = irq_desc_get_chip(desc);
885
886 /*
887 * PER CPU interrupts are not serialized. Do not touch
888 * desc->tot_count.
889 */
890 __kstat_incr_irqs_this_cpu(desc);
891
892 if (chip->irq_ack)
893 chip->irq_ack(&desc->irq_data);
894
895 handle_irq_event_percpu(desc);
896
897 if (chip->irq_eoi)
898 chip->irq_eoi(&desc->irq_data);
899}
900
901/**
902 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
903 * @desc: the interrupt description structure for this irq
904 *
905 * Per CPU interrupts on SMP machines without locking requirements. Same as
906 * handle_percpu_irq() above but with the following extras:
907 *
908 * action->percpu_dev_id is a pointer to percpu variables which
909 * contain the real device id for the cpu on which this handler is
910 * called
911 */
912void handle_percpu_devid_irq(struct irq_desc *desc)
913{
914 struct irq_chip *chip = irq_desc_get_chip(desc);
915 struct irqaction *action = desc->action;
916 unsigned int irq = irq_desc_get_irq(desc);
917 irqreturn_t res;
918
919 /*
920 * PER CPU interrupts are not serialized. Do not touch
921 * desc->tot_count.
922 */
923 __kstat_incr_irqs_this_cpu(desc);
924
925 if (chip->irq_ack)
926 chip->irq_ack(&desc->irq_data);
927
928 if (likely(action)) {
929 trace_irq_handler_entry(irq, action);
930 res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
931 trace_irq_handler_exit(irq, action, res);
932 } else {
933 unsigned int cpu = smp_processor_id();
934 bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
935
936 if (enabled)
937 irq_percpu_disable(desc, cpu);
938
939 pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
940 enabled ? " and unmasked" : "", irq, cpu);
941 }
942
943 if (chip->irq_eoi)
944 chip->irq_eoi(&desc->irq_data);
945}
946
947/**
948 * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
949 * dev ids
950 * @desc: the interrupt description structure for this irq
951 *
952 * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
953 * as a percpu pointer.
954 */
955void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
956{
957 struct irq_chip *chip = irq_desc_get_chip(desc);
958 struct irqaction *action = desc->action;
959 unsigned int irq = irq_desc_get_irq(desc);
960 irqreturn_t res;
961
962 __kstat_incr_irqs_this_cpu(desc);
963
964 trace_irq_handler_entry(irq, action);
965 res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
966 trace_irq_handler_exit(irq, action, res);
967
968 if (chip->irq_eoi)
969 chip->irq_eoi(&desc->irq_data);
970}
971
972static void
973__irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
974 int is_chained, const char *name)
975{
976 if (!handle) {
977 handle = handle_bad_irq;
978 } else {
979 struct irq_data *irq_data = &desc->irq_data;
980#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
981 /*
982 * With hierarchical domains we might run into a
983 * situation where the outermost chip is not yet set
984 * up, but the inner chips are there. Instead of
985 * bailing we install the handler, but obviously we
986 * cannot enable/startup the interrupt at this point.
987 */
988 while (irq_data) {
989 if (irq_data->chip != &no_irq_chip)
990 break;
991 /*
992 * Bail out if the outer chip is not set up
993 * and the interrupt supposed to be started
994 * right away.
995 */
996 if (WARN_ON(is_chained))
997 return;
998 /* Try the parent */
999 irq_data = irq_data->parent_data;
1000 }
1001#endif
1002 if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
1003 return;
1004 }
1005
1006 /* Uninstall? */
1007 if (handle == handle_bad_irq) {
1008 if (desc->irq_data.chip != &no_irq_chip)
1009 mask_ack_irq(desc);
1010 irq_state_set_disabled(desc);
1011 if (is_chained)
1012 desc->action = NULL;
1013 desc->depth = 1;
1014 }
1015 desc->handle_irq = handle;
1016 desc->name = name;
1017
1018 if (handle != handle_bad_irq && is_chained) {
1019 unsigned int type = irqd_get_trigger_type(&desc->irq_data);
1020
1021 /*
1022 * We're about to start this interrupt immediately,
1023 * hence the need to set the trigger configuration.
1024 * But the .set_type callback may have overridden the
1025 * flow handler, ignoring that we're dealing with a
1026 * chained interrupt. Reset it immediately because we
1027 * do know better.
1028 */
1029 if (type != IRQ_TYPE_NONE) {
1030 __irq_set_trigger(desc, type);
1031 desc->handle_irq = handle;
1032 }
1033
1034 irq_settings_set_noprobe(desc);
1035 irq_settings_set_norequest(desc);
1036 irq_settings_set_nothread(desc);
1037 desc->action = &chained_action;
1038 irq_activate_and_startup(desc, IRQ_RESEND);
1039 }
1040}
1041
1042void
1043__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
1044 const char *name)
1045{
1046 unsigned long flags;
1047 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1048
1049 if (!desc)
1050 return;
1051
1052 __irq_do_set_handler(desc, handle, is_chained, name);
1053 irq_put_desc_busunlock(desc, flags);
1054}
1055EXPORT_SYMBOL_GPL(__irq_set_handler);
1056
1057void
1058irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
1059 void *data)
1060{
1061 unsigned long flags;
1062 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1063
1064 if (!desc)
1065 return;
1066
1067 desc->irq_common_data.handler_data = data;
1068 __irq_do_set_handler(desc, handle, 1, NULL);
1069
1070 irq_put_desc_busunlock(desc, flags);
1071}
1072EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
1073
1074void
1075irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
1076 irq_flow_handler_t handle, const char *name)
1077{
1078 irq_set_chip(irq, chip);
1079 __irq_set_handler(irq, handle, 0, name);
1080}
1081EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
1082
1083void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
1084{
1085 unsigned long flags, trigger, tmp;
1086 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
1087
1088 if (!desc)
1089 return;
1090
1091 /*
1092 * Warn when a driver sets the no autoenable flag on an already
1093 * active interrupt.
1094 */
1095 WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
1096
1097 irq_settings_clr_and_set(desc, clr, set);
1098
1099 trigger = irqd_get_trigger_type(&desc->irq_data);
1100
1101 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
1102 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
1103 if (irq_settings_has_no_balance_set(desc))
1104 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1105 if (irq_settings_is_per_cpu(desc))
1106 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1107 if (irq_settings_can_move_pcntxt(desc))
1108 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
1109 if (irq_settings_is_level(desc))
1110 irqd_set(&desc->irq_data, IRQD_LEVEL);
1111
1112 tmp = irq_settings_get_trigger_mask(desc);
1113 if (tmp != IRQ_TYPE_NONE)
1114 trigger = tmp;
1115
1116 irqd_set(&desc->irq_data, trigger);
1117
1118 irq_put_desc_unlock(desc, flags);
1119}
1120EXPORT_SYMBOL_GPL(irq_modify_status);
1121
1122/**
1123 * irq_cpu_online - Invoke all irq_cpu_online functions.
1124 *
1125 * Iterate through all irqs and invoke the chip.irq_cpu_online()
1126 * for each.
1127 */
1128void irq_cpu_online(void)
1129{
1130 struct irq_desc *desc;
1131 struct irq_chip *chip;
1132 unsigned long flags;
1133 unsigned int irq;
1134
1135 for_each_active_irq(irq) {
1136 desc = irq_to_desc(irq);
1137 if (!desc)
1138 continue;
1139
1140 raw_spin_lock_irqsave(&desc->lock, flags);
1141
1142 chip = irq_data_get_irq_chip(&desc->irq_data);
1143 if (chip && chip->irq_cpu_online &&
1144 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1145 !irqd_irq_disabled(&desc->irq_data)))
1146 chip->irq_cpu_online(&desc->irq_data);
1147
1148 raw_spin_unlock_irqrestore(&desc->lock, flags);
1149 }
1150}
1151
1152/**
1153 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
1154 *
1155 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
1156 * for each.
1157 */
1158void irq_cpu_offline(void)
1159{
1160 struct irq_desc *desc;
1161 struct irq_chip *chip;
1162 unsigned long flags;
1163 unsigned int irq;
1164
1165 for_each_active_irq(irq) {
1166 desc = irq_to_desc(irq);
1167 if (!desc)
1168 continue;
1169
1170 raw_spin_lock_irqsave(&desc->lock, flags);
1171
1172 chip = irq_data_get_irq_chip(&desc->irq_data);
1173 if (chip && chip->irq_cpu_offline &&
1174 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1175 !irqd_irq_disabled(&desc->irq_data)))
1176 chip->irq_cpu_offline(&desc->irq_data);
1177
1178 raw_spin_unlock_irqrestore(&desc->lock, flags);
1179 }
1180}
1181
1182#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1183
1184#ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
1185/**
1186 * handle_fasteoi_ack_irq - irq handler for edge hierarchy
1187 * stacked on transparent controllers
1188 *
1189 * @desc: the interrupt description structure for this irq
1190 *
1191 * Like handle_fasteoi_irq(), but for use with hierarchy where
1192 * the irq_chip also needs to have its ->irq_ack() function
1193 * called.
1194 */
1195void handle_fasteoi_ack_irq(struct irq_desc *desc)
1196{
1197 struct irq_chip *chip = desc->irq_data.chip;
1198
1199 raw_spin_lock(&desc->lock);
1200
1201 if (!irq_may_run(desc))
1202 goto out;
1203
1204 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1205
1206 /*
1207 * If its disabled or no action available
1208 * then mask it and get out of here:
1209 */
1210 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1211 desc->istate |= IRQS_PENDING;
1212 mask_irq(desc);
1213 goto out;
1214 }
1215
1216 kstat_incr_irqs_this_cpu(desc);
1217 if (desc->istate & IRQS_ONESHOT)
1218 mask_irq(desc);
1219
1220 /* Start handling the irq */
1221 desc->irq_data.chip->irq_ack(&desc->irq_data);
1222
1223 handle_irq_event(desc);
1224
1225 cond_unmask_eoi_irq(desc, chip);
1226
1227 raw_spin_unlock(&desc->lock);
1228 return;
1229out:
1230 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1231 chip->irq_eoi(&desc->irq_data);
1232 raw_spin_unlock(&desc->lock);
1233}
1234EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
1235
1236/**
1237 * handle_fasteoi_mask_irq - irq handler for level hierarchy
1238 * stacked on transparent controllers
1239 *
1240 * @desc: the interrupt description structure for this irq
1241 *
1242 * Like handle_fasteoi_irq(), but for use with hierarchy where
1243 * the irq_chip also needs to have its ->irq_mask_ack() function
1244 * called.
1245 */
1246void handle_fasteoi_mask_irq(struct irq_desc *desc)
1247{
1248 struct irq_chip *chip = desc->irq_data.chip;
1249
1250 raw_spin_lock(&desc->lock);
1251 mask_ack_irq(desc);
1252
1253 if (!irq_may_run(desc))
1254 goto out;
1255
1256 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1257
1258 /*
1259 * If its disabled or no action available
1260 * then mask it and get out of here:
1261 */
1262 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1263 desc->istate |= IRQS_PENDING;
1264 mask_irq(desc);
1265 goto out;
1266 }
1267
1268 kstat_incr_irqs_this_cpu(desc);
1269 if (desc->istate & IRQS_ONESHOT)
1270 mask_irq(desc);
1271
1272 handle_irq_event(desc);
1273
1274 cond_unmask_eoi_irq(desc, chip);
1275
1276 raw_spin_unlock(&desc->lock);
1277 return;
1278out:
1279 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1280 chip->irq_eoi(&desc->irq_data);
1281 raw_spin_unlock(&desc->lock);
1282}
1283EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
1284
1285#endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
1286
1287/**
1288 * irq_chip_set_parent_state - set the state of a parent interrupt.
1289 *
1290 * @data: Pointer to interrupt specific data
1291 * @which: State to be restored (one of IRQCHIP_STATE_*)
1292 * @val: Value corresponding to @which
1293 *
1294 * Conditional success, if the underlying irqchip does not implement it.
1295 */
1296int irq_chip_set_parent_state(struct irq_data *data,
1297 enum irqchip_irq_state which,
1298 bool val)
1299{
1300 data = data->parent_data;
1301
1302 if (!data || !data->chip->irq_set_irqchip_state)
1303 return 0;
1304
1305 return data->chip->irq_set_irqchip_state(data, which, val);
1306}
1307EXPORT_SYMBOL_GPL(irq_chip_set_parent_state);
1308
1309/**
1310 * irq_chip_get_parent_state - get the state of a parent interrupt.
1311 *
1312 * @data: Pointer to interrupt specific data
1313 * @which: one of IRQCHIP_STATE_* the caller wants to know
1314 * @state: a pointer to a boolean where the state is to be stored
1315 *
1316 * Conditional success, if the underlying irqchip does not implement it.
1317 */
1318int irq_chip_get_parent_state(struct irq_data *data,
1319 enum irqchip_irq_state which,
1320 bool *state)
1321{
1322 data = data->parent_data;
1323
1324 if (!data || !data->chip->irq_get_irqchip_state)
1325 return 0;
1326
1327 return data->chip->irq_get_irqchip_state(data, which, state);
1328}
1329EXPORT_SYMBOL_GPL(irq_chip_get_parent_state);
1330
1331/**
1332 * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
1333 * NULL)
1334 * @data: Pointer to interrupt specific data
1335 */
1336void irq_chip_enable_parent(struct irq_data *data)
1337{
1338 data = data->parent_data;
1339 if (data->chip->irq_enable)
1340 data->chip->irq_enable(data);
1341 else
1342 data->chip->irq_unmask(data);
1343}
1344EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
1345
1346/**
1347 * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
1348 * NULL)
1349 * @data: Pointer to interrupt specific data
1350 */
1351void irq_chip_disable_parent(struct irq_data *data)
1352{
1353 data = data->parent_data;
1354 if (data->chip->irq_disable)
1355 data->chip->irq_disable(data);
1356 else
1357 data->chip->irq_mask(data);
1358}
1359EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
1360
1361/**
1362 * irq_chip_ack_parent - Acknowledge the parent interrupt
1363 * @data: Pointer to interrupt specific data
1364 */
1365void irq_chip_ack_parent(struct irq_data *data)
1366{
1367 data = data->parent_data;
1368 data->chip->irq_ack(data);
1369}
1370EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
1371
1372/**
1373 * irq_chip_mask_parent - Mask the parent interrupt
1374 * @data: Pointer to interrupt specific data
1375 */
1376void irq_chip_mask_parent(struct irq_data *data)
1377{
1378 data = data->parent_data;
1379 data->chip->irq_mask(data);
1380}
1381EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
1382
1383/**
1384 * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
1385 * @data: Pointer to interrupt specific data
1386 */
1387void irq_chip_mask_ack_parent(struct irq_data *data)
1388{
1389 data = data->parent_data;
1390 data->chip->irq_mask_ack(data);
1391}
1392EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
1393
1394/**
1395 * irq_chip_unmask_parent - Unmask the parent interrupt
1396 * @data: Pointer to interrupt specific data
1397 */
1398void irq_chip_unmask_parent(struct irq_data *data)
1399{
1400 data = data->parent_data;
1401 data->chip->irq_unmask(data);
1402}
1403EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
1404
1405/**
1406 * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
1407 * @data: Pointer to interrupt specific data
1408 */
1409void irq_chip_eoi_parent(struct irq_data *data)
1410{
1411 data = data->parent_data;
1412 data->chip->irq_eoi(data);
1413}
1414EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
1415
1416/**
1417 * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
1418 * @data: Pointer to interrupt specific data
1419 * @dest: The affinity mask to set
1420 * @force: Flag to enforce setting (disable online checks)
1421 *
1422 * Conditinal, as the underlying parent chip might not implement it.
1423 */
1424int irq_chip_set_affinity_parent(struct irq_data *data,
1425 const struct cpumask *dest, bool force)
1426{
1427 data = data->parent_data;
1428 if (data->chip->irq_set_affinity)
1429 return data->chip->irq_set_affinity(data, dest, force);
1430
1431 return -ENOSYS;
1432}
1433EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
1434
1435/**
1436 * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
1437 * @data: Pointer to interrupt specific data
1438 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
1439 *
1440 * Conditional, as the underlying parent chip might not implement it.
1441 */
1442int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
1443{
1444 data = data->parent_data;
1445
1446 if (data->chip->irq_set_type)
1447 return data->chip->irq_set_type(data, type);
1448
1449 return -ENOSYS;
1450}
1451EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
1452
1453/**
1454 * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
1455 * @data: Pointer to interrupt specific data
1456 *
1457 * Iterate through the domain hierarchy of the interrupt and check
1458 * whether a hw retrigger function exists. If yes, invoke it.
1459 */
1460int irq_chip_retrigger_hierarchy(struct irq_data *data)
1461{
1462 for (data = data->parent_data; data; data = data->parent_data)
1463 if (data->chip && data->chip->irq_retrigger)
1464 return data->chip->irq_retrigger(data);
1465
1466 return 0;
1467}
1468EXPORT_SYMBOL_GPL(irq_chip_retrigger_hierarchy);
1469
1470/**
1471 * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
1472 * @data: Pointer to interrupt specific data
1473 * @vcpu_info: The vcpu affinity information
1474 */
1475int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
1476{
1477 data = data->parent_data;
1478 if (data->chip->irq_set_vcpu_affinity)
1479 return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
1480
1481 return -ENOSYS;
1482}
1483EXPORT_SYMBOL_GPL(irq_chip_set_vcpu_affinity_parent);
1484/**
1485 * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
1486 * @data: Pointer to interrupt specific data
1487 * @on: Whether to set or reset the wake-up capability of this irq
1488 *
1489 * Conditional, as the underlying parent chip might not implement it.
1490 */
1491int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
1492{
1493 data = data->parent_data;
1494
1495 if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
1496 return 0;
1497
1498 if (data->chip->irq_set_wake)
1499 return data->chip->irq_set_wake(data, on);
1500
1501 return -ENOSYS;
1502}
1503EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
1504
1505/**
1506 * irq_chip_request_resources_parent - Request resources on the parent interrupt
1507 * @data: Pointer to interrupt specific data
1508 */
1509int irq_chip_request_resources_parent(struct irq_data *data)
1510{
1511 data = data->parent_data;
1512
1513 if (data->chip->irq_request_resources)
1514 return data->chip->irq_request_resources(data);
1515
1516 return -ENOSYS;
1517}
1518EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
1519
1520/**
1521 * irq_chip_release_resources_parent - Release resources on the parent interrupt
1522 * @data: Pointer to interrupt specific data
1523 */
1524void irq_chip_release_resources_parent(struct irq_data *data)
1525{
1526 data = data->parent_data;
1527 if (data->chip->irq_release_resources)
1528 data->chip->irq_release_resources(data);
1529}
1530EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
1531#endif
1532
1533/**
1534 * irq_chip_compose_msi_msg - Componse msi message for a irq chip
1535 * @data: Pointer to interrupt specific data
1536 * @msg: Pointer to the MSI message
1537 *
1538 * For hierarchical domains we find the first chip in the hierarchy
1539 * which implements the irq_compose_msi_msg callback. For non
1540 * hierarchical we use the top level chip.
1541 */
1542int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1543{
1544 struct irq_data *pos = NULL;
1545
1546#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1547 for (; data; data = data->parent_data)
1548#endif
1549 if (data->chip && data->chip->irq_compose_msi_msg)
1550 pos = data;
1551 if (!pos)
1552 return -ENOSYS;
1553
1554 pos->chip->irq_compose_msi_msg(pos, msg);
1555
1556 return 0;
1557}
1558
1559/**
1560 * irq_chip_pm_get - Enable power for an IRQ chip
1561 * @data: Pointer to interrupt specific data
1562 *
1563 * Enable the power to the IRQ chip referenced by the interrupt data
1564 * structure.
1565 */
1566int irq_chip_pm_get(struct irq_data *data)
1567{
1568 int retval;
1569
1570 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
1571 retval = pm_runtime_get_sync(data->chip->parent_device);
1572 if (retval < 0) {
1573 pm_runtime_put_noidle(data->chip->parent_device);
1574 return retval;
1575 }
1576 }
1577
1578 return 0;
1579}
1580
1581/**
1582 * irq_chip_pm_put - Disable power for an IRQ chip
1583 * @data: Pointer to interrupt specific data
1584 *
1585 * Disable the power to the IRQ chip referenced by the interrupt data
1586 * structure, belongs. Note that power will only be disabled, once this
1587 * function has been called for all IRQs that have called irq_chip_pm_get().
1588 */
1589int irq_chip_pm_put(struct irq_data *data)
1590{
1591 int retval = 0;
1592
1593 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
1594 retval = pm_runtime_put(data->chip->parent_device);
1595
1596 return (retval < 0) ? retval : 0;
1597}
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
14#include <linux/msi.h>
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
21/**
22 * irq_set_chip - set the irq chip for an irq
23 * @irq: irq number
24 * @chip: pointer to irq chip description structure
25 */
26int irq_set_chip(unsigned int irq, struct irq_chip *chip)
27{
28 unsigned long flags;
29 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
30
31 if (!desc)
32 return -EINVAL;
33
34 if (!chip)
35 chip = &no_irq_chip;
36
37 desc->irq_data.chip = chip;
38 irq_put_desc_unlock(desc, flags);
39 /*
40 * For !CONFIG_SPARSE_IRQ make the irq show up in
41 * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
42 * already marked, and this call is harmless.
43 */
44 irq_reserve_irq(irq);
45 return 0;
46}
47EXPORT_SYMBOL(irq_set_chip);
48
49/**
50 * irq_set_type - set the irq trigger type for an irq
51 * @irq: irq number
52 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
53 */
54int irq_set_irq_type(unsigned int irq, unsigned int type)
55{
56 unsigned long flags;
57 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
58 int ret = 0;
59
60 if (!desc)
61 return -EINVAL;
62
63 type &= IRQ_TYPE_SENSE_MASK;
64 if (type != IRQ_TYPE_NONE)
65 ret = __irq_set_trigger(desc, irq, type);
66 irq_put_desc_busunlock(desc, flags);
67 return ret;
68}
69EXPORT_SYMBOL(irq_set_irq_type);
70
71/**
72 * irq_set_handler_data - set irq handler data for an irq
73 * @irq: Interrupt number
74 * @data: Pointer to interrupt specific data
75 *
76 * Set the hardware irq controller data for an irq
77 */
78int irq_set_handler_data(unsigned int irq, void *data)
79{
80 unsigned long flags;
81 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
82
83 if (!desc)
84 return -EINVAL;
85 desc->irq_data.handler_data = data;
86 irq_put_desc_unlock(desc, flags);
87 return 0;
88}
89EXPORT_SYMBOL(irq_set_handler_data);
90
91/**
92 * irq_set_msi_desc - set MSI descriptor data for an irq
93 * @irq: Interrupt number
94 * @entry: Pointer to MSI descriptor data
95 *
96 * Set the MSI descriptor entry for an irq
97 */
98int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
99{
100 unsigned long flags;
101 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
102
103 if (!desc)
104 return -EINVAL;
105 desc->irq_data.msi_desc = entry;
106 if (entry)
107 entry->irq = irq;
108 irq_put_desc_unlock(desc, flags);
109 return 0;
110}
111
112/**
113 * irq_set_chip_data - set irq chip data for an irq
114 * @irq: Interrupt number
115 * @data: Pointer to chip specific data
116 *
117 * Set the hardware irq chip data for an irq
118 */
119int irq_set_chip_data(unsigned int irq, void *data)
120{
121 unsigned long flags;
122 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
123
124 if (!desc)
125 return -EINVAL;
126 desc->irq_data.chip_data = data;
127 irq_put_desc_unlock(desc, flags);
128 return 0;
129}
130EXPORT_SYMBOL(irq_set_chip_data);
131
132struct irq_data *irq_get_irq_data(unsigned int irq)
133{
134 struct irq_desc *desc = irq_to_desc(irq);
135
136 return desc ? &desc->irq_data : NULL;
137}
138EXPORT_SYMBOL_GPL(irq_get_irq_data);
139
140static void irq_state_clr_disabled(struct irq_desc *desc)
141{
142 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
143}
144
145static void irq_state_set_disabled(struct irq_desc *desc)
146{
147 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
148}
149
150static void irq_state_clr_masked(struct irq_desc *desc)
151{
152 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
153}
154
155static void irq_state_set_masked(struct irq_desc *desc)
156{
157 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
158}
159
160int irq_startup(struct irq_desc *desc)
161{
162 irq_state_clr_disabled(desc);
163 desc->depth = 0;
164
165 if (desc->irq_data.chip->irq_startup) {
166 int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
167 irq_state_clr_masked(desc);
168 return ret;
169 }
170
171 irq_enable(desc);
172 return 0;
173}
174
175void irq_shutdown(struct irq_desc *desc)
176{
177 irq_state_set_disabled(desc);
178 desc->depth = 1;
179 if (desc->irq_data.chip->irq_shutdown)
180 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
181 else if (desc->irq_data.chip->irq_disable)
182 desc->irq_data.chip->irq_disable(&desc->irq_data);
183 else
184 desc->irq_data.chip->irq_mask(&desc->irq_data);
185 irq_state_set_masked(desc);
186}
187
188void irq_enable(struct irq_desc *desc)
189{
190 irq_state_clr_disabled(desc);
191 if (desc->irq_data.chip->irq_enable)
192 desc->irq_data.chip->irq_enable(&desc->irq_data);
193 else
194 desc->irq_data.chip->irq_unmask(&desc->irq_data);
195 irq_state_clr_masked(desc);
196}
197
198void irq_disable(struct irq_desc *desc)
199{
200 irq_state_set_disabled(desc);
201 if (desc->irq_data.chip->irq_disable) {
202 desc->irq_data.chip->irq_disable(&desc->irq_data);
203 irq_state_set_masked(desc);
204 }
205}
206
207static inline void mask_ack_irq(struct irq_desc *desc)
208{
209 if (desc->irq_data.chip->irq_mask_ack)
210 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
211 else {
212 desc->irq_data.chip->irq_mask(&desc->irq_data);
213 if (desc->irq_data.chip->irq_ack)
214 desc->irq_data.chip->irq_ack(&desc->irq_data);
215 }
216 irq_state_set_masked(desc);
217}
218
219void mask_irq(struct irq_desc *desc)
220{
221 if (desc->irq_data.chip->irq_mask) {
222 desc->irq_data.chip->irq_mask(&desc->irq_data);
223 irq_state_set_masked(desc);
224 }
225}
226
227void unmask_irq(struct irq_desc *desc)
228{
229 if (desc->irq_data.chip->irq_unmask) {
230 desc->irq_data.chip->irq_unmask(&desc->irq_data);
231 irq_state_clr_masked(desc);
232 }
233}
234
235/*
236 * handle_nested_irq - Handle a nested irq from a irq thread
237 * @irq: the interrupt number
238 *
239 * Handle interrupts which are nested into a threaded interrupt
240 * handler. The handler function is called inside the calling
241 * threads context.
242 */
243void handle_nested_irq(unsigned int irq)
244{
245 struct irq_desc *desc = irq_to_desc(irq);
246 struct irqaction *action;
247 irqreturn_t action_ret;
248
249 might_sleep();
250
251 raw_spin_lock_irq(&desc->lock);
252
253 kstat_incr_irqs_this_cpu(irq, desc);
254
255 action = desc->action;
256 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data)))
257 goto out_unlock;
258
259 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
260 raw_spin_unlock_irq(&desc->lock);
261
262 action_ret = action->thread_fn(action->irq, action->dev_id);
263 if (!noirqdebug)
264 note_interrupt(irq, desc, action_ret);
265
266 raw_spin_lock_irq(&desc->lock);
267 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
268
269out_unlock:
270 raw_spin_unlock_irq(&desc->lock);
271}
272EXPORT_SYMBOL_GPL(handle_nested_irq);
273
274static bool irq_check_poll(struct irq_desc *desc)
275{
276 if (!(desc->istate & IRQS_POLL_INPROGRESS))
277 return false;
278 return irq_wait_for_poll(desc);
279}
280
281/**
282 * handle_simple_irq - Simple and software-decoded IRQs.
283 * @irq: the interrupt number
284 * @desc: the interrupt description structure for this irq
285 *
286 * Simple interrupts are either sent from a demultiplexing interrupt
287 * handler or come from hardware, where no interrupt hardware control
288 * is necessary.
289 *
290 * Note: The caller is expected to handle the ack, clear, mask and
291 * unmask issues if necessary.
292 */
293void
294handle_simple_irq(unsigned int irq, struct irq_desc *desc)
295{
296 raw_spin_lock(&desc->lock);
297
298 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
299 if (!irq_check_poll(desc))
300 goto out_unlock;
301
302 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
303 kstat_incr_irqs_this_cpu(irq, desc);
304
305 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
306 goto out_unlock;
307
308 handle_irq_event(desc);
309
310out_unlock:
311 raw_spin_unlock(&desc->lock);
312}
313EXPORT_SYMBOL_GPL(handle_simple_irq);
314
315/**
316 * handle_level_irq - Level type irq handler
317 * @irq: the interrupt number
318 * @desc: the interrupt description structure for this irq
319 *
320 * Level type interrupts are active as long as the hardware line has
321 * the active level. This may require to mask the interrupt and unmask
322 * it after the associated handler has acknowledged the device, so the
323 * interrupt line is back to inactive.
324 */
325void
326handle_level_irq(unsigned int irq, struct irq_desc *desc)
327{
328 raw_spin_lock(&desc->lock);
329 mask_ack_irq(desc);
330
331 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
332 if (!irq_check_poll(desc))
333 goto out_unlock;
334
335 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
336 kstat_incr_irqs_this_cpu(irq, desc);
337
338 /*
339 * If its disabled or no action available
340 * keep it masked and get out of here
341 */
342 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
343 goto out_unlock;
344
345 handle_irq_event(desc);
346
347 if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
348 unmask_irq(desc);
349out_unlock:
350 raw_spin_unlock(&desc->lock);
351}
352EXPORT_SYMBOL_GPL(handle_level_irq);
353
354#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
355static inline void preflow_handler(struct irq_desc *desc)
356{
357 if (desc->preflow_handler)
358 desc->preflow_handler(&desc->irq_data);
359}
360#else
361static inline void preflow_handler(struct irq_desc *desc) { }
362#endif
363
364/**
365 * handle_fasteoi_irq - irq handler for transparent controllers
366 * @irq: the interrupt number
367 * @desc: the interrupt description structure for this irq
368 *
369 * Only a single callback will be issued to the chip: an ->eoi()
370 * call when the interrupt has been serviced. This enables support
371 * for modern forms of interrupt handlers, which handle the flow
372 * details in hardware, transparently.
373 */
374void
375handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
376{
377 raw_spin_lock(&desc->lock);
378
379 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
380 if (!irq_check_poll(desc))
381 goto out;
382
383 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
384 kstat_incr_irqs_this_cpu(irq, desc);
385
386 /*
387 * If its disabled or no action available
388 * then mask it and get out of here:
389 */
390 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
391 desc->istate |= IRQS_PENDING;
392 mask_irq(desc);
393 goto out;
394 }
395
396 if (desc->istate & IRQS_ONESHOT)
397 mask_irq(desc);
398
399 preflow_handler(desc);
400 handle_irq_event(desc);
401
402out_eoi:
403 desc->irq_data.chip->irq_eoi(&desc->irq_data);
404out_unlock:
405 raw_spin_unlock(&desc->lock);
406 return;
407out:
408 if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
409 goto out_eoi;
410 goto out_unlock;
411}
412
413/**
414 * handle_edge_irq - edge type IRQ handler
415 * @irq: the interrupt number
416 * @desc: the interrupt description structure for this irq
417 *
418 * Interrupt occures on the falling and/or rising edge of a hardware
419 * signal. The occurrence is latched into the irq controller hardware
420 * and must be acked in order to be reenabled. After the ack another
421 * interrupt can happen on the same source even before the first one
422 * is handled by the associated event handler. If this happens it
423 * might be necessary to disable (mask) the interrupt depending on the
424 * controller hardware. This requires to reenable the interrupt inside
425 * of the loop which handles the interrupts which have arrived while
426 * the handler was running. If all pending interrupts are handled, the
427 * loop is left.
428 */
429void
430handle_edge_irq(unsigned int irq, struct irq_desc *desc)
431{
432 raw_spin_lock(&desc->lock);
433
434 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
435 /*
436 * If we're currently running this IRQ, or its disabled,
437 * we shouldn't process the IRQ. Mark it pending, handle
438 * the necessary masking and go out
439 */
440 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
441 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
442 if (!irq_check_poll(desc)) {
443 desc->istate |= IRQS_PENDING;
444 mask_ack_irq(desc);
445 goto out_unlock;
446 }
447 }
448 kstat_incr_irqs_this_cpu(irq, desc);
449
450 /* Start handling the irq */
451 desc->irq_data.chip->irq_ack(&desc->irq_data);
452
453 do {
454 if (unlikely(!desc->action)) {
455 mask_irq(desc);
456 goto out_unlock;
457 }
458
459 /*
460 * When another irq arrived while we were handling
461 * one, we could have masked the irq.
462 * Renable it, if it was not disabled in meantime.
463 */
464 if (unlikely(desc->istate & IRQS_PENDING)) {
465 if (!irqd_irq_disabled(&desc->irq_data) &&
466 irqd_irq_masked(&desc->irq_data))
467 unmask_irq(desc);
468 }
469
470 handle_irq_event(desc);
471
472 } while ((desc->istate & IRQS_PENDING) &&
473 !irqd_irq_disabled(&desc->irq_data));
474
475out_unlock:
476 raw_spin_unlock(&desc->lock);
477}
478
479#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
480/**
481 * handle_edge_eoi_irq - edge eoi type IRQ handler
482 * @irq: the interrupt number
483 * @desc: the interrupt description structure for this irq
484 *
485 * Similar as the above handle_edge_irq, but using eoi and w/o the
486 * mask/unmask logic.
487 */
488void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
489{
490 struct irq_chip *chip = irq_desc_get_chip(desc);
491
492 raw_spin_lock(&desc->lock);
493
494 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
495 /*
496 * If we're currently running this IRQ, or its disabled,
497 * we shouldn't process the IRQ. Mark it pending, handle
498 * the necessary masking and go out
499 */
500 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
501 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
502 if (!irq_check_poll(desc)) {
503 desc->istate |= IRQS_PENDING;
504 goto out_eoi;
505 }
506 }
507 kstat_incr_irqs_this_cpu(irq, desc);
508
509 do {
510 if (unlikely(!desc->action))
511 goto out_eoi;
512
513 handle_irq_event(desc);
514
515 } while ((desc->istate & IRQS_PENDING) &&
516 !irqd_irq_disabled(&desc->irq_data));
517
518out_eoi:
519 chip->irq_eoi(&desc->irq_data);
520 raw_spin_unlock(&desc->lock);
521}
522#endif
523
524/**
525 * handle_percpu_irq - Per CPU local irq handler
526 * @irq: the interrupt number
527 * @desc: the interrupt description structure for this irq
528 *
529 * Per CPU interrupts on SMP machines without locking requirements
530 */
531void
532handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
533{
534 struct irq_chip *chip = irq_desc_get_chip(desc);
535
536 kstat_incr_irqs_this_cpu(irq, desc);
537
538 if (chip->irq_ack)
539 chip->irq_ack(&desc->irq_data);
540
541 handle_irq_event_percpu(desc, desc->action);
542
543 if (chip->irq_eoi)
544 chip->irq_eoi(&desc->irq_data);
545}
546
547void
548__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
549 const char *name)
550{
551 unsigned long flags;
552 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags);
553
554 if (!desc)
555 return;
556
557 if (!handle) {
558 handle = handle_bad_irq;
559 } else {
560 if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
561 goto out;
562 }
563
564 /* Uninstall? */
565 if (handle == handle_bad_irq) {
566 if (desc->irq_data.chip != &no_irq_chip)
567 mask_ack_irq(desc);
568 irq_state_set_disabled(desc);
569 desc->depth = 1;
570 }
571 desc->handle_irq = handle;
572 desc->name = name;
573
574 if (handle != handle_bad_irq && is_chained) {
575 irq_settings_set_noprobe(desc);
576 irq_settings_set_norequest(desc);
577 irq_settings_set_nothread(desc);
578 irq_startup(desc);
579 }
580out:
581 irq_put_desc_busunlock(desc, flags);
582}
583EXPORT_SYMBOL_GPL(__irq_set_handler);
584
585void
586irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
587 irq_flow_handler_t handle, const char *name)
588{
589 irq_set_chip(irq, chip);
590 __irq_set_handler(irq, handle, 0, name);
591}
592
593void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
594{
595 unsigned long flags;
596 struct irq_desc *desc = irq_get_desc_lock(irq, &flags);
597
598 if (!desc)
599 return;
600 irq_settings_clr_and_set(desc, clr, set);
601
602 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
603 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
604 if (irq_settings_has_no_balance_set(desc))
605 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
606 if (irq_settings_is_per_cpu(desc))
607 irqd_set(&desc->irq_data, IRQD_PER_CPU);
608 if (irq_settings_can_move_pcntxt(desc))
609 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
610 if (irq_settings_is_level(desc))
611 irqd_set(&desc->irq_data, IRQD_LEVEL);
612
613 irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
614
615 irq_put_desc_unlock(desc, flags);
616}
617EXPORT_SYMBOL_GPL(irq_modify_status);
618
619/**
620 * irq_cpu_online - Invoke all irq_cpu_online functions.
621 *
622 * Iterate through all irqs and invoke the chip.irq_cpu_online()
623 * for each.
624 */
625void irq_cpu_online(void)
626{
627 struct irq_desc *desc;
628 struct irq_chip *chip;
629 unsigned long flags;
630 unsigned int irq;
631
632 for_each_active_irq(irq) {
633 desc = irq_to_desc(irq);
634 if (!desc)
635 continue;
636
637 raw_spin_lock_irqsave(&desc->lock, flags);
638
639 chip = irq_data_get_irq_chip(&desc->irq_data);
640 if (chip && chip->irq_cpu_online &&
641 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
642 !irqd_irq_disabled(&desc->irq_data)))
643 chip->irq_cpu_online(&desc->irq_data);
644
645 raw_spin_unlock_irqrestore(&desc->lock, flags);
646 }
647}
648
649/**
650 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
651 *
652 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
653 * for each.
654 */
655void irq_cpu_offline(void)
656{
657 struct irq_desc *desc;
658 struct irq_chip *chip;
659 unsigned long flags;
660 unsigned int irq;
661
662 for_each_active_irq(irq) {
663 desc = irq_to_desc(irq);
664 if (!desc)
665 continue;
666
667 raw_spin_lock_irqsave(&desc->lock, flags);
668
669 chip = irq_data_get_irq_chip(&desc->irq_data);
670 if (chip && chip->irq_cpu_offline &&
671 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
672 !irqd_irq_disabled(&desc->irq_data)))
673 chip->irq_cpu_offline(&desc->irq_data);
674
675 raw_spin_unlock_irqrestore(&desc->lock, flags);
676 }
677}