Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5 *
6 * This file contains the core interrupt handling code, for irq-chip based
7 * architectures. Detailed information is available in
8 * Documentation/core-api/genericirq.rst
9 */
10
11#include <linux/irq.h>
12#include <linux/msi.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/kernel_stat.h>
16#include <linux/irqdomain.h>
17
18#include <trace/events/irq.h>
19
20#include "internals.h"
21
22static irqreturn_t bad_chained_irq(int irq, void *dev_id)
23{
24 WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
25 return IRQ_NONE;
26}
27
28/*
29 * Chained handlers should never call action on their IRQ. This default
30 * action will emit warning if such thing happens.
31 */
32struct irqaction chained_action = {
33 .handler = bad_chained_irq,
34};
35
36/**
37 * irq_set_chip - set the irq chip for an irq
38 * @irq: irq number
39 * @chip: pointer to irq chip description structure
40 */
41int irq_set_chip(unsigned int irq, struct irq_chip *chip)
42{
43 unsigned long flags;
44 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
45
46 if (!desc)
47 return -EINVAL;
48
49 if (!chip)
50 chip = &no_irq_chip;
51
52 desc->irq_data.chip = chip;
53 irq_put_desc_unlock(desc, flags);
54 /*
55 * For !CONFIG_SPARSE_IRQ make the irq show up in
56 * allocated_irqs.
57 */
58 irq_mark_irq(irq);
59 return 0;
60}
61EXPORT_SYMBOL(irq_set_chip);
62
63/**
64 * irq_set_type - set the irq trigger type for an irq
65 * @irq: irq number
66 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
67 */
68int irq_set_irq_type(unsigned int irq, unsigned int type)
69{
70 unsigned long flags;
71 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
72 int ret = 0;
73
74 if (!desc)
75 return -EINVAL;
76
77 ret = __irq_set_trigger(desc, type);
78 irq_put_desc_busunlock(desc, flags);
79 return ret;
80}
81EXPORT_SYMBOL(irq_set_irq_type);
82
83/**
84 * irq_set_handler_data - set irq handler data for an irq
85 * @irq: Interrupt number
86 * @data: Pointer to interrupt specific data
87 *
88 * Set the hardware irq controller data for an irq
89 */
90int irq_set_handler_data(unsigned int irq, void *data)
91{
92 unsigned long flags;
93 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
94
95 if (!desc)
96 return -EINVAL;
97 desc->irq_common_data.handler_data = data;
98 irq_put_desc_unlock(desc, flags);
99 return 0;
100}
101EXPORT_SYMBOL(irq_set_handler_data);
102
103/**
104 * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
105 * @irq_base: Interrupt number base
106 * @irq_offset: Interrupt number offset
107 * @entry: Pointer to MSI descriptor data
108 *
109 * Set the MSI descriptor entry for an irq at offset
110 */
111int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
112 struct msi_desc *entry)
113{
114 unsigned long flags;
115 struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
116
117 if (!desc)
118 return -EINVAL;
119 desc->irq_common_data.msi_desc = entry;
120 if (entry && !irq_offset)
121 entry->irq = irq_base;
122 irq_put_desc_unlock(desc, flags);
123 return 0;
124}
125
126/**
127 * irq_set_msi_desc - set MSI descriptor data for an irq
128 * @irq: Interrupt number
129 * @entry: Pointer to MSI descriptor data
130 *
131 * Set the MSI descriptor entry for an irq
132 */
133int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
134{
135 return irq_set_msi_desc_off(irq, 0, entry);
136}
137
138/**
139 * irq_set_chip_data - set irq chip data for an irq
140 * @irq: Interrupt number
141 * @data: Pointer to chip specific data
142 *
143 * Set the hardware irq chip data for an irq
144 */
145int irq_set_chip_data(unsigned int irq, void *data)
146{
147 unsigned long flags;
148 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
149
150 if (!desc)
151 return -EINVAL;
152 desc->irq_data.chip_data = data;
153 irq_put_desc_unlock(desc, flags);
154 return 0;
155}
156EXPORT_SYMBOL(irq_set_chip_data);
157
158struct irq_data *irq_get_irq_data(unsigned int irq)
159{
160 struct irq_desc *desc = irq_to_desc(irq);
161
162 return desc ? &desc->irq_data : NULL;
163}
164EXPORT_SYMBOL_GPL(irq_get_irq_data);
165
166static void irq_state_clr_disabled(struct irq_desc *desc)
167{
168 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
169}
170
171static void irq_state_clr_masked(struct irq_desc *desc)
172{
173 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
174}
175
176static void irq_state_clr_started(struct irq_desc *desc)
177{
178 irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
179}
180
181static void irq_state_set_started(struct irq_desc *desc)
182{
183 irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
184}
185
186enum {
187 IRQ_STARTUP_NORMAL,
188 IRQ_STARTUP_MANAGED,
189 IRQ_STARTUP_ABORT,
190};
191
192#ifdef CONFIG_SMP
193static int
194__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
195{
196 struct irq_data *d = irq_desc_get_irq_data(desc);
197
198 if (!irqd_affinity_is_managed(d))
199 return IRQ_STARTUP_NORMAL;
200
201 irqd_clr_managed_shutdown(d);
202
203 if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
204 /*
205 * Catch code which fiddles with enable_irq() on a managed
206 * and potentially shutdown IRQ. Chained interrupt
207 * installment or irq auto probing should not happen on
208 * managed irqs either.
209 */
210 if (WARN_ON_ONCE(force))
211 return IRQ_STARTUP_ABORT;
212 /*
213 * The interrupt was requested, but there is no online CPU
214 * in it's affinity mask. Put it into managed shutdown
215 * state and let the cpu hotplug mechanism start it up once
216 * a CPU in the mask becomes available.
217 */
218 return IRQ_STARTUP_ABORT;
219 }
220 /*
221 * Managed interrupts have reserved resources, so this should not
222 * happen.
223 */
224 if (WARN_ON(irq_domain_activate_irq(d, false)))
225 return IRQ_STARTUP_ABORT;
226 return IRQ_STARTUP_MANAGED;
227}
228#else
229static __always_inline int
230__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
231{
232 return IRQ_STARTUP_NORMAL;
233}
234#endif
235
236static int __irq_startup(struct irq_desc *desc)
237{
238 struct irq_data *d = irq_desc_get_irq_data(desc);
239 int ret = 0;
240
241 /* Warn if this interrupt is not activated but try nevertheless */
242 WARN_ON_ONCE(!irqd_is_activated(d));
243
244 if (d->chip->irq_startup) {
245 ret = d->chip->irq_startup(d);
246 irq_state_clr_disabled(desc);
247 irq_state_clr_masked(desc);
248 } else {
249 irq_enable(desc);
250 }
251 irq_state_set_started(desc);
252 return ret;
253}
254
255int irq_startup(struct irq_desc *desc, bool resend, bool force)
256{
257 struct irq_data *d = irq_desc_get_irq_data(desc);
258 struct cpumask *aff = irq_data_get_affinity_mask(d);
259 int ret = 0;
260
261 desc->depth = 0;
262
263 if (irqd_is_started(d)) {
264 irq_enable(desc);
265 } else {
266 switch (__irq_startup_managed(desc, aff, force)) {
267 case IRQ_STARTUP_NORMAL:
268 ret = __irq_startup(desc);
269 irq_setup_affinity(desc);
270 break;
271 case IRQ_STARTUP_MANAGED:
272 irq_do_set_affinity(d, aff, false);
273 ret = __irq_startup(desc);
274 break;
275 case IRQ_STARTUP_ABORT:
276 irqd_set_managed_shutdown(d);
277 return 0;
278 }
279 }
280 if (resend)
281 check_irq_resend(desc, false);
282
283 return ret;
284}
285
286int irq_activate(struct irq_desc *desc)
287{
288 struct irq_data *d = irq_desc_get_irq_data(desc);
289
290 if (!irqd_affinity_is_managed(d))
291 return irq_domain_activate_irq(d, false);
292 return 0;
293}
294
295int irq_activate_and_startup(struct irq_desc *desc, bool resend)
296{
297 if (WARN_ON(irq_activate(desc)))
298 return 0;
299 return irq_startup(desc, resend, IRQ_START_FORCE);
300}
301
302static void __irq_disable(struct irq_desc *desc, bool mask);
303
304void irq_shutdown(struct irq_desc *desc)
305{
306 if (irqd_is_started(&desc->irq_data)) {
307 desc->depth = 1;
308 if (desc->irq_data.chip->irq_shutdown) {
309 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
310 irq_state_set_disabled(desc);
311 irq_state_set_masked(desc);
312 } else {
313 __irq_disable(desc, true);
314 }
315 irq_state_clr_started(desc);
316 }
317}
318
319
320void irq_shutdown_and_deactivate(struct irq_desc *desc)
321{
322 irq_shutdown(desc);
323 /*
324 * This must be called even if the interrupt was never started up,
325 * because the activation can happen before the interrupt is
326 * available for request/startup. It has it's own state tracking so
327 * it's safe to call it unconditionally.
328 */
329 irq_domain_deactivate_irq(&desc->irq_data);
330}
331
332void irq_enable(struct irq_desc *desc)
333{
334 if (!irqd_irq_disabled(&desc->irq_data)) {
335 unmask_irq(desc);
336 } else {
337 irq_state_clr_disabled(desc);
338 if (desc->irq_data.chip->irq_enable) {
339 desc->irq_data.chip->irq_enable(&desc->irq_data);
340 irq_state_clr_masked(desc);
341 } else {
342 unmask_irq(desc);
343 }
344 }
345}
346
347static void __irq_disable(struct irq_desc *desc, bool mask)
348{
349 if (irqd_irq_disabled(&desc->irq_data)) {
350 if (mask)
351 mask_irq(desc);
352 } else {
353 irq_state_set_disabled(desc);
354 if (desc->irq_data.chip->irq_disable) {
355 desc->irq_data.chip->irq_disable(&desc->irq_data);
356 irq_state_set_masked(desc);
357 } else if (mask) {
358 mask_irq(desc);
359 }
360 }
361}
362
363/**
364 * irq_disable - Mark interrupt disabled
365 * @desc: irq descriptor which should be disabled
366 *
367 * If the chip does not implement the irq_disable callback, we
368 * use a lazy disable approach. That means we mark the interrupt
369 * disabled, but leave the hardware unmasked. That's an
370 * optimization because we avoid the hardware access for the
371 * common case where no interrupt happens after we marked it
372 * disabled. If an interrupt happens, then the interrupt flow
373 * handler masks the line at the hardware level and marks it
374 * pending.
375 *
376 * If the interrupt chip does not implement the irq_disable callback,
377 * a driver can disable the lazy approach for a particular irq line by
378 * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
379 * be used for devices which cannot disable the interrupt at the
380 * device level under certain circumstances and have to use
381 * disable_irq[_nosync] instead.
382 */
383void irq_disable(struct irq_desc *desc)
384{
385 __irq_disable(desc, irq_settings_disable_unlazy(desc));
386}
387
388void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
389{
390 if (desc->irq_data.chip->irq_enable)
391 desc->irq_data.chip->irq_enable(&desc->irq_data);
392 else
393 desc->irq_data.chip->irq_unmask(&desc->irq_data);
394 cpumask_set_cpu(cpu, desc->percpu_enabled);
395}
396
397void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
398{
399 if (desc->irq_data.chip->irq_disable)
400 desc->irq_data.chip->irq_disable(&desc->irq_data);
401 else
402 desc->irq_data.chip->irq_mask(&desc->irq_data);
403 cpumask_clear_cpu(cpu, desc->percpu_enabled);
404}
405
406static inline void mask_ack_irq(struct irq_desc *desc)
407{
408 if (desc->irq_data.chip->irq_mask_ack) {
409 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
410 irq_state_set_masked(desc);
411 } else {
412 mask_irq(desc);
413 if (desc->irq_data.chip->irq_ack)
414 desc->irq_data.chip->irq_ack(&desc->irq_data);
415 }
416}
417
418void mask_irq(struct irq_desc *desc)
419{
420 if (irqd_irq_masked(&desc->irq_data))
421 return;
422
423 if (desc->irq_data.chip->irq_mask) {
424 desc->irq_data.chip->irq_mask(&desc->irq_data);
425 irq_state_set_masked(desc);
426 }
427}
428
429void unmask_irq(struct irq_desc *desc)
430{
431 if (!irqd_irq_masked(&desc->irq_data))
432 return;
433
434 if (desc->irq_data.chip->irq_unmask) {
435 desc->irq_data.chip->irq_unmask(&desc->irq_data);
436 irq_state_clr_masked(desc);
437 }
438}
439
440void unmask_threaded_irq(struct irq_desc *desc)
441{
442 struct irq_chip *chip = desc->irq_data.chip;
443
444 if (chip->flags & IRQCHIP_EOI_THREADED)
445 chip->irq_eoi(&desc->irq_data);
446
447 unmask_irq(desc);
448}
449
450/*
451 * handle_nested_irq - Handle a nested irq from a irq thread
452 * @irq: the interrupt number
453 *
454 * Handle interrupts which are nested into a threaded interrupt
455 * handler. The handler function is called inside the calling
456 * threads context.
457 */
458void handle_nested_irq(unsigned int irq)
459{
460 struct irq_desc *desc = irq_to_desc(irq);
461 struct irqaction *action;
462 irqreturn_t action_ret;
463
464 might_sleep();
465
466 raw_spin_lock_irq(&desc->lock);
467
468 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
469
470 action = desc->action;
471 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
472 desc->istate |= IRQS_PENDING;
473 goto out_unlock;
474 }
475
476 kstat_incr_irqs_this_cpu(desc);
477 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
478 raw_spin_unlock_irq(&desc->lock);
479
480 action_ret = IRQ_NONE;
481 for_each_action_of_desc(desc, action)
482 action_ret |= action->thread_fn(action->irq, action->dev_id);
483
484 if (!noirqdebug)
485 note_interrupt(desc, action_ret);
486
487 raw_spin_lock_irq(&desc->lock);
488 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
489
490out_unlock:
491 raw_spin_unlock_irq(&desc->lock);
492}
493EXPORT_SYMBOL_GPL(handle_nested_irq);
494
495static bool irq_check_poll(struct irq_desc *desc)
496{
497 if (!(desc->istate & IRQS_POLL_INPROGRESS))
498 return false;
499 return irq_wait_for_poll(desc);
500}
501
502static bool irq_may_run(struct irq_desc *desc)
503{
504 unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
505
506 /*
507 * If the interrupt is not in progress and is not an armed
508 * wakeup interrupt, proceed.
509 */
510 if (!irqd_has_set(&desc->irq_data, mask))
511 return true;
512
513 /*
514 * If the interrupt is an armed wakeup source, mark it pending
515 * and suspended, disable it and notify the pm core about the
516 * event.
517 */
518 if (irq_pm_check_wakeup(desc))
519 return false;
520
521 /*
522 * Handle a potential concurrent poll on a different core.
523 */
524 return irq_check_poll(desc);
525}
526
527/**
528 * handle_simple_irq - Simple and software-decoded IRQs.
529 * @desc: the interrupt description structure for this irq
530 *
531 * Simple interrupts are either sent from a demultiplexing interrupt
532 * handler or come from hardware, where no interrupt hardware control
533 * is necessary.
534 *
535 * Note: The caller is expected to handle the ack, clear, mask and
536 * unmask issues if necessary.
537 */
538void handle_simple_irq(struct irq_desc *desc)
539{
540 raw_spin_lock(&desc->lock);
541
542 if (!irq_may_run(desc))
543 goto out_unlock;
544
545 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
546
547 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
548 desc->istate |= IRQS_PENDING;
549 goto out_unlock;
550 }
551
552 kstat_incr_irqs_this_cpu(desc);
553 handle_irq_event(desc);
554
555out_unlock:
556 raw_spin_unlock(&desc->lock);
557}
558EXPORT_SYMBOL_GPL(handle_simple_irq);
559
560/**
561 * handle_untracked_irq - Simple and software-decoded IRQs.
562 * @desc: the interrupt description structure for this irq
563 *
564 * Untracked interrupts are sent from a demultiplexing interrupt
565 * handler when the demultiplexer does not know which device it its
566 * multiplexed irq domain generated the interrupt. IRQ's handled
567 * through here are not subjected to stats tracking, randomness, or
568 * spurious interrupt detection.
569 *
570 * Note: Like handle_simple_irq, the caller is expected to handle
571 * the ack, clear, mask and unmask issues if necessary.
572 */
573void handle_untracked_irq(struct irq_desc *desc)
574{
575 unsigned int flags = 0;
576
577 raw_spin_lock(&desc->lock);
578
579 if (!irq_may_run(desc))
580 goto out_unlock;
581
582 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
583
584 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
585 desc->istate |= IRQS_PENDING;
586 goto out_unlock;
587 }
588
589 desc->istate &= ~IRQS_PENDING;
590 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
591 raw_spin_unlock(&desc->lock);
592
593 __handle_irq_event_percpu(desc, &flags);
594
595 raw_spin_lock(&desc->lock);
596 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
597
598out_unlock:
599 raw_spin_unlock(&desc->lock);
600}
601EXPORT_SYMBOL_GPL(handle_untracked_irq);
602
603/*
604 * Called unconditionally from handle_level_irq() and only for oneshot
605 * interrupts from handle_fasteoi_irq()
606 */
607static void cond_unmask_irq(struct irq_desc *desc)
608{
609 /*
610 * We need to unmask in the following cases:
611 * - Standard level irq (IRQF_ONESHOT is not set)
612 * - Oneshot irq which did not wake the thread (caused by a
613 * spurious interrupt or a primary handler handling it
614 * completely).
615 */
616 if (!irqd_irq_disabled(&desc->irq_data) &&
617 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
618 unmask_irq(desc);
619}
620
621/**
622 * handle_level_irq - Level type irq handler
623 * @desc: the interrupt description structure for this irq
624 *
625 * Level type interrupts are active as long as the hardware line has
626 * the active level. This may require to mask the interrupt and unmask
627 * it after the associated handler has acknowledged the device, so the
628 * interrupt line is back to inactive.
629 */
630void handle_level_irq(struct irq_desc *desc)
631{
632 raw_spin_lock(&desc->lock);
633 mask_ack_irq(desc);
634
635 if (!irq_may_run(desc))
636 goto out_unlock;
637
638 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
639
640 /*
641 * If its disabled or no action available
642 * keep it masked and get out of here
643 */
644 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
645 desc->istate |= IRQS_PENDING;
646 goto out_unlock;
647 }
648
649 kstat_incr_irqs_this_cpu(desc);
650 handle_irq_event(desc);
651
652 cond_unmask_irq(desc);
653
654out_unlock:
655 raw_spin_unlock(&desc->lock);
656}
657EXPORT_SYMBOL_GPL(handle_level_irq);
658
659static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
660{
661 if (!(desc->istate & IRQS_ONESHOT)) {
662 chip->irq_eoi(&desc->irq_data);
663 return;
664 }
665 /*
666 * We need to unmask in the following cases:
667 * - Oneshot irq which did not wake the thread (caused by a
668 * spurious interrupt or a primary handler handling it
669 * completely).
670 */
671 if (!irqd_irq_disabled(&desc->irq_data) &&
672 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
673 chip->irq_eoi(&desc->irq_data);
674 unmask_irq(desc);
675 } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
676 chip->irq_eoi(&desc->irq_data);
677 }
678}
679
680/**
681 * handle_fasteoi_irq - irq handler for transparent controllers
682 * @desc: the interrupt description structure for this irq
683 *
684 * Only a single callback will be issued to the chip: an ->eoi()
685 * call when the interrupt has been serviced. This enables support
686 * for modern forms of interrupt handlers, which handle the flow
687 * details in hardware, transparently.
688 */
689void handle_fasteoi_irq(struct irq_desc *desc)
690{
691 struct irq_chip *chip = desc->irq_data.chip;
692
693 raw_spin_lock(&desc->lock);
694
695 if (!irq_may_run(desc))
696 goto out;
697
698 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
699
700 /*
701 * If its disabled or no action available
702 * then mask it and get out of here:
703 */
704 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
705 desc->istate |= IRQS_PENDING;
706 mask_irq(desc);
707 goto out;
708 }
709
710 kstat_incr_irqs_this_cpu(desc);
711 if (desc->istate & IRQS_ONESHOT)
712 mask_irq(desc);
713
714 handle_irq_event(desc);
715
716 cond_unmask_eoi_irq(desc, chip);
717
718 raw_spin_unlock(&desc->lock);
719 return;
720out:
721 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
722 chip->irq_eoi(&desc->irq_data);
723 raw_spin_unlock(&desc->lock);
724}
725EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
726
727/**
728 * handle_fasteoi_nmi - irq handler for NMI interrupt lines
729 * @desc: the interrupt description structure for this irq
730 *
731 * A simple NMI-safe handler, considering the restrictions
732 * from request_nmi.
733 *
734 * Only a single callback will be issued to the chip: an ->eoi()
735 * call when the interrupt has been serviced. This enables support
736 * for modern forms of interrupt handlers, which handle the flow
737 * details in hardware, transparently.
738 */
739void handle_fasteoi_nmi(struct irq_desc *desc)
740{
741 struct irq_chip *chip = irq_desc_get_chip(desc);
742 struct irqaction *action = desc->action;
743 unsigned int irq = irq_desc_get_irq(desc);
744 irqreturn_t res;
745
746 __kstat_incr_irqs_this_cpu(desc);
747
748 trace_irq_handler_entry(irq, action);
749 /*
750 * NMIs cannot be shared, there is only one action.
751 */
752 res = action->handler(irq, action->dev_id);
753 trace_irq_handler_exit(irq, action, res);
754
755 if (chip->irq_eoi)
756 chip->irq_eoi(&desc->irq_data);
757}
758EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
759
760/**
761 * handle_edge_irq - edge type IRQ handler
762 * @desc: the interrupt description structure for this irq
763 *
764 * Interrupt occures on the falling and/or rising edge of a hardware
765 * signal. The occurrence is latched into the irq controller hardware
766 * and must be acked in order to be reenabled. After the ack another
767 * interrupt can happen on the same source even before the first one
768 * is handled by the associated event handler. If this happens it
769 * might be necessary to disable (mask) the interrupt depending on the
770 * controller hardware. This requires to reenable the interrupt inside
771 * of the loop which handles the interrupts which have arrived while
772 * the handler was running. If all pending interrupts are handled, the
773 * loop is left.
774 */
775void handle_edge_irq(struct irq_desc *desc)
776{
777 raw_spin_lock(&desc->lock);
778
779 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
780
781 if (!irq_may_run(desc)) {
782 desc->istate |= IRQS_PENDING;
783 mask_ack_irq(desc);
784 goto out_unlock;
785 }
786
787 /*
788 * If its disabled or no action available then mask it and get
789 * out of here.
790 */
791 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
792 desc->istate |= IRQS_PENDING;
793 mask_ack_irq(desc);
794 goto out_unlock;
795 }
796
797 kstat_incr_irqs_this_cpu(desc);
798
799 /* Start handling the irq */
800 desc->irq_data.chip->irq_ack(&desc->irq_data);
801
802 do {
803 if (unlikely(!desc->action)) {
804 mask_irq(desc);
805 goto out_unlock;
806 }
807
808 /*
809 * When another irq arrived while we were handling
810 * one, we could have masked the irq.
811 * Renable it, if it was not disabled in meantime.
812 */
813 if (unlikely(desc->istate & IRQS_PENDING)) {
814 if (!irqd_irq_disabled(&desc->irq_data) &&
815 irqd_irq_masked(&desc->irq_data))
816 unmask_irq(desc);
817 }
818
819 handle_irq_event(desc);
820
821 } while ((desc->istate & IRQS_PENDING) &&
822 !irqd_irq_disabled(&desc->irq_data));
823
824out_unlock:
825 raw_spin_unlock(&desc->lock);
826}
827EXPORT_SYMBOL(handle_edge_irq);
828
829#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
830/**
831 * handle_edge_eoi_irq - edge eoi type IRQ handler
832 * @desc: the interrupt description structure for this irq
833 *
834 * Similar as the above handle_edge_irq, but using eoi and w/o the
835 * mask/unmask logic.
836 */
837void handle_edge_eoi_irq(struct irq_desc *desc)
838{
839 struct irq_chip *chip = irq_desc_get_chip(desc);
840
841 raw_spin_lock(&desc->lock);
842
843 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
844
845 if (!irq_may_run(desc)) {
846 desc->istate |= IRQS_PENDING;
847 goto out_eoi;
848 }
849
850 /*
851 * If its disabled or no action available then mask it and get
852 * out of here.
853 */
854 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
855 desc->istate |= IRQS_PENDING;
856 goto out_eoi;
857 }
858
859 kstat_incr_irqs_this_cpu(desc);
860
861 do {
862 if (unlikely(!desc->action))
863 goto out_eoi;
864
865 handle_irq_event(desc);
866
867 } while ((desc->istate & IRQS_PENDING) &&
868 !irqd_irq_disabled(&desc->irq_data));
869
870out_eoi:
871 chip->irq_eoi(&desc->irq_data);
872 raw_spin_unlock(&desc->lock);
873}
874#endif
875
876/**
877 * handle_percpu_irq - Per CPU local irq handler
878 * @desc: the interrupt description structure for this irq
879 *
880 * Per CPU interrupts on SMP machines without locking requirements
881 */
882void handle_percpu_irq(struct irq_desc *desc)
883{
884 struct irq_chip *chip = irq_desc_get_chip(desc);
885
886 /*
887 * PER CPU interrupts are not serialized. Do not touch
888 * desc->tot_count.
889 */
890 __kstat_incr_irqs_this_cpu(desc);
891
892 if (chip->irq_ack)
893 chip->irq_ack(&desc->irq_data);
894
895 handle_irq_event_percpu(desc);
896
897 if (chip->irq_eoi)
898 chip->irq_eoi(&desc->irq_data);
899}
900
901/**
902 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
903 * @desc: the interrupt description structure for this irq
904 *
905 * Per CPU interrupts on SMP machines without locking requirements. Same as
906 * handle_percpu_irq() above but with the following extras:
907 *
908 * action->percpu_dev_id is a pointer to percpu variables which
909 * contain the real device id for the cpu on which this handler is
910 * called
911 */
912void handle_percpu_devid_irq(struct irq_desc *desc)
913{
914 struct irq_chip *chip = irq_desc_get_chip(desc);
915 struct irqaction *action = desc->action;
916 unsigned int irq = irq_desc_get_irq(desc);
917 irqreturn_t res;
918
919 /*
920 * PER CPU interrupts are not serialized. Do not touch
921 * desc->tot_count.
922 */
923 __kstat_incr_irqs_this_cpu(desc);
924
925 if (chip->irq_ack)
926 chip->irq_ack(&desc->irq_data);
927
928 if (likely(action)) {
929 trace_irq_handler_entry(irq, action);
930 res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
931 trace_irq_handler_exit(irq, action, res);
932 } else {
933 unsigned int cpu = smp_processor_id();
934 bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
935
936 if (enabled)
937 irq_percpu_disable(desc, cpu);
938
939 pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
940 enabled ? " and unmasked" : "", irq, cpu);
941 }
942
943 if (chip->irq_eoi)
944 chip->irq_eoi(&desc->irq_data);
945}
946
947/**
948 * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
949 * dev ids
950 * @desc: the interrupt description structure for this irq
951 *
952 * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
953 * as a percpu pointer.
954 */
955void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
956{
957 struct irq_chip *chip = irq_desc_get_chip(desc);
958 struct irqaction *action = desc->action;
959 unsigned int irq = irq_desc_get_irq(desc);
960 irqreturn_t res;
961
962 __kstat_incr_irqs_this_cpu(desc);
963
964 trace_irq_handler_entry(irq, action);
965 res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
966 trace_irq_handler_exit(irq, action, res);
967
968 if (chip->irq_eoi)
969 chip->irq_eoi(&desc->irq_data);
970}
971
972static void
973__irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
974 int is_chained, const char *name)
975{
976 if (!handle) {
977 handle = handle_bad_irq;
978 } else {
979 struct irq_data *irq_data = &desc->irq_data;
980#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
981 /*
982 * With hierarchical domains we might run into a
983 * situation where the outermost chip is not yet set
984 * up, but the inner chips are there. Instead of
985 * bailing we install the handler, but obviously we
986 * cannot enable/startup the interrupt at this point.
987 */
988 while (irq_data) {
989 if (irq_data->chip != &no_irq_chip)
990 break;
991 /*
992 * Bail out if the outer chip is not set up
993 * and the interrupt supposed to be started
994 * right away.
995 */
996 if (WARN_ON(is_chained))
997 return;
998 /* Try the parent */
999 irq_data = irq_data->parent_data;
1000 }
1001#endif
1002 if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
1003 return;
1004 }
1005
1006 /* Uninstall? */
1007 if (handle == handle_bad_irq) {
1008 if (desc->irq_data.chip != &no_irq_chip)
1009 mask_ack_irq(desc);
1010 irq_state_set_disabled(desc);
1011 if (is_chained)
1012 desc->action = NULL;
1013 desc->depth = 1;
1014 }
1015 desc->handle_irq = handle;
1016 desc->name = name;
1017
1018 if (handle != handle_bad_irq && is_chained) {
1019 unsigned int type = irqd_get_trigger_type(&desc->irq_data);
1020
1021 /*
1022 * We're about to start this interrupt immediately,
1023 * hence the need to set the trigger configuration.
1024 * But the .set_type callback may have overridden the
1025 * flow handler, ignoring that we're dealing with a
1026 * chained interrupt. Reset it immediately because we
1027 * do know better.
1028 */
1029 if (type != IRQ_TYPE_NONE) {
1030 __irq_set_trigger(desc, type);
1031 desc->handle_irq = handle;
1032 }
1033
1034 irq_settings_set_noprobe(desc);
1035 irq_settings_set_norequest(desc);
1036 irq_settings_set_nothread(desc);
1037 desc->action = &chained_action;
1038 irq_activate_and_startup(desc, IRQ_RESEND);
1039 }
1040}
1041
1042void
1043__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
1044 const char *name)
1045{
1046 unsigned long flags;
1047 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1048
1049 if (!desc)
1050 return;
1051
1052 __irq_do_set_handler(desc, handle, is_chained, name);
1053 irq_put_desc_busunlock(desc, flags);
1054}
1055EXPORT_SYMBOL_GPL(__irq_set_handler);
1056
1057void
1058irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
1059 void *data)
1060{
1061 unsigned long flags;
1062 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1063
1064 if (!desc)
1065 return;
1066
1067 desc->irq_common_data.handler_data = data;
1068 __irq_do_set_handler(desc, handle, 1, NULL);
1069
1070 irq_put_desc_busunlock(desc, flags);
1071}
1072EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
1073
1074void
1075irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
1076 irq_flow_handler_t handle, const char *name)
1077{
1078 irq_set_chip(irq, chip);
1079 __irq_set_handler(irq, handle, 0, name);
1080}
1081EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
1082
1083void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
1084{
1085 unsigned long flags, trigger, tmp;
1086 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
1087
1088 if (!desc)
1089 return;
1090
1091 /*
1092 * Warn when a driver sets the no autoenable flag on an already
1093 * active interrupt.
1094 */
1095 WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
1096
1097 irq_settings_clr_and_set(desc, clr, set);
1098
1099 trigger = irqd_get_trigger_type(&desc->irq_data);
1100
1101 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
1102 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
1103 if (irq_settings_has_no_balance_set(desc))
1104 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1105 if (irq_settings_is_per_cpu(desc))
1106 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1107 if (irq_settings_can_move_pcntxt(desc))
1108 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
1109 if (irq_settings_is_level(desc))
1110 irqd_set(&desc->irq_data, IRQD_LEVEL);
1111
1112 tmp = irq_settings_get_trigger_mask(desc);
1113 if (tmp != IRQ_TYPE_NONE)
1114 trigger = tmp;
1115
1116 irqd_set(&desc->irq_data, trigger);
1117
1118 irq_put_desc_unlock(desc, flags);
1119}
1120EXPORT_SYMBOL_GPL(irq_modify_status);
1121
1122/**
1123 * irq_cpu_online - Invoke all irq_cpu_online functions.
1124 *
1125 * Iterate through all irqs and invoke the chip.irq_cpu_online()
1126 * for each.
1127 */
1128void irq_cpu_online(void)
1129{
1130 struct irq_desc *desc;
1131 struct irq_chip *chip;
1132 unsigned long flags;
1133 unsigned int irq;
1134
1135 for_each_active_irq(irq) {
1136 desc = irq_to_desc(irq);
1137 if (!desc)
1138 continue;
1139
1140 raw_spin_lock_irqsave(&desc->lock, flags);
1141
1142 chip = irq_data_get_irq_chip(&desc->irq_data);
1143 if (chip && chip->irq_cpu_online &&
1144 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1145 !irqd_irq_disabled(&desc->irq_data)))
1146 chip->irq_cpu_online(&desc->irq_data);
1147
1148 raw_spin_unlock_irqrestore(&desc->lock, flags);
1149 }
1150}
1151
1152/**
1153 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
1154 *
1155 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
1156 * for each.
1157 */
1158void irq_cpu_offline(void)
1159{
1160 struct irq_desc *desc;
1161 struct irq_chip *chip;
1162 unsigned long flags;
1163 unsigned int irq;
1164
1165 for_each_active_irq(irq) {
1166 desc = irq_to_desc(irq);
1167 if (!desc)
1168 continue;
1169
1170 raw_spin_lock_irqsave(&desc->lock, flags);
1171
1172 chip = irq_data_get_irq_chip(&desc->irq_data);
1173 if (chip && chip->irq_cpu_offline &&
1174 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1175 !irqd_irq_disabled(&desc->irq_data)))
1176 chip->irq_cpu_offline(&desc->irq_data);
1177
1178 raw_spin_unlock_irqrestore(&desc->lock, flags);
1179 }
1180}
1181
1182#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1183
1184#ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
1185/**
1186 * handle_fasteoi_ack_irq - irq handler for edge hierarchy
1187 * stacked on transparent controllers
1188 *
1189 * @desc: the interrupt description structure for this irq
1190 *
1191 * Like handle_fasteoi_irq(), but for use with hierarchy where
1192 * the irq_chip also needs to have its ->irq_ack() function
1193 * called.
1194 */
1195void handle_fasteoi_ack_irq(struct irq_desc *desc)
1196{
1197 struct irq_chip *chip = desc->irq_data.chip;
1198
1199 raw_spin_lock(&desc->lock);
1200
1201 if (!irq_may_run(desc))
1202 goto out;
1203
1204 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1205
1206 /*
1207 * If its disabled or no action available
1208 * then mask it and get out of here:
1209 */
1210 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1211 desc->istate |= IRQS_PENDING;
1212 mask_irq(desc);
1213 goto out;
1214 }
1215
1216 kstat_incr_irqs_this_cpu(desc);
1217 if (desc->istate & IRQS_ONESHOT)
1218 mask_irq(desc);
1219
1220 /* Start handling the irq */
1221 desc->irq_data.chip->irq_ack(&desc->irq_data);
1222
1223 handle_irq_event(desc);
1224
1225 cond_unmask_eoi_irq(desc, chip);
1226
1227 raw_spin_unlock(&desc->lock);
1228 return;
1229out:
1230 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1231 chip->irq_eoi(&desc->irq_data);
1232 raw_spin_unlock(&desc->lock);
1233}
1234EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
1235
1236/**
1237 * handle_fasteoi_mask_irq - irq handler for level hierarchy
1238 * stacked on transparent controllers
1239 *
1240 * @desc: the interrupt description structure for this irq
1241 *
1242 * Like handle_fasteoi_irq(), but for use with hierarchy where
1243 * the irq_chip also needs to have its ->irq_mask_ack() function
1244 * called.
1245 */
1246void handle_fasteoi_mask_irq(struct irq_desc *desc)
1247{
1248 struct irq_chip *chip = desc->irq_data.chip;
1249
1250 raw_spin_lock(&desc->lock);
1251 mask_ack_irq(desc);
1252
1253 if (!irq_may_run(desc))
1254 goto out;
1255
1256 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1257
1258 /*
1259 * If its disabled or no action available
1260 * then mask it and get out of here:
1261 */
1262 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1263 desc->istate |= IRQS_PENDING;
1264 mask_irq(desc);
1265 goto out;
1266 }
1267
1268 kstat_incr_irqs_this_cpu(desc);
1269 if (desc->istate & IRQS_ONESHOT)
1270 mask_irq(desc);
1271
1272 handle_irq_event(desc);
1273
1274 cond_unmask_eoi_irq(desc, chip);
1275
1276 raw_spin_unlock(&desc->lock);
1277 return;
1278out:
1279 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1280 chip->irq_eoi(&desc->irq_data);
1281 raw_spin_unlock(&desc->lock);
1282}
1283EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
1284
1285#endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
1286
1287/**
1288 * irq_chip_set_parent_state - set the state of a parent interrupt.
1289 *
1290 * @data: Pointer to interrupt specific data
1291 * @which: State to be restored (one of IRQCHIP_STATE_*)
1292 * @val: Value corresponding to @which
1293 *
1294 * Conditional success, if the underlying irqchip does not implement it.
1295 */
1296int irq_chip_set_parent_state(struct irq_data *data,
1297 enum irqchip_irq_state which,
1298 bool val)
1299{
1300 data = data->parent_data;
1301
1302 if (!data || !data->chip->irq_set_irqchip_state)
1303 return 0;
1304
1305 return data->chip->irq_set_irqchip_state(data, which, val);
1306}
1307EXPORT_SYMBOL_GPL(irq_chip_set_parent_state);
1308
1309/**
1310 * irq_chip_get_parent_state - get the state of a parent interrupt.
1311 *
1312 * @data: Pointer to interrupt specific data
1313 * @which: one of IRQCHIP_STATE_* the caller wants to know
1314 * @state: a pointer to a boolean where the state is to be stored
1315 *
1316 * Conditional success, if the underlying irqchip does not implement it.
1317 */
1318int irq_chip_get_parent_state(struct irq_data *data,
1319 enum irqchip_irq_state which,
1320 bool *state)
1321{
1322 data = data->parent_data;
1323
1324 if (!data || !data->chip->irq_get_irqchip_state)
1325 return 0;
1326
1327 return data->chip->irq_get_irqchip_state(data, which, state);
1328}
1329EXPORT_SYMBOL_GPL(irq_chip_get_parent_state);
1330
1331/**
1332 * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
1333 * NULL)
1334 * @data: Pointer to interrupt specific data
1335 */
1336void irq_chip_enable_parent(struct irq_data *data)
1337{
1338 data = data->parent_data;
1339 if (data->chip->irq_enable)
1340 data->chip->irq_enable(data);
1341 else
1342 data->chip->irq_unmask(data);
1343}
1344EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
1345
1346/**
1347 * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
1348 * NULL)
1349 * @data: Pointer to interrupt specific data
1350 */
1351void irq_chip_disable_parent(struct irq_data *data)
1352{
1353 data = data->parent_data;
1354 if (data->chip->irq_disable)
1355 data->chip->irq_disable(data);
1356 else
1357 data->chip->irq_mask(data);
1358}
1359EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
1360
1361/**
1362 * irq_chip_ack_parent - Acknowledge the parent interrupt
1363 * @data: Pointer to interrupt specific data
1364 */
1365void irq_chip_ack_parent(struct irq_data *data)
1366{
1367 data = data->parent_data;
1368 data->chip->irq_ack(data);
1369}
1370EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
1371
1372/**
1373 * irq_chip_mask_parent - Mask the parent interrupt
1374 * @data: Pointer to interrupt specific data
1375 */
1376void irq_chip_mask_parent(struct irq_data *data)
1377{
1378 data = data->parent_data;
1379 data->chip->irq_mask(data);
1380}
1381EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
1382
1383/**
1384 * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
1385 * @data: Pointer to interrupt specific data
1386 */
1387void irq_chip_mask_ack_parent(struct irq_data *data)
1388{
1389 data = data->parent_data;
1390 data->chip->irq_mask_ack(data);
1391}
1392EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
1393
1394/**
1395 * irq_chip_unmask_parent - Unmask the parent interrupt
1396 * @data: Pointer to interrupt specific data
1397 */
1398void irq_chip_unmask_parent(struct irq_data *data)
1399{
1400 data = data->parent_data;
1401 data->chip->irq_unmask(data);
1402}
1403EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
1404
1405/**
1406 * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
1407 * @data: Pointer to interrupt specific data
1408 */
1409void irq_chip_eoi_parent(struct irq_data *data)
1410{
1411 data = data->parent_data;
1412 data->chip->irq_eoi(data);
1413}
1414EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
1415
1416/**
1417 * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
1418 * @data: Pointer to interrupt specific data
1419 * @dest: The affinity mask to set
1420 * @force: Flag to enforce setting (disable online checks)
1421 *
1422 * Conditinal, as the underlying parent chip might not implement it.
1423 */
1424int irq_chip_set_affinity_parent(struct irq_data *data,
1425 const struct cpumask *dest, bool force)
1426{
1427 data = data->parent_data;
1428 if (data->chip->irq_set_affinity)
1429 return data->chip->irq_set_affinity(data, dest, force);
1430
1431 return -ENOSYS;
1432}
1433EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
1434
1435/**
1436 * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
1437 * @data: Pointer to interrupt specific data
1438 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
1439 *
1440 * Conditional, as the underlying parent chip might not implement it.
1441 */
1442int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
1443{
1444 data = data->parent_data;
1445
1446 if (data->chip->irq_set_type)
1447 return data->chip->irq_set_type(data, type);
1448
1449 return -ENOSYS;
1450}
1451EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
1452
1453/**
1454 * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
1455 * @data: Pointer to interrupt specific data
1456 *
1457 * Iterate through the domain hierarchy of the interrupt and check
1458 * whether a hw retrigger function exists. If yes, invoke it.
1459 */
1460int irq_chip_retrigger_hierarchy(struct irq_data *data)
1461{
1462 for (data = data->parent_data; data; data = data->parent_data)
1463 if (data->chip && data->chip->irq_retrigger)
1464 return data->chip->irq_retrigger(data);
1465
1466 return 0;
1467}
1468EXPORT_SYMBOL_GPL(irq_chip_retrigger_hierarchy);
1469
1470/**
1471 * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
1472 * @data: Pointer to interrupt specific data
1473 * @vcpu_info: The vcpu affinity information
1474 */
1475int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
1476{
1477 data = data->parent_data;
1478 if (data->chip->irq_set_vcpu_affinity)
1479 return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
1480
1481 return -ENOSYS;
1482}
1483EXPORT_SYMBOL_GPL(irq_chip_set_vcpu_affinity_parent);
1484/**
1485 * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
1486 * @data: Pointer to interrupt specific data
1487 * @on: Whether to set or reset the wake-up capability of this irq
1488 *
1489 * Conditional, as the underlying parent chip might not implement it.
1490 */
1491int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
1492{
1493 data = data->parent_data;
1494
1495 if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
1496 return 0;
1497
1498 if (data->chip->irq_set_wake)
1499 return data->chip->irq_set_wake(data, on);
1500
1501 return -ENOSYS;
1502}
1503EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
1504
1505/**
1506 * irq_chip_request_resources_parent - Request resources on the parent interrupt
1507 * @data: Pointer to interrupt specific data
1508 */
1509int irq_chip_request_resources_parent(struct irq_data *data)
1510{
1511 data = data->parent_data;
1512
1513 if (data->chip->irq_request_resources)
1514 return data->chip->irq_request_resources(data);
1515
1516 return -ENOSYS;
1517}
1518EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
1519
1520/**
1521 * irq_chip_release_resources_parent - Release resources on the parent interrupt
1522 * @data: Pointer to interrupt specific data
1523 */
1524void irq_chip_release_resources_parent(struct irq_data *data)
1525{
1526 data = data->parent_data;
1527 if (data->chip->irq_release_resources)
1528 data->chip->irq_release_resources(data);
1529}
1530EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
1531#endif
1532
1533/**
1534 * irq_chip_compose_msi_msg - Componse msi message for a irq chip
1535 * @data: Pointer to interrupt specific data
1536 * @msg: Pointer to the MSI message
1537 *
1538 * For hierarchical domains we find the first chip in the hierarchy
1539 * which implements the irq_compose_msi_msg callback. For non
1540 * hierarchical we use the top level chip.
1541 */
1542int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1543{
1544 struct irq_data *pos = NULL;
1545
1546#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1547 for (; data; data = data->parent_data)
1548#endif
1549 if (data->chip && data->chip->irq_compose_msi_msg)
1550 pos = data;
1551 if (!pos)
1552 return -ENOSYS;
1553
1554 pos->chip->irq_compose_msi_msg(pos, msg);
1555
1556 return 0;
1557}
1558
1559/**
1560 * irq_chip_pm_get - Enable power for an IRQ chip
1561 * @data: Pointer to interrupt specific data
1562 *
1563 * Enable the power to the IRQ chip referenced by the interrupt data
1564 * structure.
1565 */
1566int irq_chip_pm_get(struct irq_data *data)
1567{
1568 int retval;
1569
1570 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
1571 retval = pm_runtime_get_sync(data->chip->parent_device);
1572 if (retval < 0) {
1573 pm_runtime_put_noidle(data->chip->parent_device);
1574 return retval;
1575 }
1576 }
1577
1578 return 0;
1579}
1580
1581/**
1582 * irq_chip_pm_put - Disable power for an IRQ chip
1583 * @data: Pointer to interrupt specific data
1584 *
1585 * Disable the power to the IRQ chip referenced by the interrupt data
1586 * structure, belongs. Note that power will only be disabled, once this
1587 * function has been called for all IRQs that have called irq_chip_pm_get().
1588 */
1589int irq_chip_pm_put(struct irq_data *data)
1590{
1591 int retval = 0;
1592
1593 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
1594 retval = pm_runtime_put(data->chip->parent_device);
1595
1596 return (retval < 0) ? retval : 0;
1597}
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
14#include <linux/msi.h>
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include <trace/events/irq.h>
20
21#include "internals.h"
22
23/**
24 * irq_set_chip - set the irq chip for an irq
25 * @irq: irq number
26 * @chip: pointer to irq chip description structure
27 */
28int irq_set_chip(unsigned int irq, struct irq_chip *chip)
29{
30 unsigned long flags;
31 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
32
33 if (!desc)
34 return -EINVAL;
35
36 if (!chip)
37 chip = &no_irq_chip;
38
39 desc->irq_data.chip = chip;
40 irq_put_desc_unlock(desc, flags);
41 /*
42 * For !CONFIG_SPARSE_IRQ make the irq show up in
43 * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
44 * already marked, and this call is harmless.
45 */
46 irq_reserve_irq(irq);
47 return 0;
48}
49EXPORT_SYMBOL(irq_set_chip);
50
51/**
52 * irq_set_type - set the irq trigger type for an irq
53 * @irq: irq number
54 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
55 */
56int irq_set_irq_type(unsigned int irq, unsigned int type)
57{
58 unsigned long flags;
59 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
60 int ret = 0;
61
62 if (!desc)
63 return -EINVAL;
64
65 type &= IRQ_TYPE_SENSE_MASK;
66 ret = __irq_set_trigger(desc, irq, type);
67 irq_put_desc_busunlock(desc, flags);
68 return ret;
69}
70EXPORT_SYMBOL(irq_set_irq_type);
71
72/**
73 * irq_set_handler_data - set irq handler data for an irq
74 * @irq: Interrupt number
75 * @data: Pointer to interrupt specific data
76 *
77 * Set the hardware irq controller data for an irq
78 */
79int irq_set_handler_data(unsigned int irq, void *data)
80{
81 unsigned long flags;
82 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
83
84 if (!desc)
85 return -EINVAL;
86 desc->irq_data.handler_data = data;
87 irq_put_desc_unlock(desc, flags);
88 return 0;
89}
90EXPORT_SYMBOL(irq_set_handler_data);
91
92/**
93 * irq_set_msi_desc - set MSI descriptor data for an irq
94 * @irq: Interrupt number
95 * @entry: Pointer to MSI descriptor data
96 *
97 * Set the MSI descriptor entry for an irq
98 */
99int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
100{
101 unsigned long flags;
102 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
103
104 if (!desc)
105 return -EINVAL;
106 desc->irq_data.msi_desc = entry;
107 if (entry)
108 entry->irq = irq;
109 irq_put_desc_unlock(desc, flags);
110 return 0;
111}
112
113/**
114 * irq_set_chip_data - set irq chip data for an irq
115 * @irq: Interrupt number
116 * @data: Pointer to chip specific data
117 *
118 * Set the hardware irq chip data for an irq
119 */
120int irq_set_chip_data(unsigned int irq, void *data)
121{
122 unsigned long flags;
123 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
124
125 if (!desc)
126 return -EINVAL;
127 desc->irq_data.chip_data = data;
128 irq_put_desc_unlock(desc, flags);
129 return 0;
130}
131EXPORT_SYMBOL(irq_set_chip_data);
132
133struct irq_data *irq_get_irq_data(unsigned int irq)
134{
135 struct irq_desc *desc = irq_to_desc(irq);
136
137 return desc ? &desc->irq_data : NULL;
138}
139EXPORT_SYMBOL_GPL(irq_get_irq_data);
140
141static void irq_state_clr_disabled(struct irq_desc *desc)
142{
143 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
144}
145
146static void irq_state_set_disabled(struct irq_desc *desc)
147{
148 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
149}
150
151static void irq_state_clr_masked(struct irq_desc *desc)
152{
153 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
154}
155
156static void irq_state_set_masked(struct irq_desc *desc)
157{
158 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
159}
160
161int irq_startup(struct irq_desc *desc, bool resend)
162{
163 int ret = 0;
164
165 irq_state_clr_disabled(desc);
166 desc->depth = 0;
167
168 if (desc->irq_data.chip->irq_startup) {
169 ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
170 irq_state_clr_masked(desc);
171 } else {
172 irq_enable(desc);
173 }
174 if (resend)
175 check_irq_resend(desc, desc->irq_data.irq);
176 return ret;
177}
178
179void irq_shutdown(struct irq_desc *desc)
180{
181 irq_state_set_disabled(desc);
182 desc->depth = 1;
183 if (desc->irq_data.chip->irq_shutdown)
184 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
185 else if (desc->irq_data.chip->irq_disable)
186 desc->irq_data.chip->irq_disable(&desc->irq_data);
187 else
188 desc->irq_data.chip->irq_mask(&desc->irq_data);
189 irq_state_set_masked(desc);
190}
191
192void irq_enable(struct irq_desc *desc)
193{
194 irq_state_clr_disabled(desc);
195 if (desc->irq_data.chip->irq_enable)
196 desc->irq_data.chip->irq_enable(&desc->irq_data);
197 else
198 desc->irq_data.chip->irq_unmask(&desc->irq_data);
199 irq_state_clr_masked(desc);
200}
201
202void irq_disable(struct irq_desc *desc)
203{
204 irq_state_set_disabled(desc);
205 if (desc->irq_data.chip->irq_disable) {
206 desc->irq_data.chip->irq_disable(&desc->irq_data);
207 irq_state_set_masked(desc);
208 }
209}
210
211void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
212{
213 if (desc->irq_data.chip->irq_enable)
214 desc->irq_data.chip->irq_enable(&desc->irq_data);
215 else
216 desc->irq_data.chip->irq_unmask(&desc->irq_data);
217 cpumask_set_cpu(cpu, desc->percpu_enabled);
218}
219
220void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
221{
222 if (desc->irq_data.chip->irq_disable)
223 desc->irq_data.chip->irq_disable(&desc->irq_data);
224 else
225 desc->irq_data.chip->irq_mask(&desc->irq_data);
226 cpumask_clear_cpu(cpu, desc->percpu_enabled);
227}
228
229static inline void mask_ack_irq(struct irq_desc *desc)
230{
231 if (desc->irq_data.chip->irq_mask_ack)
232 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
233 else {
234 desc->irq_data.chip->irq_mask(&desc->irq_data);
235 if (desc->irq_data.chip->irq_ack)
236 desc->irq_data.chip->irq_ack(&desc->irq_data);
237 }
238 irq_state_set_masked(desc);
239}
240
241void mask_irq(struct irq_desc *desc)
242{
243 if (desc->irq_data.chip->irq_mask) {
244 desc->irq_data.chip->irq_mask(&desc->irq_data);
245 irq_state_set_masked(desc);
246 }
247}
248
249void unmask_irq(struct irq_desc *desc)
250{
251 if (desc->irq_data.chip->irq_unmask) {
252 desc->irq_data.chip->irq_unmask(&desc->irq_data);
253 irq_state_clr_masked(desc);
254 }
255}
256
257/*
258 * handle_nested_irq - Handle a nested irq from a irq thread
259 * @irq: the interrupt number
260 *
261 * Handle interrupts which are nested into a threaded interrupt
262 * handler. The handler function is called inside the calling
263 * threads context.
264 */
265void handle_nested_irq(unsigned int irq)
266{
267 struct irq_desc *desc = irq_to_desc(irq);
268 struct irqaction *action;
269 irqreturn_t action_ret;
270
271 might_sleep();
272
273 raw_spin_lock_irq(&desc->lock);
274
275 kstat_incr_irqs_this_cpu(irq, desc);
276
277 action = desc->action;
278 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
279 desc->istate |= IRQS_PENDING;
280 goto out_unlock;
281 }
282
283 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
284 raw_spin_unlock_irq(&desc->lock);
285
286 action_ret = action->thread_fn(action->irq, action->dev_id);
287 if (!noirqdebug)
288 note_interrupt(irq, desc, action_ret);
289
290 raw_spin_lock_irq(&desc->lock);
291 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
292
293out_unlock:
294 raw_spin_unlock_irq(&desc->lock);
295}
296EXPORT_SYMBOL_GPL(handle_nested_irq);
297
298static bool irq_check_poll(struct irq_desc *desc)
299{
300 if (!(desc->istate & IRQS_POLL_INPROGRESS))
301 return false;
302 return irq_wait_for_poll(desc);
303}
304
305/**
306 * handle_simple_irq - Simple and software-decoded IRQs.
307 * @irq: the interrupt number
308 * @desc: the interrupt description structure for this irq
309 *
310 * Simple interrupts are either sent from a demultiplexing interrupt
311 * handler or come from hardware, where no interrupt hardware control
312 * is necessary.
313 *
314 * Note: The caller is expected to handle the ack, clear, mask and
315 * unmask issues if necessary.
316 */
317void
318handle_simple_irq(unsigned int irq, struct irq_desc *desc)
319{
320 raw_spin_lock(&desc->lock);
321
322 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
323 if (!irq_check_poll(desc))
324 goto out_unlock;
325
326 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
327 kstat_incr_irqs_this_cpu(irq, desc);
328
329 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
330 desc->istate |= IRQS_PENDING;
331 goto out_unlock;
332 }
333
334 handle_irq_event(desc);
335
336out_unlock:
337 raw_spin_unlock(&desc->lock);
338}
339EXPORT_SYMBOL_GPL(handle_simple_irq);
340
341/*
342 * Called unconditionally from handle_level_irq() and only for oneshot
343 * interrupts from handle_fasteoi_irq()
344 */
345static void cond_unmask_irq(struct irq_desc *desc)
346{
347 /*
348 * We need to unmask in the following cases:
349 * - Standard level irq (IRQF_ONESHOT is not set)
350 * - Oneshot irq which did not wake the thread (caused by a
351 * spurious interrupt or a primary handler handling it
352 * completely).
353 */
354 if (!irqd_irq_disabled(&desc->irq_data) &&
355 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
356 unmask_irq(desc);
357}
358
359/**
360 * handle_level_irq - Level type irq handler
361 * @irq: the interrupt number
362 * @desc: the interrupt description structure for this irq
363 *
364 * Level type interrupts are active as long as the hardware line has
365 * the active level. This may require to mask the interrupt and unmask
366 * it after the associated handler has acknowledged the device, so the
367 * interrupt line is back to inactive.
368 */
369void
370handle_level_irq(unsigned int irq, struct irq_desc *desc)
371{
372 raw_spin_lock(&desc->lock);
373 mask_ack_irq(desc);
374
375 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
376 if (!irq_check_poll(desc))
377 goto out_unlock;
378
379 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
380 kstat_incr_irqs_this_cpu(irq, desc);
381
382 /*
383 * If its disabled or no action available
384 * keep it masked and get out of here
385 */
386 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
387 desc->istate |= IRQS_PENDING;
388 goto out_unlock;
389 }
390
391 handle_irq_event(desc);
392
393 cond_unmask_irq(desc);
394
395out_unlock:
396 raw_spin_unlock(&desc->lock);
397}
398EXPORT_SYMBOL_GPL(handle_level_irq);
399
400#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
401static inline void preflow_handler(struct irq_desc *desc)
402{
403 if (desc->preflow_handler)
404 desc->preflow_handler(&desc->irq_data);
405}
406#else
407static inline void preflow_handler(struct irq_desc *desc) { }
408#endif
409
410/**
411 * handle_fasteoi_irq - irq handler for transparent controllers
412 * @irq: the interrupt number
413 * @desc: the interrupt description structure for this irq
414 *
415 * Only a single callback will be issued to the chip: an ->eoi()
416 * call when the interrupt has been serviced. This enables support
417 * for modern forms of interrupt handlers, which handle the flow
418 * details in hardware, transparently.
419 */
420void
421handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
422{
423 raw_spin_lock(&desc->lock);
424
425 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
426 if (!irq_check_poll(desc))
427 goto out;
428
429 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
430 kstat_incr_irqs_this_cpu(irq, desc);
431
432 /*
433 * If its disabled or no action available
434 * then mask it and get out of here:
435 */
436 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
437 desc->istate |= IRQS_PENDING;
438 mask_irq(desc);
439 goto out;
440 }
441
442 if (desc->istate & IRQS_ONESHOT)
443 mask_irq(desc);
444
445 preflow_handler(desc);
446 handle_irq_event(desc);
447
448 if (desc->istate & IRQS_ONESHOT)
449 cond_unmask_irq(desc);
450
451out_eoi:
452 desc->irq_data.chip->irq_eoi(&desc->irq_data);
453out_unlock:
454 raw_spin_unlock(&desc->lock);
455 return;
456out:
457 if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
458 goto out_eoi;
459 goto out_unlock;
460}
461
462/**
463 * handle_edge_irq - edge type IRQ handler
464 * @irq: the interrupt number
465 * @desc: the interrupt description structure for this irq
466 *
467 * Interrupt occures on the falling and/or rising edge of a hardware
468 * signal. The occurrence is latched into the irq controller hardware
469 * and must be acked in order to be reenabled. After the ack another
470 * interrupt can happen on the same source even before the first one
471 * is handled by the associated event handler. If this happens it
472 * might be necessary to disable (mask) the interrupt depending on the
473 * controller hardware. This requires to reenable the interrupt inside
474 * of the loop which handles the interrupts which have arrived while
475 * the handler was running. If all pending interrupts are handled, the
476 * loop is left.
477 */
478void
479handle_edge_irq(unsigned int irq, struct irq_desc *desc)
480{
481 raw_spin_lock(&desc->lock);
482
483 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
484 /*
485 * If we're currently running this IRQ, or its disabled,
486 * we shouldn't process the IRQ. Mark it pending, handle
487 * the necessary masking and go out
488 */
489 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
490 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
491 if (!irq_check_poll(desc)) {
492 desc->istate |= IRQS_PENDING;
493 mask_ack_irq(desc);
494 goto out_unlock;
495 }
496 }
497 kstat_incr_irqs_this_cpu(irq, desc);
498
499 /* Start handling the irq */
500 desc->irq_data.chip->irq_ack(&desc->irq_data);
501
502 do {
503 if (unlikely(!desc->action)) {
504 mask_irq(desc);
505 goto out_unlock;
506 }
507
508 /*
509 * When another irq arrived while we were handling
510 * one, we could have masked the irq.
511 * Renable it, if it was not disabled in meantime.
512 */
513 if (unlikely(desc->istate & IRQS_PENDING)) {
514 if (!irqd_irq_disabled(&desc->irq_data) &&
515 irqd_irq_masked(&desc->irq_data))
516 unmask_irq(desc);
517 }
518
519 handle_irq_event(desc);
520
521 } while ((desc->istate & IRQS_PENDING) &&
522 !irqd_irq_disabled(&desc->irq_data));
523
524out_unlock:
525 raw_spin_unlock(&desc->lock);
526}
527EXPORT_SYMBOL(handle_edge_irq);
528
529#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
530/**
531 * handle_edge_eoi_irq - edge eoi type IRQ handler
532 * @irq: the interrupt number
533 * @desc: the interrupt description structure for this irq
534 *
535 * Similar as the above handle_edge_irq, but using eoi and w/o the
536 * mask/unmask logic.
537 */
538void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
539{
540 struct irq_chip *chip = irq_desc_get_chip(desc);
541
542 raw_spin_lock(&desc->lock);
543
544 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
545 /*
546 * If we're currently running this IRQ, or its disabled,
547 * we shouldn't process the IRQ. Mark it pending, handle
548 * the necessary masking and go out
549 */
550 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
551 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
552 if (!irq_check_poll(desc)) {
553 desc->istate |= IRQS_PENDING;
554 goto out_eoi;
555 }
556 }
557 kstat_incr_irqs_this_cpu(irq, desc);
558
559 do {
560 if (unlikely(!desc->action))
561 goto out_eoi;
562
563 handle_irq_event(desc);
564
565 } while ((desc->istate & IRQS_PENDING) &&
566 !irqd_irq_disabled(&desc->irq_data));
567
568out_eoi:
569 chip->irq_eoi(&desc->irq_data);
570 raw_spin_unlock(&desc->lock);
571}
572#endif
573
574/**
575 * handle_percpu_irq - Per CPU local irq handler
576 * @irq: the interrupt number
577 * @desc: the interrupt description structure for this irq
578 *
579 * Per CPU interrupts on SMP machines without locking requirements
580 */
581void
582handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
583{
584 struct irq_chip *chip = irq_desc_get_chip(desc);
585
586 kstat_incr_irqs_this_cpu(irq, desc);
587
588 if (chip->irq_ack)
589 chip->irq_ack(&desc->irq_data);
590
591 handle_irq_event_percpu(desc, desc->action);
592
593 if (chip->irq_eoi)
594 chip->irq_eoi(&desc->irq_data);
595}
596
597/**
598 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
599 * @irq: the interrupt number
600 * @desc: the interrupt description structure for this irq
601 *
602 * Per CPU interrupts on SMP machines without locking requirements. Same as
603 * handle_percpu_irq() above but with the following extras:
604 *
605 * action->percpu_dev_id is a pointer to percpu variables which
606 * contain the real device id for the cpu on which this handler is
607 * called
608 */
609void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
610{
611 struct irq_chip *chip = irq_desc_get_chip(desc);
612 struct irqaction *action = desc->action;
613 void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
614 irqreturn_t res;
615
616 kstat_incr_irqs_this_cpu(irq, desc);
617
618 if (chip->irq_ack)
619 chip->irq_ack(&desc->irq_data);
620
621 trace_irq_handler_entry(irq, action);
622 res = action->handler(irq, dev_id);
623 trace_irq_handler_exit(irq, action, res);
624
625 if (chip->irq_eoi)
626 chip->irq_eoi(&desc->irq_data);
627}
628
629void
630__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
631 const char *name)
632{
633 unsigned long flags;
634 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
635
636 if (!desc)
637 return;
638
639 if (!handle) {
640 handle = handle_bad_irq;
641 } else {
642 if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
643 goto out;
644 }
645
646 /* Uninstall? */
647 if (handle == handle_bad_irq) {
648 if (desc->irq_data.chip != &no_irq_chip)
649 mask_ack_irq(desc);
650 irq_state_set_disabled(desc);
651 desc->depth = 1;
652 }
653 desc->handle_irq = handle;
654 desc->name = name;
655
656 if (handle != handle_bad_irq && is_chained) {
657 irq_settings_set_noprobe(desc);
658 irq_settings_set_norequest(desc);
659 irq_settings_set_nothread(desc);
660 irq_startup(desc, true);
661 }
662out:
663 irq_put_desc_busunlock(desc, flags);
664}
665EXPORT_SYMBOL_GPL(__irq_set_handler);
666
667void
668irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
669 irq_flow_handler_t handle, const char *name)
670{
671 irq_set_chip(irq, chip);
672 __irq_set_handler(irq, handle, 0, name);
673}
674
675void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
676{
677 unsigned long flags;
678 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
679
680 if (!desc)
681 return;
682 irq_settings_clr_and_set(desc, clr, set);
683
684 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
685 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
686 if (irq_settings_has_no_balance_set(desc))
687 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
688 if (irq_settings_is_per_cpu(desc))
689 irqd_set(&desc->irq_data, IRQD_PER_CPU);
690 if (irq_settings_can_move_pcntxt(desc))
691 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
692 if (irq_settings_is_level(desc))
693 irqd_set(&desc->irq_data, IRQD_LEVEL);
694
695 irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
696
697 irq_put_desc_unlock(desc, flags);
698}
699EXPORT_SYMBOL_GPL(irq_modify_status);
700
701/**
702 * irq_cpu_online - Invoke all irq_cpu_online functions.
703 *
704 * Iterate through all irqs and invoke the chip.irq_cpu_online()
705 * for each.
706 */
707void irq_cpu_online(void)
708{
709 struct irq_desc *desc;
710 struct irq_chip *chip;
711 unsigned long flags;
712 unsigned int irq;
713
714 for_each_active_irq(irq) {
715 desc = irq_to_desc(irq);
716 if (!desc)
717 continue;
718
719 raw_spin_lock_irqsave(&desc->lock, flags);
720
721 chip = irq_data_get_irq_chip(&desc->irq_data);
722 if (chip && chip->irq_cpu_online &&
723 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
724 !irqd_irq_disabled(&desc->irq_data)))
725 chip->irq_cpu_online(&desc->irq_data);
726
727 raw_spin_unlock_irqrestore(&desc->lock, flags);
728 }
729}
730
731/**
732 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
733 *
734 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
735 * for each.
736 */
737void irq_cpu_offline(void)
738{
739 struct irq_desc *desc;
740 struct irq_chip *chip;
741 unsigned long flags;
742 unsigned int irq;
743
744 for_each_active_irq(irq) {
745 desc = irq_to_desc(irq);
746 if (!desc)
747 continue;
748
749 raw_spin_lock_irqsave(&desc->lock, flags);
750
751 chip = irq_data_get_irq_chip(&desc->irq_data);
752 if (chip && chip->irq_cpu_offline &&
753 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
754 !irqd_irq_disabled(&desc->irq_data)))
755 chip->irq_cpu_offline(&desc->irq_data);
756
757 raw_spin_unlock_irqrestore(&desc->lock, flags);
758 }
759}