Loading...
Note: File does not exist in v6.9.4.
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/ia64/kernel/time.c
4 *
5 * Copyright (C) 1998-2003 Hewlett-Packard Co
6 * Stephane Eranian <eranian@hpl.hp.com>
7 * David Mosberger <davidm@hpl.hp.com>
8 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
9 * Copyright (C) 1999-2000 VA Linux Systems
10 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
11 */
12
13#include <linux/cpu.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/profile.h>
18#include <linux/sched.h>
19#include <linux/time.h>
20#include <linux/nmi.h>
21#include <linux/interrupt.h>
22#include <linux/efi.h>
23#include <linux/timex.h>
24#include <linux/timekeeper_internal.h>
25#include <linux/platform_device.h>
26#include <linux/sched/cputime.h>
27
28#include <asm/delay.h>
29#include <asm/hw_irq.h>
30#include <asm/ptrace.h>
31#include <asm/sal.h>
32#include <asm/sections.h>
33
34#include "fsyscall_gtod_data.h"
35
36static u64 itc_get_cycles(struct clocksource *cs);
37
38struct fsyscall_gtod_data_t fsyscall_gtod_data;
39
40struct itc_jitter_data_t itc_jitter_data;
41
42volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
43
44#ifdef CONFIG_IA64_DEBUG_IRQ
45
46unsigned long last_cli_ip;
47EXPORT_SYMBOL(last_cli_ip);
48
49#endif
50
51static struct clocksource clocksource_itc = {
52 .name = "itc",
53 .rating = 350,
54 .read = itc_get_cycles,
55 .mask = CLOCKSOURCE_MASK(64),
56 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
57};
58static struct clocksource *itc_clocksource;
59
60#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
61
62#include <linux/kernel_stat.h>
63
64extern u64 cycle_to_nsec(u64 cyc);
65
66void vtime_flush(struct task_struct *tsk)
67{
68 struct thread_info *ti = task_thread_info(tsk);
69 u64 delta;
70
71 if (ti->utime)
72 account_user_time(tsk, cycle_to_nsec(ti->utime));
73
74 if (ti->gtime)
75 account_guest_time(tsk, cycle_to_nsec(ti->gtime));
76
77 if (ti->idle_time)
78 account_idle_time(cycle_to_nsec(ti->idle_time));
79
80 if (ti->stime) {
81 delta = cycle_to_nsec(ti->stime);
82 account_system_index_time(tsk, delta, CPUTIME_SYSTEM);
83 }
84
85 if (ti->hardirq_time) {
86 delta = cycle_to_nsec(ti->hardirq_time);
87 account_system_index_time(tsk, delta, CPUTIME_IRQ);
88 }
89
90 if (ti->softirq_time) {
91 delta = cycle_to_nsec(ti->softirq_time);
92 account_system_index_time(tsk, delta, CPUTIME_SOFTIRQ);
93 }
94
95 ti->utime = 0;
96 ti->gtime = 0;
97 ti->idle_time = 0;
98 ti->stime = 0;
99 ti->hardirq_time = 0;
100 ti->softirq_time = 0;
101}
102
103/*
104 * Called from the context switch with interrupts disabled, to charge all
105 * accumulated times to the current process, and to prepare accounting on
106 * the next process.
107 */
108void arch_vtime_task_switch(struct task_struct *prev)
109{
110 struct thread_info *pi = task_thread_info(prev);
111 struct thread_info *ni = task_thread_info(current);
112
113 ni->ac_stamp = pi->ac_stamp;
114 ni->ac_stime = ni->ac_utime = 0;
115}
116
117/*
118 * Account time for a transition between system, hard irq or soft irq state.
119 * Note that this function is called with interrupts enabled.
120 */
121static __u64 vtime_delta(struct task_struct *tsk)
122{
123 struct thread_info *ti = task_thread_info(tsk);
124 __u64 now, delta_stime;
125
126 WARN_ON_ONCE(!irqs_disabled());
127
128 now = ia64_get_itc();
129 delta_stime = now - ti->ac_stamp;
130 ti->ac_stamp = now;
131
132 return delta_stime;
133}
134
135void vtime_account_system(struct task_struct *tsk)
136{
137 struct thread_info *ti = task_thread_info(tsk);
138 __u64 stime = vtime_delta(tsk);
139
140 if ((tsk->flags & PF_VCPU) && !irq_count())
141 ti->gtime += stime;
142 else if (hardirq_count())
143 ti->hardirq_time += stime;
144 else if (in_serving_softirq())
145 ti->softirq_time += stime;
146 else
147 ti->stime += stime;
148}
149EXPORT_SYMBOL_GPL(vtime_account_system);
150
151void vtime_account_idle(struct task_struct *tsk)
152{
153 struct thread_info *ti = task_thread_info(tsk);
154
155 ti->idle_time += vtime_delta(tsk);
156}
157
158#endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
159
160static irqreturn_t
161timer_interrupt (int irq, void *dev_id)
162{
163 unsigned long new_itm;
164
165 if (cpu_is_offline(smp_processor_id())) {
166 return IRQ_HANDLED;
167 }
168
169 new_itm = local_cpu_data->itm_next;
170
171 if (!time_after(ia64_get_itc(), new_itm))
172 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
173 ia64_get_itc(), new_itm);
174
175 profile_tick(CPU_PROFILING);
176
177 while (1) {
178 update_process_times(user_mode(get_irq_regs()));
179
180 new_itm += local_cpu_data->itm_delta;
181
182 if (smp_processor_id() == time_keeper_id)
183 xtime_update(1);
184
185 local_cpu_data->itm_next = new_itm;
186
187 if (time_after(new_itm, ia64_get_itc()))
188 break;
189
190 /*
191 * Allow IPIs to interrupt the timer loop.
192 */
193 local_irq_enable();
194 local_irq_disable();
195 }
196
197 do {
198 /*
199 * If we're too close to the next clock tick for
200 * comfort, we increase the safety margin by
201 * intentionally dropping the next tick(s). We do NOT
202 * update itm.next because that would force us to call
203 * xtime_update() which in turn would let our clock run
204 * too fast (with the potentially devastating effect
205 * of losing monotony of time).
206 */
207 while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
208 new_itm += local_cpu_data->itm_delta;
209 ia64_set_itm(new_itm);
210 /* double check, in case we got hit by a (slow) PMI: */
211 } while (time_after_eq(ia64_get_itc(), new_itm));
212 return IRQ_HANDLED;
213}
214
215/*
216 * Encapsulate access to the itm structure for SMP.
217 */
218void
219ia64_cpu_local_tick (void)
220{
221 int cpu = smp_processor_id();
222 unsigned long shift = 0, delta;
223
224 /* arrange for the cycle counter to generate a timer interrupt: */
225 ia64_set_itv(IA64_TIMER_VECTOR);
226
227 delta = local_cpu_data->itm_delta;
228 /*
229 * Stagger the timer tick for each CPU so they don't occur all at (almost) the
230 * same time:
231 */
232 if (cpu) {
233 unsigned long hi = 1UL << ia64_fls(cpu);
234 shift = (2*(cpu - hi) + 1) * delta/hi/2;
235 }
236 local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
237 ia64_set_itm(local_cpu_data->itm_next);
238}
239
240static int nojitter;
241
242static int __init nojitter_setup(char *str)
243{
244 nojitter = 1;
245 printk("Jitter checking for ITC timers disabled\n");
246 return 1;
247}
248
249__setup("nojitter", nojitter_setup);
250
251
252void ia64_init_itm(void)
253{
254 unsigned long platform_base_freq, itc_freq;
255 struct pal_freq_ratio itc_ratio, proc_ratio;
256 long status, platform_base_drift, itc_drift;
257
258 /*
259 * According to SAL v2.6, we need to use a SAL call to determine the platform base
260 * frequency and then a PAL call to determine the frequency ratio between the ITC
261 * and the base frequency.
262 */
263 status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
264 &platform_base_freq, &platform_base_drift);
265 if (status != 0) {
266 printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
267 } else {
268 status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
269 if (status != 0)
270 printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
271 }
272 if (status != 0) {
273 /* invent "random" values */
274 printk(KERN_ERR
275 "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
276 platform_base_freq = 100000000;
277 platform_base_drift = -1; /* no drift info */
278 itc_ratio.num = 3;
279 itc_ratio.den = 1;
280 }
281 if (platform_base_freq < 40000000) {
282 printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
283 platform_base_freq);
284 platform_base_freq = 75000000;
285 platform_base_drift = -1;
286 }
287 if (!proc_ratio.den)
288 proc_ratio.den = 1; /* avoid division by zero */
289 if (!itc_ratio.den)
290 itc_ratio.den = 1; /* avoid division by zero */
291
292 itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
293
294 local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
295 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
296 "ITC freq=%lu.%03luMHz", smp_processor_id(),
297 platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
298 itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
299
300 if (platform_base_drift != -1) {
301 itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
302 printk("+/-%ldppm\n", itc_drift);
303 } else {
304 itc_drift = -1;
305 printk("\n");
306 }
307
308 local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
309 local_cpu_data->itc_freq = itc_freq;
310 local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
311 local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
312 + itc_freq/2)/itc_freq;
313
314 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
315#ifdef CONFIG_SMP
316 /* On IA64 in an SMP configuration ITCs are never accurately synchronized.
317 * Jitter compensation requires a cmpxchg which may limit
318 * the scalability of the syscalls for retrieving time.
319 * The ITC synchronization is usually successful to within a few
320 * ITC ticks but this is not a sure thing. If you need to improve
321 * timer performance in SMP situations then boot the kernel with the
322 * "nojitter" option. However, doing so may result in time fluctuating (maybe
323 * even going backward) if the ITC offsets between the individual CPUs
324 * are too large.
325 */
326 if (!nojitter)
327 itc_jitter_data.itc_jitter = 1;
328#endif
329 } else
330 /*
331 * ITC is drifty and we have not synchronized the ITCs in smpboot.c.
332 * ITC values may fluctuate significantly between processors.
333 * Clock should not be used for hrtimers. Mark itc as only
334 * useful for boot and testing.
335 *
336 * Note that jitter compensation is off! There is no point of
337 * synchronizing ITCs since they may be large differentials
338 * that change over time.
339 *
340 * The only way to fix this would be to repeatedly sync the
341 * ITCs. Until that time we have to avoid ITC.
342 */
343 clocksource_itc.rating = 50;
344
345 /* avoid softlock up message when cpu is unplug and plugged again. */
346 touch_softlockup_watchdog();
347
348 /* Setup the CPU local timer tick */
349 ia64_cpu_local_tick();
350
351 if (!itc_clocksource) {
352 clocksource_register_hz(&clocksource_itc,
353 local_cpu_data->itc_freq);
354 itc_clocksource = &clocksource_itc;
355 }
356}
357
358static u64 itc_get_cycles(struct clocksource *cs)
359{
360 unsigned long lcycle, now, ret;
361
362 if (!itc_jitter_data.itc_jitter)
363 return get_cycles();
364
365 lcycle = itc_jitter_data.itc_lastcycle;
366 now = get_cycles();
367 if (lcycle && time_after(lcycle, now))
368 return lcycle;
369
370 /*
371 * Keep track of the last timer value returned.
372 * In an SMP environment, you could lose out in contention of
373 * cmpxchg. If so, your cmpxchg returns new value which the
374 * winner of contention updated to. Use the new value instead.
375 */
376 ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
377 if (unlikely(ret != lcycle))
378 return ret;
379
380 return now;
381}
382
383
384static struct irqaction timer_irqaction = {
385 .handler = timer_interrupt,
386 .flags = IRQF_IRQPOLL,
387 .name = "timer"
388};
389
390void read_persistent_clock64(struct timespec64 *ts)
391{
392 efi_gettimeofday(ts);
393}
394
395void __init
396time_init (void)
397{
398 register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
399 ia64_init_itm();
400}
401
402/*
403 * Generic udelay assumes that if preemption is allowed and the thread
404 * migrates to another CPU, that the ITC values are synchronized across
405 * all CPUs.
406 */
407static void
408ia64_itc_udelay (unsigned long usecs)
409{
410 unsigned long start = ia64_get_itc();
411 unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
412
413 while (time_before(ia64_get_itc(), end))
414 cpu_relax();
415}
416
417void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
418
419void
420udelay (unsigned long usecs)
421{
422 (*ia64_udelay)(usecs);
423}
424EXPORT_SYMBOL(udelay);
425
426/* IA64 doesn't cache the timezone */
427void update_vsyscall_tz(void)
428{
429}
430
431void update_vsyscall(struct timekeeper *tk)
432{
433 write_seqcount_begin(&fsyscall_gtod_data.seq);
434
435 /* copy vsyscall data */
436 fsyscall_gtod_data.clk_mask = tk->tkr_mono.mask;
437 fsyscall_gtod_data.clk_mult = tk->tkr_mono.mult;
438 fsyscall_gtod_data.clk_shift = tk->tkr_mono.shift;
439 fsyscall_gtod_data.clk_fsys_mmio = tk->tkr_mono.clock->archdata.fsys_mmio;
440 fsyscall_gtod_data.clk_cycle_last = tk->tkr_mono.cycle_last;
441
442 fsyscall_gtod_data.wall_time.sec = tk->xtime_sec;
443 fsyscall_gtod_data.wall_time.snsec = tk->tkr_mono.xtime_nsec;
444
445 fsyscall_gtod_data.monotonic_time.sec = tk->xtime_sec
446 + tk->wall_to_monotonic.tv_sec;
447 fsyscall_gtod_data.monotonic_time.snsec = tk->tkr_mono.xtime_nsec
448 + ((u64)tk->wall_to_monotonic.tv_nsec
449 << tk->tkr_mono.shift);
450
451 /* normalize */
452 while (fsyscall_gtod_data.monotonic_time.snsec >=
453 (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
454 fsyscall_gtod_data.monotonic_time.snsec -=
455 ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
456 fsyscall_gtod_data.monotonic_time.sec++;
457 }
458
459 write_seqcount_end(&fsyscall_gtod_data.seq);
460}
461