Loading...
1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *
6 * Copyright (C) 2000 - 2019, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
28#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
29#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
30#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
31#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
32#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
33#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
34#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
35#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
36#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
37#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
39#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
40#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
41#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
42#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
43#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
44#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
45#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
46
47/*
48 * All tables must be byte-packed to match the ACPI specification, since
49 * the tables are provided by the system BIOS.
50 */
51#pragma pack(1)
52
53/*
54 * Note: C bitfields are not used for this reason:
55 *
56 * "Bitfields are great and easy to read, but unfortunately the C language
57 * does not specify the layout of bitfields in memory, which means they are
58 * essentially useless for dealing with packed data in on-disk formats or
59 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
60 * this decision was a design error in C. Ritchie could have picked an order
61 * and stuck with it." Norman Ramsey.
62 * See http://stackoverflow.com/a/1053662/41661
63 */
64
65/*******************************************************************************
66 *
67 * IORT - IO Remapping Table
68 *
69 * Conforms to "IO Remapping Table System Software on ARM Platforms",
70 * Document number: ARM DEN 0049D, March 2018
71 *
72 ******************************************************************************/
73
74struct acpi_table_iort {
75 struct acpi_table_header header;
76 u32 node_count;
77 u32 node_offset;
78 u32 reserved;
79};
80
81/*
82 * IORT subtables
83 */
84struct acpi_iort_node {
85 u8 type;
86 u16 length;
87 u8 revision;
88 u32 reserved;
89 u32 mapping_count;
90 u32 mapping_offset;
91 char node_data[1];
92};
93
94/* Values for subtable Type above */
95
96enum acpi_iort_node_type {
97 ACPI_IORT_NODE_ITS_GROUP = 0x00,
98 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
99 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
100 ACPI_IORT_NODE_SMMU = 0x03,
101 ACPI_IORT_NODE_SMMU_V3 = 0x04,
102 ACPI_IORT_NODE_PMCG = 0x05
103};
104
105struct acpi_iort_id_mapping {
106 u32 input_base; /* Lowest value in input range */
107 u32 id_count; /* Number of IDs */
108 u32 output_base; /* Lowest value in output range */
109 u32 output_reference; /* A reference to the output node */
110 u32 flags;
111};
112
113/* Masks for Flags field above for IORT subtable */
114
115#define ACPI_IORT_ID_SINGLE_MAPPING (1)
116
117struct acpi_iort_memory_access {
118 u32 cache_coherency;
119 u8 hints;
120 u16 reserved;
121 u8 memory_flags;
122};
123
124/* Values for cache_coherency field above */
125
126#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
127#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
128
129/* Masks for Hints field above */
130
131#define ACPI_IORT_HT_TRANSIENT (1)
132#define ACPI_IORT_HT_WRITE (1<<1)
133#define ACPI_IORT_HT_READ (1<<2)
134#define ACPI_IORT_HT_OVERRIDE (1<<3)
135
136/* Masks for memory_flags field above */
137
138#define ACPI_IORT_MF_COHERENCY (1)
139#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
140
141/*
142 * IORT node specific subtables
143 */
144struct acpi_iort_its_group {
145 u32 its_count;
146 u32 identifiers[1]; /* GIC ITS identifier array */
147};
148
149struct acpi_iort_named_component {
150 u32 node_flags;
151 u64 memory_properties; /* Memory access properties */
152 u8 memory_address_limit; /* Memory address size limit */
153 char device_name[1]; /* Path of namespace object */
154};
155
156/* Masks for Flags field above */
157
158#define ACPI_IORT_NC_STALL_SUPPORTED (1)
159#define ACPI_IORT_NC_PASID_BITS (31<<1)
160
161struct acpi_iort_root_complex {
162 u64 memory_properties; /* Memory access properties */
163 u32 ats_attribute;
164 u32 pci_segment_number;
165 u8 memory_address_limit; /* Memory address size limit */
166 u8 reserved[3]; /* Reserved, must be zero */
167};
168
169/* Values for ats_attribute field above */
170
171#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
172#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
173
174struct acpi_iort_smmu {
175 u64 base_address; /* SMMU base address */
176 u64 span; /* Length of memory range */
177 u32 model;
178 u32 flags;
179 u32 global_interrupt_offset;
180 u32 context_interrupt_count;
181 u32 context_interrupt_offset;
182 u32 pmu_interrupt_count;
183 u32 pmu_interrupt_offset;
184 u64 interrupts[1]; /* Interrupt array */
185};
186
187/* Values for Model field above */
188
189#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
190#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
191#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
192#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
193#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
194#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
195
196/* Masks for Flags field above */
197
198#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
199#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
200
201/* Global interrupt format */
202
203struct acpi_iort_smmu_gsi {
204 u32 nsg_irpt;
205 u32 nsg_irpt_flags;
206 u32 nsg_cfg_irpt;
207 u32 nsg_cfg_irpt_flags;
208};
209
210struct acpi_iort_smmu_v3 {
211 u64 base_address; /* SMMUv3 base address */
212 u32 flags;
213 u32 reserved;
214 u64 vatos_address;
215 u32 model;
216 u32 event_gsiv;
217 u32 pri_gsiv;
218 u32 gerr_gsiv;
219 u32 sync_gsiv;
220 u32 pxm;
221 u32 id_mapping_index;
222};
223
224/* Values for Model field above */
225
226#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
227#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
228#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
229
230/* Masks for Flags field above */
231
232#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
233#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
234#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
235
236struct acpi_iort_pmcg {
237 u64 page0_base_address;
238 u32 overflow_gsiv;
239 u32 node_reference;
240 u64 page1_base_address;
241};
242
243/*******************************************************************************
244 *
245 * IVRS - I/O Virtualization Reporting Structure
246 * Version 1
247 *
248 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
249 * Revision 1.26, February 2009.
250 *
251 ******************************************************************************/
252
253struct acpi_table_ivrs {
254 struct acpi_table_header header; /* Common ACPI table header */
255 u32 info; /* Common virtualization info */
256 u64 reserved;
257};
258
259/* Values for Info field above */
260
261#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
262#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
263#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
264
265/* IVRS subtable header */
266
267struct acpi_ivrs_header {
268 u8 type; /* Subtable type */
269 u8 flags;
270 u16 length; /* Subtable length */
271 u16 device_id; /* ID of IOMMU */
272};
273
274/* Values for subtable Type above */
275
276enum acpi_ivrs_type {
277 ACPI_IVRS_TYPE_HARDWARE = 0x10,
278 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
279 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
280 ACPI_IVRS_TYPE_MEMORY3 = 0x22
281};
282
283/* Masks for Flags field above for IVHD subtable */
284
285#define ACPI_IVHD_TT_ENABLE (1)
286#define ACPI_IVHD_PASS_PW (1<<1)
287#define ACPI_IVHD_RES_PASS_PW (1<<2)
288#define ACPI_IVHD_ISOC (1<<3)
289#define ACPI_IVHD_IOTLB (1<<4)
290
291/* Masks for Flags field above for IVMD subtable */
292
293#define ACPI_IVMD_UNITY (1)
294#define ACPI_IVMD_READ (1<<1)
295#define ACPI_IVMD_WRITE (1<<2)
296#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
297
298/*
299 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
300 */
301
302/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
303
304struct acpi_ivrs_hardware {
305 struct acpi_ivrs_header header;
306 u16 capability_offset; /* Offset for IOMMU control fields */
307 u64 base_address; /* IOMMU control registers */
308 u16 pci_segment_group;
309 u16 info; /* MSI number and unit ID */
310 u32 reserved;
311};
312
313/* Masks for Info field above */
314
315#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
316#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
317
318/*
319 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
320 * Upper two bits of the Type field are the (encoded) length of the structure.
321 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
322 * are reserved for future use but not defined.
323 */
324struct acpi_ivrs_de_header {
325 u8 type;
326 u16 id;
327 u8 data_setting;
328};
329
330/* Length of device entry is in the top two bits of Type field above */
331
332#define ACPI_IVHD_ENTRY_LENGTH 0xC0
333
334/* Values for device entry Type field above */
335
336enum acpi_ivrs_device_entry_type {
337 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
338
339 ACPI_IVRS_TYPE_PAD4 = 0,
340 ACPI_IVRS_TYPE_ALL = 1,
341 ACPI_IVRS_TYPE_SELECT = 2,
342 ACPI_IVRS_TYPE_START = 3,
343 ACPI_IVRS_TYPE_END = 4,
344
345 /* 8-byte device entries */
346
347 ACPI_IVRS_TYPE_PAD8 = 64,
348 ACPI_IVRS_TYPE_NOT_USED = 65,
349 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
350 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
351 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
352 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
353 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */
354};
355
356/* Values for Data field above */
357
358#define ACPI_IVHD_INIT_PASS (1)
359#define ACPI_IVHD_EINT_PASS (1<<1)
360#define ACPI_IVHD_NMI_PASS (1<<2)
361#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
362#define ACPI_IVHD_LINT0_PASS (1<<6)
363#define ACPI_IVHD_LINT1_PASS (1<<7)
364
365/* Types 0-4: 4-byte device entry */
366
367struct acpi_ivrs_device4 {
368 struct acpi_ivrs_de_header header;
369};
370
371/* Types 66-67: 8-byte device entry */
372
373struct acpi_ivrs_device8a {
374 struct acpi_ivrs_de_header header;
375 u8 reserved1;
376 u16 used_id;
377 u8 reserved2;
378};
379
380/* Types 70-71: 8-byte device entry */
381
382struct acpi_ivrs_device8b {
383 struct acpi_ivrs_de_header header;
384 u32 extended_data;
385};
386
387/* Values for extended_data above */
388
389#define ACPI_IVHD_ATS_DISABLED (1<<31)
390
391/* Type 72: 8-byte device entry */
392
393struct acpi_ivrs_device8c {
394 struct acpi_ivrs_de_header header;
395 u8 handle;
396 u16 used_id;
397 u8 variety;
398};
399
400/* Values for Variety field above */
401
402#define ACPI_IVHD_IOAPIC 1
403#define ACPI_IVHD_HPET 2
404
405/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
406
407struct acpi_ivrs_memory {
408 struct acpi_ivrs_header header;
409 u16 aux_data;
410 u64 reserved;
411 u64 start_address;
412 u64 memory_length;
413};
414
415/*******************************************************************************
416 *
417 * LPIT - Low Power Idle Table
418 *
419 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
420 *
421 ******************************************************************************/
422
423struct acpi_table_lpit {
424 struct acpi_table_header header; /* Common ACPI table header */
425};
426
427/* LPIT subtable header */
428
429struct acpi_lpit_header {
430 u32 type; /* Subtable type */
431 u32 length; /* Subtable length */
432 u16 unique_id;
433 u16 reserved;
434 u32 flags;
435};
436
437/* Values for subtable Type above */
438
439enum acpi_lpit_type {
440 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
441 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
442};
443
444/* Masks for Flags field above */
445
446#define ACPI_LPIT_STATE_DISABLED (1)
447#define ACPI_LPIT_NO_COUNTER (1<<1)
448
449/*
450 * LPIT subtables, correspond to Type in struct acpi_lpit_header
451 */
452
453/* 0x00: Native C-state instruction based LPI structure */
454
455struct acpi_lpit_native {
456 struct acpi_lpit_header header;
457 struct acpi_generic_address entry_trigger;
458 u32 residency;
459 u32 latency;
460 struct acpi_generic_address residency_counter;
461 u64 counter_frequency;
462};
463
464/*******************************************************************************
465 *
466 * MADT - Multiple APIC Description Table
467 * Version 3
468 *
469 ******************************************************************************/
470
471struct acpi_table_madt {
472 struct acpi_table_header header; /* Common ACPI table header */
473 u32 address; /* Physical address of local APIC */
474 u32 flags;
475};
476
477/* Masks for Flags field above */
478
479#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
480
481/* Values for PCATCompat flag */
482
483#define ACPI_MADT_DUAL_PIC 1
484#define ACPI_MADT_MULTIPLE_APIC 0
485
486/* Values for MADT subtable type in struct acpi_subtable_header */
487
488enum acpi_madt_type {
489 ACPI_MADT_TYPE_LOCAL_APIC = 0,
490 ACPI_MADT_TYPE_IO_APIC = 1,
491 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
492 ACPI_MADT_TYPE_NMI_SOURCE = 3,
493 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
494 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
495 ACPI_MADT_TYPE_IO_SAPIC = 6,
496 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
497 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
498 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
499 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
500 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
501 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
502 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
503 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
504 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
505 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
506};
507
508/*
509 * MADT Subtables, correspond to Type in struct acpi_subtable_header
510 */
511
512/* 0: Processor Local APIC */
513
514struct acpi_madt_local_apic {
515 struct acpi_subtable_header header;
516 u8 processor_id; /* ACPI processor id */
517 u8 id; /* Processor's local APIC id */
518 u32 lapic_flags;
519};
520
521/* 1: IO APIC */
522
523struct acpi_madt_io_apic {
524 struct acpi_subtable_header header;
525 u8 id; /* I/O APIC ID */
526 u8 reserved; /* reserved - must be zero */
527 u32 address; /* APIC physical address */
528 u32 global_irq_base; /* Global system interrupt where INTI lines start */
529};
530
531/* 2: Interrupt Override */
532
533struct acpi_madt_interrupt_override {
534 struct acpi_subtable_header header;
535 u8 bus; /* 0 - ISA */
536 u8 source_irq; /* Interrupt source (IRQ) */
537 u32 global_irq; /* Global system interrupt */
538 u16 inti_flags;
539};
540
541/* 3: NMI Source */
542
543struct acpi_madt_nmi_source {
544 struct acpi_subtable_header header;
545 u16 inti_flags;
546 u32 global_irq; /* Global system interrupt */
547};
548
549/* 4: Local APIC NMI */
550
551struct acpi_madt_local_apic_nmi {
552 struct acpi_subtable_header header;
553 u8 processor_id; /* ACPI processor id */
554 u16 inti_flags;
555 u8 lint; /* LINTn to which NMI is connected */
556};
557
558/* 5: Address Override */
559
560struct acpi_madt_local_apic_override {
561 struct acpi_subtable_header header;
562 u16 reserved; /* Reserved, must be zero */
563 u64 address; /* APIC physical address */
564};
565
566/* 6: I/O Sapic */
567
568struct acpi_madt_io_sapic {
569 struct acpi_subtable_header header;
570 u8 id; /* I/O SAPIC ID */
571 u8 reserved; /* Reserved, must be zero */
572 u32 global_irq_base; /* Global interrupt for SAPIC start */
573 u64 address; /* SAPIC physical address */
574};
575
576/* 7: Local Sapic */
577
578struct acpi_madt_local_sapic {
579 struct acpi_subtable_header header;
580 u8 processor_id; /* ACPI processor id */
581 u8 id; /* SAPIC ID */
582 u8 eid; /* SAPIC EID */
583 u8 reserved[3]; /* Reserved, must be zero */
584 u32 lapic_flags;
585 u32 uid; /* Numeric UID - ACPI 3.0 */
586 char uid_string[1]; /* String UID - ACPI 3.0 */
587};
588
589/* 8: Platform Interrupt Source */
590
591struct acpi_madt_interrupt_source {
592 struct acpi_subtable_header header;
593 u16 inti_flags;
594 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
595 u8 id; /* Processor ID */
596 u8 eid; /* Processor EID */
597 u8 io_sapic_vector; /* Vector value for PMI interrupts */
598 u32 global_irq; /* Global system interrupt */
599 u32 flags; /* Interrupt Source Flags */
600};
601
602/* Masks for Flags field above */
603
604#define ACPI_MADT_CPEI_OVERRIDE (1)
605
606/* 9: Processor Local X2APIC (ACPI 4.0) */
607
608struct acpi_madt_local_x2apic {
609 struct acpi_subtable_header header;
610 u16 reserved; /* reserved - must be zero */
611 u32 local_apic_id; /* Processor x2APIC ID */
612 u32 lapic_flags;
613 u32 uid; /* ACPI processor UID */
614};
615
616/* 10: Local X2APIC NMI (ACPI 4.0) */
617
618struct acpi_madt_local_x2apic_nmi {
619 struct acpi_subtable_header header;
620 u16 inti_flags;
621 u32 uid; /* ACPI processor UID */
622 u8 lint; /* LINTn to which NMI is connected */
623 u8 reserved[3]; /* reserved - must be zero */
624};
625
626/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
627
628struct acpi_madt_generic_interrupt {
629 struct acpi_subtable_header header;
630 u16 reserved; /* reserved - must be zero */
631 u32 cpu_interface_number;
632 u32 uid;
633 u32 flags;
634 u32 parking_version;
635 u32 performance_interrupt;
636 u64 parked_address;
637 u64 base_address;
638 u64 gicv_base_address;
639 u64 gich_base_address;
640 u32 vgic_interrupt;
641 u64 gicr_base_address;
642 u64 arm_mpidr;
643 u8 efficiency_class;
644 u8 reserved2[1];
645 u16 spe_interrupt; /* ACPI 6.3 */
646};
647
648/* Masks for Flags field above */
649
650/* ACPI_MADT_ENABLED (1) Processor is usable if set */
651#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
652#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
653
654/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
655
656struct acpi_madt_generic_distributor {
657 struct acpi_subtable_header header;
658 u16 reserved; /* reserved - must be zero */
659 u32 gic_id;
660 u64 base_address;
661 u32 global_irq_base;
662 u8 version;
663 u8 reserved2[3]; /* reserved - must be zero */
664};
665
666/* Values for Version field above */
667
668enum acpi_madt_gic_version {
669 ACPI_MADT_GIC_VERSION_NONE = 0,
670 ACPI_MADT_GIC_VERSION_V1 = 1,
671 ACPI_MADT_GIC_VERSION_V2 = 2,
672 ACPI_MADT_GIC_VERSION_V3 = 3,
673 ACPI_MADT_GIC_VERSION_V4 = 4,
674 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
675};
676
677/* 13: Generic MSI Frame (ACPI 5.1) */
678
679struct acpi_madt_generic_msi_frame {
680 struct acpi_subtable_header header;
681 u16 reserved; /* reserved - must be zero */
682 u32 msi_frame_id;
683 u64 base_address;
684 u32 flags;
685 u16 spi_count;
686 u16 spi_base;
687};
688
689/* Masks for Flags field above */
690
691#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
692
693/* 14: Generic Redistributor (ACPI 5.1) */
694
695struct acpi_madt_generic_redistributor {
696 struct acpi_subtable_header header;
697 u16 reserved; /* reserved - must be zero */
698 u64 base_address;
699 u32 length;
700};
701
702/* 15: Generic Translator (ACPI 6.0) */
703
704struct acpi_madt_generic_translator {
705 struct acpi_subtable_header header;
706 u16 reserved; /* reserved - must be zero */
707 u32 translation_id;
708 u64 base_address;
709 u32 reserved2;
710};
711
712/*
713 * Common flags fields for MADT subtables
714 */
715
716/* MADT Local APIC flags */
717
718#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
719
720/* MADT MPS INTI flags (inti_flags) */
721
722#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
723#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
724
725/* Values for MPS INTI flags */
726
727#define ACPI_MADT_POLARITY_CONFORMS 0
728#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
729#define ACPI_MADT_POLARITY_RESERVED 2
730#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
731
732#define ACPI_MADT_TRIGGER_CONFORMS (0)
733#define ACPI_MADT_TRIGGER_EDGE (1<<2)
734#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
735#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
736
737/*******************************************************************************
738 *
739 * MCFG - PCI Memory Mapped Configuration table and subtable
740 * Version 1
741 *
742 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
743 *
744 ******************************************************************************/
745
746struct acpi_table_mcfg {
747 struct acpi_table_header header; /* Common ACPI table header */
748 u8 reserved[8];
749};
750
751/* Subtable */
752
753struct acpi_mcfg_allocation {
754 u64 address; /* Base address, processor-relative */
755 u16 pci_segment; /* PCI segment group number */
756 u8 start_bus_number; /* Starting PCI Bus number */
757 u8 end_bus_number; /* Final PCI Bus number */
758 u32 reserved;
759};
760
761/*******************************************************************************
762 *
763 * MCHI - Management Controller Host Interface Table
764 * Version 1
765 *
766 * Conforms to "Management Component Transport Protocol (MCTP) Host
767 * Interface Specification", Revision 1.0.0a, October 13, 2009
768 *
769 ******************************************************************************/
770
771struct acpi_table_mchi {
772 struct acpi_table_header header; /* Common ACPI table header */
773 u8 interface_type;
774 u8 protocol;
775 u64 protocol_data;
776 u8 interrupt_type;
777 u8 gpe;
778 u8 pci_device_flag;
779 u32 global_interrupt;
780 struct acpi_generic_address control_register;
781 u8 pci_segment;
782 u8 pci_bus;
783 u8 pci_device;
784 u8 pci_function;
785};
786
787/*******************************************************************************
788 *
789 * MPST - Memory Power State Table (ACPI 5.0)
790 * Version 1
791 *
792 ******************************************************************************/
793
794#define ACPI_MPST_CHANNEL_INFO \
795 u8 channel_id; \
796 u8 reserved1[3]; \
797 u16 power_node_count; \
798 u16 reserved2;
799
800/* Main table */
801
802struct acpi_table_mpst {
803 struct acpi_table_header header; /* Common ACPI table header */
804 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
805};
806
807/* Memory Platform Communication Channel Info */
808
809struct acpi_mpst_channel {
810 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
811};
812
813/* Memory Power Node Structure */
814
815struct acpi_mpst_power_node {
816 u8 flags;
817 u8 reserved1;
818 u16 node_id;
819 u32 length;
820 u64 range_address;
821 u64 range_length;
822 u32 num_power_states;
823 u32 num_physical_components;
824};
825
826/* Values for Flags field above */
827
828#define ACPI_MPST_ENABLED 1
829#define ACPI_MPST_POWER_MANAGED 2
830#define ACPI_MPST_HOT_PLUG_CAPABLE 4
831
832/* Memory Power State Structure (follows POWER_NODE above) */
833
834struct acpi_mpst_power_state {
835 u8 power_state;
836 u8 info_index;
837};
838
839/* Physical Component ID Structure (follows POWER_STATE above) */
840
841struct acpi_mpst_component {
842 u16 component_id;
843};
844
845/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
846
847struct acpi_mpst_data_hdr {
848 u16 characteristics_count;
849 u16 reserved;
850};
851
852struct acpi_mpst_power_data {
853 u8 structure_id;
854 u8 flags;
855 u16 reserved1;
856 u32 average_power;
857 u32 power_saving;
858 u64 exit_latency;
859 u64 reserved2;
860};
861
862/* Values for Flags field above */
863
864#define ACPI_MPST_PRESERVE 1
865#define ACPI_MPST_AUTOENTRY 2
866#define ACPI_MPST_AUTOEXIT 4
867
868/* Shared Memory Region (not part of an ACPI table) */
869
870struct acpi_mpst_shared {
871 u32 signature;
872 u16 pcc_command;
873 u16 pcc_status;
874 u32 command_register;
875 u32 status_register;
876 u32 power_state_id;
877 u32 power_node_id;
878 u64 energy_consumed;
879 u64 average_power;
880};
881
882/*******************************************************************************
883 *
884 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
885 * Version 1
886 *
887 ******************************************************************************/
888
889struct acpi_table_msct {
890 struct acpi_table_header header; /* Common ACPI table header */
891 u32 proximity_offset; /* Location of proximity info struct(s) */
892 u32 max_proximity_domains; /* Max number of proximity domains */
893 u32 max_clock_domains; /* Max number of clock domains */
894 u64 max_address; /* Max physical address in system */
895};
896
897/* subtable - Maximum Proximity Domain Information. Version 1 */
898
899struct acpi_msct_proximity {
900 u8 revision;
901 u8 length;
902 u32 range_start; /* Start of domain range */
903 u32 range_end; /* End of domain range */
904 u32 processor_capacity;
905 u64 memory_capacity; /* In bytes */
906};
907
908/*******************************************************************************
909 *
910 * MSDM - Microsoft Data Management table
911 *
912 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
913 * November 29, 2011. Copyright 2011 Microsoft
914 *
915 ******************************************************************************/
916
917/* Basic MSDM table is only the common ACPI header */
918
919struct acpi_table_msdm {
920 struct acpi_table_header header; /* Common ACPI table header */
921};
922
923/*******************************************************************************
924 *
925 * MTMR - MID Timer Table
926 * Version 1
927 *
928 * Conforms to "Simple Firmware Interface Specification",
929 * Draft 0.8.2, Oct 19, 2010
930 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
931 *
932 ******************************************************************************/
933
934struct acpi_table_mtmr {
935 struct acpi_table_header header; /* Common ACPI table header */
936};
937
938/* MTMR entry */
939
940struct acpi_mtmr_entry {
941 struct acpi_generic_address physical_address;
942 u32 frequency;
943 u32 irq;
944};
945
946/*******************************************************************************
947 *
948 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
949 * Version 1
950 *
951 ******************************************************************************/
952
953struct acpi_table_nfit {
954 struct acpi_table_header header; /* Common ACPI table header */
955 u32 reserved; /* Reserved, must be zero */
956};
957
958/* Subtable header for NFIT */
959
960struct acpi_nfit_header {
961 u16 type;
962 u16 length;
963};
964
965/* Values for subtable type in struct acpi_nfit_header */
966
967enum acpi_nfit_type {
968 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
969 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
970 ACPI_NFIT_TYPE_INTERLEAVE = 2,
971 ACPI_NFIT_TYPE_SMBIOS = 3,
972 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
973 ACPI_NFIT_TYPE_DATA_REGION = 5,
974 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
975 ACPI_NFIT_TYPE_CAPABILITIES = 7,
976 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
977};
978
979/*
980 * NFIT Subtables
981 */
982
983/* 0: System Physical Address Range Structure */
984
985struct acpi_nfit_system_address {
986 struct acpi_nfit_header header;
987 u16 range_index;
988 u16 flags;
989 u32 reserved; /* Reserved, must be zero */
990 u32 proximity_domain;
991 u8 range_guid[16];
992 u64 address;
993 u64 length;
994 u64 memory_mapping;
995};
996
997/* Flags */
998
999#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1000#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1001
1002/* Range Type GUIDs appear in the include/acuuid.h file */
1003
1004/* 1: Memory Device to System Address Range Map Structure */
1005
1006struct acpi_nfit_memory_map {
1007 struct acpi_nfit_header header;
1008 u32 device_handle;
1009 u16 physical_id;
1010 u16 region_id;
1011 u16 range_index;
1012 u16 region_index;
1013 u64 region_size;
1014 u64 region_offset;
1015 u64 address;
1016 u16 interleave_index;
1017 u16 interleave_ways;
1018 u16 flags;
1019 u16 reserved; /* Reserved, must be zero */
1020};
1021
1022/* Flags */
1023
1024#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1025#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1026#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1027#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1028#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1029#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1030#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1031
1032/* 2: Interleave Structure */
1033
1034struct acpi_nfit_interleave {
1035 struct acpi_nfit_header header;
1036 u16 interleave_index;
1037 u16 reserved; /* Reserved, must be zero */
1038 u32 line_count;
1039 u32 line_size;
1040 u32 line_offset[1]; /* Variable length */
1041};
1042
1043/* 3: SMBIOS Management Information Structure */
1044
1045struct acpi_nfit_smbios {
1046 struct acpi_nfit_header header;
1047 u32 reserved; /* Reserved, must be zero */
1048 u8 data[1]; /* Variable length */
1049};
1050
1051/* 4: NVDIMM Control Region Structure */
1052
1053struct acpi_nfit_control_region {
1054 struct acpi_nfit_header header;
1055 u16 region_index;
1056 u16 vendor_id;
1057 u16 device_id;
1058 u16 revision_id;
1059 u16 subsystem_vendor_id;
1060 u16 subsystem_device_id;
1061 u16 subsystem_revision_id;
1062 u8 valid_fields;
1063 u8 manufacturing_location;
1064 u16 manufacturing_date;
1065 u8 reserved[2]; /* Reserved, must be zero */
1066 u32 serial_number;
1067 u16 code;
1068 u16 windows;
1069 u64 window_size;
1070 u64 command_offset;
1071 u64 command_size;
1072 u64 status_offset;
1073 u64 status_size;
1074 u16 flags;
1075 u8 reserved1[6]; /* Reserved, must be zero */
1076};
1077
1078/* Flags */
1079
1080#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1081
1082/* valid_fields bits */
1083
1084#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1085
1086/* 5: NVDIMM Block Data Window Region Structure */
1087
1088struct acpi_nfit_data_region {
1089 struct acpi_nfit_header header;
1090 u16 region_index;
1091 u16 windows;
1092 u64 offset;
1093 u64 size;
1094 u64 capacity;
1095 u64 start_address;
1096};
1097
1098/* 6: Flush Hint Address Structure */
1099
1100struct acpi_nfit_flush_address {
1101 struct acpi_nfit_header header;
1102 u32 device_handle;
1103 u16 hint_count;
1104 u8 reserved[6]; /* Reserved, must be zero */
1105 u64 hint_address[1]; /* Variable length */
1106};
1107
1108/* 7: Platform Capabilities Structure */
1109
1110struct acpi_nfit_capabilities {
1111 struct acpi_nfit_header header;
1112 u8 highest_capability;
1113 u8 reserved[3]; /* Reserved, must be zero */
1114 u32 capabilities;
1115 u32 reserved2;
1116};
1117
1118/* Capabilities Flags */
1119
1120#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1121#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1122#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1123
1124/*
1125 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1126 */
1127struct nfit_device_handle {
1128 u32 handle;
1129};
1130
1131/* Device handle construction and extraction macros */
1132
1133#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1134#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1135#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1136#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1137#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1138
1139#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1140#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1141#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1142#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1143#define ACPI_NFIT_NODE_ID_OFFSET 16
1144
1145/* Macro to construct a NFIT/NVDIMM device handle */
1146
1147#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1148 ((dimm) | \
1149 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1150 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1151 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1152 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1153
1154/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1155
1156#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1157 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1158
1159#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1160 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1161
1162#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1163 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1164
1165#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1166 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1167
1168#define ACPI_NFIT_GET_NODE_ID(handle) \
1169 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1170
1171/*******************************************************************************
1172 *
1173 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1174 * Version 2 (ACPI 6.2)
1175 *
1176 ******************************************************************************/
1177
1178struct acpi_table_pcct {
1179 struct acpi_table_header header; /* Common ACPI table header */
1180 u32 flags;
1181 u64 reserved;
1182};
1183
1184/* Values for Flags field above */
1185
1186#define ACPI_PCCT_DOORBELL 1
1187
1188/* Values for subtable type in struct acpi_subtable_header */
1189
1190enum acpi_pcct_type {
1191 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1192 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1193 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1194 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1195 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1196 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
1197};
1198
1199/*
1200 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1201 */
1202
1203/* 0: Generic Communications Subspace */
1204
1205struct acpi_pcct_subspace {
1206 struct acpi_subtable_header header;
1207 u8 reserved[6];
1208 u64 base_address;
1209 u64 length;
1210 struct acpi_generic_address doorbell_register;
1211 u64 preserve_mask;
1212 u64 write_mask;
1213 u32 latency;
1214 u32 max_access_rate;
1215 u16 min_turnaround_time;
1216};
1217
1218/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1219
1220struct acpi_pcct_hw_reduced {
1221 struct acpi_subtable_header header;
1222 u32 platform_interrupt;
1223 u8 flags;
1224 u8 reserved;
1225 u64 base_address;
1226 u64 length;
1227 struct acpi_generic_address doorbell_register;
1228 u64 preserve_mask;
1229 u64 write_mask;
1230 u32 latency;
1231 u32 max_access_rate;
1232 u16 min_turnaround_time;
1233};
1234
1235/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1236
1237struct acpi_pcct_hw_reduced_type2 {
1238 struct acpi_subtable_header header;
1239 u32 platform_interrupt;
1240 u8 flags;
1241 u8 reserved;
1242 u64 base_address;
1243 u64 length;
1244 struct acpi_generic_address doorbell_register;
1245 u64 preserve_mask;
1246 u64 write_mask;
1247 u32 latency;
1248 u32 max_access_rate;
1249 u16 min_turnaround_time;
1250 struct acpi_generic_address platform_ack_register;
1251 u64 ack_preserve_mask;
1252 u64 ack_write_mask;
1253};
1254
1255/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1256
1257struct acpi_pcct_ext_pcc_master {
1258 struct acpi_subtable_header header;
1259 u32 platform_interrupt;
1260 u8 flags;
1261 u8 reserved1;
1262 u64 base_address;
1263 u32 length;
1264 struct acpi_generic_address doorbell_register;
1265 u64 preserve_mask;
1266 u64 write_mask;
1267 u32 latency;
1268 u32 max_access_rate;
1269 u32 min_turnaround_time;
1270 struct acpi_generic_address platform_ack_register;
1271 u64 ack_preserve_mask;
1272 u64 ack_set_mask;
1273 u64 reserved2;
1274 struct acpi_generic_address cmd_complete_register;
1275 u64 cmd_complete_mask;
1276 struct acpi_generic_address cmd_update_register;
1277 u64 cmd_update_preserve_mask;
1278 u64 cmd_update_set_mask;
1279 struct acpi_generic_address error_status_register;
1280 u64 error_status_mask;
1281};
1282
1283/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1284
1285struct acpi_pcct_ext_pcc_slave {
1286 struct acpi_subtable_header header;
1287 u32 platform_interrupt;
1288 u8 flags;
1289 u8 reserved1;
1290 u64 base_address;
1291 u32 length;
1292 struct acpi_generic_address doorbell_register;
1293 u64 preserve_mask;
1294 u64 write_mask;
1295 u32 latency;
1296 u32 max_access_rate;
1297 u32 min_turnaround_time;
1298 struct acpi_generic_address platform_ack_register;
1299 u64 ack_preserve_mask;
1300 u64 ack_set_mask;
1301 u64 reserved2;
1302 struct acpi_generic_address cmd_complete_register;
1303 u64 cmd_complete_mask;
1304 struct acpi_generic_address cmd_update_register;
1305 u64 cmd_update_preserve_mask;
1306 u64 cmd_update_set_mask;
1307 struct acpi_generic_address error_status_register;
1308 u64 error_status_mask;
1309};
1310
1311/* Values for doorbell flags above */
1312
1313#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1314#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1315
1316/*
1317 * PCC memory structures (not part of the ACPI table)
1318 */
1319
1320/* Shared Memory Region */
1321
1322struct acpi_pcct_shared_memory {
1323 u32 signature;
1324 u16 command;
1325 u16 status;
1326};
1327
1328/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1329
1330struct acpi_pcct_ext_pcc_shared_memory {
1331 u32 signature;
1332 u32 flags;
1333 u32 length;
1334 u32 command;
1335};
1336
1337/*******************************************************************************
1338 *
1339 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1340 * Version 0
1341 *
1342 ******************************************************************************/
1343
1344struct acpi_table_pdtt {
1345 struct acpi_table_header header; /* Common ACPI table header */
1346 u8 trigger_count;
1347 u8 reserved[3];
1348 u32 array_offset;
1349};
1350
1351/*
1352 * PDTT Communication Channel Identifier Structure.
1353 * The number of these structures is defined by trigger_count above,
1354 * starting at array_offset.
1355 */
1356struct acpi_pdtt_channel {
1357 u8 subchannel_id;
1358 u8 flags;
1359};
1360
1361/* Flags for above */
1362
1363#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1364#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1365#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1366
1367/*******************************************************************************
1368 *
1369 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1370 * Version 1
1371 *
1372 ******************************************************************************/
1373
1374struct acpi_table_pmtt {
1375 struct acpi_table_header header; /* Common ACPI table header */
1376 u32 reserved;
1377};
1378
1379/* Common header for PMTT subtables that follow main table */
1380
1381struct acpi_pmtt_header {
1382 u8 type;
1383 u8 reserved1;
1384 u16 length;
1385 u16 flags;
1386 u16 reserved2;
1387};
1388
1389/* Values for Type field above */
1390
1391#define ACPI_PMTT_TYPE_SOCKET 0
1392#define ACPI_PMTT_TYPE_CONTROLLER 1
1393#define ACPI_PMTT_TYPE_DIMM 2
1394#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1395
1396/* Values for Flags field above */
1397
1398#define ACPI_PMTT_TOP_LEVEL 0x0001
1399#define ACPI_PMTT_PHYSICAL 0x0002
1400#define ACPI_PMTT_MEMORY_TYPE 0x000C
1401
1402/*
1403 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1404 */
1405
1406/* 0: Socket Structure */
1407
1408struct acpi_pmtt_socket {
1409 struct acpi_pmtt_header header;
1410 u16 socket_id;
1411 u16 reserved;
1412};
1413
1414/* 1: Memory Controller subtable */
1415
1416struct acpi_pmtt_controller {
1417 struct acpi_pmtt_header header;
1418 u32 read_latency;
1419 u32 write_latency;
1420 u32 read_bandwidth;
1421 u32 write_bandwidth;
1422 u16 access_width;
1423 u16 alignment;
1424 u16 reserved;
1425 u16 domain_count;
1426};
1427
1428/* 1a: Proximity Domain substructure */
1429
1430struct acpi_pmtt_domain {
1431 u32 proximity_domain;
1432};
1433
1434/* 2: Physical Component Identifier (DIMM) */
1435
1436struct acpi_pmtt_physical_component {
1437 struct acpi_pmtt_header header;
1438 u16 component_id;
1439 u16 reserved;
1440 u32 memory_size;
1441 u32 bios_handle;
1442};
1443
1444/*******************************************************************************
1445 *
1446 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1447 * Version 1
1448 *
1449 ******************************************************************************/
1450
1451struct acpi_table_pptt {
1452 struct acpi_table_header header; /* Common ACPI table header */
1453};
1454
1455/* Values for Type field above */
1456
1457enum acpi_pptt_type {
1458 ACPI_PPTT_TYPE_PROCESSOR = 0,
1459 ACPI_PPTT_TYPE_CACHE = 1,
1460 ACPI_PPTT_TYPE_ID = 2,
1461 ACPI_PPTT_TYPE_RESERVED = 3
1462};
1463
1464/* 0: Processor Hierarchy Node Structure */
1465
1466struct acpi_pptt_processor {
1467 struct acpi_subtable_header header;
1468 u16 reserved;
1469 u32 flags;
1470 u32 parent;
1471 u32 acpi_processor_id;
1472 u32 number_of_priv_resources;
1473};
1474
1475/* Flags */
1476
1477#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1478#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1479#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1480#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1481#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
1482
1483/* 1: Cache Type Structure */
1484
1485struct acpi_pptt_cache {
1486 struct acpi_subtable_header header;
1487 u16 reserved;
1488 u32 flags;
1489 u32 next_level_of_cache;
1490 u32 size;
1491 u32 number_of_sets;
1492 u8 associativity;
1493 u8 attributes;
1494 u16 line_size;
1495};
1496
1497/* Flags */
1498
1499#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1500#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1501#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1502#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1503#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1504#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1505#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1506
1507/* Masks for Attributes */
1508
1509#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1510#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1511#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1512
1513/* Attributes describing cache */
1514#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1515#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1516#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1517#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1518
1519#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1520#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1521#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1522#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1523
1524#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1525#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1526
1527/* 2: ID Structure */
1528
1529struct acpi_pptt_id {
1530 struct acpi_subtable_header header;
1531 u16 reserved;
1532 u32 vendor_id;
1533 u64 level1_id;
1534 u64 level2_id;
1535 u16 major_rev;
1536 u16 minor_rev;
1537 u16 spin_rev;
1538};
1539
1540/*******************************************************************************
1541 *
1542 * RASF - RAS Feature Table (ACPI 5.0)
1543 * Version 1
1544 *
1545 ******************************************************************************/
1546
1547struct acpi_table_rasf {
1548 struct acpi_table_header header; /* Common ACPI table header */
1549 u8 channel_id[12];
1550};
1551
1552/* RASF Platform Communication Channel Shared Memory Region */
1553
1554struct acpi_rasf_shared_memory {
1555 u32 signature;
1556 u16 command;
1557 u16 status;
1558 u16 version;
1559 u8 capabilities[16];
1560 u8 set_capabilities[16];
1561 u16 num_parameter_blocks;
1562 u32 set_capabilities_status;
1563};
1564
1565/* RASF Parameter Block Structure Header */
1566
1567struct acpi_rasf_parameter_block {
1568 u16 type;
1569 u16 version;
1570 u16 length;
1571};
1572
1573/* RASF Parameter Block Structure for PATROL_SCRUB */
1574
1575struct acpi_rasf_patrol_scrub_parameter {
1576 struct acpi_rasf_parameter_block header;
1577 u16 patrol_scrub_command;
1578 u64 requested_address_range[2];
1579 u64 actual_address_range[2];
1580 u16 flags;
1581 u8 requested_speed;
1582};
1583
1584/* Masks for Flags and Speed fields above */
1585
1586#define ACPI_RASF_SCRUBBER_RUNNING 1
1587#define ACPI_RASF_SPEED (7<<1)
1588#define ACPI_RASF_SPEED_SLOW (0<<1)
1589#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1590#define ACPI_RASF_SPEED_FAST (7<<1)
1591
1592/* Channel Commands */
1593
1594enum acpi_rasf_commands {
1595 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1596};
1597
1598/* Platform RAS Capabilities */
1599
1600enum acpi_rasf_capabiliities {
1601 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1602 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1603};
1604
1605/* Patrol Scrub Commands */
1606
1607enum acpi_rasf_patrol_scrub_commands {
1608 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1609 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1610 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1611};
1612
1613/* Channel Command flags */
1614
1615#define ACPI_RASF_GENERATE_SCI (1<<15)
1616
1617/* Status values */
1618
1619enum acpi_rasf_status {
1620 ACPI_RASF_SUCCESS = 0,
1621 ACPI_RASF_NOT_VALID = 1,
1622 ACPI_RASF_NOT_SUPPORTED = 2,
1623 ACPI_RASF_BUSY = 3,
1624 ACPI_RASF_FAILED = 4,
1625 ACPI_RASF_ABORTED = 5,
1626 ACPI_RASF_INVALID_DATA = 6
1627};
1628
1629/* Status flags */
1630
1631#define ACPI_RASF_COMMAND_COMPLETE (1)
1632#define ACPI_RASF_SCI_DOORBELL (1<<1)
1633#define ACPI_RASF_ERROR (1<<2)
1634#define ACPI_RASF_STATUS (0x1F<<3)
1635
1636/*******************************************************************************
1637 *
1638 * SBST - Smart Battery Specification Table
1639 * Version 1
1640 *
1641 ******************************************************************************/
1642
1643struct acpi_table_sbst {
1644 struct acpi_table_header header; /* Common ACPI table header */
1645 u32 warning_level;
1646 u32 low_level;
1647 u32 critical_level;
1648};
1649
1650/*******************************************************************************
1651 *
1652 * SDEI - Software Delegated Exception Interface Descriptor Table
1653 *
1654 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1655 * May 8th, 2017. Copyright 2017 ARM Ltd.
1656 *
1657 ******************************************************************************/
1658
1659struct acpi_table_sdei {
1660 struct acpi_table_header header; /* Common ACPI table header */
1661};
1662
1663/*******************************************************************************
1664 *
1665 * SDEV - Secure Devices Table (ACPI 6.2)
1666 * Version 1
1667 *
1668 ******************************************************************************/
1669
1670struct acpi_table_sdev {
1671 struct acpi_table_header header; /* Common ACPI table header */
1672};
1673
1674struct acpi_sdev_header {
1675 u8 type;
1676 u8 flags;
1677 u16 length;
1678};
1679
1680/* Values for subtable type above */
1681
1682enum acpi_sdev_type {
1683 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1684 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1685 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1686};
1687
1688/* Values for flags above */
1689
1690#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
1691
1692/*
1693 * SDEV subtables
1694 */
1695
1696/* 0: Namespace Device Based Secure Device Structure */
1697
1698struct acpi_sdev_namespace {
1699 struct acpi_sdev_header header;
1700 u16 device_id_offset;
1701 u16 device_id_length;
1702 u16 vendor_data_offset;
1703 u16 vendor_data_length;
1704};
1705
1706/* 1: PCIe Endpoint Device Based Device Structure */
1707
1708struct acpi_sdev_pcie {
1709 struct acpi_sdev_header header;
1710 u16 segment;
1711 u16 start_bus;
1712 u16 path_offset;
1713 u16 path_length;
1714 u16 vendor_data_offset;
1715 u16 vendor_data_length;
1716};
1717
1718/* 1a: PCIe Endpoint path entry */
1719
1720struct acpi_sdev_pcie_path {
1721 u8 device;
1722 u8 function;
1723};
1724
1725/* Reset to default packing */
1726
1727#pragma pack()
1728
1729#endif /* __ACTBL2_H__ */
1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *
6 * Copyright (C) 2000 - 2022, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28#define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
29#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
30#define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
31#define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
32#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
33#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
34#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
35#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
36#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
37#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
38#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
39#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
40#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
41#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
42#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
43#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
44#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
45#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
46#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
47#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
48#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
49#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
50#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
51#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
52#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
53#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
54#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
55
56/*
57 * All tables must be byte-packed to match the ACPI specification, since
58 * the tables are provided by the system BIOS.
59 */
60#pragma pack(1)
61
62/*
63 * Note: C bitfields are not used for this reason:
64 *
65 * "Bitfields are great and easy to read, but unfortunately the C language
66 * does not specify the layout of bitfields in memory, which means they are
67 * essentially useless for dealing with packed data in on-disk formats or
68 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
69 * this decision was a design error in C. Ritchie could have picked an order
70 * and stuck with it." Norman Ramsey.
71 * See http://stackoverflow.com/a/1053662/41661
72 */
73
74/*******************************************************************************
75 *
76 * AEST - Arm Error Source Table
77 *
78 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document
79 * September 2020.
80 *
81 ******************************************************************************/
82
83struct acpi_table_aest {
84 struct acpi_table_header header;
85 void *node_array[];
86};
87
88/* Common Subtable header - one per Node Structure (Subtable) */
89
90struct acpi_aest_hdr {
91 u8 type;
92 u16 length;
93 u8 reserved;
94 u32 node_specific_offset;
95 u32 node_interface_offset;
96 u32 node_interrupt_offset;
97 u32 node_interrupt_count;
98 u64 timestamp_rate;
99 u64 reserved1;
100 u64 error_injection_rate;
101};
102
103/* Values for Type above */
104
105#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
106#define ACPI_AEST_MEMORY_ERROR_NODE 1
107#define ACPI_AEST_SMMU_ERROR_NODE 2
108#define ACPI_AEST_VENDOR_ERROR_NODE 3
109#define ACPI_AEST_GIC_ERROR_NODE 4
110#define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */
111
112/*
113 * AEST subtables (Error nodes)
114 */
115
116/* 0: Processor Error */
117
118typedef struct acpi_aest_processor {
119 u32 processor_id;
120 u8 resource_type;
121 u8 reserved;
122 u8 flags;
123 u8 revision;
124 u64 processor_affinity;
125
126} acpi_aest_processor;
127
128/* Values for resource_type above, related structs below */
129
130#define ACPI_AEST_CACHE_RESOURCE 0
131#define ACPI_AEST_TLB_RESOURCE 1
132#define ACPI_AEST_GENERIC_RESOURCE 2
133#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
134
135/* 0R: Processor Cache Resource Substructure */
136
137typedef struct acpi_aest_processor_cache {
138 u32 cache_reference;
139 u32 reserved;
140
141} acpi_aest_processor_cache;
142
143/* Values for cache_type above */
144
145#define ACPI_AEST_CACHE_DATA 0
146#define ACPI_AEST_CACHE_INSTRUCTION 1
147#define ACPI_AEST_CACHE_UNIFIED 2
148#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
149
150/* 1R: Processor TLB Resource Substructure */
151
152typedef struct acpi_aest_processor_tlb {
153 u32 tlb_level;
154 u32 reserved;
155
156} acpi_aest_processor_tlb;
157
158/* 2R: Processor Generic Resource Substructure */
159
160typedef struct acpi_aest_processor_generic {
161 u32 resource;
162
163} acpi_aest_processor_generic;
164
165/* 1: Memory Error */
166
167typedef struct acpi_aest_memory {
168 u32 srat_proximity_domain;
169
170} acpi_aest_memory;
171
172/* 2: Smmu Error */
173
174typedef struct acpi_aest_smmu {
175 u32 iort_node_reference;
176 u32 subcomponent_reference;
177
178} acpi_aest_smmu;
179
180/* 3: Vendor Defined */
181
182typedef struct acpi_aest_vendor {
183 u32 acpi_hid;
184 u32 acpi_uid;
185 u8 vendor_specific_data[16];
186
187} acpi_aest_vendor;
188
189/* 4: Gic Error */
190
191typedef struct acpi_aest_gic {
192 u32 interface_type;
193 u32 instance_id;
194
195} acpi_aest_gic;
196
197/* Values for interface_type above */
198
199#define ACPI_AEST_GIC_CPU 0
200#define ACPI_AEST_GIC_DISTRIBUTOR 1
201#define ACPI_AEST_GIC_REDISTRIBUTOR 2
202#define ACPI_AEST_GIC_ITS 3
203#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
204
205/* Node Interface Structure */
206
207typedef struct acpi_aest_node_interface {
208 u8 type;
209 u8 reserved[3];
210 u32 flags;
211 u64 address;
212 u32 error_record_index;
213 u32 error_record_count;
214 u64 error_record_implemented;
215 u64 error_status_reporting;
216 u64 addressing_mode;
217
218} acpi_aest_node_interface;
219
220/* Values for Type field above */
221
222#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
223#define ACPI_AEST_NODE_MEMORY_MAPPED 1
224#define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */
225
226/* Node Interrupt Structure */
227
228typedef struct acpi_aest_node_interrupt {
229 u8 type;
230 u8 reserved[2];
231 u8 flags;
232 u32 gsiv;
233 u8 iort_id;
234 u8 reserved1[3];
235
236} acpi_aest_node_interrupt;
237
238/* Values for Type field above */
239
240#define ACPI_AEST_NODE_FAULT_HANDLING 0
241#define ACPI_AEST_NODE_ERROR_RECOVERY 1
242#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
243
244/*******************************************************************************
245 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
246 *
247 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
248 * ARM DEN0093 v1.1
249 *
250 ******************************************************************************/
251struct acpi_table_agdi {
252 struct acpi_table_header header; /* Common ACPI table header */
253 u8 flags;
254 u8 reserved[3];
255 u32 sdei_event;
256 u32 gsiv;
257};
258
259/* Mask for Flags field above */
260
261#define ACPI_AGDI_SIGNALING_MODE (1)
262
263/*******************************************************************************
264 *
265 * APMT - ARM Performance Monitoring Unit Table
266 *
267 * Conforms to:
268 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
269 * ARM DEN0117 v1.0 November 25, 2021
270 *
271 ******************************************************************************/
272
273struct acpi_table_apmt {
274 struct acpi_table_header header; /* Common ACPI table header */
275};
276
277#define ACPI_APMT_NODE_ID_LENGTH 4
278
279/*
280 * APMT subtables
281 */
282struct acpi_apmt_node {
283 u16 length;
284 u8 flags;
285 u8 type;
286 u32 id;
287 u64 inst_primary;
288 u32 inst_secondary;
289 u64 base_address0;
290 u64 base_address1;
291 u32 ovflw_irq;
292 u32 reserved;
293 u32 ovflw_irq_flags;
294 u32 proc_affinity;
295 u32 impl_id;
296};
297
298/* Masks for Flags field above */
299
300#define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
301#define ACPI_APMT_FLAGS_AFFINITY (1<<1)
302#define ACPI_APMT_FLAGS_ATOMIC (1<<2)
303
304/* Values for Flags dual page field above */
305
306#define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
307#define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
308
309/* Values for Flags processor affinity field above */
310#define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
311#define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
312
313/* Values for Flags 64-bit atomic field above */
314#define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
315#define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
316
317/* Values for Type field above */
318
319enum acpi_apmt_node_type {
320 ACPI_APMT_NODE_TYPE_MC = 0x00,
321 ACPI_APMT_NODE_TYPE_SMMU = 0x01,
322 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
323 ACPI_APMT_NODE_TYPE_ACPI = 0x03,
324 ACPI_APMT_NODE_TYPE_CACHE = 0x04,
325 ACPI_APMT_NODE_TYPE_COUNT
326};
327
328/* Masks for ovflw_irq_flags field above */
329
330#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
331#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
332
333/* Values for ovflw_irq_flags mode field above */
334
335#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
336#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
337
338/* Values for ovflw_irq_flags type field above */
339
340#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
341
342/*******************************************************************************
343 *
344 * BDAT - BIOS Data ACPI Table
345 *
346 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
347 * Nov 2020
348 *
349 ******************************************************************************/
350
351struct acpi_table_bdat {
352 struct acpi_table_header header;
353 struct acpi_generic_address gas;
354};
355
356/*******************************************************************************
357 *
358 * CCEL - CC-Event Log
359 * From: "Guest-Host-Communication Interface (GHCI) for Intel
360 * Trust Domain Extensions (Intel TDX)". Feb 2022
361 *
362 ******************************************************************************/
363
364struct acpi_table_ccel {
365 struct acpi_table_header header; /* Common ACPI table header */
366 u8 CCtype;
367 u8 Ccsub_type;
368 u16 reserved;
369 u64 log_area_minimum_length;
370 u64 log_area_start_address;
371};
372
373/*******************************************************************************
374 *
375 * IORT - IO Remapping Table
376 *
377 * Conforms to "IO Remapping Table System Software on ARM Platforms",
378 * Document number: ARM DEN 0049E.e, Sep 2022
379 *
380 ******************************************************************************/
381
382struct acpi_table_iort {
383 struct acpi_table_header header;
384 u32 node_count;
385 u32 node_offset;
386 u32 reserved;
387};
388
389/*
390 * IORT subtables
391 */
392struct acpi_iort_node {
393 u8 type;
394 u16 length;
395 u8 revision;
396 u32 identifier;
397 u32 mapping_count;
398 u32 mapping_offset;
399 char node_data[1];
400};
401
402/* Values for subtable Type above */
403
404enum acpi_iort_node_type {
405 ACPI_IORT_NODE_ITS_GROUP = 0x00,
406 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
407 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
408 ACPI_IORT_NODE_SMMU = 0x03,
409 ACPI_IORT_NODE_SMMU_V3 = 0x04,
410 ACPI_IORT_NODE_PMCG = 0x05,
411 ACPI_IORT_NODE_RMR = 0x06,
412};
413
414struct acpi_iort_id_mapping {
415 u32 input_base; /* Lowest value in input range */
416 u32 id_count; /* Number of IDs */
417 u32 output_base; /* Lowest value in output range */
418 u32 output_reference; /* A reference to the output node */
419 u32 flags;
420};
421
422/* Masks for Flags field above for IORT subtable */
423
424#define ACPI_IORT_ID_SINGLE_MAPPING (1)
425
426struct acpi_iort_memory_access {
427 u32 cache_coherency;
428 u8 hints;
429 u16 reserved;
430 u8 memory_flags;
431};
432
433/* Values for cache_coherency field above */
434
435#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
436#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
437
438/* Masks for Hints field above */
439
440#define ACPI_IORT_HT_TRANSIENT (1)
441#define ACPI_IORT_HT_WRITE (1<<1)
442#define ACPI_IORT_HT_READ (1<<2)
443#define ACPI_IORT_HT_OVERRIDE (1<<3)
444
445/* Masks for memory_flags field above */
446
447#define ACPI_IORT_MF_COHERENCY (1)
448#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
449
450/*
451 * IORT node specific subtables
452 */
453struct acpi_iort_its_group {
454 u32 its_count;
455 u32 identifiers[1]; /* GIC ITS identifier array */
456};
457
458struct acpi_iort_named_component {
459 u32 node_flags;
460 u64 memory_properties; /* Memory access properties */
461 u8 memory_address_limit; /* Memory address size limit */
462 char device_name[1]; /* Path of namespace object */
463};
464
465/* Masks for Flags field above */
466
467#define ACPI_IORT_NC_STALL_SUPPORTED (1)
468#define ACPI_IORT_NC_PASID_BITS (31<<1)
469
470struct acpi_iort_root_complex {
471 u64 memory_properties; /* Memory access properties */
472 u32 ats_attribute;
473 u32 pci_segment_number;
474 u8 memory_address_limit; /* Memory address size limit */
475 u16 pasid_capabilities; /* PASID Capabilities */
476 u8 reserved[1]; /* Reserved, must be zero */
477};
478
479/* Masks for ats_attribute field above */
480
481#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
482#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
483#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
484
485/* Masks for pasid_capabilities field above */
486#define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
487
488struct acpi_iort_smmu {
489 u64 base_address; /* SMMU base address */
490 u64 span; /* Length of memory range */
491 u32 model;
492 u32 flags;
493 u32 global_interrupt_offset;
494 u32 context_interrupt_count;
495 u32 context_interrupt_offset;
496 u32 pmu_interrupt_count;
497 u32 pmu_interrupt_offset;
498 u64 interrupts[1]; /* Interrupt array */
499};
500
501/* Values for Model field above */
502
503#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
504#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
505#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
506#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
507#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
508#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
509
510/* Masks for Flags field above */
511
512#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
513#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
514
515/* Global interrupt format */
516
517struct acpi_iort_smmu_gsi {
518 u32 nsg_irpt;
519 u32 nsg_irpt_flags;
520 u32 nsg_cfg_irpt;
521 u32 nsg_cfg_irpt_flags;
522};
523
524struct acpi_iort_smmu_v3 {
525 u64 base_address; /* SMMUv3 base address */
526 u32 flags;
527 u32 reserved;
528 u64 vatos_address;
529 u32 model;
530 u32 event_gsiv;
531 u32 pri_gsiv;
532 u32 gerr_gsiv;
533 u32 sync_gsiv;
534 u32 pxm;
535 u32 id_mapping_index;
536};
537
538/* Values for Model field above */
539
540#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
541#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
542#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
543
544/* Masks for Flags field above */
545
546#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
547#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
548#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
549#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
550
551struct acpi_iort_pmcg {
552 u64 page0_base_address;
553 u32 overflow_gsiv;
554 u32 node_reference;
555 u64 page1_base_address;
556};
557
558struct acpi_iort_rmr {
559 u32 flags;
560 u32 rmr_count;
561 u32 rmr_offset;
562};
563
564/* Masks for Flags field above */
565#define ACPI_IORT_RMR_REMAP_PERMITTED (1)
566#define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
567
568/*
569 * Macro to access the Access Attributes in flags field above:
570 * Access Attributes is encoded in bits 9:2
571 */
572#define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
573
574/* Values for above Access Attributes */
575
576#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
577#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
578#define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
579#define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
580#define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
581#define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
582
583struct acpi_iort_rmr_desc {
584 u64 base_address;
585 u64 length;
586 u32 reserved;
587};
588
589/*******************************************************************************
590 *
591 * IVRS - I/O Virtualization Reporting Structure
592 * Version 1
593 *
594 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
595 * Revision 1.26, February 2009.
596 *
597 ******************************************************************************/
598
599struct acpi_table_ivrs {
600 struct acpi_table_header header; /* Common ACPI table header */
601 u32 info; /* Common virtualization info */
602 u64 reserved;
603};
604
605/* Values for Info field above */
606
607#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
608#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
609#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
610
611/* IVRS subtable header */
612
613struct acpi_ivrs_header {
614 u8 type; /* Subtable type */
615 u8 flags;
616 u16 length; /* Subtable length */
617 u16 device_id; /* ID of IOMMU */
618};
619
620/* Values for subtable Type above */
621
622enum acpi_ivrs_type {
623 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
624 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
625 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
626 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
627 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
628 ACPI_IVRS_TYPE_MEMORY3 = 0x22
629};
630
631/* Masks for Flags field above for IVHD subtable */
632
633#define ACPI_IVHD_TT_ENABLE (1)
634#define ACPI_IVHD_PASS_PW (1<<1)
635#define ACPI_IVHD_RES_PASS_PW (1<<2)
636#define ACPI_IVHD_ISOC (1<<3)
637#define ACPI_IVHD_IOTLB (1<<4)
638
639/* Masks for Flags field above for IVMD subtable */
640
641#define ACPI_IVMD_UNITY (1)
642#define ACPI_IVMD_READ (1<<1)
643#define ACPI_IVMD_WRITE (1<<2)
644#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
645
646/*
647 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
648 */
649
650/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
651
652struct acpi_ivrs_hardware_10 {
653 struct acpi_ivrs_header header;
654 u16 capability_offset; /* Offset for IOMMU control fields */
655 u64 base_address; /* IOMMU control registers */
656 u16 pci_segment_group;
657 u16 info; /* MSI number and unit ID */
658 u32 feature_reporting;
659};
660
661/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
662
663struct acpi_ivrs_hardware_11 {
664 struct acpi_ivrs_header header;
665 u16 capability_offset; /* Offset for IOMMU control fields */
666 u64 base_address; /* IOMMU control registers */
667 u16 pci_segment_group;
668 u16 info; /* MSI number and unit ID */
669 u32 attributes;
670 u64 efr_register_image;
671 u64 reserved;
672};
673
674/* Masks for Info field above */
675
676#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
677#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
678
679/*
680 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
681 * Upper two bits of the Type field are the (encoded) length of the structure.
682 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
683 * are reserved for future use but not defined.
684 */
685struct acpi_ivrs_de_header {
686 u8 type;
687 u16 id;
688 u8 data_setting;
689};
690
691/* Length of device entry is in the top two bits of Type field above */
692
693#define ACPI_IVHD_ENTRY_LENGTH 0xC0
694
695/* Values for device entry Type field above */
696
697enum acpi_ivrs_device_entry_type {
698 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
699
700 ACPI_IVRS_TYPE_PAD4 = 0,
701 ACPI_IVRS_TYPE_ALL = 1,
702 ACPI_IVRS_TYPE_SELECT = 2,
703 ACPI_IVRS_TYPE_START = 3,
704 ACPI_IVRS_TYPE_END = 4,
705
706 /* 8-byte device entries */
707
708 ACPI_IVRS_TYPE_PAD8 = 64,
709 ACPI_IVRS_TYPE_NOT_USED = 65,
710 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
711 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
712 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
713 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
714 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
715
716 /* Variable-length device entries */
717
718 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
719};
720
721/* Values for Data field above */
722
723#define ACPI_IVHD_INIT_PASS (1)
724#define ACPI_IVHD_EINT_PASS (1<<1)
725#define ACPI_IVHD_NMI_PASS (1<<2)
726#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
727#define ACPI_IVHD_LINT0_PASS (1<<6)
728#define ACPI_IVHD_LINT1_PASS (1<<7)
729
730/* Types 0-4: 4-byte device entry */
731
732struct acpi_ivrs_device4 {
733 struct acpi_ivrs_de_header header;
734};
735
736/* Types 66-67: 8-byte device entry */
737
738struct acpi_ivrs_device8a {
739 struct acpi_ivrs_de_header header;
740 u8 reserved1;
741 u16 used_id;
742 u8 reserved2;
743};
744
745/* Types 70-71: 8-byte device entry */
746
747struct acpi_ivrs_device8b {
748 struct acpi_ivrs_de_header header;
749 u32 extended_data;
750};
751
752/* Values for extended_data above */
753
754#define ACPI_IVHD_ATS_DISABLED (1<<31)
755
756/* Type 72: 8-byte device entry */
757
758struct acpi_ivrs_device8c {
759 struct acpi_ivrs_de_header header;
760 u8 handle;
761 u16 used_id;
762 u8 variety;
763};
764
765/* Values for Variety field above */
766
767#define ACPI_IVHD_IOAPIC 1
768#define ACPI_IVHD_HPET 2
769
770/* Type 240: variable-length device entry */
771
772struct acpi_ivrs_device_hid {
773 struct acpi_ivrs_de_header header;
774 u64 acpi_hid;
775 u64 acpi_cid;
776 u8 uid_type;
777 u8 uid_length;
778};
779
780/* Values for uid_type above */
781
782#define ACPI_IVRS_UID_NOT_PRESENT 0
783#define ACPI_IVRS_UID_IS_INTEGER 1
784#define ACPI_IVRS_UID_IS_STRING 2
785
786/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
787
788struct acpi_ivrs_memory {
789 struct acpi_ivrs_header header;
790 u16 aux_data;
791 u64 reserved;
792 u64 start_address;
793 u64 memory_length;
794};
795
796/*******************************************************************************
797 *
798 * LPIT - Low Power Idle Table
799 *
800 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
801 *
802 ******************************************************************************/
803
804struct acpi_table_lpit {
805 struct acpi_table_header header; /* Common ACPI table header */
806};
807
808/* LPIT subtable header */
809
810struct acpi_lpit_header {
811 u32 type; /* Subtable type */
812 u32 length; /* Subtable length */
813 u16 unique_id;
814 u16 reserved;
815 u32 flags;
816};
817
818/* Values for subtable Type above */
819
820enum acpi_lpit_type {
821 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
822 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
823};
824
825/* Masks for Flags field above */
826
827#define ACPI_LPIT_STATE_DISABLED (1)
828#define ACPI_LPIT_NO_COUNTER (1<<1)
829
830/*
831 * LPIT subtables, correspond to Type in struct acpi_lpit_header
832 */
833
834/* 0x00: Native C-state instruction based LPI structure */
835
836struct acpi_lpit_native {
837 struct acpi_lpit_header header;
838 struct acpi_generic_address entry_trigger;
839 u32 residency;
840 u32 latency;
841 struct acpi_generic_address residency_counter;
842 u64 counter_frequency;
843};
844
845/*******************************************************************************
846 *
847 * MADT - Multiple APIC Description Table
848 * Version 3
849 *
850 ******************************************************************************/
851
852struct acpi_table_madt {
853 struct acpi_table_header header; /* Common ACPI table header */
854 u32 address; /* Physical address of local APIC */
855 u32 flags;
856};
857
858/* Masks for Flags field above */
859
860#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
861
862/* Values for PCATCompat flag */
863
864#define ACPI_MADT_DUAL_PIC 1
865#define ACPI_MADT_MULTIPLE_APIC 0
866
867/* Values for MADT subtable type in struct acpi_subtable_header */
868
869enum acpi_madt_type {
870 ACPI_MADT_TYPE_LOCAL_APIC = 0,
871 ACPI_MADT_TYPE_IO_APIC = 1,
872 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
873 ACPI_MADT_TYPE_NMI_SOURCE = 3,
874 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
875 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
876 ACPI_MADT_TYPE_IO_SAPIC = 6,
877 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
878 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
879 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
880 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
881 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
882 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
883 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
884 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
885 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
886 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
887 ACPI_MADT_TYPE_CORE_PIC = 17,
888 ACPI_MADT_TYPE_LIO_PIC = 18,
889 ACPI_MADT_TYPE_HT_PIC = 19,
890 ACPI_MADT_TYPE_EIO_PIC = 20,
891 ACPI_MADT_TYPE_MSI_PIC = 21,
892 ACPI_MADT_TYPE_BIO_PIC = 22,
893 ACPI_MADT_TYPE_LPC_PIC = 23,
894 ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */
895 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
896};
897
898/*
899 * MADT Subtables, correspond to Type in struct acpi_subtable_header
900 */
901
902/* 0: Processor Local APIC */
903
904struct acpi_madt_local_apic {
905 struct acpi_subtable_header header;
906 u8 processor_id; /* ACPI processor id */
907 u8 id; /* Processor's local APIC id */
908 u32 lapic_flags;
909};
910
911/* 1: IO APIC */
912
913struct acpi_madt_io_apic {
914 struct acpi_subtable_header header;
915 u8 id; /* I/O APIC ID */
916 u8 reserved; /* reserved - must be zero */
917 u32 address; /* APIC physical address */
918 u32 global_irq_base; /* Global system interrupt where INTI lines start */
919};
920
921/* 2: Interrupt Override */
922
923struct acpi_madt_interrupt_override {
924 struct acpi_subtable_header header;
925 u8 bus; /* 0 - ISA */
926 u8 source_irq; /* Interrupt source (IRQ) */
927 u32 global_irq; /* Global system interrupt */
928 u16 inti_flags;
929};
930
931/* 3: NMI Source */
932
933struct acpi_madt_nmi_source {
934 struct acpi_subtable_header header;
935 u16 inti_flags;
936 u32 global_irq; /* Global system interrupt */
937};
938
939/* 4: Local APIC NMI */
940
941struct acpi_madt_local_apic_nmi {
942 struct acpi_subtable_header header;
943 u8 processor_id; /* ACPI processor id */
944 u16 inti_flags;
945 u8 lint; /* LINTn to which NMI is connected */
946};
947
948/* 5: Address Override */
949
950struct acpi_madt_local_apic_override {
951 struct acpi_subtable_header header;
952 u16 reserved; /* Reserved, must be zero */
953 u64 address; /* APIC physical address */
954};
955
956/* 6: I/O Sapic */
957
958struct acpi_madt_io_sapic {
959 struct acpi_subtable_header header;
960 u8 id; /* I/O SAPIC ID */
961 u8 reserved; /* Reserved, must be zero */
962 u32 global_irq_base; /* Global interrupt for SAPIC start */
963 u64 address; /* SAPIC physical address */
964};
965
966/* 7: Local Sapic */
967
968struct acpi_madt_local_sapic {
969 struct acpi_subtable_header header;
970 u8 processor_id; /* ACPI processor id */
971 u8 id; /* SAPIC ID */
972 u8 eid; /* SAPIC EID */
973 u8 reserved[3]; /* Reserved, must be zero */
974 u32 lapic_flags;
975 u32 uid; /* Numeric UID - ACPI 3.0 */
976 char uid_string[1]; /* String UID - ACPI 3.0 */
977};
978
979/* 8: Platform Interrupt Source */
980
981struct acpi_madt_interrupt_source {
982 struct acpi_subtable_header header;
983 u16 inti_flags;
984 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
985 u8 id; /* Processor ID */
986 u8 eid; /* Processor EID */
987 u8 io_sapic_vector; /* Vector value for PMI interrupts */
988 u32 global_irq; /* Global system interrupt */
989 u32 flags; /* Interrupt Source Flags */
990};
991
992/* Masks for Flags field above */
993
994#define ACPI_MADT_CPEI_OVERRIDE (1)
995
996/* 9: Processor Local X2APIC (ACPI 4.0) */
997
998struct acpi_madt_local_x2apic {
999 struct acpi_subtable_header header;
1000 u16 reserved; /* reserved - must be zero */
1001 u32 local_apic_id; /* Processor x2APIC ID */
1002 u32 lapic_flags;
1003 u32 uid; /* ACPI processor UID */
1004};
1005
1006/* 10: Local X2APIC NMI (ACPI 4.0) */
1007
1008struct acpi_madt_local_x2apic_nmi {
1009 struct acpi_subtable_header header;
1010 u16 inti_flags;
1011 u32 uid; /* ACPI processor UID */
1012 u8 lint; /* LINTn to which NMI is connected */
1013 u8 reserved[3]; /* reserved - must be zero */
1014};
1015
1016/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
1017
1018struct acpi_madt_generic_interrupt {
1019 struct acpi_subtable_header header;
1020 u16 reserved; /* reserved - must be zero */
1021 u32 cpu_interface_number;
1022 u32 uid;
1023 u32 flags;
1024 u32 parking_version;
1025 u32 performance_interrupt;
1026 u64 parked_address;
1027 u64 base_address;
1028 u64 gicv_base_address;
1029 u64 gich_base_address;
1030 u32 vgic_interrupt;
1031 u64 gicr_base_address;
1032 u64 arm_mpidr;
1033 u8 efficiency_class;
1034 u8 reserved2[1];
1035 u16 spe_interrupt; /* ACPI 6.3 */
1036};
1037
1038/* Masks for Flags field above */
1039
1040/* ACPI_MADT_ENABLED (1) Processor is usable if set */
1041#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1042#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1043
1044/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1045
1046struct acpi_madt_generic_distributor {
1047 struct acpi_subtable_header header;
1048 u16 reserved; /* reserved - must be zero */
1049 u32 gic_id;
1050 u64 base_address;
1051 u32 global_irq_base;
1052 u8 version;
1053 u8 reserved2[3]; /* reserved - must be zero */
1054};
1055
1056/* Values for Version field above */
1057
1058enum acpi_madt_gic_version {
1059 ACPI_MADT_GIC_VERSION_NONE = 0,
1060 ACPI_MADT_GIC_VERSION_V1 = 1,
1061 ACPI_MADT_GIC_VERSION_V2 = 2,
1062 ACPI_MADT_GIC_VERSION_V3 = 3,
1063 ACPI_MADT_GIC_VERSION_V4 = 4,
1064 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
1065};
1066
1067/* 13: Generic MSI Frame (ACPI 5.1) */
1068
1069struct acpi_madt_generic_msi_frame {
1070 struct acpi_subtable_header header;
1071 u16 reserved; /* reserved - must be zero */
1072 u32 msi_frame_id;
1073 u64 base_address;
1074 u32 flags;
1075 u16 spi_count;
1076 u16 spi_base;
1077};
1078
1079/* Masks for Flags field above */
1080
1081#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1082
1083/* 14: Generic Redistributor (ACPI 5.1) */
1084
1085struct acpi_madt_generic_redistributor {
1086 struct acpi_subtable_header header;
1087 u16 reserved; /* reserved - must be zero */
1088 u64 base_address;
1089 u32 length;
1090};
1091
1092/* 15: Generic Translator (ACPI 6.0) */
1093
1094struct acpi_madt_generic_translator {
1095 struct acpi_subtable_header header;
1096 u16 reserved; /* reserved - must be zero */
1097 u32 translation_id;
1098 u64 base_address;
1099 u32 reserved2;
1100};
1101
1102/* 16: Multiprocessor wakeup (ACPI 6.4) */
1103
1104struct acpi_madt_multiproc_wakeup {
1105 struct acpi_subtable_header header;
1106 u16 mailbox_version;
1107 u32 reserved; /* reserved - must be zero */
1108 u64 base_address;
1109};
1110
1111#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1112#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1113
1114struct acpi_madt_multiproc_wakeup_mailbox {
1115 u16 command;
1116 u16 reserved; /* reserved - must be zero */
1117 u32 apic_id;
1118 u64 wakeup_vector;
1119 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1120 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1121};
1122
1123#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1124
1125/* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1126
1127struct acpi_madt_core_pic {
1128 struct acpi_subtable_header header;
1129 u8 version;
1130 u32 processor_id;
1131 u32 core_id;
1132 u32 flags;
1133};
1134
1135/* Values for Version field above */
1136
1137enum acpi_madt_core_pic_version {
1138 ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1139 ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1140 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1141};
1142
1143/* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1144
1145struct acpi_madt_lio_pic {
1146 struct acpi_subtable_header header;
1147 u8 version;
1148 u64 address;
1149 u16 size;
1150 u8 cascade[2];
1151 u32 cascade_map[2];
1152};
1153
1154/* Values for Version field above */
1155
1156enum acpi_madt_lio_pic_version {
1157 ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1158 ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1159 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1160};
1161
1162/* 19: HT Interrupt Controller (ACPI 6.5) */
1163
1164struct acpi_madt_ht_pic {
1165 struct acpi_subtable_header header;
1166 u8 version;
1167 u64 address;
1168 u16 size;
1169 u8 cascade[8];
1170};
1171
1172/* Values for Version field above */
1173
1174enum acpi_madt_ht_pic_version {
1175 ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1176 ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1177 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1178};
1179
1180/* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1181
1182struct acpi_madt_eio_pic {
1183 struct acpi_subtable_header header;
1184 u8 version;
1185 u8 cascade;
1186 u8 node;
1187 u64 node_map;
1188};
1189
1190/* Values for Version field above */
1191
1192enum acpi_madt_eio_pic_version {
1193 ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1194 ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1195 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1196};
1197
1198/* 21: MSI Interrupt Controller (ACPI 6.5) */
1199
1200struct acpi_madt_msi_pic {
1201 struct acpi_subtable_header header;
1202 u8 version;
1203 u64 msg_address;
1204 u32 start;
1205 u32 count;
1206};
1207
1208/* Values for Version field above */
1209
1210enum acpi_madt_msi_pic_version {
1211 ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1212 ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1213 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1214};
1215
1216/* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1217
1218struct acpi_madt_bio_pic {
1219 struct acpi_subtable_header header;
1220 u8 version;
1221 u64 address;
1222 u16 size;
1223 u16 id;
1224 u16 gsi_base;
1225};
1226
1227/* Values for Version field above */
1228
1229enum acpi_madt_bio_pic_version {
1230 ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1231 ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1232 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1233};
1234
1235/* 23: LPC Interrupt Controller (ACPI 6.5) */
1236
1237struct acpi_madt_lpc_pic {
1238 struct acpi_subtable_header header;
1239 u8 version;
1240 u64 address;
1241 u16 size;
1242 u8 cascade;
1243};
1244
1245/* Values for Version field above */
1246
1247enum acpi_madt_lpc_pic_version {
1248 ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1249 ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1250 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1251};
1252
1253/* 80: OEM data */
1254
1255struct acpi_madt_oem_data {
1256 u8 oem_data[0];
1257};
1258
1259/*
1260 * Common flags fields for MADT subtables
1261 */
1262
1263/* MADT Local APIC flags */
1264
1265#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1266#define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1267
1268/* MADT MPS INTI flags (inti_flags) */
1269
1270#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1271#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1272
1273/* Values for MPS INTI flags */
1274
1275#define ACPI_MADT_POLARITY_CONFORMS 0
1276#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1277#define ACPI_MADT_POLARITY_RESERVED 2
1278#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1279
1280#define ACPI_MADT_TRIGGER_CONFORMS (0)
1281#define ACPI_MADT_TRIGGER_EDGE (1<<2)
1282#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1283#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1284
1285/*******************************************************************************
1286 *
1287 * MCFG - PCI Memory Mapped Configuration table and subtable
1288 * Version 1
1289 *
1290 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1291 *
1292 ******************************************************************************/
1293
1294struct acpi_table_mcfg {
1295 struct acpi_table_header header; /* Common ACPI table header */
1296 u8 reserved[8];
1297};
1298
1299/* Subtable */
1300
1301struct acpi_mcfg_allocation {
1302 u64 address; /* Base address, processor-relative */
1303 u16 pci_segment; /* PCI segment group number */
1304 u8 start_bus_number; /* Starting PCI Bus number */
1305 u8 end_bus_number; /* Final PCI Bus number */
1306 u32 reserved;
1307};
1308
1309/*******************************************************************************
1310 *
1311 * MCHI - Management Controller Host Interface Table
1312 * Version 1
1313 *
1314 * Conforms to "Management Component Transport Protocol (MCTP) Host
1315 * Interface Specification", Revision 1.0.0a, October 13, 2009
1316 *
1317 ******************************************************************************/
1318
1319struct acpi_table_mchi {
1320 struct acpi_table_header header; /* Common ACPI table header */
1321 u8 interface_type;
1322 u8 protocol;
1323 u64 protocol_data;
1324 u8 interrupt_type;
1325 u8 gpe;
1326 u8 pci_device_flag;
1327 u32 global_interrupt;
1328 struct acpi_generic_address control_register;
1329 u8 pci_segment;
1330 u8 pci_bus;
1331 u8 pci_device;
1332 u8 pci_function;
1333};
1334
1335/*******************************************************************************
1336 *
1337 * MPST - Memory Power State Table (ACPI 5.0)
1338 * Version 1
1339 *
1340 ******************************************************************************/
1341
1342#define ACPI_MPST_CHANNEL_INFO \
1343 u8 channel_id; \
1344 u8 reserved1[3]; \
1345 u16 power_node_count; \
1346 u16 reserved2;
1347
1348/* Main table */
1349
1350struct acpi_table_mpst {
1351 struct acpi_table_header header; /* Common ACPI table header */
1352 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1353};
1354
1355/* Memory Platform Communication Channel Info */
1356
1357struct acpi_mpst_channel {
1358 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1359};
1360
1361/* Memory Power Node Structure */
1362
1363struct acpi_mpst_power_node {
1364 u8 flags;
1365 u8 reserved1;
1366 u16 node_id;
1367 u32 length;
1368 u64 range_address;
1369 u64 range_length;
1370 u32 num_power_states;
1371 u32 num_physical_components;
1372};
1373
1374/* Values for Flags field above */
1375
1376#define ACPI_MPST_ENABLED 1
1377#define ACPI_MPST_POWER_MANAGED 2
1378#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1379
1380/* Memory Power State Structure (follows POWER_NODE above) */
1381
1382struct acpi_mpst_power_state {
1383 u8 power_state;
1384 u8 info_index;
1385};
1386
1387/* Physical Component ID Structure (follows POWER_STATE above) */
1388
1389struct acpi_mpst_component {
1390 u16 component_id;
1391};
1392
1393/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1394
1395struct acpi_mpst_data_hdr {
1396 u16 characteristics_count;
1397 u16 reserved;
1398};
1399
1400struct acpi_mpst_power_data {
1401 u8 structure_id;
1402 u8 flags;
1403 u16 reserved1;
1404 u32 average_power;
1405 u32 power_saving;
1406 u64 exit_latency;
1407 u64 reserved2;
1408};
1409
1410/* Values for Flags field above */
1411
1412#define ACPI_MPST_PRESERVE 1
1413#define ACPI_MPST_AUTOENTRY 2
1414#define ACPI_MPST_AUTOEXIT 4
1415
1416/* Shared Memory Region (not part of an ACPI table) */
1417
1418struct acpi_mpst_shared {
1419 u32 signature;
1420 u16 pcc_command;
1421 u16 pcc_status;
1422 u32 command_register;
1423 u32 status_register;
1424 u32 power_state_id;
1425 u32 power_node_id;
1426 u64 energy_consumed;
1427 u64 average_power;
1428};
1429
1430/*******************************************************************************
1431 *
1432 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1433 * Version 1
1434 *
1435 ******************************************************************************/
1436
1437struct acpi_table_msct {
1438 struct acpi_table_header header; /* Common ACPI table header */
1439 u32 proximity_offset; /* Location of proximity info struct(s) */
1440 u32 max_proximity_domains; /* Max number of proximity domains */
1441 u32 max_clock_domains; /* Max number of clock domains */
1442 u64 max_address; /* Max physical address in system */
1443};
1444
1445/* subtable - Maximum Proximity Domain Information. Version 1 */
1446
1447struct acpi_msct_proximity {
1448 u8 revision;
1449 u8 length;
1450 u32 range_start; /* Start of domain range */
1451 u32 range_end; /* End of domain range */
1452 u32 processor_capacity;
1453 u64 memory_capacity; /* In bytes */
1454};
1455
1456/*******************************************************************************
1457 *
1458 * MSDM - Microsoft Data Management table
1459 *
1460 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1461 * November 29, 2011. Copyright 2011 Microsoft
1462 *
1463 ******************************************************************************/
1464
1465/* Basic MSDM table is only the common ACPI header */
1466
1467struct acpi_table_msdm {
1468 struct acpi_table_header header; /* Common ACPI table header */
1469};
1470
1471/*******************************************************************************
1472 *
1473 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1474 * Version 1
1475 *
1476 ******************************************************************************/
1477
1478struct acpi_table_nfit {
1479 struct acpi_table_header header; /* Common ACPI table header */
1480 u32 reserved; /* Reserved, must be zero */
1481};
1482
1483/* Subtable header for NFIT */
1484
1485struct acpi_nfit_header {
1486 u16 type;
1487 u16 length;
1488};
1489
1490/* Values for subtable type in struct acpi_nfit_header */
1491
1492enum acpi_nfit_type {
1493 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1494 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1495 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1496 ACPI_NFIT_TYPE_SMBIOS = 3,
1497 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1498 ACPI_NFIT_TYPE_DATA_REGION = 5,
1499 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1500 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1501 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1502};
1503
1504/*
1505 * NFIT Subtables
1506 */
1507
1508/* 0: System Physical Address Range Structure */
1509
1510struct acpi_nfit_system_address {
1511 struct acpi_nfit_header header;
1512 u16 range_index;
1513 u16 flags;
1514 u32 reserved; /* Reserved, must be zero */
1515 u32 proximity_domain;
1516 u8 range_guid[16];
1517 u64 address;
1518 u64 length;
1519 u64 memory_mapping;
1520 u64 location_cookie; /* ACPI 6.4 */
1521};
1522
1523/* Flags */
1524
1525#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1526#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1527#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1528
1529/* Range Type GUIDs appear in the include/acuuid.h file */
1530
1531/* 1: Memory Device to System Address Range Map Structure */
1532
1533struct acpi_nfit_memory_map {
1534 struct acpi_nfit_header header;
1535 u32 device_handle;
1536 u16 physical_id;
1537 u16 region_id;
1538 u16 range_index;
1539 u16 region_index;
1540 u64 region_size;
1541 u64 region_offset;
1542 u64 address;
1543 u16 interleave_index;
1544 u16 interleave_ways;
1545 u16 flags;
1546 u16 reserved; /* Reserved, must be zero */
1547};
1548
1549/* Flags */
1550
1551#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1552#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1553#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1554#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1555#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1556#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1557#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1558
1559/* 2: Interleave Structure */
1560
1561struct acpi_nfit_interleave {
1562 struct acpi_nfit_header header;
1563 u16 interleave_index;
1564 u16 reserved; /* Reserved, must be zero */
1565 u32 line_count;
1566 u32 line_size;
1567 u32 line_offset[1]; /* Variable length */
1568};
1569
1570/* 3: SMBIOS Management Information Structure */
1571
1572struct acpi_nfit_smbios {
1573 struct acpi_nfit_header header;
1574 u32 reserved; /* Reserved, must be zero */
1575 u8 data[1]; /* Variable length */
1576};
1577
1578/* 4: NVDIMM Control Region Structure */
1579
1580struct acpi_nfit_control_region {
1581 struct acpi_nfit_header header;
1582 u16 region_index;
1583 u16 vendor_id;
1584 u16 device_id;
1585 u16 revision_id;
1586 u16 subsystem_vendor_id;
1587 u16 subsystem_device_id;
1588 u16 subsystem_revision_id;
1589 u8 valid_fields;
1590 u8 manufacturing_location;
1591 u16 manufacturing_date;
1592 u8 reserved[2]; /* Reserved, must be zero */
1593 u32 serial_number;
1594 u16 code;
1595 u16 windows;
1596 u64 window_size;
1597 u64 command_offset;
1598 u64 command_size;
1599 u64 status_offset;
1600 u64 status_size;
1601 u16 flags;
1602 u8 reserved1[6]; /* Reserved, must be zero */
1603};
1604
1605/* Flags */
1606
1607#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1608
1609/* valid_fields bits */
1610
1611#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1612
1613/* 5: NVDIMM Block Data Window Region Structure */
1614
1615struct acpi_nfit_data_region {
1616 struct acpi_nfit_header header;
1617 u16 region_index;
1618 u16 windows;
1619 u64 offset;
1620 u64 size;
1621 u64 capacity;
1622 u64 start_address;
1623};
1624
1625/* 6: Flush Hint Address Structure */
1626
1627struct acpi_nfit_flush_address {
1628 struct acpi_nfit_header header;
1629 u32 device_handle;
1630 u16 hint_count;
1631 u8 reserved[6]; /* Reserved, must be zero */
1632 u64 hint_address[1]; /* Variable length */
1633};
1634
1635/* 7: Platform Capabilities Structure */
1636
1637struct acpi_nfit_capabilities {
1638 struct acpi_nfit_header header;
1639 u8 highest_capability;
1640 u8 reserved[3]; /* Reserved, must be zero */
1641 u32 capabilities;
1642 u32 reserved2;
1643};
1644
1645/* Capabilities Flags */
1646
1647#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1648#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1649#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1650
1651/*
1652 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1653 */
1654struct nfit_device_handle {
1655 u32 handle;
1656};
1657
1658/* Device handle construction and extraction macros */
1659
1660#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1661#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1662#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1663#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1664#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1665
1666#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1667#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1668#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1669#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1670#define ACPI_NFIT_NODE_ID_OFFSET 16
1671
1672/* Macro to construct a NFIT/NVDIMM device handle */
1673
1674#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1675 ((dimm) | \
1676 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1677 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1678 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1679 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1680
1681/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1682
1683#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1684 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1685
1686#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1687 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1688
1689#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1690 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1691
1692#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1693 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1694
1695#define ACPI_NFIT_GET_NODE_ID(handle) \
1696 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1697
1698/*******************************************************************************
1699 *
1700 * NHLT - Non HD Audio Link Table
1701 *
1702 * Conforms to: Intel Smart Sound Technology NHLT Specification
1703 * Version 0.8.1, January 2020.
1704 *
1705 ******************************************************************************/
1706
1707/* Main table */
1708
1709struct acpi_table_nhlt {
1710 struct acpi_table_header header; /* Common ACPI table header */
1711 u8 endpoint_count;
1712};
1713
1714struct acpi_nhlt_endpoint {
1715 u32 descriptor_length;
1716 u8 link_type;
1717 u8 instance_id;
1718 u16 vendor_id;
1719 u16 device_id;
1720 u16 revision_id;
1721 u32 subsystem_id;
1722 u8 device_type;
1723 u8 direction;
1724 u8 virtual_bus_id;
1725};
1726
1727/* Types for link_type field above */
1728
1729#define ACPI_NHLT_RESERVED_HD_AUDIO 0
1730#define ACPI_NHLT_RESERVED_DSP 1
1731#define ACPI_NHLT_PDM 2
1732#define ACPI_NHLT_SSP 3
1733#define ACPI_NHLT_RESERVED_SLIMBUS 4
1734#define ACPI_NHLT_RESERVED_SOUNDWIRE 5
1735#define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */
1736
1737/* All other values above are reserved */
1738
1739/* Values for device_id field above */
1740
1741#define ACPI_NHLT_PDM_DMIC 0xAE20
1742#define ACPI_NHLT_BT_SIDEBAND 0xAE30
1743#define ACPI_NHLT_I2S_TDM_CODECS 0xAE23
1744
1745/* Values for device_type field above */
1746
1747/* SSP Link */
1748
1749#define ACPI_NHLT_LINK_BT_SIDEBAND 0
1750#define ACPI_NHLT_LINK_FM 1
1751#define ACPI_NHLT_LINK_MODEM 2
1752/* 3 is reserved */
1753#define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4
1754
1755/* PDM Link */
1756
1757#define ACPI_NHLT_PDM_ON_CAVS_1P8 0
1758#define ACPI_NHLT_PDM_ON_CAVS_1P5 1
1759
1760/* Values for Direction field above */
1761
1762#define ACPI_NHLT_DIR_RENDER 0
1763#define ACPI_NHLT_DIR_CAPTURE 1
1764#define ACPI_NHLT_DIR_RENDER_LOOPBACK 2
1765#define ACPI_NHLT_DIR_RENDER_FEEDBACK 3
1766#define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */
1767
1768struct acpi_nhlt_device_specific_config {
1769 u32 capabilities_size;
1770 u8 virtual_slot;
1771 u8 config_type;
1772};
1773
1774struct acpi_nhlt_device_specific_config_a {
1775 u32 capabilities_size;
1776 u8 virtual_slot;
1777 u8 config_type;
1778 u8 array_type;
1779};
1780
1781/* Values for Config Type above */
1782
1783#define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00
1784#define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01
1785#define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03
1786#define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */
1787
1788struct acpi_nhlt_device_specific_config_b {
1789 u32 capabilities_size;
1790};
1791
1792struct acpi_nhlt_device_specific_config_c {
1793 u32 capabilities_size;
1794 u8 virtual_slot;
1795};
1796
1797struct acpi_nhlt_render_device_specific_config {
1798 u32 capabilities_size;
1799 u8 virtual_slot;
1800};
1801
1802struct acpi_nhlt_wave_extensible {
1803 u16 format_tag;
1804 u16 channel_count;
1805 u32 samples_per_sec;
1806 u32 avg_bytes_per_sec;
1807 u16 block_align;
1808 u16 bits_per_sample;
1809 u16 extra_format_size;
1810 u16 valid_bits_per_sample;
1811 u32 channel_mask;
1812 u8 sub_format_guid[16];
1813};
1814
1815/* Values for channel_mask above */
1816
1817#define ACPI_NHLT_SPKR_FRONT_LEFT 0x1
1818#define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2
1819#define ACPI_NHLT_SPKR_FRONT_CENTER 0x4
1820#define ACPI_NHLT_SPKR_LOW_FREQ 0x8
1821#define ACPI_NHLT_SPKR_BACK_LEFT 0x10
1822#define ACPI_NHLT_SPKR_BACK_RIGHT 0x20
1823#define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40
1824#define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80
1825#define ACPI_NHLT_SPKR_BACK_CENTER 0x100
1826#define ACPI_NHLT_SPKR_SIDE_LEFT 0x200
1827#define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400
1828#define ACPI_NHLT_SPKR_TOP_CENTER 0x800
1829#define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000
1830#define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000
1831#define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000
1832#define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000
1833#define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000
1834#define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000
1835
1836struct acpi_nhlt_format_config {
1837 struct acpi_nhlt_wave_extensible format;
1838 u32 capability_size;
1839 u8 capabilities[];
1840};
1841
1842struct acpi_nhlt_formats_config {
1843 u8 formats_count;
1844};
1845
1846struct acpi_nhlt_device_specific_hdr {
1847 u8 virtual_slot;
1848 u8 config_type;
1849};
1850
1851/* Types for config_type above */
1852
1853#define ACPI_NHLT_GENERIC 0
1854#define ACPI_NHLT_MIC 1
1855#define ACPI_NHLT_RENDER 3
1856
1857struct acpi_nhlt_mic_device_specific_config {
1858 struct acpi_nhlt_device_specific_hdr device_config;
1859 u8 array_type_ext;
1860};
1861
1862/* Values for array_type_ext above */
1863
1864#define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */
1865#define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A
1866#define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B
1867#define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C
1868#define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D
1869#define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E
1870#define ACPI_NHLT_VENDOR_DEFINED 0x0F
1871#define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F
1872#define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10
1873
1874#define ACPI_NHLT_NO_EXTENSION 0x0
1875#define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4)
1876
1877struct acpi_nhlt_vendor_mic_count {
1878 u8 microphone_count;
1879};
1880
1881struct acpi_nhlt_vendor_mic_config {
1882 u8 type;
1883 u8 panel;
1884 u16 speaker_position_distance; /* mm */
1885 u16 horizontal_offset; /* mm */
1886 u16 vertical_offset; /* mm */
1887 u8 frequency_low_band; /* 5*Hz */
1888 u8 frequency_high_band; /* 500*Hz */
1889 u16 direction_angle; /* -180 - + 180 */
1890 u16 elevation_angle; /* -180 - + 180 */
1891 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */
1892 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */
1893 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */
1894 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */
1895};
1896
1897/* Values for Type field above */
1898
1899#define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0
1900#define ACPI_NHLT_MIC_SUBCARDIOID 1
1901#define ACPI_NHLT_MIC_CARDIOID 2
1902#define ACPI_NHLT_MIC_SUPER_CARDIOID 3
1903#define ACPI_NHLT_MIC_HYPER_CARDIOID 4
1904#define ACPI_NHLT_MIC_8_SHAPED 5
1905#define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */
1906#define ACPI_NHLT_MIC_VENDOR_DEFINED 7
1907#define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */
1908
1909/* Values for Panel field above */
1910
1911#define ACPI_NHLT_MIC_POSITION_TOP 0
1912#define ACPI_NHLT_MIC_POSITION_BOTTOM 1
1913#define ACPI_NHLT_MIC_POSITION_LEFT 2
1914#define ACPI_NHLT_MIC_POSITION_RIGHT 3
1915#define ACPI_NHLT_MIC_POSITION_FRONT 4
1916#define ACPI_NHLT_MIC_POSITION_BACK 5
1917#define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */
1918
1919struct acpi_nhlt_vendor_mic_device_specific_config {
1920 struct acpi_nhlt_mic_device_specific_config mic_array_device_config;
1921 u8 number_of_microphones;
1922 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */
1923};
1924
1925/* Microphone SNR and Sensitivity extension */
1926
1927struct acpi_nhlt_mic_snr_sensitivity_extension {
1928 u32 SNR;
1929 u32 sensitivity;
1930};
1931
1932/* Render device with feedback */
1933
1934struct acpi_nhlt_render_feedback_device_specific_config {
1935 u8 feedback_virtual_slot; /* Render slot in case of capture */
1936 u16 feedback_channels; /* Informative only */
1937 u16 feedback_valid_bits_per_sample;
1938};
1939
1940/* Non documented structures */
1941
1942struct acpi_nhlt_device_info_count {
1943 u8 structure_count;
1944};
1945
1946struct acpi_nhlt_device_info {
1947 u8 device_id[16];
1948 u8 device_instance_id;
1949 u8 device_port_id;
1950};
1951
1952/*******************************************************************************
1953 *
1954 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1955 * Version 2 (ACPI 6.2)
1956 *
1957 ******************************************************************************/
1958
1959struct acpi_table_pcct {
1960 struct acpi_table_header header; /* Common ACPI table header */
1961 u32 flags;
1962 u64 reserved;
1963};
1964
1965/* Values for Flags field above */
1966
1967#define ACPI_PCCT_DOORBELL 1
1968
1969/* Values for subtable type in struct acpi_subtable_header */
1970
1971enum acpi_pcct_type {
1972 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1973 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1974 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1975 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1976 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1977 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
1978 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1979};
1980
1981/*
1982 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1983 */
1984
1985/* 0: Generic Communications Subspace */
1986
1987struct acpi_pcct_subspace {
1988 struct acpi_subtable_header header;
1989 u8 reserved[6];
1990 u64 base_address;
1991 u64 length;
1992 struct acpi_generic_address doorbell_register;
1993 u64 preserve_mask;
1994 u64 write_mask;
1995 u32 latency;
1996 u32 max_access_rate;
1997 u16 min_turnaround_time;
1998};
1999
2000/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2001
2002struct acpi_pcct_hw_reduced {
2003 struct acpi_subtable_header header;
2004 u32 platform_interrupt;
2005 u8 flags;
2006 u8 reserved;
2007 u64 base_address;
2008 u64 length;
2009 struct acpi_generic_address doorbell_register;
2010 u64 preserve_mask;
2011 u64 write_mask;
2012 u32 latency;
2013 u32 max_access_rate;
2014 u16 min_turnaround_time;
2015};
2016
2017/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2018
2019struct acpi_pcct_hw_reduced_type2 {
2020 struct acpi_subtable_header header;
2021 u32 platform_interrupt;
2022 u8 flags;
2023 u8 reserved;
2024 u64 base_address;
2025 u64 length;
2026 struct acpi_generic_address doorbell_register;
2027 u64 preserve_mask;
2028 u64 write_mask;
2029 u32 latency;
2030 u32 max_access_rate;
2031 u16 min_turnaround_time;
2032 struct acpi_generic_address platform_ack_register;
2033 u64 ack_preserve_mask;
2034 u64 ack_write_mask;
2035};
2036
2037/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2038
2039struct acpi_pcct_ext_pcc_master {
2040 struct acpi_subtable_header header;
2041 u32 platform_interrupt;
2042 u8 flags;
2043 u8 reserved1;
2044 u64 base_address;
2045 u32 length;
2046 struct acpi_generic_address doorbell_register;
2047 u64 preserve_mask;
2048 u64 write_mask;
2049 u32 latency;
2050 u32 max_access_rate;
2051 u32 min_turnaround_time;
2052 struct acpi_generic_address platform_ack_register;
2053 u64 ack_preserve_mask;
2054 u64 ack_set_mask;
2055 u64 reserved2;
2056 struct acpi_generic_address cmd_complete_register;
2057 u64 cmd_complete_mask;
2058 struct acpi_generic_address cmd_update_register;
2059 u64 cmd_update_preserve_mask;
2060 u64 cmd_update_set_mask;
2061 struct acpi_generic_address error_status_register;
2062 u64 error_status_mask;
2063};
2064
2065/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2066
2067struct acpi_pcct_ext_pcc_slave {
2068 struct acpi_subtable_header header;
2069 u32 platform_interrupt;
2070 u8 flags;
2071 u8 reserved1;
2072 u64 base_address;
2073 u32 length;
2074 struct acpi_generic_address doorbell_register;
2075 u64 preserve_mask;
2076 u64 write_mask;
2077 u32 latency;
2078 u32 max_access_rate;
2079 u32 min_turnaround_time;
2080 struct acpi_generic_address platform_ack_register;
2081 u64 ack_preserve_mask;
2082 u64 ack_set_mask;
2083 u64 reserved2;
2084 struct acpi_generic_address cmd_complete_register;
2085 u64 cmd_complete_mask;
2086 struct acpi_generic_address cmd_update_register;
2087 u64 cmd_update_preserve_mask;
2088 u64 cmd_update_set_mask;
2089 struct acpi_generic_address error_status_register;
2090 u64 error_status_mask;
2091};
2092
2093/* 5: HW Registers based Communications Subspace */
2094
2095struct acpi_pcct_hw_reg {
2096 struct acpi_subtable_header header;
2097 u16 version;
2098 u64 base_address;
2099 u64 length;
2100 struct acpi_generic_address doorbell_register;
2101 u64 doorbell_preserve;
2102 u64 doorbell_write;
2103 struct acpi_generic_address cmd_complete_register;
2104 u64 cmd_complete_mask;
2105 struct acpi_generic_address error_status_register;
2106 u64 error_status_mask;
2107 u32 nominal_latency;
2108 u32 min_turnaround_time;
2109};
2110
2111/* Values for doorbell flags above */
2112
2113#define ACPI_PCCT_INTERRUPT_POLARITY (1)
2114#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2115
2116/*
2117 * PCC memory structures (not part of the ACPI table)
2118 */
2119
2120/* Shared Memory Region */
2121
2122struct acpi_pcct_shared_memory {
2123 u32 signature;
2124 u16 command;
2125 u16 status;
2126};
2127
2128/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2129
2130struct acpi_pcct_ext_pcc_shared_memory {
2131 u32 signature;
2132 u32 flags;
2133 u32 length;
2134 u32 command;
2135};
2136
2137/*******************************************************************************
2138 *
2139 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2140 * Version 0
2141 *
2142 ******************************************************************************/
2143
2144struct acpi_table_pdtt {
2145 struct acpi_table_header header; /* Common ACPI table header */
2146 u8 trigger_count;
2147 u8 reserved[3];
2148 u32 array_offset;
2149};
2150
2151/*
2152 * PDTT Communication Channel Identifier Structure.
2153 * The number of these structures is defined by trigger_count above,
2154 * starting at array_offset.
2155 */
2156struct acpi_pdtt_channel {
2157 u8 subchannel_id;
2158 u8 flags;
2159};
2160
2161/* Flags for above */
2162
2163#define ACPI_PDTT_RUNTIME_TRIGGER (1)
2164#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2165#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2166
2167/*******************************************************************************
2168 *
2169 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2170 * Version 1
2171 *
2172 ******************************************************************************/
2173
2174struct acpi_table_phat {
2175 struct acpi_table_header header; /* Common ACPI table header */
2176};
2177
2178/* Common header for PHAT subtables that follow main table */
2179
2180struct acpi_phat_header {
2181 u16 type;
2182 u16 length;
2183 u8 revision;
2184};
2185
2186/* Values for Type field above */
2187
2188#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2189#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2190#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2191
2192/*
2193 * PHAT subtables, correspond to Type in struct acpi_phat_header
2194 */
2195
2196/* 0: Firmware Version Data Record */
2197
2198struct acpi_phat_version_data {
2199 struct acpi_phat_header header;
2200 u8 reserved[3];
2201 u32 element_count;
2202};
2203
2204struct acpi_phat_version_element {
2205 u8 guid[16];
2206 u64 version_value;
2207 u32 producer_id;
2208};
2209
2210/* 1: Firmware Health Data Record */
2211
2212struct acpi_phat_health_data {
2213 struct acpi_phat_header header;
2214 u8 reserved[2];
2215 u8 health;
2216 u8 device_guid[16];
2217 u32 device_specific_offset; /* Zero if no Device-specific data */
2218};
2219
2220/* Values for Health field above */
2221
2222#define ACPI_PHAT_ERRORS_FOUND 0
2223#define ACPI_PHAT_NO_ERRORS 1
2224#define ACPI_PHAT_UNKNOWN_ERRORS 2
2225#define ACPI_PHAT_ADVISORY 3
2226
2227/*******************************************************************************
2228 *
2229 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2230 * Version 1
2231 *
2232 ******************************************************************************/
2233
2234struct acpi_table_pmtt {
2235 struct acpi_table_header header; /* Common ACPI table header */
2236 u32 memory_device_count;
2237 /*
2238 * Immediately followed by:
2239 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2240 */
2241};
2242
2243/* Common header for PMTT subtables that follow main table */
2244
2245struct acpi_pmtt_header {
2246 u8 type;
2247 u8 reserved1;
2248 u16 length;
2249 u16 flags;
2250 u16 reserved2;
2251 u32 memory_device_count; /* Zero means no memory device structs follow */
2252 /*
2253 * Immediately followed by:
2254 * u8 type_specific_data[]
2255 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2256 */
2257};
2258
2259/* Values for Type field above */
2260
2261#define ACPI_PMTT_TYPE_SOCKET 0
2262#define ACPI_PMTT_TYPE_CONTROLLER 1
2263#define ACPI_PMTT_TYPE_DIMM 2
2264#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2265#define ACPI_PMTT_TYPE_VENDOR 0xFF
2266
2267/* Values for Flags field above */
2268
2269#define ACPI_PMTT_TOP_LEVEL 0x0001
2270#define ACPI_PMTT_PHYSICAL 0x0002
2271#define ACPI_PMTT_MEMORY_TYPE 0x000C
2272
2273/*
2274 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
2275 */
2276
2277/* 0: Socket Structure */
2278
2279struct acpi_pmtt_socket {
2280 struct acpi_pmtt_header header;
2281 u16 socket_id;
2282 u16 reserved;
2283};
2284 /*
2285 * Immediately followed by:
2286 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2287 */
2288
2289/* 1: Memory Controller subtable */
2290
2291struct acpi_pmtt_controller {
2292 struct acpi_pmtt_header header;
2293 u16 controller_id;
2294 u16 reserved;
2295};
2296 /*
2297 * Immediately followed by:
2298 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2299 */
2300
2301/* 2: Physical Component Identifier (DIMM) */
2302
2303struct acpi_pmtt_physical_component {
2304 struct acpi_pmtt_header header;
2305 u32 bios_handle;
2306};
2307
2308/* 0xFF: Vendor Specific Data */
2309
2310struct acpi_pmtt_vendor_specific {
2311 struct acpi_pmtt_header header;
2312 u8 type_uuid[16];
2313 u8 specific[];
2314 /*
2315 * Immediately followed by:
2316 * u8 vendor_specific_data[];
2317 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2318 */
2319};
2320
2321/*******************************************************************************
2322 *
2323 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2324 * Version 1
2325 *
2326 ******************************************************************************/
2327
2328struct acpi_table_pptt {
2329 struct acpi_table_header header; /* Common ACPI table header */
2330};
2331
2332/* Values for Type field above */
2333
2334enum acpi_pptt_type {
2335 ACPI_PPTT_TYPE_PROCESSOR = 0,
2336 ACPI_PPTT_TYPE_CACHE = 1,
2337 ACPI_PPTT_TYPE_ID = 2,
2338 ACPI_PPTT_TYPE_RESERVED = 3
2339};
2340
2341/* 0: Processor Hierarchy Node Structure */
2342
2343struct acpi_pptt_processor {
2344 struct acpi_subtable_header header;
2345 u16 reserved;
2346 u32 flags;
2347 u32 parent;
2348 u32 acpi_processor_id;
2349 u32 number_of_priv_resources;
2350};
2351
2352/* Flags */
2353
2354#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2355#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2356#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2357#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2358#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2359
2360/* 1: Cache Type Structure */
2361
2362struct acpi_pptt_cache {
2363 struct acpi_subtable_header header;
2364 u16 reserved;
2365 u32 flags;
2366 u32 next_level_of_cache;
2367 u32 size;
2368 u32 number_of_sets;
2369 u8 associativity;
2370 u8 attributes;
2371 u16 line_size;
2372};
2373
2374/* 1: Cache Type Structure for PPTT version 3 */
2375
2376struct acpi_pptt_cache_v1 {
2377 u32 cache_id;
2378};
2379
2380/* Flags */
2381
2382#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2383#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2384#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2385#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2386#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2387#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2388#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2389#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2390
2391/* Masks for Attributes */
2392
2393#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2394#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2395#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2396
2397/* Attributes describing cache */
2398#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2399#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2400#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2401#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2402
2403#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2404#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2405#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2406#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2407
2408#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2409#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2410
2411/* 2: ID Structure */
2412
2413struct acpi_pptt_id {
2414 struct acpi_subtable_header header;
2415 u16 reserved;
2416 u32 vendor_id;
2417 u64 level1_id;
2418 u64 level2_id;
2419 u16 major_rev;
2420 u16 minor_rev;
2421 u16 spin_rev;
2422};
2423
2424/*******************************************************************************
2425 *
2426 * PRMT - Platform Runtime Mechanism Table
2427 * Version 1
2428 *
2429 ******************************************************************************/
2430
2431struct acpi_table_prmt {
2432 struct acpi_table_header header; /* Common ACPI table header */
2433};
2434
2435struct acpi_table_prmt_header {
2436 u8 platform_guid[16];
2437 u32 module_info_offset;
2438 u32 module_info_count;
2439};
2440
2441struct acpi_prmt_module_header {
2442 u16 revision;
2443 u16 length;
2444};
2445
2446struct acpi_prmt_module_info {
2447 u16 revision;
2448 u16 length;
2449 u8 module_guid[16];
2450 u16 major_rev;
2451 u16 minor_rev;
2452 u16 handler_info_count;
2453 u32 handler_info_offset;
2454 u64 mmio_list_pointer;
2455};
2456
2457struct acpi_prmt_handler_info {
2458 u16 revision;
2459 u16 length;
2460 u8 handler_guid[16];
2461 u64 handler_address;
2462 u64 static_data_buffer_address;
2463 u64 acpi_param_buffer_address;
2464};
2465
2466/*******************************************************************************
2467 *
2468 * RASF - RAS Feature Table (ACPI 5.0)
2469 * Version 1
2470 *
2471 ******************************************************************************/
2472
2473struct acpi_table_rasf {
2474 struct acpi_table_header header; /* Common ACPI table header */
2475 u8 channel_id[12];
2476};
2477
2478/* RASF Platform Communication Channel Shared Memory Region */
2479
2480struct acpi_rasf_shared_memory {
2481 u32 signature;
2482 u16 command;
2483 u16 status;
2484 u16 version;
2485 u8 capabilities[16];
2486 u8 set_capabilities[16];
2487 u16 num_parameter_blocks;
2488 u32 set_capabilities_status;
2489};
2490
2491/* RASF Parameter Block Structure Header */
2492
2493struct acpi_rasf_parameter_block {
2494 u16 type;
2495 u16 version;
2496 u16 length;
2497};
2498
2499/* RASF Parameter Block Structure for PATROL_SCRUB */
2500
2501struct acpi_rasf_patrol_scrub_parameter {
2502 struct acpi_rasf_parameter_block header;
2503 u16 patrol_scrub_command;
2504 u64 requested_address_range[2];
2505 u64 actual_address_range[2];
2506 u16 flags;
2507 u8 requested_speed;
2508};
2509
2510/* Masks for Flags and Speed fields above */
2511
2512#define ACPI_RASF_SCRUBBER_RUNNING 1
2513#define ACPI_RASF_SPEED (7<<1)
2514#define ACPI_RASF_SPEED_SLOW (0<<1)
2515#define ACPI_RASF_SPEED_MEDIUM (4<<1)
2516#define ACPI_RASF_SPEED_FAST (7<<1)
2517
2518/* Channel Commands */
2519
2520enum acpi_rasf_commands {
2521 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2522};
2523
2524/* Platform RAS Capabilities */
2525
2526enum acpi_rasf_capabiliities {
2527 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2528 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2529};
2530
2531/* Patrol Scrub Commands */
2532
2533enum acpi_rasf_patrol_scrub_commands {
2534 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2535 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2536 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2537};
2538
2539/* Channel Command flags */
2540
2541#define ACPI_RASF_GENERATE_SCI (1<<15)
2542
2543/* Status values */
2544
2545enum acpi_rasf_status {
2546 ACPI_RASF_SUCCESS = 0,
2547 ACPI_RASF_NOT_VALID = 1,
2548 ACPI_RASF_NOT_SUPPORTED = 2,
2549 ACPI_RASF_BUSY = 3,
2550 ACPI_RASF_FAILED = 4,
2551 ACPI_RASF_ABORTED = 5,
2552 ACPI_RASF_INVALID_DATA = 6
2553};
2554
2555/* Status flags */
2556
2557#define ACPI_RASF_COMMAND_COMPLETE (1)
2558#define ACPI_RASF_SCI_DOORBELL (1<<1)
2559#define ACPI_RASF_ERROR (1<<2)
2560#define ACPI_RASF_STATUS (0x1F<<3)
2561
2562/*******************************************************************************
2563 *
2564 * RGRT - Regulatory Graphics Resource Table
2565 * Version 1
2566 *
2567 * Conforms to "ACPI RGRT" available at:
2568 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
2569 *
2570 ******************************************************************************/
2571
2572struct acpi_table_rgrt {
2573 struct acpi_table_header header; /* Common ACPI table header */
2574 u16 version;
2575 u8 image_type;
2576 u8 reserved;
2577 u8 image[];
2578};
2579
2580/* image_type values */
2581
2582enum acpi_rgrt_image_type {
2583 ACPI_RGRT_TYPE_RESERVED0 = 0,
2584 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2585 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2586};
2587
2588/*******************************************************************************
2589 *
2590 * SBST - Smart Battery Specification Table
2591 * Version 1
2592 *
2593 ******************************************************************************/
2594
2595struct acpi_table_sbst {
2596 struct acpi_table_header header; /* Common ACPI table header */
2597 u32 warning_level;
2598 u32 low_level;
2599 u32 critical_level;
2600};
2601
2602/*******************************************************************************
2603 *
2604 * SDEI - Software Delegated Exception Interface Descriptor Table
2605 *
2606 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2607 * May 8th, 2017. Copyright 2017 ARM Ltd.
2608 *
2609 ******************************************************************************/
2610
2611struct acpi_table_sdei {
2612 struct acpi_table_header header; /* Common ACPI table header */
2613};
2614
2615/*******************************************************************************
2616 *
2617 * SDEV - Secure Devices Table (ACPI 6.2)
2618 * Version 1
2619 *
2620 ******************************************************************************/
2621
2622struct acpi_table_sdev {
2623 struct acpi_table_header header; /* Common ACPI table header */
2624};
2625
2626struct acpi_sdev_header {
2627 u8 type;
2628 u8 flags;
2629 u16 length;
2630};
2631
2632/* Values for subtable type above */
2633
2634enum acpi_sdev_type {
2635 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2636 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2637 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2638};
2639
2640/* Values for flags above */
2641
2642#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2643#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
2644
2645/*
2646 * SDEV subtables
2647 */
2648
2649/* 0: Namespace Device Based Secure Device Structure */
2650
2651struct acpi_sdev_namespace {
2652 struct acpi_sdev_header header;
2653 u16 device_id_offset;
2654 u16 device_id_length;
2655 u16 vendor_data_offset;
2656 u16 vendor_data_length;
2657};
2658
2659struct acpi_sdev_secure_component {
2660 u16 secure_component_offset;
2661 u16 secure_component_length;
2662};
2663
2664/*
2665 * SDEV sub-subtables ("Components") for above
2666 */
2667struct acpi_sdev_component {
2668 struct acpi_sdev_header header;
2669};
2670
2671/* Values for sub-subtable type above */
2672
2673enum acpi_sac_type {
2674 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
2675 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
2676};
2677
2678struct acpi_sdev_id_component {
2679 struct acpi_sdev_header header;
2680 u16 hardware_id_offset;
2681 u16 hardware_id_length;
2682 u16 subsystem_id_offset;
2683 u16 subsystem_id_length;
2684 u16 hardware_revision;
2685 u8 hardware_rev_present;
2686 u8 class_code_present;
2687 u8 pci_base_class;
2688 u8 pci_sub_class;
2689 u8 pci_programming_xface;
2690};
2691
2692struct acpi_sdev_mem_component {
2693 struct acpi_sdev_header header;
2694 u32 reserved;
2695 u64 memory_base_address;
2696 u64 memory_length;
2697};
2698
2699/* 1: PCIe Endpoint Device Based Device Structure */
2700
2701struct acpi_sdev_pcie {
2702 struct acpi_sdev_header header;
2703 u16 segment;
2704 u16 start_bus;
2705 u16 path_offset;
2706 u16 path_length;
2707 u16 vendor_data_offset;
2708 u16 vendor_data_length;
2709};
2710
2711/* 1a: PCIe Endpoint path entry */
2712
2713struct acpi_sdev_pcie_path {
2714 u8 device;
2715 u8 function;
2716};
2717
2718/*******************************************************************************
2719 *
2720 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2721 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2722 * Trust Domain Extensions (Intel TDX)".
2723 * Version 1
2724 *
2725 ******************************************************************************/
2726
2727struct acpi_table_svkl {
2728 struct acpi_table_header header; /* Common ACPI table header */
2729 u32 count;
2730};
2731
2732struct acpi_svkl_key {
2733 u16 type;
2734 u16 format;
2735 u32 size;
2736 u64 address;
2737};
2738
2739enum acpi_svkl_type {
2740 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
2741 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
2742};
2743
2744enum acpi_svkl_format {
2745 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
2746 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
2747};
2748
2749/*******************************************************************************
2750 *
2751 * TDEL - TD-Event Log
2752 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2753 * Trust Domain Extensions (Intel TDX)".
2754 * September 2020
2755 *
2756 ******************************************************************************/
2757
2758struct acpi_table_tdel {
2759 struct acpi_table_header header; /* Common ACPI table header */
2760 u32 reserved;
2761 u64 log_area_minimum_length;
2762 u64 log_area_start_address;
2763};
2764
2765/* Reset to default packing */
2766
2767#pragma pack()
2768
2769#endif /* __ACTBL2_H__ */