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1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *
6 * Copyright (C) 2000 - 2019, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
28#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
29#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
30#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
31#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
32#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
33#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
34#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
35#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
36#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
37#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
39#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
40#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
41#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
42#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
43#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
44#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
45#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
46
47/*
48 * All tables must be byte-packed to match the ACPI specification, since
49 * the tables are provided by the system BIOS.
50 */
51#pragma pack(1)
52
53/*
54 * Note: C bitfields are not used for this reason:
55 *
56 * "Bitfields are great and easy to read, but unfortunately the C language
57 * does not specify the layout of bitfields in memory, which means they are
58 * essentially useless for dealing with packed data in on-disk formats or
59 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
60 * this decision was a design error in C. Ritchie could have picked an order
61 * and stuck with it." Norman Ramsey.
62 * See http://stackoverflow.com/a/1053662/41661
63 */
64
65/*******************************************************************************
66 *
67 * IORT - IO Remapping Table
68 *
69 * Conforms to "IO Remapping Table System Software on ARM Platforms",
70 * Document number: ARM DEN 0049D, March 2018
71 *
72 ******************************************************************************/
73
74struct acpi_table_iort {
75 struct acpi_table_header header;
76 u32 node_count;
77 u32 node_offset;
78 u32 reserved;
79};
80
81/*
82 * IORT subtables
83 */
84struct acpi_iort_node {
85 u8 type;
86 u16 length;
87 u8 revision;
88 u32 reserved;
89 u32 mapping_count;
90 u32 mapping_offset;
91 char node_data[1];
92};
93
94/* Values for subtable Type above */
95
96enum acpi_iort_node_type {
97 ACPI_IORT_NODE_ITS_GROUP = 0x00,
98 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
99 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
100 ACPI_IORT_NODE_SMMU = 0x03,
101 ACPI_IORT_NODE_SMMU_V3 = 0x04,
102 ACPI_IORT_NODE_PMCG = 0x05
103};
104
105struct acpi_iort_id_mapping {
106 u32 input_base; /* Lowest value in input range */
107 u32 id_count; /* Number of IDs */
108 u32 output_base; /* Lowest value in output range */
109 u32 output_reference; /* A reference to the output node */
110 u32 flags;
111};
112
113/* Masks for Flags field above for IORT subtable */
114
115#define ACPI_IORT_ID_SINGLE_MAPPING (1)
116
117struct acpi_iort_memory_access {
118 u32 cache_coherency;
119 u8 hints;
120 u16 reserved;
121 u8 memory_flags;
122};
123
124/* Values for cache_coherency field above */
125
126#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
127#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
128
129/* Masks for Hints field above */
130
131#define ACPI_IORT_HT_TRANSIENT (1)
132#define ACPI_IORT_HT_WRITE (1<<1)
133#define ACPI_IORT_HT_READ (1<<2)
134#define ACPI_IORT_HT_OVERRIDE (1<<3)
135
136/* Masks for memory_flags field above */
137
138#define ACPI_IORT_MF_COHERENCY (1)
139#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
140
141/*
142 * IORT node specific subtables
143 */
144struct acpi_iort_its_group {
145 u32 its_count;
146 u32 identifiers[1]; /* GIC ITS identifier array */
147};
148
149struct acpi_iort_named_component {
150 u32 node_flags;
151 u64 memory_properties; /* Memory access properties */
152 u8 memory_address_limit; /* Memory address size limit */
153 char device_name[1]; /* Path of namespace object */
154};
155
156/* Masks for Flags field above */
157
158#define ACPI_IORT_NC_STALL_SUPPORTED (1)
159#define ACPI_IORT_NC_PASID_BITS (31<<1)
160
161struct acpi_iort_root_complex {
162 u64 memory_properties; /* Memory access properties */
163 u32 ats_attribute;
164 u32 pci_segment_number;
165 u8 memory_address_limit; /* Memory address size limit */
166 u8 reserved[3]; /* Reserved, must be zero */
167};
168
169/* Values for ats_attribute field above */
170
171#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
172#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
173
174struct acpi_iort_smmu {
175 u64 base_address; /* SMMU base address */
176 u64 span; /* Length of memory range */
177 u32 model;
178 u32 flags;
179 u32 global_interrupt_offset;
180 u32 context_interrupt_count;
181 u32 context_interrupt_offset;
182 u32 pmu_interrupt_count;
183 u32 pmu_interrupt_offset;
184 u64 interrupts[1]; /* Interrupt array */
185};
186
187/* Values for Model field above */
188
189#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
190#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
191#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
192#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
193#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
194#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
195
196/* Masks for Flags field above */
197
198#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
199#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
200
201/* Global interrupt format */
202
203struct acpi_iort_smmu_gsi {
204 u32 nsg_irpt;
205 u32 nsg_irpt_flags;
206 u32 nsg_cfg_irpt;
207 u32 nsg_cfg_irpt_flags;
208};
209
210struct acpi_iort_smmu_v3 {
211 u64 base_address; /* SMMUv3 base address */
212 u32 flags;
213 u32 reserved;
214 u64 vatos_address;
215 u32 model;
216 u32 event_gsiv;
217 u32 pri_gsiv;
218 u32 gerr_gsiv;
219 u32 sync_gsiv;
220 u32 pxm;
221 u32 id_mapping_index;
222};
223
224/* Values for Model field above */
225
226#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
227#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
228#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
229
230/* Masks for Flags field above */
231
232#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
233#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
234#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
235
236struct acpi_iort_pmcg {
237 u64 page0_base_address;
238 u32 overflow_gsiv;
239 u32 node_reference;
240 u64 page1_base_address;
241};
242
243/*******************************************************************************
244 *
245 * IVRS - I/O Virtualization Reporting Structure
246 * Version 1
247 *
248 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
249 * Revision 1.26, February 2009.
250 *
251 ******************************************************************************/
252
253struct acpi_table_ivrs {
254 struct acpi_table_header header; /* Common ACPI table header */
255 u32 info; /* Common virtualization info */
256 u64 reserved;
257};
258
259/* Values for Info field above */
260
261#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
262#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
263#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
264
265/* IVRS subtable header */
266
267struct acpi_ivrs_header {
268 u8 type; /* Subtable type */
269 u8 flags;
270 u16 length; /* Subtable length */
271 u16 device_id; /* ID of IOMMU */
272};
273
274/* Values for subtable Type above */
275
276enum acpi_ivrs_type {
277 ACPI_IVRS_TYPE_HARDWARE = 0x10,
278 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
279 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
280 ACPI_IVRS_TYPE_MEMORY3 = 0x22
281};
282
283/* Masks for Flags field above for IVHD subtable */
284
285#define ACPI_IVHD_TT_ENABLE (1)
286#define ACPI_IVHD_PASS_PW (1<<1)
287#define ACPI_IVHD_RES_PASS_PW (1<<2)
288#define ACPI_IVHD_ISOC (1<<3)
289#define ACPI_IVHD_IOTLB (1<<4)
290
291/* Masks for Flags field above for IVMD subtable */
292
293#define ACPI_IVMD_UNITY (1)
294#define ACPI_IVMD_READ (1<<1)
295#define ACPI_IVMD_WRITE (1<<2)
296#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
297
298/*
299 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
300 */
301
302/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
303
304struct acpi_ivrs_hardware {
305 struct acpi_ivrs_header header;
306 u16 capability_offset; /* Offset for IOMMU control fields */
307 u64 base_address; /* IOMMU control registers */
308 u16 pci_segment_group;
309 u16 info; /* MSI number and unit ID */
310 u32 reserved;
311};
312
313/* Masks for Info field above */
314
315#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
316#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
317
318/*
319 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
320 * Upper two bits of the Type field are the (encoded) length of the structure.
321 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
322 * are reserved for future use but not defined.
323 */
324struct acpi_ivrs_de_header {
325 u8 type;
326 u16 id;
327 u8 data_setting;
328};
329
330/* Length of device entry is in the top two bits of Type field above */
331
332#define ACPI_IVHD_ENTRY_LENGTH 0xC0
333
334/* Values for device entry Type field above */
335
336enum acpi_ivrs_device_entry_type {
337 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
338
339 ACPI_IVRS_TYPE_PAD4 = 0,
340 ACPI_IVRS_TYPE_ALL = 1,
341 ACPI_IVRS_TYPE_SELECT = 2,
342 ACPI_IVRS_TYPE_START = 3,
343 ACPI_IVRS_TYPE_END = 4,
344
345 /* 8-byte device entries */
346
347 ACPI_IVRS_TYPE_PAD8 = 64,
348 ACPI_IVRS_TYPE_NOT_USED = 65,
349 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
350 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
351 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
352 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
353 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */
354};
355
356/* Values for Data field above */
357
358#define ACPI_IVHD_INIT_PASS (1)
359#define ACPI_IVHD_EINT_PASS (1<<1)
360#define ACPI_IVHD_NMI_PASS (1<<2)
361#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
362#define ACPI_IVHD_LINT0_PASS (1<<6)
363#define ACPI_IVHD_LINT1_PASS (1<<7)
364
365/* Types 0-4: 4-byte device entry */
366
367struct acpi_ivrs_device4 {
368 struct acpi_ivrs_de_header header;
369};
370
371/* Types 66-67: 8-byte device entry */
372
373struct acpi_ivrs_device8a {
374 struct acpi_ivrs_de_header header;
375 u8 reserved1;
376 u16 used_id;
377 u8 reserved2;
378};
379
380/* Types 70-71: 8-byte device entry */
381
382struct acpi_ivrs_device8b {
383 struct acpi_ivrs_de_header header;
384 u32 extended_data;
385};
386
387/* Values for extended_data above */
388
389#define ACPI_IVHD_ATS_DISABLED (1<<31)
390
391/* Type 72: 8-byte device entry */
392
393struct acpi_ivrs_device8c {
394 struct acpi_ivrs_de_header header;
395 u8 handle;
396 u16 used_id;
397 u8 variety;
398};
399
400/* Values for Variety field above */
401
402#define ACPI_IVHD_IOAPIC 1
403#define ACPI_IVHD_HPET 2
404
405/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
406
407struct acpi_ivrs_memory {
408 struct acpi_ivrs_header header;
409 u16 aux_data;
410 u64 reserved;
411 u64 start_address;
412 u64 memory_length;
413};
414
415/*******************************************************************************
416 *
417 * LPIT - Low Power Idle Table
418 *
419 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
420 *
421 ******************************************************************************/
422
423struct acpi_table_lpit {
424 struct acpi_table_header header; /* Common ACPI table header */
425};
426
427/* LPIT subtable header */
428
429struct acpi_lpit_header {
430 u32 type; /* Subtable type */
431 u32 length; /* Subtable length */
432 u16 unique_id;
433 u16 reserved;
434 u32 flags;
435};
436
437/* Values for subtable Type above */
438
439enum acpi_lpit_type {
440 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
441 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
442};
443
444/* Masks for Flags field above */
445
446#define ACPI_LPIT_STATE_DISABLED (1)
447#define ACPI_LPIT_NO_COUNTER (1<<1)
448
449/*
450 * LPIT subtables, correspond to Type in struct acpi_lpit_header
451 */
452
453/* 0x00: Native C-state instruction based LPI structure */
454
455struct acpi_lpit_native {
456 struct acpi_lpit_header header;
457 struct acpi_generic_address entry_trigger;
458 u32 residency;
459 u32 latency;
460 struct acpi_generic_address residency_counter;
461 u64 counter_frequency;
462};
463
464/*******************************************************************************
465 *
466 * MADT - Multiple APIC Description Table
467 * Version 3
468 *
469 ******************************************************************************/
470
471struct acpi_table_madt {
472 struct acpi_table_header header; /* Common ACPI table header */
473 u32 address; /* Physical address of local APIC */
474 u32 flags;
475};
476
477/* Masks for Flags field above */
478
479#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
480
481/* Values for PCATCompat flag */
482
483#define ACPI_MADT_DUAL_PIC 1
484#define ACPI_MADT_MULTIPLE_APIC 0
485
486/* Values for MADT subtable type in struct acpi_subtable_header */
487
488enum acpi_madt_type {
489 ACPI_MADT_TYPE_LOCAL_APIC = 0,
490 ACPI_MADT_TYPE_IO_APIC = 1,
491 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
492 ACPI_MADT_TYPE_NMI_SOURCE = 3,
493 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
494 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
495 ACPI_MADT_TYPE_IO_SAPIC = 6,
496 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
497 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
498 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
499 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
500 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
501 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
502 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
503 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
504 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
505 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
506};
507
508/*
509 * MADT Subtables, correspond to Type in struct acpi_subtable_header
510 */
511
512/* 0: Processor Local APIC */
513
514struct acpi_madt_local_apic {
515 struct acpi_subtable_header header;
516 u8 processor_id; /* ACPI processor id */
517 u8 id; /* Processor's local APIC id */
518 u32 lapic_flags;
519};
520
521/* 1: IO APIC */
522
523struct acpi_madt_io_apic {
524 struct acpi_subtable_header header;
525 u8 id; /* I/O APIC ID */
526 u8 reserved; /* reserved - must be zero */
527 u32 address; /* APIC physical address */
528 u32 global_irq_base; /* Global system interrupt where INTI lines start */
529};
530
531/* 2: Interrupt Override */
532
533struct acpi_madt_interrupt_override {
534 struct acpi_subtable_header header;
535 u8 bus; /* 0 - ISA */
536 u8 source_irq; /* Interrupt source (IRQ) */
537 u32 global_irq; /* Global system interrupt */
538 u16 inti_flags;
539};
540
541/* 3: NMI Source */
542
543struct acpi_madt_nmi_source {
544 struct acpi_subtable_header header;
545 u16 inti_flags;
546 u32 global_irq; /* Global system interrupt */
547};
548
549/* 4: Local APIC NMI */
550
551struct acpi_madt_local_apic_nmi {
552 struct acpi_subtable_header header;
553 u8 processor_id; /* ACPI processor id */
554 u16 inti_flags;
555 u8 lint; /* LINTn to which NMI is connected */
556};
557
558/* 5: Address Override */
559
560struct acpi_madt_local_apic_override {
561 struct acpi_subtable_header header;
562 u16 reserved; /* Reserved, must be zero */
563 u64 address; /* APIC physical address */
564};
565
566/* 6: I/O Sapic */
567
568struct acpi_madt_io_sapic {
569 struct acpi_subtable_header header;
570 u8 id; /* I/O SAPIC ID */
571 u8 reserved; /* Reserved, must be zero */
572 u32 global_irq_base; /* Global interrupt for SAPIC start */
573 u64 address; /* SAPIC physical address */
574};
575
576/* 7: Local Sapic */
577
578struct acpi_madt_local_sapic {
579 struct acpi_subtable_header header;
580 u8 processor_id; /* ACPI processor id */
581 u8 id; /* SAPIC ID */
582 u8 eid; /* SAPIC EID */
583 u8 reserved[3]; /* Reserved, must be zero */
584 u32 lapic_flags;
585 u32 uid; /* Numeric UID - ACPI 3.0 */
586 char uid_string[1]; /* String UID - ACPI 3.0 */
587};
588
589/* 8: Platform Interrupt Source */
590
591struct acpi_madt_interrupt_source {
592 struct acpi_subtable_header header;
593 u16 inti_flags;
594 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
595 u8 id; /* Processor ID */
596 u8 eid; /* Processor EID */
597 u8 io_sapic_vector; /* Vector value for PMI interrupts */
598 u32 global_irq; /* Global system interrupt */
599 u32 flags; /* Interrupt Source Flags */
600};
601
602/* Masks for Flags field above */
603
604#define ACPI_MADT_CPEI_OVERRIDE (1)
605
606/* 9: Processor Local X2APIC (ACPI 4.0) */
607
608struct acpi_madt_local_x2apic {
609 struct acpi_subtable_header header;
610 u16 reserved; /* reserved - must be zero */
611 u32 local_apic_id; /* Processor x2APIC ID */
612 u32 lapic_flags;
613 u32 uid; /* ACPI processor UID */
614};
615
616/* 10: Local X2APIC NMI (ACPI 4.0) */
617
618struct acpi_madt_local_x2apic_nmi {
619 struct acpi_subtable_header header;
620 u16 inti_flags;
621 u32 uid; /* ACPI processor UID */
622 u8 lint; /* LINTn to which NMI is connected */
623 u8 reserved[3]; /* reserved - must be zero */
624};
625
626/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
627
628struct acpi_madt_generic_interrupt {
629 struct acpi_subtable_header header;
630 u16 reserved; /* reserved - must be zero */
631 u32 cpu_interface_number;
632 u32 uid;
633 u32 flags;
634 u32 parking_version;
635 u32 performance_interrupt;
636 u64 parked_address;
637 u64 base_address;
638 u64 gicv_base_address;
639 u64 gich_base_address;
640 u32 vgic_interrupt;
641 u64 gicr_base_address;
642 u64 arm_mpidr;
643 u8 efficiency_class;
644 u8 reserved2[1];
645 u16 spe_interrupt; /* ACPI 6.3 */
646};
647
648/* Masks for Flags field above */
649
650/* ACPI_MADT_ENABLED (1) Processor is usable if set */
651#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
652#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
653
654/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
655
656struct acpi_madt_generic_distributor {
657 struct acpi_subtable_header header;
658 u16 reserved; /* reserved - must be zero */
659 u32 gic_id;
660 u64 base_address;
661 u32 global_irq_base;
662 u8 version;
663 u8 reserved2[3]; /* reserved - must be zero */
664};
665
666/* Values for Version field above */
667
668enum acpi_madt_gic_version {
669 ACPI_MADT_GIC_VERSION_NONE = 0,
670 ACPI_MADT_GIC_VERSION_V1 = 1,
671 ACPI_MADT_GIC_VERSION_V2 = 2,
672 ACPI_MADT_GIC_VERSION_V3 = 3,
673 ACPI_MADT_GIC_VERSION_V4 = 4,
674 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
675};
676
677/* 13: Generic MSI Frame (ACPI 5.1) */
678
679struct acpi_madt_generic_msi_frame {
680 struct acpi_subtable_header header;
681 u16 reserved; /* reserved - must be zero */
682 u32 msi_frame_id;
683 u64 base_address;
684 u32 flags;
685 u16 spi_count;
686 u16 spi_base;
687};
688
689/* Masks for Flags field above */
690
691#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
692
693/* 14: Generic Redistributor (ACPI 5.1) */
694
695struct acpi_madt_generic_redistributor {
696 struct acpi_subtable_header header;
697 u16 reserved; /* reserved - must be zero */
698 u64 base_address;
699 u32 length;
700};
701
702/* 15: Generic Translator (ACPI 6.0) */
703
704struct acpi_madt_generic_translator {
705 struct acpi_subtable_header header;
706 u16 reserved; /* reserved - must be zero */
707 u32 translation_id;
708 u64 base_address;
709 u32 reserved2;
710};
711
712/*
713 * Common flags fields for MADT subtables
714 */
715
716/* MADT Local APIC flags */
717
718#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
719
720/* MADT MPS INTI flags (inti_flags) */
721
722#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
723#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
724
725/* Values for MPS INTI flags */
726
727#define ACPI_MADT_POLARITY_CONFORMS 0
728#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
729#define ACPI_MADT_POLARITY_RESERVED 2
730#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
731
732#define ACPI_MADT_TRIGGER_CONFORMS (0)
733#define ACPI_MADT_TRIGGER_EDGE (1<<2)
734#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
735#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
736
737/*******************************************************************************
738 *
739 * MCFG - PCI Memory Mapped Configuration table and subtable
740 * Version 1
741 *
742 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
743 *
744 ******************************************************************************/
745
746struct acpi_table_mcfg {
747 struct acpi_table_header header; /* Common ACPI table header */
748 u8 reserved[8];
749};
750
751/* Subtable */
752
753struct acpi_mcfg_allocation {
754 u64 address; /* Base address, processor-relative */
755 u16 pci_segment; /* PCI segment group number */
756 u8 start_bus_number; /* Starting PCI Bus number */
757 u8 end_bus_number; /* Final PCI Bus number */
758 u32 reserved;
759};
760
761/*******************************************************************************
762 *
763 * MCHI - Management Controller Host Interface Table
764 * Version 1
765 *
766 * Conforms to "Management Component Transport Protocol (MCTP) Host
767 * Interface Specification", Revision 1.0.0a, October 13, 2009
768 *
769 ******************************************************************************/
770
771struct acpi_table_mchi {
772 struct acpi_table_header header; /* Common ACPI table header */
773 u8 interface_type;
774 u8 protocol;
775 u64 protocol_data;
776 u8 interrupt_type;
777 u8 gpe;
778 u8 pci_device_flag;
779 u32 global_interrupt;
780 struct acpi_generic_address control_register;
781 u8 pci_segment;
782 u8 pci_bus;
783 u8 pci_device;
784 u8 pci_function;
785};
786
787/*******************************************************************************
788 *
789 * MPST - Memory Power State Table (ACPI 5.0)
790 * Version 1
791 *
792 ******************************************************************************/
793
794#define ACPI_MPST_CHANNEL_INFO \
795 u8 channel_id; \
796 u8 reserved1[3]; \
797 u16 power_node_count; \
798 u16 reserved2;
799
800/* Main table */
801
802struct acpi_table_mpst {
803 struct acpi_table_header header; /* Common ACPI table header */
804 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
805};
806
807/* Memory Platform Communication Channel Info */
808
809struct acpi_mpst_channel {
810 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
811};
812
813/* Memory Power Node Structure */
814
815struct acpi_mpst_power_node {
816 u8 flags;
817 u8 reserved1;
818 u16 node_id;
819 u32 length;
820 u64 range_address;
821 u64 range_length;
822 u32 num_power_states;
823 u32 num_physical_components;
824};
825
826/* Values for Flags field above */
827
828#define ACPI_MPST_ENABLED 1
829#define ACPI_MPST_POWER_MANAGED 2
830#define ACPI_MPST_HOT_PLUG_CAPABLE 4
831
832/* Memory Power State Structure (follows POWER_NODE above) */
833
834struct acpi_mpst_power_state {
835 u8 power_state;
836 u8 info_index;
837};
838
839/* Physical Component ID Structure (follows POWER_STATE above) */
840
841struct acpi_mpst_component {
842 u16 component_id;
843};
844
845/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
846
847struct acpi_mpst_data_hdr {
848 u16 characteristics_count;
849 u16 reserved;
850};
851
852struct acpi_mpst_power_data {
853 u8 structure_id;
854 u8 flags;
855 u16 reserved1;
856 u32 average_power;
857 u32 power_saving;
858 u64 exit_latency;
859 u64 reserved2;
860};
861
862/* Values for Flags field above */
863
864#define ACPI_MPST_PRESERVE 1
865#define ACPI_MPST_AUTOENTRY 2
866#define ACPI_MPST_AUTOEXIT 4
867
868/* Shared Memory Region (not part of an ACPI table) */
869
870struct acpi_mpst_shared {
871 u32 signature;
872 u16 pcc_command;
873 u16 pcc_status;
874 u32 command_register;
875 u32 status_register;
876 u32 power_state_id;
877 u32 power_node_id;
878 u64 energy_consumed;
879 u64 average_power;
880};
881
882/*******************************************************************************
883 *
884 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
885 * Version 1
886 *
887 ******************************************************************************/
888
889struct acpi_table_msct {
890 struct acpi_table_header header; /* Common ACPI table header */
891 u32 proximity_offset; /* Location of proximity info struct(s) */
892 u32 max_proximity_domains; /* Max number of proximity domains */
893 u32 max_clock_domains; /* Max number of clock domains */
894 u64 max_address; /* Max physical address in system */
895};
896
897/* subtable - Maximum Proximity Domain Information. Version 1 */
898
899struct acpi_msct_proximity {
900 u8 revision;
901 u8 length;
902 u32 range_start; /* Start of domain range */
903 u32 range_end; /* End of domain range */
904 u32 processor_capacity;
905 u64 memory_capacity; /* In bytes */
906};
907
908/*******************************************************************************
909 *
910 * MSDM - Microsoft Data Management table
911 *
912 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
913 * November 29, 2011. Copyright 2011 Microsoft
914 *
915 ******************************************************************************/
916
917/* Basic MSDM table is only the common ACPI header */
918
919struct acpi_table_msdm {
920 struct acpi_table_header header; /* Common ACPI table header */
921};
922
923/*******************************************************************************
924 *
925 * MTMR - MID Timer Table
926 * Version 1
927 *
928 * Conforms to "Simple Firmware Interface Specification",
929 * Draft 0.8.2, Oct 19, 2010
930 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
931 *
932 ******************************************************************************/
933
934struct acpi_table_mtmr {
935 struct acpi_table_header header; /* Common ACPI table header */
936};
937
938/* MTMR entry */
939
940struct acpi_mtmr_entry {
941 struct acpi_generic_address physical_address;
942 u32 frequency;
943 u32 irq;
944};
945
946/*******************************************************************************
947 *
948 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
949 * Version 1
950 *
951 ******************************************************************************/
952
953struct acpi_table_nfit {
954 struct acpi_table_header header; /* Common ACPI table header */
955 u32 reserved; /* Reserved, must be zero */
956};
957
958/* Subtable header for NFIT */
959
960struct acpi_nfit_header {
961 u16 type;
962 u16 length;
963};
964
965/* Values for subtable type in struct acpi_nfit_header */
966
967enum acpi_nfit_type {
968 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
969 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
970 ACPI_NFIT_TYPE_INTERLEAVE = 2,
971 ACPI_NFIT_TYPE_SMBIOS = 3,
972 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
973 ACPI_NFIT_TYPE_DATA_REGION = 5,
974 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
975 ACPI_NFIT_TYPE_CAPABILITIES = 7,
976 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
977};
978
979/*
980 * NFIT Subtables
981 */
982
983/* 0: System Physical Address Range Structure */
984
985struct acpi_nfit_system_address {
986 struct acpi_nfit_header header;
987 u16 range_index;
988 u16 flags;
989 u32 reserved; /* Reserved, must be zero */
990 u32 proximity_domain;
991 u8 range_guid[16];
992 u64 address;
993 u64 length;
994 u64 memory_mapping;
995};
996
997/* Flags */
998
999#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1000#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1001
1002/* Range Type GUIDs appear in the include/acuuid.h file */
1003
1004/* 1: Memory Device to System Address Range Map Structure */
1005
1006struct acpi_nfit_memory_map {
1007 struct acpi_nfit_header header;
1008 u32 device_handle;
1009 u16 physical_id;
1010 u16 region_id;
1011 u16 range_index;
1012 u16 region_index;
1013 u64 region_size;
1014 u64 region_offset;
1015 u64 address;
1016 u16 interleave_index;
1017 u16 interleave_ways;
1018 u16 flags;
1019 u16 reserved; /* Reserved, must be zero */
1020};
1021
1022/* Flags */
1023
1024#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1025#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1026#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1027#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1028#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1029#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1030#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1031
1032/* 2: Interleave Structure */
1033
1034struct acpi_nfit_interleave {
1035 struct acpi_nfit_header header;
1036 u16 interleave_index;
1037 u16 reserved; /* Reserved, must be zero */
1038 u32 line_count;
1039 u32 line_size;
1040 u32 line_offset[1]; /* Variable length */
1041};
1042
1043/* 3: SMBIOS Management Information Structure */
1044
1045struct acpi_nfit_smbios {
1046 struct acpi_nfit_header header;
1047 u32 reserved; /* Reserved, must be zero */
1048 u8 data[1]; /* Variable length */
1049};
1050
1051/* 4: NVDIMM Control Region Structure */
1052
1053struct acpi_nfit_control_region {
1054 struct acpi_nfit_header header;
1055 u16 region_index;
1056 u16 vendor_id;
1057 u16 device_id;
1058 u16 revision_id;
1059 u16 subsystem_vendor_id;
1060 u16 subsystem_device_id;
1061 u16 subsystem_revision_id;
1062 u8 valid_fields;
1063 u8 manufacturing_location;
1064 u16 manufacturing_date;
1065 u8 reserved[2]; /* Reserved, must be zero */
1066 u32 serial_number;
1067 u16 code;
1068 u16 windows;
1069 u64 window_size;
1070 u64 command_offset;
1071 u64 command_size;
1072 u64 status_offset;
1073 u64 status_size;
1074 u16 flags;
1075 u8 reserved1[6]; /* Reserved, must be zero */
1076};
1077
1078/* Flags */
1079
1080#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1081
1082/* valid_fields bits */
1083
1084#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1085
1086/* 5: NVDIMM Block Data Window Region Structure */
1087
1088struct acpi_nfit_data_region {
1089 struct acpi_nfit_header header;
1090 u16 region_index;
1091 u16 windows;
1092 u64 offset;
1093 u64 size;
1094 u64 capacity;
1095 u64 start_address;
1096};
1097
1098/* 6: Flush Hint Address Structure */
1099
1100struct acpi_nfit_flush_address {
1101 struct acpi_nfit_header header;
1102 u32 device_handle;
1103 u16 hint_count;
1104 u8 reserved[6]; /* Reserved, must be zero */
1105 u64 hint_address[1]; /* Variable length */
1106};
1107
1108/* 7: Platform Capabilities Structure */
1109
1110struct acpi_nfit_capabilities {
1111 struct acpi_nfit_header header;
1112 u8 highest_capability;
1113 u8 reserved[3]; /* Reserved, must be zero */
1114 u32 capabilities;
1115 u32 reserved2;
1116};
1117
1118/* Capabilities Flags */
1119
1120#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1121#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1122#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1123
1124/*
1125 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1126 */
1127struct nfit_device_handle {
1128 u32 handle;
1129};
1130
1131/* Device handle construction and extraction macros */
1132
1133#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1134#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1135#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1136#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1137#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1138
1139#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1140#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1141#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1142#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1143#define ACPI_NFIT_NODE_ID_OFFSET 16
1144
1145/* Macro to construct a NFIT/NVDIMM device handle */
1146
1147#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1148 ((dimm) | \
1149 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1150 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1151 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1152 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1153
1154/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1155
1156#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1157 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1158
1159#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1160 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1161
1162#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1163 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1164
1165#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1166 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1167
1168#define ACPI_NFIT_GET_NODE_ID(handle) \
1169 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1170
1171/*******************************************************************************
1172 *
1173 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1174 * Version 2 (ACPI 6.2)
1175 *
1176 ******************************************************************************/
1177
1178struct acpi_table_pcct {
1179 struct acpi_table_header header; /* Common ACPI table header */
1180 u32 flags;
1181 u64 reserved;
1182};
1183
1184/* Values for Flags field above */
1185
1186#define ACPI_PCCT_DOORBELL 1
1187
1188/* Values for subtable type in struct acpi_subtable_header */
1189
1190enum acpi_pcct_type {
1191 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1192 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1193 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1194 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1195 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1196 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
1197};
1198
1199/*
1200 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1201 */
1202
1203/* 0: Generic Communications Subspace */
1204
1205struct acpi_pcct_subspace {
1206 struct acpi_subtable_header header;
1207 u8 reserved[6];
1208 u64 base_address;
1209 u64 length;
1210 struct acpi_generic_address doorbell_register;
1211 u64 preserve_mask;
1212 u64 write_mask;
1213 u32 latency;
1214 u32 max_access_rate;
1215 u16 min_turnaround_time;
1216};
1217
1218/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1219
1220struct acpi_pcct_hw_reduced {
1221 struct acpi_subtable_header header;
1222 u32 platform_interrupt;
1223 u8 flags;
1224 u8 reserved;
1225 u64 base_address;
1226 u64 length;
1227 struct acpi_generic_address doorbell_register;
1228 u64 preserve_mask;
1229 u64 write_mask;
1230 u32 latency;
1231 u32 max_access_rate;
1232 u16 min_turnaround_time;
1233};
1234
1235/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1236
1237struct acpi_pcct_hw_reduced_type2 {
1238 struct acpi_subtable_header header;
1239 u32 platform_interrupt;
1240 u8 flags;
1241 u8 reserved;
1242 u64 base_address;
1243 u64 length;
1244 struct acpi_generic_address doorbell_register;
1245 u64 preserve_mask;
1246 u64 write_mask;
1247 u32 latency;
1248 u32 max_access_rate;
1249 u16 min_turnaround_time;
1250 struct acpi_generic_address platform_ack_register;
1251 u64 ack_preserve_mask;
1252 u64 ack_write_mask;
1253};
1254
1255/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1256
1257struct acpi_pcct_ext_pcc_master {
1258 struct acpi_subtable_header header;
1259 u32 platform_interrupt;
1260 u8 flags;
1261 u8 reserved1;
1262 u64 base_address;
1263 u32 length;
1264 struct acpi_generic_address doorbell_register;
1265 u64 preserve_mask;
1266 u64 write_mask;
1267 u32 latency;
1268 u32 max_access_rate;
1269 u32 min_turnaround_time;
1270 struct acpi_generic_address platform_ack_register;
1271 u64 ack_preserve_mask;
1272 u64 ack_set_mask;
1273 u64 reserved2;
1274 struct acpi_generic_address cmd_complete_register;
1275 u64 cmd_complete_mask;
1276 struct acpi_generic_address cmd_update_register;
1277 u64 cmd_update_preserve_mask;
1278 u64 cmd_update_set_mask;
1279 struct acpi_generic_address error_status_register;
1280 u64 error_status_mask;
1281};
1282
1283/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1284
1285struct acpi_pcct_ext_pcc_slave {
1286 struct acpi_subtable_header header;
1287 u32 platform_interrupt;
1288 u8 flags;
1289 u8 reserved1;
1290 u64 base_address;
1291 u32 length;
1292 struct acpi_generic_address doorbell_register;
1293 u64 preserve_mask;
1294 u64 write_mask;
1295 u32 latency;
1296 u32 max_access_rate;
1297 u32 min_turnaround_time;
1298 struct acpi_generic_address platform_ack_register;
1299 u64 ack_preserve_mask;
1300 u64 ack_set_mask;
1301 u64 reserved2;
1302 struct acpi_generic_address cmd_complete_register;
1303 u64 cmd_complete_mask;
1304 struct acpi_generic_address cmd_update_register;
1305 u64 cmd_update_preserve_mask;
1306 u64 cmd_update_set_mask;
1307 struct acpi_generic_address error_status_register;
1308 u64 error_status_mask;
1309};
1310
1311/* Values for doorbell flags above */
1312
1313#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1314#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1315
1316/*
1317 * PCC memory structures (not part of the ACPI table)
1318 */
1319
1320/* Shared Memory Region */
1321
1322struct acpi_pcct_shared_memory {
1323 u32 signature;
1324 u16 command;
1325 u16 status;
1326};
1327
1328/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1329
1330struct acpi_pcct_ext_pcc_shared_memory {
1331 u32 signature;
1332 u32 flags;
1333 u32 length;
1334 u32 command;
1335};
1336
1337/*******************************************************************************
1338 *
1339 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1340 * Version 0
1341 *
1342 ******************************************************************************/
1343
1344struct acpi_table_pdtt {
1345 struct acpi_table_header header; /* Common ACPI table header */
1346 u8 trigger_count;
1347 u8 reserved[3];
1348 u32 array_offset;
1349};
1350
1351/*
1352 * PDTT Communication Channel Identifier Structure.
1353 * The number of these structures is defined by trigger_count above,
1354 * starting at array_offset.
1355 */
1356struct acpi_pdtt_channel {
1357 u8 subchannel_id;
1358 u8 flags;
1359};
1360
1361/* Flags for above */
1362
1363#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1364#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1365#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1366
1367/*******************************************************************************
1368 *
1369 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1370 * Version 1
1371 *
1372 ******************************************************************************/
1373
1374struct acpi_table_pmtt {
1375 struct acpi_table_header header; /* Common ACPI table header */
1376 u32 reserved;
1377};
1378
1379/* Common header for PMTT subtables that follow main table */
1380
1381struct acpi_pmtt_header {
1382 u8 type;
1383 u8 reserved1;
1384 u16 length;
1385 u16 flags;
1386 u16 reserved2;
1387};
1388
1389/* Values for Type field above */
1390
1391#define ACPI_PMTT_TYPE_SOCKET 0
1392#define ACPI_PMTT_TYPE_CONTROLLER 1
1393#define ACPI_PMTT_TYPE_DIMM 2
1394#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1395
1396/* Values for Flags field above */
1397
1398#define ACPI_PMTT_TOP_LEVEL 0x0001
1399#define ACPI_PMTT_PHYSICAL 0x0002
1400#define ACPI_PMTT_MEMORY_TYPE 0x000C
1401
1402/*
1403 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1404 */
1405
1406/* 0: Socket Structure */
1407
1408struct acpi_pmtt_socket {
1409 struct acpi_pmtt_header header;
1410 u16 socket_id;
1411 u16 reserved;
1412};
1413
1414/* 1: Memory Controller subtable */
1415
1416struct acpi_pmtt_controller {
1417 struct acpi_pmtt_header header;
1418 u32 read_latency;
1419 u32 write_latency;
1420 u32 read_bandwidth;
1421 u32 write_bandwidth;
1422 u16 access_width;
1423 u16 alignment;
1424 u16 reserved;
1425 u16 domain_count;
1426};
1427
1428/* 1a: Proximity Domain substructure */
1429
1430struct acpi_pmtt_domain {
1431 u32 proximity_domain;
1432};
1433
1434/* 2: Physical Component Identifier (DIMM) */
1435
1436struct acpi_pmtt_physical_component {
1437 struct acpi_pmtt_header header;
1438 u16 component_id;
1439 u16 reserved;
1440 u32 memory_size;
1441 u32 bios_handle;
1442};
1443
1444/*******************************************************************************
1445 *
1446 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1447 * Version 1
1448 *
1449 ******************************************************************************/
1450
1451struct acpi_table_pptt {
1452 struct acpi_table_header header; /* Common ACPI table header */
1453};
1454
1455/* Values for Type field above */
1456
1457enum acpi_pptt_type {
1458 ACPI_PPTT_TYPE_PROCESSOR = 0,
1459 ACPI_PPTT_TYPE_CACHE = 1,
1460 ACPI_PPTT_TYPE_ID = 2,
1461 ACPI_PPTT_TYPE_RESERVED = 3
1462};
1463
1464/* 0: Processor Hierarchy Node Structure */
1465
1466struct acpi_pptt_processor {
1467 struct acpi_subtable_header header;
1468 u16 reserved;
1469 u32 flags;
1470 u32 parent;
1471 u32 acpi_processor_id;
1472 u32 number_of_priv_resources;
1473};
1474
1475/* Flags */
1476
1477#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1478#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1479#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1480#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1481#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
1482
1483/* 1: Cache Type Structure */
1484
1485struct acpi_pptt_cache {
1486 struct acpi_subtable_header header;
1487 u16 reserved;
1488 u32 flags;
1489 u32 next_level_of_cache;
1490 u32 size;
1491 u32 number_of_sets;
1492 u8 associativity;
1493 u8 attributes;
1494 u16 line_size;
1495};
1496
1497/* Flags */
1498
1499#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1500#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1501#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1502#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1503#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1504#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1505#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1506
1507/* Masks for Attributes */
1508
1509#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1510#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1511#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1512
1513/* Attributes describing cache */
1514#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1515#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1516#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1517#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1518
1519#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1520#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1521#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1522#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1523
1524#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1525#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1526
1527/* 2: ID Structure */
1528
1529struct acpi_pptt_id {
1530 struct acpi_subtable_header header;
1531 u16 reserved;
1532 u32 vendor_id;
1533 u64 level1_id;
1534 u64 level2_id;
1535 u16 major_rev;
1536 u16 minor_rev;
1537 u16 spin_rev;
1538};
1539
1540/*******************************************************************************
1541 *
1542 * RASF - RAS Feature Table (ACPI 5.0)
1543 * Version 1
1544 *
1545 ******************************************************************************/
1546
1547struct acpi_table_rasf {
1548 struct acpi_table_header header; /* Common ACPI table header */
1549 u8 channel_id[12];
1550};
1551
1552/* RASF Platform Communication Channel Shared Memory Region */
1553
1554struct acpi_rasf_shared_memory {
1555 u32 signature;
1556 u16 command;
1557 u16 status;
1558 u16 version;
1559 u8 capabilities[16];
1560 u8 set_capabilities[16];
1561 u16 num_parameter_blocks;
1562 u32 set_capabilities_status;
1563};
1564
1565/* RASF Parameter Block Structure Header */
1566
1567struct acpi_rasf_parameter_block {
1568 u16 type;
1569 u16 version;
1570 u16 length;
1571};
1572
1573/* RASF Parameter Block Structure for PATROL_SCRUB */
1574
1575struct acpi_rasf_patrol_scrub_parameter {
1576 struct acpi_rasf_parameter_block header;
1577 u16 patrol_scrub_command;
1578 u64 requested_address_range[2];
1579 u64 actual_address_range[2];
1580 u16 flags;
1581 u8 requested_speed;
1582};
1583
1584/* Masks for Flags and Speed fields above */
1585
1586#define ACPI_RASF_SCRUBBER_RUNNING 1
1587#define ACPI_RASF_SPEED (7<<1)
1588#define ACPI_RASF_SPEED_SLOW (0<<1)
1589#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1590#define ACPI_RASF_SPEED_FAST (7<<1)
1591
1592/* Channel Commands */
1593
1594enum acpi_rasf_commands {
1595 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1596};
1597
1598/* Platform RAS Capabilities */
1599
1600enum acpi_rasf_capabiliities {
1601 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1602 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1603};
1604
1605/* Patrol Scrub Commands */
1606
1607enum acpi_rasf_patrol_scrub_commands {
1608 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1609 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1610 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1611};
1612
1613/* Channel Command flags */
1614
1615#define ACPI_RASF_GENERATE_SCI (1<<15)
1616
1617/* Status values */
1618
1619enum acpi_rasf_status {
1620 ACPI_RASF_SUCCESS = 0,
1621 ACPI_RASF_NOT_VALID = 1,
1622 ACPI_RASF_NOT_SUPPORTED = 2,
1623 ACPI_RASF_BUSY = 3,
1624 ACPI_RASF_FAILED = 4,
1625 ACPI_RASF_ABORTED = 5,
1626 ACPI_RASF_INVALID_DATA = 6
1627};
1628
1629/* Status flags */
1630
1631#define ACPI_RASF_COMMAND_COMPLETE (1)
1632#define ACPI_RASF_SCI_DOORBELL (1<<1)
1633#define ACPI_RASF_ERROR (1<<2)
1634#define ACPI_RASF_STATUS (0x1F<<3)
1635
1636/*******************************************************************************
1637 *
1638 * SBST - Smart Battery Specification Table
1639 * Version 1
1640 *
1641 ******************************************************************************/
1642
1643struct acpi_table_sbst {
1644 struct acpi_table_header header; /* Common ACPI table header */
1645 u32 warning_level;
1646 u32 low_level;
1647 u32 critical_level;
1648};
1649
1650/*******************************************************************************
1651 *
1652 * SDEI - Software Delegated Exception Interface Descriptor Table
1653 *
1654 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1655 * May 8th, 2017. Copyright 2017 ARM Ltd.
1656 *
1657 ******************************************************************************/
1658
1659struct acpi_table_sdei {
1660 struct acpi_table_header header; /* Common ACPI table header */
1661};
1662
1663/*******************************************************************************
1664 *
1665 * SDEV - Secure Devices Table (ACPI 6.2)
1666 * Version 1
1667 *
1668 ******************************************************************************/
1669
1670struct acpi_table_sdev {
1671 struct acpi_table_header header; /* Common ACPI table header */
1672};
1673
1674struct acpi_sdev_header {
1675 u8 type;
1676 u8 flags;
1677 u16 length;
1678};
1679
1680/* Values for subtable type above */
1681
1682enum acpi_sdev_type {
1683 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1684 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1685 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1686};
1687
1688/* Values for flags above */
1689
1690#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
1691
1692/*
1693 * SDEV subtables
1694 */
1695
1696/* 0: Namespace Device Based Secure Device Structure */
1697
1698struct acpi_sdev_namespace {
1699 struct acpi_sdev_header header;
1700 u16 device_id_offset;
1701 u16 device_id_length;
1702 u16 vendor_data_offset;
1703 u16 vendor_data_length;
1704};
1705
1706/* 1: PCIe Endpoint Device Based Device Structure */
1707
1708struct acpi_sdev_pcie {
1709 struct acpi_sdev_header header;
1710 u16 segment;
1711 u16 start_bus;
1712 u16 path_offset;
1713 u16 path_length;
1714 u16 vendor_data_offset;
1715 u16 vendor_data_length;
1716};
1717
1718/* 1a: PCIe Endpoint path entry */
1719
1720struct acpi_sdev_pcie_path {
1721 u8 device;
1722 u8 function;
1723};
1724
1725/* Reset to default packing */
1726
1727#pragma pack()
1728
1729#endif /* __ACTBL2_H__ */
1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *
6 * Copyright (C) 2000 - 2023, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */
28#define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */
29#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
30#define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */
31#define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */
32#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
33#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
34#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
35#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
36#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
37#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
38#define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */
39#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
40#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
41#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
42#define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
43#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
44#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
45#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
46#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
47#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
48#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
49#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
50#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
51#define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
52#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
53#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
54#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
55#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
56#define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */
57
58/*
59 * All tables must be byte-packed to match the ACPI specification, since
60 * the tables are provided by the system BIOS.
61 */
62#pragma pack(1)
63
64/*
65 * Note: C bitfields are not used for this reason:
66 *
67 * "Bitfields are great and easy to read, but unfortunately the C language
68 * does not specify the layout of bitfields in memory, which means they are
69 * essentially useless for dealing with packed data in on-disk formats or
70 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
71 * this decision was a design error in C. Ritchie could have picked an order
72 * and stuck with it." Norman Ramsey.
73 * See http://stackoverflow.com/a/1053662/41661
74 */
75
76/*******************************************************************************
77 *
78 * AEST - Arm Error Source Table
79 *
80 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document
81 * September 2020.
82 *
83 ******************************************************************************/
84
85struct acpi_table_aest {
86 struct acpi_table_header header;
87};
88
89/* Common Subtable header - one per Node Structure (Subtable) */
90
91struct acpi_aest_hdr {
92 u8 type;
93 u16 length;
94 u8 reserved;
95 u32 node_specific_offset;
96 u32 node_interface_offset;
97 u32 node_interrupt_offset;
98 u32 node_interrupt_count;
99 u64 timestamp_rate;
100 u64 reserved1;
101 u64 error_injection_rate;
102};
103
104/* Values for Type above */
105
106#define ACPI_AEST_PROCESSOR_ERROR_NODE 0
107#define ACPI_AEST_MEMORY_ERROR_NODE 1
108#define ACPI_AEST_SMMU_ERROR_NODE 2
109#define ACPI_AEST_VENDOR_ERROR_NODE 3
110#define ACPI_AEST_GIC_ERROR_NODE 4
111#define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */
112
113/*
114 * AEST subtables (Error nodes)
115 */
116
117/* 0: Processor Error */
118
119typedef struct acpi_aest_processor {
120 u32 processor_id;
121 u8 resource_type;
122 u8 reserved;
123 u8 flags;
124 u8 revision;
125 u64 processor_affinity;
126
127} acpi_aest_processor;
128
129/* Values for resource_type above, related structs below */
130
131#define ACPI_AEST_CACHE_RESOURCE 0
132#define ACPI_AEST_TLB_RESOURCE 1
133#define ACPI_AEST_GENERIC_RESOURCE 2
134#define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */
135
136/* 0R: Processor Cache Resource Substructure */
137
138typedef struct acpi_aest_processor_cache {
139 u32 cache_reference;
140 u32 reserved;
141
142} acpi_aest_processor_cache;
143
144/* Values for cache_type above */
145
146#define ACPI_AEST_CACHE_DATA 0
147#define ACPI_AEST_CACHE_INSTRUCTION 1
148#define ACPI_AEST_CACHE_UNIFIED 2
149#define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */
150
151/* 1R: Processor TLB Resource Substructure */
152
153typedef struct acpi_aest_processor_tlb {
154 u32 tlb_level;
155 u32 reserved;
156
157} acpi_aest_processor_tlb;
158
159/* 2R: Processor Generic Resource Substructure */
160
161typedef struct acpi_aest_processor_generic {
162 u32 resource;
163
164} acpi_aest_processor_generic;
165
166/* 1: Memory Error */
167
168typedef struct acpi_aest_memory {
169 u32 srat_proximity_domain;
170
171} acpi_aest_memory;
172
173/* 2: Smmu Error */
174
175typedef struct acpi_aest_smmu {
176 u32 iort_node_reference;
177 u32 subcomponent_reference;
178
179} acpi_aest_smmu;
180
181/* 3: Vendor Defined */
182
183typedef struct acpi_aest_vendor {
184 u32 acpi_hid;
185 u32 acpi_uid;
186 u8 vendor_specific_data[16];
187
188} acpi_aest_vendor;
189
190/* 4: Gic Error */
191
192typedef struct acpi_aest_gic {
193 u32 interface_type;
194 u32 instance_id;
195
196} acpi_aest_gic;
197
198/* Values for interface_type above */
199
200#define ACPI_AEST_GIC_CPU 0
201#define ACPI_AEST_GIC_DISTRIBUTOR 1
202#define ACPI_AEST_GIC_REDISTRIBUTOR 2
203#define ACPI_AEST_GIC_ITS 3
204#define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */
205
206/* Node Interface Structure */
207
208typedef struct acpi_aest_node_interface {
209 u8 type;
210 u8 reserved[3];
211 u32 flags;
212 u64 address;
213 u32 error_record_index;
214 u32 error_record_count;
215 u64 error_record_implemented;
216 u64 error_status_reporting;
217 u64 addressing_mode;
218
219} acpi_aest_node_interface;
220
221/* Values for Type field above */
222
223#define ACPI_AEST_NODE_SYSTEM_REGISTER 0
224#define ACPI_AEST_NODE_MEMORY_MAPPED 1
225#define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */
226
227/* Node Interrupt Structure */
228
229typedef struct acpi_aest_node_interrupt {
230 u8 type;
231 u8 reserved[2];
232 u8 flags;
233 u32 gsiv;
234 u8 iort_id;
235 u8 reserved1[3];
236
237} acpi_aest_node_interrupt;
238
239/* Values for Type field above */
240
241#define ACPI_AEST_NODE_FAULT_HANDLING 0
242#define ACPI_AEST_NODE_ERROR_RECOVERY 1
243#define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */
244
245/*******************************************************************************
246 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface
247 *
248 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document"
249 * ARM DEN0093 v1.1
250 *
251 ******************************************************************************/
252struct acpi_table_agdi {
253 struct acpi_table_header header; /* Common ACPI table header */
254 u8 flags;
255 u8 reserved[3];
256 u32 sdei_event;
257 u32 gsiv;
258};
259
260/* Mask for Flags field above */
261
262#define ACPI_AGDI_SIGNALING_MODE (1)
263
264/*******************************************************************************
265 *
266 * APMT - ARM Performance Monitoring Unit Table
267 *
268 * Conforms to:
269 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document
270 * ARM DEN0117 v1.0 November 25, 2021
271 *
272 ******************************************************************************/
273
274struct acpi_table_apmt {
275 struct acpi_table_header header; /* Common ACPI table header */
276};
277
278#define ACPI_APMT_NODE_ID_LENGTH 4
279
280/*
281 * APMT subtables
282 */
283struct acpi_apmt_node {
284 u16 length;
285 u8 flags;
286 u8 type;
287 u32 id;
288 u64 inst_primary;
289 u32 inst_secondary;
290 u64 base_address0;
291 u64 base_address1;
292 u32 ovflw_irq;
293 u32 reserved;
294 u32 ovflw_irq_flags;
295 u32 proc_affinity;
296 u32 impl_id;
297};
298
299/* Masks for Flags field above */
300
301#define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0)
302#define ACPI_APMT_FLAGS_AFFINITY (1<<1)
303#define ACPI_APMT_FLAGS_ATOMIC (1<<2)
304
305/* Values for Flags dual page field above */
306
307#define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0)
308#define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0)
309
310/* Values for Flags processor affinity field above */
311#define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1)
312#define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1)
313
314/* Values for Flags 64-bit atomic field above */
315#define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2)
316#define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2)
317
318/* Values for Type field above */
319
320enum acpi_apmt_node_type {
321 ACPI_APMT_NODE_TYPE_MC = 0x00,
322 ACPI_APMT_NODE_TYPE_SMMU = 0x01,
323 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02,
324 ACPI_APMT_NODE_TYPE_ACPI = 0x03,
325 ACPI_APMT_NODE_TYPE_CACHE = 0x04,
326 ACPI_APMT_NODE_TYPE_COUNT
327};
328
329/* Masks for ovflw_irq_flags field above */
330
331#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0)
332#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1)
333
334/* Values for ovflw_irq_flags mode field above */
335
336#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0)
337#define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0)
338
339/* Values for ovflw_irq_flags type field above */
340
341#define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1)
342
343/*******************************************************************************
344 *
345 * BDAT - BIOS Data ACPI Table
346 *
347 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
348 * Nov 2020
349 *
350 ******************************************************************************/
351
352struct acpi_table_bdat {
353 struct acpi_table_header header;
354 struct acpi_generic_address gas;
355};
356
357/*******************************************************************************
358 *
359 * CCEL - CC-Event Log
360 * From: "Guest-Host-Communication Interface (GHCI) for Intel
361 * Trust Domain Extensions (Intel TDX)". Feb 2022
362 *
363 ******************************************************************************/
364
365struct acpi_table_ccel {
366 struct acpi_table_header header; /* Common ACPI table header */
367 u8 CCtype;
368 u8 Ccsub_type;
369 u16 reserved;
370 u64 log_area_minimum_length;
371 u64 log_area_start_address;
372};
373
374/*******************************************************************************
375 *
376 * IORT - IO Remapping Table
377 *
378 * Conforms to "IO Remapping Table System Software on ARM Platforms",
379 * Document number: ARM DEN 0049E.e, Sep 2022
380 *
381 ******************************************************************************/
382
383struct acpi_table_iort {
384 struct acpi_table_header header;
385 u32 node_count;
386 u32 node_offset;
387 u32 reserved;
388};
389
390/*
391 * IORT subtables
392 */
393struct acpi_iort_node {
394 u8 type;
395 u16 length;
396 u8 revision;
397 u32 identifier;
398 u32 mapping_count;
399 u32 mapping_offset;
400 char node_data[];
401};
402
403/* Values for subtable Type above */
404
405enum acpi_iort_node_type {
406 ACPI_IORT_NODE_ITS_GROUP = 0x00,
407 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
408 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
409 ACPI_IORT_NODE_SMMU = 0x03,
410 ACPI_IORT_NODE_SMMU_V3 = 0x04,
411 ACPI_IORT_NODE_PMCG = 0x05,
412 ACPI_IORT_NODE_RMR = 0x06,
413};
414
415struct acpi_iort_id_mapping {
416 u32 input_base; /* Lowest value in input range */
417 u32 id_count; /* Number of IDs */
418 u32 output_base; /* Lowest value in output range */
419 u32 output_reference; /* A reference to the output node */
420 u32 flags;
421};
422
423/* Masks for Flags field above for IORT subtable */
424
425#define ACPI_IORT_ID_SINGLE_MAPPING (1)
426
427struct acpi_iort_memory_access {
428 u32 cache_coherency;
429 u8 hints;
430 u16 reserved;
431 u8 memory_flags;
432};
433
434/* Values for cache_coherency field above */
435
436#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
437#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
438
439/* Masks for Hints field above */
440
441#define ACPI_IORT_HT_TRANSIENT (1)
442#define ACPI_IORT_HT_WRITE (1<<1)
443#define ACPI_IORT_HT_READ (1<<2)
444#define ACPI_IORT_HT_OVERRIDE (1<<3)
445
446/* Masks for memory_flags field above */
447
448#define ACPI_IORT_MF_COHERENCY (1)
449#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
450
451/*
452 * IORT node specific subtables
453 */
454struct acpi_iort_its_group {
455 u32 its_count;
456 u32 identifiers[]; /* GIC ITS identifier array */
457};
458
459struct acpi_iort_named_component {
460 u32 node_flags;
461 u64 memory_properties; /* Memory access properties */
462 u8 memory_address_limit; /* Memory address size limit */
463 char device_name[]; /* Path of namespace object */
464};
465
466/* Masks for Flags field above */
467
468#define ACPI_IORT_NC_STALL_SUPPORTED (1)
469#define ACPI_IORT_NC_PASID_BITS (31<<1)
470
471struct acpi_iort_root_complex {
472 u64 memory_properties; /* Memory access properties */
473 u32 ats_attribute;
474 u32 pci_segment_number;
475 u8 memory_address_limit; /* Memory address size limit */
476 u16 pasid_capabilities; /* PASID Capabilities */
477 u8 reserved[]; /* Reserved, must be zero */
478};
479
480/* Masks for ats_attribute field above */
481
482#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
483#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
484#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
485
486/* Masks for pasid_capabilities field above */
487#define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */
488
489struct acpi_iort_smmu {
490 u64 base_address; /* SMMU base address */
491 u64 span; /* Length of memory range */
492 u32 model;
493 u32 flags;
494 u32 global_interrupt_offset;
495 u32 context_interrupt_count;
496 u32 context_interrupt_offset;
497 u32 pmu_interrupt_count;
498 u32 pmu_interrupt_offset;
499 u64 interrupts[]; /* Interrupt array */
500};
501
502/* Values for Model field above */
503
504#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
505#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
506#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
507#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
508#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
509#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
510
511/* Masks for Flags field above */
512
513#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
514#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
515
516/* Global interrupt format */
517
518struct acpi_iort_smmu_gsi {
519 u32 nsg_irpt;
520 u32 nsg_irpt_flags;
521 u32 nsg_cfg_irpt;
522 u32 nsg_cfg_irpt_flags;
523};
524
525struct acpi_iort_smmu_v3 {
526 u64 base_address; /* SMMUv3 base address */
527 u32 flags;
528 u32 reserved;
529 u64 vatos_address;
530 u32 model;
531 u32 event_gsiv;
532 u32 pri_gsiv;
533 u32 gerr_gsiv;
534 u32 sync_gsiv;
535 u32 pxm;
536 u32 id_mapping_index;
537};
538
539/* Values for Model field above */
540
541#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
542#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
543#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
544
545/* Masks for Flags field above */
546
547#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
548#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
549#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
550#define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4)
551
552struct acpi_iort_pmcg {
553 u64 page0_base_address;
554 u32 overflow_gsiv;
555 u32 node_reference;
556 u64 page1_base_address;
557};
558
559struct acpi_iort_rmr {
560 u32 flags;
561 u32 rmr_count;
562 u32 rmr_offset;
563};
564
565/* Masks for Flags field above */
566#define ACPI_IORT_RMR_REMAP_PERMITTED (1)
567#define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1)
568
569/*
570 * Macro to access the Access Attributes in flags field above:
571 * Access Attributes is encoded in bits 9:2
572 */
573#define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF)
574
575/* Values for above Access Attributes */
576
577#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00
578#define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01
579#define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02
580#define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03
581#define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04
582#define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05
583
584struct acpi_iort_rmr_desc {
585 u64 base_address;
586 u64 length;
587 u32 reserved;
588};
589
590/*******************************************************************************
591 *
592 * IVRS - I/O Virtualization Reporting Structure
593 * Version 1
594 *
595 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
596 * Revision 1.26, February 2009.
597 *
598 ******************************************************************************/
599
600struct acpi_table_ivrs {
601 struct acpi_table_header header; /* Common ACPI table header */
602 u32 info; /* Common virtualization info */
603 u64 reserved;
604};
605
606/* Values for Info field above */
607
608#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
609#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
610#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
611
612/* IVRS subtable header */
613
614struct acpi_ivrs_header {
615 u8 type; /* Subtable type */
616 u8 flags;
617 u16 length; /* Subtable length */
618 u16 device_id; /* ID of IOMMU */
619};
620
621/* Values for subtable Type above */
622
623enum acpi_ivrs_type {
624 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
625 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
626 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
627 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
628 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
629 ACPI_IVRS_TYPE_MEMORY3 = 0x22
630};
631
632/* Masks for Flags field above for IVHD subtable */
633
634#define ACPI_IVHD_TT_ENABLE (1)
635#define ACPI_IVHD_PASS_PW (1<<1)
636#define ACPI_IVHD_RES_PASS_PW (1<<2)
637#define ACPI_IVHD_ISOC (1<<3)
638#define ACPI_IVHD_IOTLB (1<<4)
639
640/* Masks for Flags field above for IVMD subtable */
641
642#define ACPI_IVMD_UNITY (1)
643#define ACPI_IVMD_READ (1<<1)
644#define ACPI_IVMD_WRITE (1<<2)
645#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
646
647/*
648 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
649 */
650
651/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
652
653struct acpi_ivrs_hardware_10 {
654 struct acpi_ivrs_header header;
655 u16 capability_offset; /* Offset for IOMMU control fields */
656 u64 base_address; /* IOMMU control registers */
657 u16 pci_segment_group;
658 u16 info; /* MSI number and unit ID */
659 u32 feature_reporting;
660};
661
662/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
663
664struct acpi_ivrs_hardware_11 {
665 struct acpi_ivrs_header header;
666 u16 capability_offset; /* Offset for IOMMU control fields */
667 u64 base_address; /* IOMMU control registers */
668 u16 pci_segment_group;
669 u16 info; /* MSI number and unit ID */
670 u32 attributes;
671 u64 efr_register_image;
672 u64 reserved;
673};
674
675/* Masks for Info field above */
676
677#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
678#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
679
680/*
681 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
682 * Upper two bits of the Type field are the (encoded) length of the structure.
683 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
684 * are reserved for future use but not defined.
685 */
686struct acpi_ivrs_de_header {
687 u8 type;
688 u16 id;
689 u8 data_setting;
690};
691
692/* Length of device entry is in the top two bits of Type field above */
693
694#define ACPI_IVHD_ENTRY_LENGTH 0xC0
695
696/* Values for device entry Type field above */
697
698enum acpi_ivrs_device_entry_type {
699 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
700
701 ACPI_IVRS_TYPE_PAD4 = 0,
702 ACPI_IVRS_TYPE_ALL = 1,
703 ACPI_IVRS_TYPE_SELECT = 2,
704 ACPI_IVRS_TYPE_START = 3,
705 ACPI_IVRS_TYPE_END = 4,
706
707 /* 8-byte device entries */
708
709 ACPI_IVRS_TYPE_PAD8 = 64,
710 ACPI_IVRS_TYPE_NOT_USED = 65,
711 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
712 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
713 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
714 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
715 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
716
717 /* Variable-length device entries */
718
719 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
720};
721
722/* Values for Data field above */
723
724#define ACPI_IVHD_INIT_PASS (1)
725#define ACPI_IVHD_EINT_PASS (1<<1)
726#define ACPI_IVHD_NMI_PASS (1<<2)
727#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
728#define ACPI_IVHD_LINT0_PASS (1<<6)
729#define ACPI_IVHD_LINT1_PASS (1<<7)
730
731/* Types 0-4: 4-byte device entry */
732
733struct acpi_ivrs_device4 {
734 struct acpi_ivrs_de_header header;
735};
736
737/* Types 66-67: 8-byte device entry */
738
739struct acpi_ivrs_device8a {
740 struct acpi_ivrs_de_header header;
741 u8 reserved1;
742 u16 used_id;
743 u8 reserved2;
744};
745
746/* Types 70-71: 8-byte device entry */
747
748struct acpi_ivrs_device8b {
749 struct acpi_ivrs_de_header header;
750 u32 extended_data;
751};
752
753/* Values for extended_data above */
754
755#define ACPI_IVHD_ATS_DISABLED (1<<31)
756
757/* Type 72: 8-byte device entry */
758
759struct acpi_ivrs_device8c {
760 struct acpi_ivrs_de_header header;
761 u8 handle;
762 u16 used_id;
763 u8 variety;
764};
765
766/* Values for Variety field above */
767
768#define ACPI_IVHD_IOAPIC 1
769#define ACPI_IVHD_HPET 2
770
771/* Type 240: variable-length device entry */
772
773struct acpi_ivrs_device_hid {
774 struct acpi_ivrs_de_header header;
775 u64 acpi_hid;
776 u64 acpi_cid;
777 u8 uid_type;
778 u8 uid_length;
779};
780
781/* Values for uid_type above */
782
783#define ACPI_IVRS_UID_NOT_PRESENT 0
784#define ACPI_IVRS_UID_IS_INTEGER 1
785#define ACPI_IVRS_UID_IS_STRING 2
786
787/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
788
789struct acpi_ivrs_memory {
790 struct acpi_ivrs_header header;
791 u16 aux_data;
792 u64 reserved;
793 u64 start_address;
794 u64 memory_length;
795};
796
797/*******************************************************************************
798 *
799 * LPIT - Low Power Idle Table
800 *
801 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
802 *
803 ******************************************************************************/
804
805struct acpi_table_lpit {
806 struct acpi_table_header header; /* Common ACPI table header */
807};
808
809/* LPIT subtable header */
810
811struct acpi_lpit_header {
812 u32 type; /* Subtable type */
813 u32 length; /* Subtable length */
814 u16 unique_id;
815 u16 reserved;
816 u32 flags;
817};
818
819/* Values for subtable Type above */
820
821enum acpi_lpit_type {
822 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
823 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
824};
825
826/* Masks for Flags field above */
827
828#define ACPI_LPIT_STATE_DISABLED (1)
829#define ACPI_LPIT_NO_COUNTER (1<<1)
830
831/*
832 * LPIT subtables, correspond to Type in struct acpi_lpit_header
833 */
834
835/* 0x00: Native C-state instruction based LPI structure */
836
837struct acpi_lpit_native {
838 struct acpi_lpit_header header;
839 struct acpi_generic_address entry_trigger;
840 u32 residency;
841 u32 latency;
842 struct acpi_generic_address residency_counter;
843 u64 counter_frequency;
844};
845
846/*******************************************************************************
847 *
848 * MADT - Multiple APIC Description Table
849 * Version 3
850 *
851 ******************************************************************************/
852
853struct acpi_table_madt {
854 struct acpi_table_header header; /* Common ACPI table header */
855 u32 address; /* Physical address of local APIC */
856 u32 flags;
857};
858
859/* Masks for Flags field above */
860
861#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
862
863/* Values for PCATCompat flag */
864
865#define ACPI_MADT_DUAL_PIC 1
866#define ACPI_MADT_MULTIPLE_APIC 0
867
868/* Values for MADT subtable type in struct acpi_subtable_header */
869
870enum acpi_madt_type {
871 ACPI_MADT_TYPE_LOCAL_APIC = 0,
872 ACPI_MADT_TYPE_IO_APIC = 1,
873 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
874 ACPI_MADT_TYPE_NMI_SOURCE = 3,
875 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
876 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
877 ACPI_MADT_TYPE_IO_SAPIC = 6,
878 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
879 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
880 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
881 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
882 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
883 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
884 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
885 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
886 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
887 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
888 ACPI_MADT_TYPE_CORE_PIC = 17,
889 ACPI_MADT_TYPE_LIO_PIC = 18,
890 ACPI_MADT_TYPE_HT_PIC = 19,
891 ACPI_MADT_TYPE_EIO_PIC = 20,
892 ACPI_MADT_TYPE_MSI_PIC = 21,
893 ACPI_MADT_TYPE_BIO_PIC = 22,
894 ACPI_MADT_TYPE_LPC_PIC = 23,
895 ACPI_MADT_TYPE_RINTC = 24,
896 ACPI_MADT_TYPE_IMSIC = 25,
897 ACPI_MADT_TYPE_APLIC = 26,
898 ACPI_MADT_TYPE_PLIC = 27,
899 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */
900 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */
901};
902
903/*
904 * MADT Subtables, correspond to Type in struct acpi_subtable_header
905 */
906
907/* 0: Processor Local APIC */
908
909struct acpi_madt_local_apic {
910 struct acpi_subtable_header header;
911 u8 processor_id; /* ACPI processor id */
912 u8 id; /* Processor's local APIC id */
913 u32 lapic_flags;
914};
915
916/* 1: IO APIC */
917
918struct acpi_madt_io_apic {
919 struct acpi_subtable_header header;
920 u8 id; /* I/O APIC ID */
921 u8 reserved; /* reserved - must be zero */
922 u32 address; /* APIC physical address */
923 u32 global_irq_base; /* Global system interrupt where INTI lines start */
924};
925
926/* 2: Interrupt Override */
927
928struct acpi_madt_interrupt_override {
929 struct acpi_subtable_header header;
930 u8 bus; /* 0 - ISA */
931 u8 source_irq; /* Interrupt source (IRQ) */
932 u32 global_irq; /* Global system interrupt */
933 u16 inti_flags;
934};
935
936/* 3: NMI Source */
937
938struct acpi_madt_nmi_source {
939 struct acpi_subtable_header header;
940 u16 inti_flags;
941 u32 global_irq; /* Global system interrupt */
942};
943
944/* 4: Local APIC NMI */
945
946struct acpi_madt_local_apic_nmi {
947 struct acpi_subtable_header header;
948 u8 processor_id; /* ACPI processor id */
949 u16 inti_flags;
950 u8 lint; /* LINTn to which NMI is connected */
951};
952
953/* 5: Address Override */
954
955struct acpi_madt_local_apic_override {
956 struct acpi_subtable_header header;
957 u16 reserved; /* Reserved, must be zero */
958 u64 address; /* APIC physical address */
959};
960
961/* 6: I/O Sapic */
962
963struct acpi_madt_io_sapic {
964 struct acpi_subtable_header header;
965 u8 id; /* I/O SAPIC ID */
966 u8 reserved; /* Reserved, must be zero */
967 u32 global_irq_base; /* Global interrupt for SAPIC start */
968 u64 address; /* SAPIC physical address */
969};
970
971/* 7: Local Sapic */
972
973struct acpi_madt_local_sapic {
974 struct acpi_subtable_header header;
975 u8 processor_id; /* ACPI processor id */
976 u8 id; /* SAPIC ID */
977 u8 eid; /* SAPIC EID */
978 u8 reserved[3]; /* Reserved, must be zero */
979 u32 lapic_flags;
980 u32 uid; /* Numeric UID - ACPI 3.0 */
981 char uid_string[]; /* String UID - ACPI 3.0 */
982};
983
984/* 8: Platform Interrupt Source */
985
986struct acpi_madt_interrupt_source {
987 struct acpi_subtable_header header;
988 u16 inti_flags;
989 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
990 u8 id; /* Processor ID */
991 u8 eid; /* Processor EID */
992 u8 io_sapic_vector; /* Vector value for PMI interrupts */
993 u32 global_irq; /* Global system interrupt */
994 u32 flags; /* Interrupt Source Flags */
995};
996
997/* Masks for Flags field above */
998
999#define ACPI_MADT_CPEI_OVERRIDE (1)
1000
1001/* 9: Processor Local X2APIC (ACPI 4.0) */
1002
1003struct acpi_madt_local_x2apic {
1004 struct acpi_subtable_header header;
1005 u16 reserved; /* reserved - must be zero */
1006 u32 local_apic_id; /* Processor x2APIC ID */
1007 u32 lapic_flags;
1008 u32 uid; /* ACPI processor UID */
1009};
1010
1011/* 10: Local X2APIC NMI (ACPI 4.0) */
1012
1013struct acpi_madt_local_x2apic_nmi {
1014 struct acpi_subtable_header header;
1015 u16 inti_flags;
1016 u32 uid; /* ACPI processor UID */
1017 u8 lint; /* LINTn to which NMI is connected */
1018 u8 reserved[3]; /* reserved - must be zero */
1019};
1020
1021/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */
1022
1023struct acpi_madt_generic_interrupt {
1024 struct acpi_subtable_header header;
1025 u16 reserved; /* reserved - must be zero */
1026 u32 cpu_interface_number;
1027 u32 uid;
1028 u32 flags;
1029 u32 parking_version;
1030 u32 performance_interrupt;
1031 u64 parked_address;
1032 u64 base_address;
1033 u64 gicv_base_address;
1034 u64 gich_base_address;
1035 u32 vgic_interrupt;
1036 u64 gicr_base_address;
1037 u64 arm_mpidr;
1038 u8 efficiency_class;
1039 u8 reserved2[1];
1040 u16 spe_interrupt; /* ACPI 6.3 */
1041 u16 trbe_interrupt; /* ACPI 6.5 */
1042};
1043
1044/* Masks for Flags field above */
1045
1046/* ACPI_MADT_ENABLED (1) Processor is usable if set */
1047#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
1048#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
1049#define ACPI_MADT_GICC_ONLINE_CAPABLE (1<<3) /* 03: Processor is online capable */
1050#define ACPI_MADT_GICC_NON_COHERENT (1<<4) /* 04: GIC redistributor is not coherent */
1051
1052/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
1053
1054struct acpi_madt_generic_distributor {
1055 struct acpi_subtable_header header;
1056 u16 reserved; /* reserved - must be zero */
1057 u32 gic_id;
1058 u64 base_address;
1059 u32 global_irq_base;
1060 u8 version;
1061 u8 reserved2[3]; /* reserved - must be zero */
1062};
1063
1064/* Values for Version field above */
1065
1066enum acpi_madt_gic_version {
1067 ACPI_MADT_GIC_VERSION_NONE = 0,
1068 ACPI_MADT_GIC_VERSION_V1 = 1,
1069 ACPI_MADT_GIC_VERSION_V2 = 2,
1070 ACPI_MADT_GIC_VERSION_V3 = 3,
1071 ACPI_MADT_GIC_VERSION_V4 = 4,
1072 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
1073};
1074
1075/* 13: Generic MSI Frame (ACPI 5.1) */
1076
1077struct acpi_madt_generic_msi_frame {
1078 struct acpi_subtable_header header;
1079 u16 reserved; /* reserved - must be zero */
1080 u32 msi_frame_id;
1081 u64 base_address;
1082 u32 flags;
1083 u16 spi_count;
1084 u16 spi_base;
1085};
1086
1087/* Masks for Flags field above */
1088
1089#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
1090
1091/* 14: Generic Redistributor (ACPI 5.1) */
1092
1093struct acpi_madt_generic_redistributor {
1094 struct acpi_subtable_header header;
1095 u8 flags;
1096 u8 reserved; /* reserved - must be zero */
1097 u64 base_address;
1098 u32 length;
1099};
1100
1101#define ACPI_MADT_GICR_NON_COHERENT (1)
1102
1103/* 15: Generic Translator (ACPI 6.0) */
1104
1105struct acpi_madt_generic_translator {
1106 struct acpi_subtable_header header;
1107 u8 flags;
1108 u8 reserved; /* reserved - must be zero */
1109 u32 translation_id;
1110 u64 base_address;
1111 u32 reserved2;
1112};
1113
1114#define ACPI_MADT_ITS_NON_COHERENT (1)
1115
1116/* 16: Multiprocessor wakeup (ACPI 6.4) */
1117
1118struct acpi_madt_multiproc_wakeup {
1119 struct acpi_subtable_header header;
1120 u16 mailbox_version;
1121 u32 reserved; /* reserved - must be zero */
1122 u64 base_address;
1123};
1124
1125#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
1126#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
1127
1128struct acpi_madt_multiproc_wakeup_mailbox {
1129 u16 command;
1130 u16 reserved; /* reserved - must be zero */
1131 u32 apic_id;
1132 u64 wakeup_vector;
1133 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
1134 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
1135};
1136
1137#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
1138
1139/* 17: CPU Core Interrupt Controller (ACPI 6.5) */
1140
1141struct acpi_madt_core_pic {
1142 struct acpi_subtable_header header;
1143 u8 version;
1144 u32 processor_id;
1145 u32 core_id;
1146 u32 flags;
1147};
1148
1149/* Values for Version field above */
1150
1151enum acpi_madt_core_pic_version {
1152 ACPI_MADT_CORE_PIC_VERSION_NONE = 0,
1153 ACPI_MADT_CORE_PIC_VERSION_V1 = 1,
1154 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1155};
1156
1157/* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */
1158
1159struct acpi_madt_lio_pic {
1160 struct acpi_subtable_header header;
1161 u8 version;
1162 u64 address;
1163 u16 size;
1164 u8 cascade[2];
1165 u32 cascade_map[2];
1166};
1167
1168/* Values for Version field above */
1169
1170enum acpi_madt_lio_pic_version {
1171 ACPI_MADT_LIO_PIC_VERSION_NONE = 0,
1172 ACPI_MADT_LIO_PIC_VERSION_V1 = 1,
1173 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1174};
1175
1176/* 19: HT Interrupt Controller (ACPI 6.5) */
1177
1178struct acpi_madt_ht_pic {
1179 struct acpi_subtable_header header;
1180 u8 version;
1181 u64 address;
1182 u16 size;
1183 u8 cascade[8];
1184};
1185
1186/* Values for Version field above */
1187
1188enum acpi_madt_ht_pic_version {
1189 ACPI_MADT_HT_PIC_VERSION_NONE = 0,
1190 ACPI_MADT_HT_PIC_VERSION_V1 = 1,
1191 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1192};
1193
1194/* 20: Extend I/O Interrupt Controller (ACPI 6.5) */
1195
1196struct acpi_madt_eio_pic {
1197 struct acpi_subtable_header header;
1198 u8 version;
1199 u8 cascade;
1200 u8 node;
1201 u64 node_map;
1202};
1203
1204/* Values for Version field above */
1205
1206enum acpi_madt_eio_pic_version {
1207 ACPI_MADT_EIO_PIC_VERSION_NONE = 0,
1208 ACPI_MADT_EIO_PIC_VERSION_V1 = 1,
1209 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1210};
1211
1212/* 21: MSI Interrupt Controller (ACPI 6.5) */
1213
1214struct acpi_madt_msi_pic {
1215 struct acpi_subtable_header header;
1216 u8 version;
1217 u64 msg_address;
1218 u32 start;
1219 u32 count;
1220};
1221
1222/* Values for Version field above */
1223
1224enum acpi_madt_msi_pic_version {
1225 ACPI_MADT_MSI_PIC_VERSION_NONE = 0,
1226 ACPI_MADT_MSI_PIC_VERSION_V1 = 1,
1227 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1228};
1229
1230/* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */
1231
1232struct acpi_madt_bio_pic {
1233 struct acpi_subtable_header header;
1234 u8 version;
1235 u64 address;
1236 u16 size;
1237 u16 id;
1238 u16 gsi_base;
1239};
1240
1241/* Values for Version field above */
1242
1243enum acpi_madt_bio_pic_version {
1244 ACPI_MADT_BIO_PIC_VERSION_NONE = 0,
1245 ACPI_MADT_BIO_PIC_VERSION_V1 = 1,
1246 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1247};
1248
1249/* 23: LPC Interrupt Controller (ACPI 6.5) */
1250
1251struct acpi_madt_lpc_pic {
1252 struct acpi_subtable_header header;
1253 u8 version;
1254 u64 address;
1255 u16 size;
1256 u8 cascade;
1257};
1258
1259/* Values for Version field above */
1260
1261enum acpi_madt_lpc_pic_version {
1262 ACPI_MADT_LPC_PIC_VERSION_NONE = 0,
1263 ACPI_MADT_LPC_PIC_VERSION_V1 = 1,
1264 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1265};
1266
1267/* 24: RISC-V INTC */
1268struct acpi_madt_rintc {
1269 struct acpi_subtable_header header;
1270 u8 version;
1271 u8 reserved;
1272 u32 flags;
1273 u64 hart_id;
1274 u32 uid; /* ACPI processor UID */
1275 u32 ext_intc_id; /* External INTC Id */
1276 u64 imsic_addr; /* IMSIC base address */
1277 u32 imsic_size; /* IMSIC size */
1278};
1279
1280/* Values for RISC-V INTC Version field above */
1281
1282enum acpi_madt_rintc_version {
1283 ACPI_MADT_RINTC_VERSION_NONE = 0,
1284 ACPI_MADT_RINTC_VERSION_V1 = 1,
1285 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */
1286};
1287
1288/* 25: RISC-V IMSIC */
1289struct acpi_madt_imsic {
1290 struct acpi_subtable_header header;
1291 u8 version;
1292 u8 reserved;
1293 u32 flags;
1294 u16 num_ids;
1295 u16 num_guest_ids;
1296 u8 guest_index_bits;
1297 u8 hart_index_bits;
1298 u8 group_index_bits;
1299 u8 group_index_shift;
1300};
1301
1302/* 26: RISC-V APLIC */
1303struct acpi_madt_aplic {
1304 struct acpi_subtable_header header;
1305 u8 version;
1306 u8 id;
1307 u32 flags;
1308 u8 hw_id[8];
1309 u16 num_idcs;
1310 u16 num_sources;
1311 u32 gsi_base;
1312 u64 base_addr;
1313 u32 size;
1314};
1315
1316/* 27: RISC-V PLIC */
1317struct acpi_madt_plic {
1318 struct acpi_subtable_header header;
1319 u8 version;
1320 u8 id;
1321 u8 hw_id[8];
1322 u16 num_irqs;
1323 u16 max_prio;
1324 u32 flags;
1325 u32 size;
1326 u64 base_addr;
1327 u32 gsi_base;
1328};
1329
1330/* 80: OEM data */
1331
1332struct acpi_madt_oem_data {
1333 ACPI_FLEX_ARRAY(u8, oem_data);
1334};
1335
1336/*
1337 * Common flags fields for MADT subtables
1338 */
1339
1340/* MADT Local APIC flags */
1341
1342#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
1343#define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */
1344
1345/* MADT MPS INTI flags (inti_flags) */
1346
1347#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
1348#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
1349
1350/* Values for MPS INTI flags */
1351
1352#define ACPI_MADT_POLARITY_CONFORMS 0
1353#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
1354#define ACPI_MADT_POLARITY_RESERVED 2
1355#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
1356
1357#define ACPI_MADT_TRIGGER_CONFORMS (0)
1358#define ACPI_MADT_TRIGGER_EDGE (1<<2)
1359#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
1360#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
1361
1362/*******************************************************************************
1363 *
1364 * MCFG - PCI Memory Mapped Configuration table and subtable
1365 * Version 1
1366 *
1367 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
1368 *
1369 ******************************************************************************/
1370
1371struct acpi_table_mcfg {
1372 struct acpi_table_header header; /* Common ACPI table header */
1373 u8 reserved[8];
1374};
1375
1376/* Subtable */
1377
1378struct acpi_mcfg_allocation {
1379 u64 address; /* Base address, processor-relative */
1380 u16 pci_segment; /* PCI segment group number */
1381 u8 start_bus_number; /* Starting PCI Bus number */
1382 u8 end_bus_number; /* Final PCI Bus number */
1383 u32 reserved;
1384};
1385
1386/*******************************************************************************
1387 *
1388 * MCHI - Management Controller Host Interface Table
1389 * Version 1
1390 *
1391 * Conforms to "Management Component Transport Protocol (MCTP) Host
1392 * Interface Specification", Revision 1.0.0a, October 13, 2009
1393 *
1394 ******************************************************************************/
1395
1396struct acpi_table_mchi {
1397 struct acpi_table_header header; /* Common ACPI table header */
1398 u8 interface_type;
1399 u8 protocol;
1400 u64 protocol_data;
1401 u8 interrupt_type;
1402 u8 gpe;
1403 u8 pci_device_flag;
1404 u32 global_interrupt;
1405 struct acpi_generic_address control_register;
1406 u8 pci_segment;
1407 u8 pci_bus;
1408 u8 pci_device;
1409 u8 pci_function;
1410};
1411
1412/*******************************************************************************
1413 *
1414 * MPAM - Memory System Resource Partitioning and Monitoring
1415 *
1416 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0"
1417 * Document number: ARM DEN 0065, December, 2022.
1418 *
1419 ******************************************************************************/
1420
1421/* MPAM RIS locator types. Table 11, Location types */
1422enum acpi_mpam_locator_type {
1423 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0,
1424 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1,
1425 ACPI_MPAM_LOCATION_TYPE_SMMU = 2,
1426 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3,
1427 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4,
1428 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5,
1429 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF
1430};
1431
1432/* MPAM Functional dependency descriptor. Table 10 */
1433struct acpi_mpam_func_deps {
1434 u32 producer;
1435 u32 reserved;
1436};
1437
1438/* MPAM Processor cache locator descriptor. Table 13 */
1439struct acpi_mpam_resource_cache_locator {
1440 u64 cache_reference;
1441 u32 reserved;
1442};
1443
1444/* MPAM Memory locator descriptor. Table 14 */
1445struct acpi_mpam_resource_memory_locator {
1446 u64 proximity_domain;
1447 u32 reserved;
1448};
1449
1450/* MPAM SMMU locator descriptor. Table 15 */
1451struct acpi_mpam_resource_smmu_locator {
1452 u64 smmu_interface;
1453 u32 reserved;
1454};
1455
1456/* MPAM Memory-side cache locator descriptor. Table 16 */
1457struct acpi_mpam_resource_memcache_locator {
1458 u8 reserved[7];
1459 u8 level;
1460 u32 reference;
1461};
1462
1463/* MPAM ACPI device locator descriptor. Table 17 */
1464struct acpi_mpam_resource_acpi_locator {
1465 u64 acpi_hw_id;
1466 u32 acpi_unique_id;
1467};
1468
1469/* MPAM Interconnect locator descriptor. Table 18 */
1470struct acpi_mpam_resource_interconnect_locator {
1471 u64 inter_connect_desc_tbl_off;
1472 u32 reserved;
1473};
1474
1475/* MPAM Locator structure. Table 12 */
1476struct acpi_mpam_resource_generic_locator {
1477 u64 descriptor1;
1478 u32 descriptor2;
1479};
1480
1481union acpi_mpam_resource_locator {
1482 struct acpi_mpam_resource_cache_locator cache_locator;
1483 struct acpi_mpam_resource_memory_locator memory_locator;
1484 struct acpi_mpam_resource_smmu_locator smmu_locator;
1485 struct acpi_mpam_resource_memcache_locator mem_cache_locator;
1486 struct acpi_mpam_resource_acpi_locator acpi_locator;
1487 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator;
1488 struct acpi_mpam_resource_generic_locator generic_locator;
1489};
1490
1491/* Memory System Component Resource Node Structure Table 9 */
1492struct acpi_mpam_resource_node {
1493 u32 identifier;
1494 u8 ris_index;
1495 u16 reserved1;
1496 u8 locator_type;
1497 union acpi_mpam_resource_locator locator;
1498 u32 num_functional_deps;
1499};
1500
1501/* Memory System Component (MSC) Node Structure. Table 4 */
1502struct acpi_mpam_msc_node {
1503 u16 length;
1504 u8 interface_type;
1505 u8 reserved;
1506 u32 identifier;
1507 u64 base_address;
1508 u32 mmio_size;
1509 u32 overflow_interrupt;
1510 u32 overflow_interrupt_flags;
1511 u32 reserved1;
1512 u32 overflow_interrupt_affinity;
1513 u32 error_interrupt;
1514 u32 error_interrupt_flags;
1515 u32 reserved2;
1516 u32 error_interrupt_affinity;
1517 u32 max_nrdy_usec;
1518 u64 hardware_id_linked_device;
1519 u32 instance_id_linked_device;
1520 u32 num_resouce_nodes;
1521};
1522
1523struct acpi_table_mpam {
1524 struct acpi_table_header header; /* Common ACPI table header */
1525};
1526
1527/*******************************************************************************
1528 *
1529 * MPST - Memory Power State Table (ACPI 5.0)
1530 * Version 1
1531 *
1532 ******************************************************************************/
1533
1534#define ACPI_MPST_CHANNEL_INFO \
1535 u8 channel_id; \
1536 u8 reserved1[3]; \
1537 u16 power_node_count; \
1538 u16 reserved2;
1539
1540/* Main table */
1541
1542struct acpi_table_mpst {
1543 struct acpi_table_header header; /* Common ACPI table header */
1544 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1545};
1546
1547/* Memory Platform Communication Channel Info */
1548
1549struct acpi_mpst_channel {
1550 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
1551};
1552
1553/* Memory Power Node Structure */
1554
1555struct acpi_mpst_power_node {
1556 u8 flags;
1557 u8 reserved1;
1558 u16 node_id;
1559 u32 length;
1560 u64 range_address;
1561 u64 range_length;
1562 u32 num_power_states;
1563 u32 num_physical_components;
1564};
1565
1566/* Values for Flags field above */
1567
1568#define ACPI_MPST_ENABLED 1
1569#define ACPI_MPST_POWER_MANAGED 2
1570#define ACPI_MPST_HOT_PLUG_CAPABLE 4
1571
1572/* Memory Power State Structure (follows POWER_NODE above) */
1573
1574struct acpi_mpst_power_state {
1575 u8 power_state;
1576 u8 info_index;
1577};
1578
1579/* Physical Component ID Structure (follows POWER_STATE above) */
1580
1581struct acpi_mpst_component {
1582 u16 component_id;
1583};
1584
1585/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1586
1587struct acpi_mpst_data_hdr {
1588 u16 characteristics_count;
1589 u16 reserved;
1590};
1591
1592struct acpi_mpst_power_data {
1593 u8 structure_id;
1594 u8 flags;
1595 u16 reserved1;
1596 u32 average_power;
1597 u32 power_saving;
1598 u64 exit_latency;
1599 u64 reserved2;
1600};
1601
1602/* Values for Flags field above */
1603
1604#define ACPI_MPST_PRESERVE 1
1605#define ACPI_MPST_AUTOENTRY 2
1606#define ACPI_MPST_AUTOEXIT 4
1607
1608/* Shared Memory Region (not part of an ACPI table) */
1609
1610struct acpi_mpst_shared {
1611 u32 signature;
1612 u16 pcc_command;
1613 u16 pcc_status;
1614 u32 command_register;
1615 u32 status_register;
1616 u32 power_state_id;
1617 u32 power_node_id;
1618 u64 energy_consumed;
1619 u64 average_power;
1620};
1621
1622/*******************************************************************************
1623 *
1624 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1625 * Version 1
1626 *
1627 ******************************************************************************/
1628
1629struct acpi_table_msct {
1630 struct acpi_table_header header; /* Common ACPI table header */
1631 u32 proximity_offset; /* Location of proximity info struct(s) */
1632 u32 max_proximity_domains; /* Max number of proximity domains */
1633 u32 max_clock_domains; /* Max number of clock domains */
1634 u64 max_address; /* Max physical address in system */
1635};
1636
1637/* subtable - Maximum Proximity Domain Information. Version 1 */
1638
1639struct acpi_msct_proximity {
1640 u8 revision;
1641 u8 length;
1642 u32 range_start; /* Start of domain range */
1643 u32 range_end; /* End of domain range */
1644 u32 processor_capacity;
1645 u64 memory_capacity; /* In bytes */
1646};
1647
1648/*******************************************************************************
1649 *
1650 * MSDM - Microsoft Data Management table
1651 *
1652 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1653 * November 29, 2011. Copyright 2011 Microsoft
1654 *
1655 ******************************************************************************/
1656
1657/* Basic MSDM table is only the common ACPI header */
1658
1659struct acpi_table_msdm {
1660 struct acpi_table_header header; /* Common ACPI table header */
1661};
1662
1663/*******************************************************************************
1664 *
1665 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1666 * Version 1
1667 *
1668 ******************************************************************************/
1669
1670struct acpi_table_nfit {
1671 struct acpi_table_header header; /* Common ACPI table header */
1672 u32 reserved; /* Reserved, must be zero */
1673};
1674
1675/* Subtable header for NFIT */
1676
1677struct acpi_nfit_header {
1678 u16 type;
1679 u16 length;
1680};
1681
1682/* Values for subtable type in struct acpi_nfit_header */
1683
1684enum acpi_nfit_type {
1685 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1686 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1687 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1688 ACPI_NFIT_TYPE_SMBIOS = 3,
1689 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1690 ACPI_NFIT_TYPE_DATA_REGION = 5,
1691 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1692 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1693 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1694};
1695
1696/*
1697 * NFIT Subtables
1698 */
1699
1700/* 0: System Physical Address Range Structure */
1701
1702struct acpi_nfit_system_address {
1703 struct acpi_nfit_header header;
1704 u16 range_index;
1705 u16 flags;
1706 u32 reserved; /* Reserved, must be zero */
1707 u32 proximity_domain;
1708 u8 range_guid[16];
1709 u64 address;
1710 u64 length;
1711 u64 memory_mapping;
1712 u64 location_cookie; /* ACPI 6.4 */
1713};
1714
1715/* Flags */
1716
1717#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1718#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1719#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1720
1721/* Range Type GUIDs appear in the include/acuuid.h file */
1722
1723/* 1: Memory Device to System Address Range Map Structure */
1724
1725struct acpi_nfit_memory_map {
1726 struct acpi_nfit_header header;
1727 u32 device_handle;
1728 u16 physical_id;
1729 u16 region_id;
1730 u16 range_index;
1731 u16 region_index;
1732 u64 region_size;
1733 u64 region_offset;
1734 u64 address;
1735 u16 interleave_index;
1736 u16 interleave_ways;
1737 u16 flags;
1738 u16 reserved; /* Reserved, must be zero */
1739};
1740
1741/* Flags */
1742
1743#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1744#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1745#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1746#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1747#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1748#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1749#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1750
1751/* 2: Interleave Structure */
1752
1753struct acpi_nfit_interleave {
1754 struct acpi_nfit_header header;
1755 u16 interleave_index;
1756 u16 reserved; /* Reserved, must be zero */
1757 u32 line_count;
1758 u32 line_size;
1759 u32 line_offset[]; /* Variable length */
1760};
1761
1762/* 3: SMBIOS Management Information Structure */
1763
1764struct acpi_nfit_smbios {
1765 struct acpi_nfit_header header;
1766 u32 reserved; /* Reserved, must be zero */
1767 u8 data[]; /* Variable length */
1768};
1769
1770/* 4: NVDIMM Control Region Structure */
1771
1772struct acpi_nfit_control_region {
1773 struct acpi_nfit_header header;
1774 u16 region_index;
1775 u16 vendor_id;
1776 u16 device_id;
1777 u16 revision_id;
1778 u16 subsystem_vendor_id;
1779 u16 subsystem_device_id;
1780 u16 subsystem_revision_id;
1781 u8 valid_fields;
1782 u8 manufacturing_location;
1783 u16 manufacturing_date;
1784 u8 reserved[2]; /* Reserved, must be zero */
1785 u32 serial_number;
1786 u16 code;
1787 u16 windows;
1788 u64 window_size;
1789 u64 command_offset;
1790 u64 command_size;
1791 u64 status_offset;
1792 u64 status_size;
1793 u16 flags;
1794 u8 reserved1[6]; /* Reserved, must be zero */
1795};
1796
1797/* Flags */
1798
1799#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1800
1801/* valid_fields bits */
1802
1803#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1804
1805/* 5: NVDIMM Block Data Window Region Structure */
1806
1807struct acpi_nfit_data_region {
1808 struct acpi_nfit_header header;
1809 u16 region_index;
1810 u16 windows;
1811 u64 offset;
1812 u64 size;
1813 u64 capacity;
1814 u64 start_address;
1815};
1816
1817/* 6: Flush Hint Address Structure */
1818
1819struct acpi_nfit_flush_address {
1820 struct acpi_nfit_header header;
1821 u32 device_handle;
1822 u16 hint_count;
1823 u8 reserved[6]; /* Reserved, must be zero */
1824 u64 hint_address[]; /* Variable length */
1825};
1826
1827/* 7: Platform Capabilities Structure */
1828
1829struct acpi_nfit_capabilities {
1830 struct acpi_nfit_header header;
1831 u8 highest_capability;
1832 u8 reserved[3]; /* Reserved, must be zero */
1833 u32 capabilities;
1834 u32 reserved2;
1835};
1836
1837/* Capabilities Flags */
1838
1839#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1840#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1841#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1842
1843/*
1844 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1845 */
1846struct nfit_device_handle {
1847 u32 handle;
1848};
1849
1850/* Device handle construction and extraction macros */
1851
1852#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1853#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1854#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1855#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1856#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1857
1858#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1859#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1860#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1861#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1862#define ACPI_NFIT_NODE_ID_OFFSET 16
1863
1864/* Macro to construct a NFIT/NVDIMM device handle */
1865
1866#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1867 ((dimm) | \
1868 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1869 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1870 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1871 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1872
1873/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1874
1875#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1876 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1877
1878#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1879 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1880
1881#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1882 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1883
1884#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1885 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1886
1887#define ACPI_NFIT_GET_NODE_ID(handle) \
1888 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1889
1890/*******************************************************************************
1891 *
1892 * NHLT - Non HD Audio Link Table
1893 *
1894 * Conforms to: Intel Smart Sound Technology NHLT Specification
1895 * Version 0.8.1, January 2020.
1896 *
1897 ******************************************************************************/
1898
1899/* Main table */
1900
1901struct acpi_table_nhlt {
1902 struct acpi_table_header header; /* Common ACPI table header */
1903 u8 endpoint_count;
1904};
1905
1906struct acpi_nhlt_endpoint {
1907 u32 descriptor_length;
1908 u8 link_type;
1909 u8 instance_id;
1910 u16 vendor_id;
1911 u16 device_id;
1912 u16 revision_id;
1913 u32 subsystem_id;
1914 u8 device_type;
1915 u8 direction;
1916 u8 virtual_bus_id;
1917};
1918
1919/* Types for link_type field above */
1920
1921#define ACPI_NHLT_RESERVED_HD_AUDIO 0
1922#define ACPI_NHLT_RESERVED_DSP 1
1923#define ACPI_NHLT_PDM 2
1924#define ACPI_NHLT_SSP 3
1925#define ACPI_NHLT_RESERVED_SLIMBUS 4
1926#define ACPI_NHLT_RESERVED_SOUNDWIRE 5
1927#define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */
1928
1929/* All other values above are reserved */
1930
1931/* Values for device_id field above */
1932
1933#define ACPI_NHLT_PDM_DMIC 0xAE20
1934#define ACPI_NHLT_BT_SIDEBAND 0xAE30
1935#define ACPI_NHLT_I2S_TDM_CODECS 0xAE23
1936
1937/* Values for device_type field above */
1938
1939/* SSP Link */
1940
1941#define ACPI_NHLT_LINK_BT_SIDEBAND 0
1942#define ACPI_NHLT_LINK_FM 1
1943#define ACPI_NHLT_LINK_MODEM 2
1944/* 3 is reserved */
1945#define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4
1946
1947/* PDM Link */
1948
1949#define ACPI_NHLT_PDM_ON_CAVS_1P8 0
1950#define ACPI_NHLT_PDM_ON_CAVS_1P5 1
1951
1952/* Values for Direction field above */
1953
1954#define ACPI_NHLT_DIR_RENDER 0
1955#define ACPI_NHLT_DIR_CAPTURE 1
1956#define ACPI_NHLT_DIR_RENDER_LOOPBACK 2
1957#define ACPI_NHLT_DIR_RENDER_FEEDBACK 3
1958#define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */
1959
1960struct acpi_nhlt_device_specific_config {
1961 u32 capabilities_size;
1962 u8 virtual_slot;
1963 u8 config_type;
1964};
1965
1966struct acpi_nhlt_device_specific_config_a {
1967 u32 capabilities_size;
1968 u8 virtual_slot;
1969 u8 config_type;
1970 u8 array_type;
1971};
1972
1973/* Values for Config Type above */
1974
1975#define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00
1976#define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01
1977#define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03
1978#define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */
1979
1980struct acpi_nhlt_device_specific_config_b {
1981 u32 capabilities_size;
1982};
1983
1984struct acpi_nhlt_device_specific_config_c {
1985 u32 capabilities_size;
1986 u8 virtual_slot;
1987};
1988
1989struct acpi_nhlt_render_device_specific_config {
1990 u32 capabilities_size;
1991 u8 virtual_slot;
1992};
1993
1994struct acpi_nhlt_wave_extensible {
1995 u16 format_tag;
1996 u16 channel_count;
1997 u32 samples_per_sec;
1998 u32 avg_bytes_per_sec;
1999 u16 block_align;
2000 u16 bits_per_sample;
2001 u16 extra_format_size;
2002 u16 valid_bits_per_sample;
2003 u32 channel_mask;
2004 u8 sub_format_guid[16];
2005};
2006
2007/* Values for channel_mask above */
2008
2009#define ACPI_NHLT_SPKR_FRONT_LEFT 0x1
2010#define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2
2011#define ACPI_NHLT_SPKR_FRONT_CENTER 0x4
2012#define ACPI_NHLT_SPKR_LOW_FREQ 0x8
2013#define ACPI_NHLT_SPKR_BACK_LEFT 0x10
2014#define ACPI_NHLT_SPKR_BACK_RIGHT 0x20
2015#define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40
2016#define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80
2017#define ACPI_NHLT_SPKR_BACK_CENTER 0x100
2018#define ACPI_NHLT_SPKR_SIDE_LEFT 0x200
2019#define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400
2020#define ACPI_NHLT_SPKR_TOP_CENTER 0x800
2021#define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000
2022#define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000
2023#define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000
2024#define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000
2025#define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000
2026#define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000
2027
2028struct acpi_nhlt_format_config {
2029 struct acpi_nhlt_wave_extensible format;
2030 u32 capability_size;
2031 u8 capabilities[];
2032};
2033
2034struct acpi_nhlt_formats_config {
2035 u8 formats_count;
2036};
2037
2038struct acpi_nhlt_device_specific_hdr {
2039 u8 virtual_slot;
2040 u8 config_type;
2041};
2042
2043/* Types for config_type above */
2044
2045#define ACPI_NHLT_GENERIC 0
2046#define ACPI_NHLT_MIC 1
2047#define ACPI_NHLT_RENDER 3
2048
2049struct acpi_nhlt_mic_device_specific_config {
2050 struct acpi_nhlt_device_specific_hdr device_config;
2051 u8 array_type_ext;
2052};
2053
2054/* Values for array_type_ext above */
2055
2056#define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */
2057#define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A
2058#define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B
2059#define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C
2060#define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D
2061#define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E
2062#define ACPI_NHLT_VENDOR_DEFINED 0x0F
2063#define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F
2064#define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10
2065
2066#define ACPI_NHLT_NO_EXTENSION 0x0
2067#define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4)
2068
2069struct acpi_nhlt_vendor_mic_count {
2070 u8 microphone_count;
2071};
2072
2073struct acpi_nhlt_vendor_mic_config {
2074 u8 type;
2075 u8 panel;
2076 u16 speaker_position_distance; /* mm */
2077 u16 horizontal_offset; /* mm */
2078 u16 vertical_offset; /* mm */
2079 u8 frequency_low_band; /* 5*Hz */
2080 u8 frequency_high_band; /* 500*Hz */
2081 u16 direction_angle; /* -180 - + 180 */
2082 u16 elevation_angle; /* -180 - + 180 */
2083 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */
2084 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */
2085 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */
2086 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */
2087};
2088
2089/* Values for Type field above */
2090
2091#define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0
2092#define ACPI_NHLT_MIC_SUBCARDIOID 1
2093#define ACPI_NHLT_MIC_CARDIOID 2
2094#define ACPI_NHLT_MIC_SUPER_CARDIOID 3
2095#define ACPI_NHLT_MIC_HYPER_CARDIOID 4
2096#define ACPI_NHLT_MIC_8_SHAPED 5
2097#define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */
2098#define ACPI_NHLT_MIC_VENDOR_DEFINED 7
2099#define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */
2100
2101/* Values for Panel field above */
2102
2103#define ACPI_NHLT_MIC_POSITION_TOP 0
2104#define ACPI_NHLT_MIC_POSITION_BOTTOM 1
2105#define ACPI_NHLT_MIC_POSITION_LEFT 2
2106#define ACPI_NHLT_MIC_POSITION_RIGHT 3
2107#define ACPI_NHLT_MIC_POSITION_FRONT 4
2108#define ACPI_NHLT_MIC_POSITION_BACK 5
2109#define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */
2110
2111struct acpi_nhlt_vendor_mic_device_specific_config {
2112 struct acpi_nhlt_mic_device_specific_config mic_array_device_config;
2113 u8 number_of_microphones;
2114 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */
2115};
2116
2117/* Microphone SNR and Sensitivity extension */
2118
2119struct acpi_nhlt_mic_snr_sensitivity_extension {
2120 u32 SNR;
2121 u32 sensitivity;
2122};
2123
2124/* Render device with feedback */
2125
2126struct acpi_nhlt_render_feedback_device_specific_config {
2127 u8 feedback_virtual_slot; /* Render slot in case of capture */
2128 u16 feedback_channels; /* Informative only */
2129 u16 feedback_valid_bits_per_sample;
2130};
2131
2132/* Non documented structures */
2133
2134struct acpi_nhlt_device_info_count {
2135 u8 structure_count;
2136};
2137
2138struct acpi_nhlt_device_info {
2139 u8 device_id[16];
2140 u8 device_instance_id;
2141 u8 device_port_id;
2142};
2143
2144/*******************************************************************************
2145 *
2146 * PCCT - Platform Communications Channel Table (ACPI 5.0)
2147 * Version 2 (ACPI 6.2)
2148 *
2149 ******************************************************************************/
2150
2151struct acpi_table_pcct {
2152 struct acpi_table_header header; /* Common ACPI table header */
2153 u32 flags;
2154 u64 reserved;
2155};
2156
2157/* Values for Flags field above */
2158
2159#define ACPI_PCCT_DOORBELL 1
2160
2161/* Values for subtable type in struct acpi_subtable_header */
2162
2163enum acpi_pcct_type {
2164 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
2165 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
2166 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
2167 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
2168 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
2169 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
2170 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
2171};
2172
2173/*
2174 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
2175 */
2176
2177/* 0: Generic Communications Subspace */
2178
2179struct acpi_pcct_subspace {
2180 struct acpi_subtable_header header;
2181 u8 reserved[6];
2182 u64 base_address;
2183 u64 length;
2184 struct acpi_generic_address doorbell_register;
2185 u64 preserve_mask;
2186 u64 write_mask;
2187 u32 latency;
2188 u32 max_access_rate;
2189 u16 min_turnaround_time;
2190};
2191
2192/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
2193
2194struct acpi_pcct_hw_reduced {
2195 struct acpi_subtable_header header;
2196 u32 platform_interrupt;
2197 u8 flags;
2198 u8 reserved;
2199 u64 base_address;
2200 u64 length;
2201 struct acpi_generic_address doorbell_register;
2202 u64 preserve_mask;
2203 u64 write_mask;
2204 u32 latency;
2205 u32 max_access_rate;
2206 u16 min_turnaround_time;
2207};
2208
2209/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
2210
2211struct acpi_pcct_hw_reduced_type2 {
2212 struct acpi_subtable_header header;
2213 u32 platform_interrupt;
2214 u8 flags;
2215 u8 reserved;
2216 u64 base_address;
2217 u64 length;
2218 struct acpi_generic_address doorbell_register;
2219 u64 preserve_mask;
2220 u64 write_mask;
2221 u32 latency;
2222 u32 max_access_rate;
2223 u16 min_turnaround_time;
2224 struct acpi_generic_address platform_ack_register;
2225 u64 ack_preserve_mask;
2226 u64 ack_write_mask;
2227};
2228
2229/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
2230
2231struct acpi_pcct_ext_pcc_master {
2232 struct acpi_subtable_header header;
2233 u32 platform_interrupt;
2234 u8 flags;
2235 u8 reserved1;
2236 u64 base_address;
2237 u32 length;
2238 struct acpi_generic_address doorbell_register;
2239 u64 preserve_mask;
2240 u64 write_mask;
2241 u32 latency;
2242 u32 max_access_rate;
2243 u32 min_turnaround_time;
2244 struct acpi_generic_address platform_ack_register;
2245 u64 ack_preserve_mask;
2246 u64 ack_set_mask;
2247 u64 reserved2;
2248 struct acpi_generic_address cmd_complete_register;
2249 u64 cmd_complete_mask;
2250 struct acpi_generic_address cmd_update_register;
2251 u64 cmd_update_preserve_mask;
2252 u64 cmd_update_set_mask;
2253 struct acpi_generic_address error_status_register;
2254 u64 error_status_mask;
2255};
2256
2257/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
2258
2259struct acpi_pcct_ext_pcc_slave {
2260 struct acpi_subtable_header header;
2261 u32 platform_interrupt;
2262 u8 flags;
2263 u8 reserved1;
2264 u64 base_address;
2265 u32 length;
2266 struct acpi_generic_address doorbell_register;
2267 u64 preserve_mask;
2268 u64 write_mask;
2269 u32 latency;
2270 u32 max_access_rate;
2271 u32 min_turnaround_time;
2272 struct acpi_generic_address platform_ack_register;
2273 u64 ack_preserve_mask;
2274 u64 ack_set_mask;
2275 u64 reserved2;
2276 struct acpi_generic_address cmd_complete_register;
2277 u64 cmd_complete_mask;
2278 struct acpi_generic_address cmd_update_register;
2279 u64 cmd_update_preserve_mask;
2280 u64 cmd_update_set_mask;
2281 struct acpi_generic_address error_status_register;
2282 u64 error_status_mask;
2283};
2284
2285/* 5: HW Registers based Communications Subspace */
2286
2287struct acpi_pcct_hw_reg {
2288 struct acpi_subtable_header header;
2289 u16 version;
2290 u64 base_address;
2291 u64 length;
2292 struct acpi_generic_address doorbell_register;
2293 u64 doorbell_preserve;
2294 u64 doorbell_write;
2295 struct acpi_generic_address cmd_complete_register;
2296 u64 cmd_complete_mask;
2297 struct acpi_generic_address error_status_register;
2298 u64 error_status_mask;
2299 u32 nominal_latency;
2300 u32 min_turnaround_time;
2301};
2302
2303/* Values for doorbell flags above */
2304
2305#define ACPI_PCCT_INTERRUPT_POLARITY (1)
2306#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
2307
2308/*
2309 * PCC memory structures (not part of the ACPI table)
2310 */
2311
2312/* Shared Memory Region */
2313
2314struct acpi_pcct_shared_memory {
2315 u32 signature;
2316 u16 command;
2317 u16 status;
2318};
2319
2320/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
2321
2322struct acpi_pcct_ext_pcc_shared_memory {
2323 u32 signature;
2324 u32 flags;
2325 u32 length;
2326 u32 command;
2327};
2328
2329/*******************************************************************************
2330 *
2331 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
2332 * Version 0
2333 *
2334 ******************************************************************************/
2335
2336struct acpi_table_pdtt {
2337 struct acpi_table_header header; /* Common ACPI table header */
2338 u8 trigger_count;
2339 u8 reserved[3];
2340 u32 array_offset;
2341};
2342
2343/*
2344 * PDTT Communication Channel Identifier Structure.
2345 * The number of these structures is defined by trigger_count above,
2346 * starting at array_offset.
2347 */
2348struct acpi_pdtt_channel {
2349 u8 subchannel_id;
2350 u8 flags;
2351};
2352
2353/* Flags for above */
2354
2355#define ACPI_PDTT_RUNTIME_TRIGGER (1)
2356#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
2357#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
2358
2359/*******************************************************************************
2360 *
2361 * PHAT - Platform Health Assessment Table (ACPI 6.4)
2362 * Version 1
2363 *
2364 ******************************************************************************/
2365
2366struct acpi_table_phat {
2367 struct acpi_table_header header; /* Common ACPI table header */
2368};
2369
2370/* Common header for PHAT subtables that follow main table */
2371
2372struct acpi_phat_header {
2373 u16 type;
2374 u16 length;
2375 u8 revision;
2376};
2377
2378/* Values for Type field above */
2379
2380#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
2381#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
2382#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
2383
2384/*
2385 * PHAT subtables, correspond to Type in struct acpi_phat_header
2386 */
2387
2388/* 0: Firmware Version Data Record */
2389
2390struct acpi_phat_version_data {
2391 struct acpi_phat_header header;
2392 u8 reserved[3];
2393 u32 element_count;
2394};
2395
2396struct acpi_phat_version_element {
2397 u8 guid[16];
2398 u64 version_value;
2399 u32 producer_id;
2400};
2401
2402/* 1: Firmware Health Data Record */
2403
2404struct acpi_phat_health_data {
2405 struct acpi_phat_header header;
2406 u8 reserved[2];
2407 u8 health;
2408 u8 device_guid[16];
2409 u32 device_specific_offset; /* Zero if no Device-specific data */
2410};
2411
2412/* Values for Health field above */
2413
2414#define ACPI_PHAT_ERRORS_FOUND 0
2415#define ACPI_PHAT_NO_ERRORS 1
2416#define ACPI_PHAT_UNKNOWN_ERRORS 2
2417#define ACPI_PHAT_ADVISORY 3
2418
2419/*******************************************************************************
2420 *
2421 * PMTT - Platform Memory Topology Table (ACPI 5.0)
2422 * Version 1
2423 *
2424 ******************************************************************************/
2425
2426struct acpi_table_pmtt {
2427 struct acpi_table_header header; /* Common ACPI table header */
2428 u32 memory_device_count;
2429 /*
2430 * Immediately followed by:
2431 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2432 */
2433};
2434
2435/* Common header for PMTT subtables that follow main table */
2436
2437struct acpi_pmtt_header {
2438 u8 type;
2439 u8 reserved1;
2440 u16 length;
2441 u16 flags;
2442 u16 reserved2;
2443 u32 memory_device_count; /* Zero means no memory device structs follow */
2444 /*
2445 * Immediately followed by:
2446 * u8 type_specific_data[]
2447 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2448 */
2449};
2450
2451/* Values for Type field above */
2452
2453#define ACPI_PMTT_TYPE_SOCKET 0
2454#define ACPI_PMTT_TYPE_CONTROLLER 1
2455#define ACPI_PMTT_TYPE_DIMM 2
2456#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
2457#define ACPI_PMTT_TYPE_VENDOR 0xFF
2458
2459/* Values for Flags field above */
2460
2461#define ACPI_PMTT_TOP_LEVEL 0x0001
2462#define ACPI_PMTT_PHYSICAL 0x0002
2463#define ACPI_PMTT_MEMORY_TYPE 0x000C
2464
2465/*
2466 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
2467 */
2468
2469/* 0: Socket Structure */
2470
2471struct acpi_pmtt_socket {
2472 struct acpi_pmtt_header header;
2473 u16 socket_id;
2474 u16 reserved;
2475};
2476 /*
2477 * Immediately followed by:
2478 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2479 */
2480
2481/* 1: Memory Controller subtable */
2482
2483struct acpi_pmtt_controller {
2484 struct acpi_pmtt_header header;
2485 u16 controller_id;
2486 u16 reserved;
2487};
2488 /*
2489 * Immediately followed by:
2490 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2491 */
2492
2493/* 2: Physical Component Identifier (DIMM) */
2494
2495struct acpi_pmtt_physical_component {
2496 struct acpi_pmtt_header header;
2497 u32 bios_handle;
2498};
2499
2500/* 0xFF: Vendor Specific Data */
2501
2502struct acpi_pmtt_vendor_specific {
2503 struct acpi_pmtt_header header;
2504 u8 type_uuid[16];
2505 u8 specific[];
2506 /*
2507 * Immediately followed by:
2508 * u8 vendor_specific_data[];
2509 * MEMORY_DEVICE memory_device_struct[memory_device_count];
2510 */
2511};
2512
2513/*******************************************************************************
2514 *
2515 * PPTT - Processor Properties Topology Table (ACPI 6.2)
2516 * Version 1
2517 *
2518 ******************************************************************************/
2519
2520struct acpi_table_pptt {
2521 struct acpi_table_header header; /* Common ACPI table header */
2522};
2523
2524/* Values for Type field above */
2525
2526enum acpi_pptt_type {
2527 ACPI_PPTT_TYPE_PROCESSOR = 0,
2528 ACPI_PPTT_TYPE_CACHE = 1,
2529 ACPI_PPTT_TYPE_ID = 2,
2530 ACPI_PPTT_TYPE_RESERVED = 3
2531};
2532
2533/* 0: Processor Hierarchy Node Structure */
2534
2535struct acpi_pptt_processor {
2536 struct acpi_subtable_header header;
2537 u16 reserved;
2538 u32 flags;
2539 u32 parent;
2540 u32 acpi_processor_id;
2541 u32 number_of_priv_resources;
2542};
2543
2544/* Flags */
2545
2546#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
2547#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
2548#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
2549#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
2550#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
2551
2552/* 1: Cache Type Structure */
2553
2554struct acpi_pptt_cache {
2555 struct acpi_subtable_header header;
2556 u16 reserved;
2557 u32 flags;
2558 u32 next_level_of_cache;
2559 u32 size;
2560 u32 number_of_sets;
2561 u8 associativity;
2562 u8 attributes;
2563 u16 line_size;
2564};
2565
2566/* 1: Cache Type Structure for PPTT version 3 */
2567
2568struct acpi_pptt_cache_v1 {
2569 u32 cache_id;
2570};
2571
2572/* Flags */
2573
2574#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
2575#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
2576#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
2577#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
2578#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
2579#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
2580#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
2581#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
2582
2583/* Masks for Attributes */
2584
2585#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
2586#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
2587#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
2588
2589/* Attributes describing cache */
2590#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
2591#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
2592#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
2593#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
2594
2595#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
2596#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
2597#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
2598#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
2599
2600#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
2601#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
2602
2603/* 2: ID Structure */
2604
2605struct acpi_pptt_id {
2606 struct acpi_subtable_header header;
2607 u16 reserved;
2608 u32 vendor_id;
2609 u64 level1_id;
2610 u64 level2_id;
2611 u16 major_rev;
2612 u16 minor_rev;
2613 u16 spin_rev;
2614};
2615
2616/*******************************************************************************
2617 *
2618 * PRMT - Platform Runtime Mechanism Table
2619 * Version 1
2620 *
2621 ******************************************************************************/
2622
2623struct acpi_table_prmt {
2624 struct acpi_table_header header; /* Common ACPI table header */
2625};
2626
2627struct acpi_table_prmt_header {
2628 u8 platform_guid[16];
2629 u32 module_info_offset;
2630 u32 module_info_count;
2631};
2632
2633struct acpi_prmt_module_header {
2634 u16 revision;
2635 u16 length;
2636};
2637
2638struct acpi_prmt_module_info {
2639 u16 revision;
2640 u16 length;
2641 u8 module_guid[16];
2642 u16 major_rev;
2643 u16 minor_rev;
2644 u16 handler_info_count;
2645 u32 handler_info_offset;
2646 u64 mmio_list_pointer;
2647};
2648
2649struct acpi_prmt_handler_info {
2650 u16 revision;
2651 u16 length;
2652 u8 handler_guid[16];
2653 u64 handler_address;
2654 u64 static_data_buffer_address;
2655 u64 acpi_param_buffer_address;
2656};
2657
2658/*******************************************************************************
2659 *
2660 * RASF - RAS Feature Table (ACPI 5.0)
2661 * Version 1
2662 *
2663 ******************************************************************************/
2664
2665struct acpi_table_rasf {
2666 struct acpi_table_header header; /* Common ACPI table header */
2667 u8 channel_id[12];
2668};
2669
2670/* RASF Platform Communication Channel Shared Memory Region */
2671
2672struct acpi_rasf_shared_memory {
2673 u32 signature;
2674 u16 command;
2675 u16 status;
2676 u16 version;
2677 u8 capabilities[16];
2678 u8 set_capabilities[16];
2679 u16 num_parameter_blocks;
2680 u32 set_capabilities_status;
2681};
2682
2683/* RASF Parameter Block Structure Header */
2684
2685struct acpi_rasf_parameter_block {
2686 u16 type;
2687 u16 version;
2688 u16 length;
2689};
2690
2691/* RASF Parameter Block Structure for PATROL_SCRUB */
2692
2693struct acpi_rasf_patrol_scrub_parameter {
2694 struct acpi_rasf_parameter_block header;
2695 u16 patrol_scrub_command;
2696 u64 requested_address_range[2];
2697 u64 actual_address_range[2];
2698 u16 flags;
2699 u8 requested_speed;
2700};
2701
2702/* Masks for Flags and Speed fields above */
2703
2704#define ACPI_RASF_SCRUBBER_RUNNING 1
2705#define ACPI_RASF_SPEED (7<<1)
2706#define ACPI_RASF_SPEED_SLOW (0<<1)
2707#define ACPI_RASF_SPEED_MEDIUM (4<<1)
2708#define ACPI_RASF_SPEED_FAST (7<<1)
2709
2710/* Channel Commands */
2711
2712enum acpi_rasf_commands {
2713 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
2714};
2715
2716/* Platform RAS Capabilities */
2717
2718enum acpi_rasf_capabiliities {
2719 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
2720 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
2721};
2722
2723/* Patrol Scrub Commands */
2724
2725enum acpi_rasf_patrol_scrub_commands {
2726 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
2727 ACPI_RASF_START_PATROL_SCRUBBER = 2,
2728 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
2729};
2730
2731/* Channel Command flags */
2732
2733#define ACPI_RASF_GENERATE_SCI (1<<15)
2734
2735/* Status values */
2736
2737enum acpi_rasf_status {
2738 ACPI_RASF_SUCCESS = 0,
2739 ACPI_RASF_NOT_VALID = 1,
2740 ACPI_RASF_NOT_SUPPORTED = 2,
2741 ACPI_RASF_BUSY = 3,
2742 ACPI_RASF_FAILED = 4,
2743 ACPI_RASF_ABORTED = 5,
2744 ACPI_RASF_INVALID_DATA = 6
2745};
2746
2747/* Status flags */
2748
2749#define ACPI_RASF_COMMAND_COMPLETE (1)
2750#define ACPI_RASF_SCI_DOORBELL (1<<1)
2751#define ACPI_RASF_ERROR (1<<2)
2752#define ACPI_RASF_STATUS (0x1F<<3)
2753
2754/*******************************************************************************
2755 *
2756 * RGRT - Regulatory Graphics Resource Table
2757 * Version 1
2758 *
2759 * Conforms to "ACPI RGRT" available at:
2760 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
2761 *
2762 ******************************************************************************/
2763
2764struct acpi_table_rgrt {
2765 struct acpi_table_header header; /* Common ACPI table header */
2766 u16 version;
2767 u8 image_type;
2768 u8 reserved;
2769 u8 image[];
2770};
2771
2772/* image_type values */
2773
2774enum acpi_rgrt_image_type {
2775 ACPI_RGRT_TYPE_RESERVED0 = 0,
2776 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
2777 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2778};
2779
2780/*******************************************************************************
2781 *
2782 * RHCT - RISC-V Hart Capabilities Table
2783 * Version 1
2784 *
2785 ******************************************************************************/
2786
2787struct acpi_table_rhct {
2788 struct acpi_table_header header; /* Common ACPI table header */
2789 u32 flags; /* RHCT flags */
2790 u64 time_base_freq;
2791 u32 node_count;
2792 u32 node_offset;
2793};
2794
2795/* RHCT Flags */
2796
2797#define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1)
2798/*
2799 * RHCT subtables
2800 */
2801struct acpi_rhct_node_header {
2802 u16 type;
2803 u16 length;
2804 u16 revision;
2805};
2806
2807/* Values for RHCT subtable Type above */
2808
2809enum acpi_rhct_node_type {
2810 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000,
2811 ACPI_RHCT_NODE_TYPE_CMO = 0x0001,
2812 ACPI_RHCT_NODE_TYPE_MMU = 0x0002,
2813 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003,
2814 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF,
2815};
2816
2817/*
2818 * RHCT node specific subtables
2819 */
2820
2821/* ISA string node structure */
2822struct acpi_rhct_isa_string {
2823 u16 isa_length;
2824 char isa[];
2825};
2826
2827struct acpi_rhct_cmo_node {
2828 u8 reserved; /* Must be zero */
2829 u8 cbom_size; /* CBOM size in powerof 2 */
2830 u8 cbop_size; /* CBOP size in powerof 2 */
2831 u8 cboz_size; /* CBOZ size in powerof 2 */
2832};
2833
2834struct acpi_rhct_mmu_node {
2835 u8 reserved; /* Must be zero */
2836 u8 mmu_type; /* Virtual Address Scheme */
2837};
2838
2839enum acpi_rhct_mmu_type {
2840 ACPI_RHCT_MMU_TYPE_SV39 = 0,
2841 ACPI_RHCT_MMU_TYPE_SV48 = 1,
2842 ACPI_RHCT_MMU_TYPE_SV57 = 2
2843};
2844
2845/* Hart Info node structure */
2846struct acpi_rhct_hart_info {
2847 u16 num_offsets;
2848 u32 uid; /* ACPI processor UID */
2849};
2850
2851/*******************************************************************************
2852 *
2853 * SBST - Smart Battery Specification Table
2854 * Version 1
2855 *
2856 ******************************************************************************/
2857
2858struct acpi_table_sbst {
2859 struct acpi_table_header header; /* Common ACPI table header */
2860 u32 warning_level;
2861 u32 low_level;
2862 u32 critical_level;
2863};
2864
2865/*******************************************************************************
2866 *
2867 * SDEI - Software Delegated Exception Interface Descriptor Table
2868 *
2869 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2870 * May 8th, 2017. Copyright 2017 ARM Ltd.
2871 *
2872 ******************************************************************************/
2873
2874struct acpi_table_sdei {
2875 struct acpi_table_header header; /* Common ACPI table header */
2876};
2877
2878/*******************************************************************************
2879 *
2880 * SDEV - Secure Devices Table (ACPI 6.2)
2881 * Version 1
2882 *
2883 ******************************************************************************/
2884
2885struct acpi_table_sdev {
2886 struct acpi_table_header header; /* Common ACPI table header */
2887};
2888
2889struct acpi_sdev_header {
2890 u8 type;
2891 u8 flags;
2892 u16 length;
2893};
2894
2895/* Values for subtable type above */
2896
2897enum acpi_sdev_type {
2898 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
2899 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
2900 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
2901};
2902
2903/* Values for flags above */
2904
2905#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2906#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
2907
2908/*
2909 * SDEV subtables
2910 */
2911
2912/* 0: Namespace Device Based Secure Device Structure */
2913
2914struct acpi_sdev_namespace {
2915 struct acpi_sdev_header header;
2916 u16 device_id_offset;
2917 u16 device_id_length;
2918 u16 vendor_data_offset;
2919 u16 vendor_data_length;
2920};
2921
2922struct acpi_sdev_secure_component {
2923 u16 secure_component_offset;
2924 u16 secure_component_length;
2925};
2926
2927/*
2928 * SDEV sub-subtables ("Components") for above
2929 */
2930struct acpi_sdev_component {
2931 struct acpi_sdev_header header;
2932};
2933
2934/* Values for sub-subtable type above */
2935
2936enum acpi_sac_type {
2937 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
2938 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
2939};
2940
2941struct acpi_sdev_id_component {
2942 struct acpi_sdev_header header;
2943 u16 hardware_id_offset;
2944 u16 hardware_id_length;
2945 u16 subsystem_id_offset;
2946 u16 subsystem_id_length;
2947 u16 hardware_revision;
2948 u8 hardware_rev_present;
2949 u8 class_code_present;
2950 u8 pci_base_class;
2951 u8 pci_sub_class;
2952 u8 pci_programming_xface;
2953};
2954
2955struct acpi_sdev_mem_component {
2956 struct acpi_sdev_header header;
2957 u32 reserved;
2958 u64 memory_base_address;
2959 u64 memory_length;
2960};
2961
2962/* 1: PCIe Endpoint Device Based Device Structure */
2963
2964struct acpi_sdev_pcie {
2965 struct acpi_sdev_header header;
2966 u16 segment;
2967 u16 start_bus;
2968 u16 path_offset;
2969 u16 path_length;
2970 u16 vendor_data_offset;
2971 u16 vendor_data_length;
2972};
2973
2974/* 1a: PCIe Endpoint path entry */
2975
2976struct acpi_sdev_pcie_path {
2977 u8 device;
2978 u8 function;
2979};
2980
2981/*******************************************************************************
2982 *
2983 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2984 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2985 * Trust Domain Extensions (Intel TDX)".
2986 * Version 1
2987 *
2988 ******************************************************************************/
2989
2990struct acpi_table_svkl {
2991 struct acpi_table_header header; /* Common ACPI table header */
2992 u32 count;
2993};
2994
2995struct acpi_svkl_key {
2996 u16 type;
2997 u16 format;
2998 u32 size;
2999 u64 address;
3000};
3001
3002enum acpi_svkl_type {
3003 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
3004 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
3005};
3006
3007enum acpi_svkl_format {
3008 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
3009 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
3010};
3011
3012/*******************************************************************************
3013 *
3014 * TDEL - TD-Event Log
3015 * From: "Guest-Host-Communication Interface (GHCI) for Intel
3016 * Trust Domain Extensions (Intel TDX)".
3017 * September 2020
3018 *
3019 ******************************************************************************/
3020
3021struct acpi_table_tdel {
3022 struct acpi_table_header header; /* Common ACPI table header */
3023 u32 reserved;
3024 u64 log_area_minimum_length;
3025 u64 log_area_start_address;
3026};
3027
3028/* Reset to default packing */
3029
3030#pragma pack()
3031
3032#endif /* __ACTBL2_H__ */