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v5.4
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * CPU Microcode Update Driver for Linux
  4 *
  5 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
  6 *	      2006	Shaohua Li <shaohua.li@intel.com>
  7 *	      2013-2016	Borislav Petkov <bp@alien8.de>
  8 *
  9 * X86 CPU microcode early update for Linux:
 10 *
 11 *	Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
 12 *			   H Peter Anvin" <hpa@zytor.com>
 13 *		  (C) 2015 Borislav Petkov <bp@alien8.de>
 14 *
 15 * This driver allows to upgrade microcode on x86 processors.
 16 */
 17
 18#define pr_fmt(fmt) "microcode: " fmt
 19
 20#include <linux/platform_device.h>
 21#include <linux/stop_machine.h>
 22#include <linux/syscore_ops.h>
 23#include <linux/miscdevice.h>
 24#include <linux/capability.h>
 25#include <linux/firmware.h>
 26#include <linux/kernel.h>
 27#include <linux/delay.h>
 28#include <linux/mutex.h>
 29#include <linux/cpu.h>
 30#include <linux/nmi.h>
 31#include <linux/fs.h>
 32#include <linux/mm.h>
 33
 34#include <asm/microcode_intel.h>
 35#include <asm/cpu_device_id.h>
 36#include <asm/microcode_amd.h>
 37#include <asm/perf_event.h>
 38#include <asm/microcode.h>
 39#include <asm/processor.h>
 40#include <asm/cmdline.h>
 41#include <asm/setup.h>
 42
 43#define DRIVER_VERSION	"2.2"
 44
 45static struct microcode_ops	*microcode_ops;
 46static bool dis_ucode_ldr = true;
 47
 48bool initrd_gone;
 49
 50LIST_HEAD(microcode_cache);
 51
 52/*
 53 * Synchronization.
 54 *
 55 * All non cpu-hotplug-callback call sites use:
 56 *
 57 * - microcode_mutex to synchronize with each other;
 58 * - get/put_online_cpus() to synchronize with
 59 *   the cpu-hotplug-callback call sites.
 60 *
 61 * We guarantee that only a single cpu is being
 62 * updated at any particular moment of time.
 63 */
 64static DEFINE_MUTEX(microcode_mutex);
 65
 66/*
 67 * Serialize late loading so that CPUs get updated one-by-one.
 68 */
 69static DEFINE_RAW_SPINLOCK(update_lock);
 70
 71struct ucode_cpu_info		ucode_cpu_info[NR_CPUS];
 72
 73struct cpu_info_ctx {
 74	struct cpu_signature	*cpu_sig;
 75	int			err;
 76};
 77
 78/*
 79 * Those patch levels cannot be updated to newer ones and thus should be final.
 80 */
 81static u32 final_levels[] = {
 82	0x01000098,
 83	0x0100009f,
 84	0x010000af,
 85	0, /* T-101 terminator */
 86};
 87
 88/*
 89 * Check the current patch level on this CPU.
 90 *
 91 * Returns:
 92 *  - true: if update should stop
 93 *  - false: otherwise
 94 */
 95static bool amd_check_current_patch_level(void)
 96{
 97	u32 lvl, dummy, i;
 98	u32 *levels;
 99
100	native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
101
102	if (IS_ENABLED(CONFIG_X86_32))
103		levels = (u32 *)__pa_nodebug(&final_levels);
104	else
105		levels = final_levels;
106
107	for (i = 0; levels[i]; i++) {
108		if (lvl == levels[i])
109			return true;
110	}
111	return false;
112}
113
114static bool __init check_loader_disabled_bsp(void)
115{
116	static const char *__dis_opt_str = "dis_ucode_ldr";
117
118#ifdef CONFIG_X86_32
119	const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
120	const char *option  = (const char *)__pa_nodebug(__dis_opt_str);
121	bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);
122
123#else /* CONFIG_X86_64 */
124	const char *cmdline = boot_command_line;
125	const char *option  = __dis_opt_str;
126	bool *res = &dis_ucode_ldr;
127#endif
128
129	/*
130	 * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not
131	 * completely accurate as xen pv guests don't see that CPUID bit set but
132	 * that's good enough as they don't land on the BSP path anyway.
133	 */
134	if (native_cpuid_ecx(1) & BIT(31))
135		return *res;
136
137	if (x86_cpuid_vendor() == X86_VENDOR_AMD) {
138		if (amd_check_current_patch_level())
139			return *res;
140	}
141
142	if (cmdline_find_option_bool(cmdline, option) <= 0)
143		*res = false;
144
145	return *res;
146}
147
148extern struct builtin_fw __start_builtin_fw[];
149extern struct builtin_fw __end_builtin_fw[];
150
151bool get_builtin_firmware(struct cpio_data *cd, const char *name)
152{
153#ifdef CONFIG_FW_LOADER
154	struct builtin_fw *b_fw;
155
156	for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) {
157		if (!strcmp(name, b_fw->name)) {
158			cd->size = b_fw->size;
159			cd->data = b_fw->data;
160			return true;
161		}
162	}
163#endif
164	return false;
165}
166
167void __init load_ucode_bsp(void)
168{
169	unsigned int cpuid_1_eax;
170	bool intel = true;
171
172	if (!have_cpuid_p())
173		return;
174
175	cpuid_1_eax = native_cpuid_eax(1);
176
177	switch (x86_cpuid_vendor()) {
178	case X86_VENDOR_INTEL:
179		if (x86_family(cpuid_1_eax) < 6)
180			return;
181		break;
182
183	case X86_VENDOR_AMD:
184		if (x86_family(cpuid_1_eax) < 0x10)
185			return;
186		intel = false;
187		break;
188
189	default:
190		return;
191	}
192
193	if (check_loader_disabled_bsp())
194		return;
195
196	if (intel)
197		load_ucode_intel_bsp();
198	else
199		load_ucode_amd_bsp(cpuid_1_eax);
200}
201
202static bool check_loader_disabled_ap(void)
203{
204#ifdef CONFIG_X86_32
205	return *((bool *)__pa_nodebug(&dis_ucode_ldr));
206#else
207	return dis_ucode_ldr;
208#endif
209}
210
211void load_ucode_ap(void)
212{
213	unsigned int cpuid_1_eax;
214
215	if (check_loader_disabled_ap())
216		return;
217
218	cpuid_1_eax = native_cpuid_eax(1);
219
220	switch (x86_cpuid_vendor()) {
221	case X86_VENDOR_INTEL:
222		if (x86_family(cpuid_1_eax) >= 6)
223			load_ucode_intel_ap();
224		break;
225	case X86_VENDOR_AMD:
226		if (x86_family(cpuid_1_eax) >= 0x10)
227			load_ucode_amd_ap(cpuid_1_eax);
228		break;
229	default:
230		break;
231	}
232}
233
234static int __init save_microcode_in_initrd(void)
235{
236	struct cpuinfo_x86 *c = &boot_cpu_data;
237	int ret = -EINVAL;
238
239	switch (c->x86_vendor) {
240	case X86_VENDOR_INTEL:
241		if (c->x86 >= 6)
242			ret = save_microcode_in_initrd_intel();
243		break;
244	case X86_VENDOR_AMD:
245		if (c->x86 >= 0x10)
246			ret = save_microcode_in_initrd_amd(cpuid_eax(1));
247		break;
248	default:
249		break;
250	}
251
252	initrd_gone = true;
253
254	return ret;
255}
256
257struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa)
258{
259#ifdef CONFIG_BLK_DEV_INITRD
260	unsigned long start = 0;
261	size_t size;
262
263#ifdef CONFIG_X86_32
264	struct boot_params *params;
265
266	if (use_pa)
267		params = (struct boot_params *)__pa_nodebug(&boot_params);
268	else
269		params = &boot_params;
270
271	size = params->hdr.ramdisk_size;
272
273	/*
274	 * Set start only if we have an initrd image. We cannot use initrd_start
275	 * because it is not set that early yet.
276	 */
277	if (size)
278		start = params->hdr.ramdisk_image;
279
280# else /* CONFIG_X86_64 */
281	size  = (unsigned long)boot_params.ext_ramdisk_size << 32;
282	size |= boot_params.hdr.ramdisk_size;
283
284	if (size) {
285		start  = (unsigned long)boot_params.ext_ramdisk_image << 32;
286		start |= boot_params.hdr.ramdisk_image;
287
288		start += PAGE_OFFSET;
289	}
290# endif
291
292	/*
293	 * Fixup the start address: after reserve_initrd() runs, initrd_start
294	 * has the virtual address of the beginning of the initrd. It also
295	 * possibly relocates the ramdisk. In either case, initrd_start contains
296	 * the updated address so use that instead.
297	 *
298	 * initrd_gone is for the hotplug case where we've thrown out initrd
299	 * already.
300	 */
301	if (!use_pa) {
302		if (initrd_gone)
303			return (struct cpio_data){ NULL, 0, "" };
304		if (initrd_start)
305			start = initrd_start;
306	} else {
307		/*
308		 * The picture with physical addresses is a bit different: we
309		 * need to get the *physical* address to which the ramdisk was
310		 * relocated, i.e., relocated_ramdisk (not initrd_start) and
311		 * since we're running from physical addresses, we need to access
312		 * relocated_ramdisk through its *physical* address too.
313		 */
314		u64 *rr = (u64 *)__pa_nodebug(&relocated_ramdisk);
315		if (*rr)
316			start = *rr;
317	}
318
319	return find_cpio_data(path, (void *)start, size, NULL);
320#else /* !CONFIG_BLK_DEV_INITRD */
321	return (struct cpio_data){ NULL, 0, "" };
322#endif
323}
324
325void reload_early_microcode(void)
326{
327	int vendor, family;
328
329	vendor = x86_cpuid_vendor();
330	family = x86_cpuid_family();
331
332	switch (vendor) {
333	case X86_VENDOR_INTEL:
334		if (family >= 6)
335			reload_ucode_intel();
336		break;
337	case X86_VENDOR_AMD:
338		if (family >= 0x10)
339			reload_ucode_amd();
340		break;
341	default:
342		break;
343	}
344}
345
346static void collect_cpu_info_local(void *arg)
347{
348	struct cpu_info_ctx *ctx = arg;
349
350	ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
351						   ctx->cpu_sig);
352}
353
354static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
355{
356	struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
357	int ret;
358
359	ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
360	if (!ret)
361		ret = ctx.err;
362
363	return ret;
364}
365
366static int collect_cpu_info(int cpu)
367{
368	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
369	int ret;
370
371	memset(uci, 0, sizeof(*uci));
372
373	ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
374	if (!ret)
375		uci->valid = 1;
376
377	return ret;
378}
379
380static void apply_microcode_local(void *arg)
381{
382	enum ucode_state *err = arg;
383
384	*err = microcode_ops->apply_microcode(smp_processor_id());
385}
386
387static int apply_microcode_on_target(int cpu)
388{
389	enum ucode_state err;
390	int ret;
391
392	ret = smp_call_function_single(cpu, apply_microcode_local, &err, 1);
393	if (!ret) {
394		if (err == UCODE_ERROR)
395			ret = 1;
396	}
397	return ret;
398}
399
400#ifdef CONFIG_MICROCODE_OLD_INTERFACE
401static int do_microcode_update(const void __user *buf, size_t size)
402{
403	int error = 0;
404	int cpu;
405
406	for_each_online_cpu(cpu) {
407		struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
408		enum ucode_state ustate;
409
410		if (!uci->valid)
411			continue;
412
413		ustate = microcode_ops->request_microcode_user(cpu, buf, size);
414		if (ustate == UCODE_ERROR) {
415			error = -1;
416			break;
417		} else if (ustate == UCODE_NEW) {
418			apply_microcode_on_target(cpu);
419		}
420	}
421
422	return error;
423}
424
425static int microcode_open(struct inode *inode, struct file *file)
426{
427	return capable(CAP_SYS_RAWIO) ? stream_open(inode, file) : -EPERM;
428}
429
430static ssize_t microcode_write(struct file *file, const char __user *buf,
431			       size_t len, loff_t *ppos)
432{
433	ssize_t ret = -EINVAL;
434	unsigned long nr_pages = totalram_pages();
435
436	if ((len >> PAGE_SHIFT) > nr_pages) {
437		pr_err("too much data (max %ld pages)\n", nr_pages);
438		return ret;
439	}
440
441	get_online_cpus();
442	mutex_lock(&microcode_mutex);
443
444	if (do_microcode_update(buf, len) == 0)
445		ret = (ssize_t)len;
446
447	if (ret > 0)
448		perf_check_microcode();
449
450	mutex_unlock(&microcode_mutex);
451	put_online_cpus();
452
453	return ret;
454}
455
456static const struct file_operations microcode_fops = {
457	.owner			= THIS_MODULE,
458	.write			= microcode_write,
459	.open			= microcode_open,
460	.llseek		= no_llseek,
461};
462
463static struct miscdevice microcode_dev = {
464	.minor			= MICROCODE_MINOR,
465	.name			= "microcode",
466	.nodename		= "cpu/microcode",
467	.fops			= &microcode_fops,
468};
469
470static int __init microcode_dev_init(void)
471{
472	int error;
473
474	error = misc_register(&microcode_dev);
475	if (error) {
476		pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR);
477		return error;
478	}
479
480	return 0;
481}
482
483static void __exit microcode_dev_exit(void)
484{
485	misc_deregister(&microcode_dev);
486}
487#else
488#define microcode_dev_init()	0
489#define microcode_dev_exit()	do { } while (0)
490#endif
491
492/* fake device for request_firmware */
493static struct platform_device	*microcode_pdev;
494
 
495/*
496 * Late loading dance. Why the heavy-handed stomp_machine effort?
497 *
498 * - HT siblings must be idle and not execute other code while the other sibling
499 *   is loading microcode in order to avoid any negative interactions caused by
500 *   the loading.
501 *
502 * - In addition, microcode update on the cores must be serialized until this
503 *   requirement can be relaxed in the future. Right now, this is conservative
504 *   and good.
505 */
506#define SPINUNIT 100 /* 100 nsec */
507
508static int check_online_cpus(void)
509{
510	unsigned int cpu;
511
512	/*
513	 * Make sure all CPUs are online.  It's fine for SMT to be disabled if
514	 * all the primary threads are still online.
515	 */
516	for_each_present_cpu(cpu) {
517		if (topology_is_primary_thread(cpu) && !cpu_online(cpu)) {
518			pr_err("Not all CPUs online, aborting microcode update.\n");
519			return -EINVAL;
520		}
521	}
522
523	return 0;
524}
525
526static atomic_t late_cpus_in;
527static atomic_t late_cpus_out;
528
529static int __wait_for_cpus(atomic_t *t, long long timeout)
530{
531	int all_cpus = num_online_cpus();
532
533	atomic_inc(t);
534
535	while (atomic_read(t) < all_cpus) {
536		if (timeout < SPINUNIT) {
537			pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n",
538				all_cpus - atomic_read(t));
539			return 1;
540		}
541
542		ndelay(SPINUNIT);
543		timeout -= SPINUNIT;
544
545		touch_nmi_watchdog();
546	}
547	return 0;
548}
549
550/*
551 * Returns:
552 * < 0 - on error
553 *   0 - no update done
554 *   1 - microcode was updated
555 */
556static int __reload_late(void *info)
557{
558	int cpu = smp_processor_id();
559	enum ucode_state err;
560	int ret = 0;
561
562	/*
563	 * Wait for all CPUs to arrive. A load will not be attempted unless all
564	 * CPUs show up.
565	 * */
566	if (__wait_for_cpus(&late_cpus_in, NSEC_PER_SEC))
567		return -1;
568
569	raw_spin_lock(&update_lock);
570	apply_microcode_local(&err);
571	raw_spin_unlock(&update_lock);
572
573	/* siblings return UCODE_OK because their engine got updated already */
574	if (err > UCODE_NFOUND) {
575		pr_warn("Error reloading microcode on CPU %d\n", cpu);
 
 
 
 
 
 
 
 
 
576		ret = -1;
577	} else if (err == UCODE_UPDATED || err == UCODE_OK) {
578		ret = 1;
579	}
580
 
 
 
 
581	/*
582	 * Increase the wait timeout to a safe value here since we're
583	 * serializing the microcode update and that could take a while on a
584	 * large number of CPUs. And that is fine as the *actual* timeout will
585	 * be determined by the last CPU finished updating and thus cut short.
586	 */
587	if (__wait_for_cpus(&late_cpus_out, NSEC_PER_SEC * num_online_cpus()))
588		panic("Timeout during microcode update!\n");
589
590	return ret;
591}
592
593/*
594 * Reload microcode late on all CPUs. Wait for a sec until they
595 * all gather together.
596 */
597static int microcode_reload_late(void)
598{
599	int ret;
 
 
 
600
601	atomic_set(&late_cpus_in,  0);
602	atomic_set(&late_cpus_out, 0);
603
604	ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);
605	if (ret > 0)
606		microcode_check();
607
608	pr_info("Reload completed, microcode revision: 0x%x\n", boot_cpu_data.microcode);
 
609
610	return ret;
611}
612
613static ssize_t reload_store(struct device *dev,
614			    struct device_attribute *attr,
615			    const char *buf, size_t size)
616{
617	enum ucode_state tmp_ret = UCODE_OK;
618	int bsp = boot_cpu_data.cpu_index;
619	unsigned long val;
620	ssize_t ret = 0;
621
622	ret = kstrtoul(buf, 0, &val);
623	if (ret)
624		return ret;
625
626	if (val != 1)
627		return size;
628
629	tmp_ret = microcode_ops->request_microcode_fw(bsp, &microcode_pdev->dev, true);
630	if (tmp_ret != UCODE_NEW)
631		return size;
632
633	get_online_cpus();
634
635	ret = check_online_cpus();
636	if (ret)
637		goto put;
638
 
 
 
 
639	mutex_lock(&microcode_mutex);
640	ret = microcode_reload_late();
641	mutex_unlock(&microcode_mutex);
642
643put:
644	put_online_cpus();
645
646	if (ret >= 0)
647		ret = size;
648
 
 
649	return ret;
650}
651
 
 
 
652static ssize_t version_show(struct device *dev,
653			struct device_attribute *attr, char *buf)
654{
655	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
656
657	return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
658}
659
660static ssize_t pf_show(struct device *dev,
661			struct device_attribute *attr, char *buf)
662{
663	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
664
665	return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
666}
667
668static DEVICE_ATTR_WO(reload);
669static DEVICE_ATTR(version, 0444, version_show, NULL);
670static DEVICE_ATTR(processor_flags, 0444, pf_show, NULL);
671
672static struct attribute *mc_default_attrs[] = {
673	&dev_attr_version.attr,
674	&dev_attr_processor_flags.attr,
675	NULL
676};
677
678static const struct attribute_group mc_attr_group = {
679	.attrs			= mc_default_attrs,
680	.name			= "microcode",
681};
682
683static void microcode_fini_cpu(int cpu)
684{
685	if (microcode_ops->microcode_fini_cpu)
686		microcode_ops->microcode_fini_cpu(cpu);
687}
688
689static enum ucode_state microcode_resume_cpu(int cpu)
690{
691	if (apply_microcode_on_target(cpu))
692		return UCODE_ERROR;
693
694	pr_debug("CPU%d updated upon resume\n", cpu);
695
696	return UCODE_OK;
697}
698
699static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
700{
701	enum ucode_state ustate;
702	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
703
704	if (uci->valid)
705		return UCODE_OK;
706
707	if (collect_cpu_info(cpu))
708		return UCODE_ERROR;
709
710	/* --dimm. Trigger a delayed update? */
711	if (system_state != SYSTEM_RUNNING)
712		return UCODE_NFOUND;
713
714	ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev, refresh_fw);
715	if (ustate == UCODE_NEW) {
716		pr_debug("CPU%d updated upon init\n", cpu);
717		apply_microcode_on_target(cpu);
718	}
719
720	return ustate;
721}
722
723static enum ucode_state microcode_update_cpu(int cpu)
724{
725	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
726
727	/* Refresh CPU microcode revision after resume. */
728	collect_cpu_info(cpu);
729
730	if (uci->valid)
731		return microcode_resume_cpu(cpu);
732
733	return microcode_init_cpu(cpu, false);
734}
735
736static int mc_device_add(struct device *dev, struct subsys_interface *sif)
737{
738	int err, cpu = dev->id;
739
740	if (!cpu_online(cpu))
741		return 0;
742
743	pr_debug("CPU%d added\n", cpu);
744
745	err = sysfs_create_group(&dev->kobj, &mc_attr_group);
746	if (err)
747		return err;
748
749	if (microcode_init_cpu(cpu, true) == UCODE_ERROR)
750		return -EINVAL;
751
752	return err;
753}
754
755static void mc_device_remove(struct device *dev, struct subsys_interface *sif)
756{
757	int cpu = dev->id;
758
759	if (!cpu_online(cpu))
760		return;
761
762	pr_debug("CPU%d removed\n", cpu);
763	microcode_fini_cpu(cpu);
764	sysfs_remove_group(&dev->kobj, &mc_attr_group);
765}
766
767static struct subsys_interface mc_cpu_interface = {
768	.name			= "microcode",
769	.subsys			= &cpu_subsys,
770	.add_dev		= mc_device_add,
771	.remove_dev		= mc_device_remove,
772};
773
774/**
775 * mc_bp_resume - Update boot CPU microcode during resume.
776 */
777static void mc_bp_resume(void)
778{
779	int cpu = smp_processor_id();
780	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
781
782	if (uci->valid && uci->mc)
783		microcode_ops->apply_microcode(cpu);
784	else if (!uci->mc)
785		reload_early_microcode();
786}
787
788static struct syscore_ops mc_syscore_ops = {
789	.resume			= mc_bp_resume,
790};
791
792static int mc_cpu_starting(unsigned int cpu)
793{
794	microcode_update_cpu(cpu);
795	pr_debug("CPU%d added\n", cpu);
796	return 0;
 
 
797}
798
799static int mc_cpu_online(unsigned int cpu)
800{
801	struct device *dev = get_cpu_device(cpu);
802
803	if (sysfs_create_group(&dev->kobj, &mc_attr_group))
804		pr_err("Failed to create group for CPU%d\n", cpu);
805	return 0;
806}
807
808static int mc_cpu_down_prep(unsigned int cpu)
809{
810	struct device *dev;
811
812	dev = get_cpu_device(cpu);
 
 
 
813	/* Suspend is in progress, only remove the interface */
814	sysfs_remove_group(&dev->kobj, &mc_attr_group);
815	pr_debug("CPU%d removed\n", cpu);
816
817	return 0;
818}
819
 
 
 
 
 
 
 
 
 
 
 
 
 
 
820static struct attribute *cpu_root_microcode_attrs[] = {
 
821	&dev_attr_reload.attr,
 
822	NULL
823};
824
825static const struct attribute_group cpu_root_microcode_group = {
826	.name  = "microcode",
827	.attrs = cpu_root_microcode_attrs,
828};
829
830int __init microcode_init(void)
831{
832	struct cpuinfo_x86 *c = &boot_cpu_data;
833	int error;
834
835	if (dis_ucode_ldr)
836		return -EINVAL;
837
838	if (c->x86_vendor == X86_VENDOR_INTEL)
839		microcode_ops = init_intel_microcode();
840	else if (c->x86_vendor == X86_VENDOR_AMD)
841		microcode_ops = init_amd_microcode();
842	else
843		pr_err("no support for this CPU vendor\n");
844
845	if (!microcode_ops)
846		return -ENODEV;
847
848	microcode_pdev = platform_device_register_simple("microcode", -1,
849							 NULL, 0);
850	if (IS_ERR(microcode_pdev))
851		return PTR_ERR(microcode_pdev);
852
853	get_online_cpus();
854	mutex_lock(&microcode_mutex);
855
856	error = subsys_interface_register(&mc_cpu_interface);
857	if (!error)
858		perf_check_microcode();
859	mutex_unlock(&microcode_mutex);
860	put_online_cpus();
861
862	if (error)
863		goto out_pdev;
864
865	error = sysfs_create_group(&cpu_subsys.dev_root->kobj,
866				   &cpu_root_microcode_group);
867
868	if (error) {
869		pr_err("Error creating microcode group!\n");
870		goto out_driver;
871	}
872
873	error = microcode_dev_init();
874	if (error)
875		goto out_ucode_group;
876
877	register_syscore_ops(&mc_syscore_ops);
878	cpuhp_setup_state_nocalls(CPUHP_AP_MICROCODE_LOADER, "x86/microcode:starting",
879				  mc_cpu_starting, NULL);
880	cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
881				  mc_cpu_online, mc_cpu_down_prep);
882
883	pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);
884
885	return 0;
886
887 out_ucode_group:
888	sysfs_remove_group(&cpu_subsys.dev_root->kobj,
889			   &cpu_root_microcode_group);
890
891 out_driver:
892	get_online_cpus();
893	mutex_lock(&microcode_mutex);
894
895	subsys_interface_unregister(&mc_cpu_interface);
896
897	mutex_unlock(&microcode_mutex);
898	put_online_cpus();
899
900 out_pdev:
901	platform_device_unregister(microcode_pdev);
902	return error;
903
904}
905fs_initcall(save_microcode_in_initrd);
906late_initcall(microcode_init);
v6.2
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * CPU Microcode Update Driver for Linux
  4 *
  5 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
  6 *	      2006	Shaohua Li <shaohua.li@intel.com>
  7 *	      2013-2016	Borislav Petkov <bp@alien8.de>
  8 *
  9 * X86 CPU microcode early update for Linux:
 10 *
 11 *	Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
 12 *			   H Peter Anvin" <hpa@zytor.com>
 13 *		  (C) 2015 Borislav Petkov <bp@alien8.de>
 14 *
 15 * This driver allows to upgrade microcode on x86 processors.
 16 */
 17
 18#define pr_fmt(fmt) "microcode: " fmt
 19
 20#include <linux/platform_device.h>
 21#include <linux/stop_machine.h>
 22#include <linux/syscore_ops.h>
 23#include <linux/miscdevice.h>
 24#include <linux/capability.h>
 25#include <linux/firmware.h>
 26#include <linux/kernel.h>
 27#include <linux/delay.h>
 28#include <linux/mutex.h>
 29#include <linux/cpu.h>
 30#include <linux/nmi.h>
 31#include <linux/fs.h>
 32#include <linux/mm.h>
 33
 34#include <asm/microcode_intel.h>
 35#include <asm/cpu_device_id.h>
 36#include <asm/microcode_amd.h>
 37#include <asm/perf_event.h>
 38#include <asm/microcode.h>
 39#include <asm/processor.h>
 40#include <asm/cmdline.h>
 41#include <asm/setup.h>
 42
 43#define DRIVER_VERSION	"2.2"
 44
 45static struct microcode_ops	*microcode_ops;
 46static bool dis_ucode_ldr = true;
 47
 48bool initrd_gone;
 49
 50LIST_HEAD(microcode_cache);
 51
 52/*
 53 * Synchronization.
 54 *
 55 * All non cpu-hotplug-callback call sites use:
 56 *
 57 * - microcode_mutex to synchronize with each other;
 58 * - cpus_read_lock/unlock() to synchronize with
 59 *   the cpu-hotplug-callback call sites.
 60 *
 61 * We guarantee that only a single cpu is being
 62 * updated at any particular moment of time.
 63 */
 64static DEFINE_MUTEX(microcode_mutex);
 65
 
 
 
 
 
 66struct ucode_cpu_info		ucode_cpu_info[NR_CPUS];
 67
 68struct cpu_info_ctx {
 69	struct cpu_signature	*cpu_sig;
 70	int			err;
 71};
 72
 73/*
 74 * Those patch levels cannot be updated to newer ones and thus should be final.
 75 */
 76static u32 final_levels[] = {
 77	0x01000098,
 78	0x0100009f,
 79	0x010000af,
 80	0, /* T-101 terminator */
 81};
 82
 83/*
 84 * Check the current patch level on this CPU.
 85 *
 86 * Returns:
 87 *  - true: if update should stop
 88 *  - false: otherwise
 89 */
 90static bool amd_check_current_patch_level(void)
 91{
 92	u32 lvl, dummy, i;
 93	u32 *levels;
 94
 95	native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
 96
 97	if (IS_ENABLED(CONFIG_X86_32))
 98		levels = (u32 *)__pa_nodebug(&final_levels);
 99	else
100		levels = final_levels;
101
102	for (i = 0; levels[i]; i++) {
103		if (lvl == levels[i])
104			return true;
105	}
106	return false;
107}
108
109static bool __init check_loader_disabled_bsp(void)
110{
111	static const char *__dis_opt_str = "dis_ucode_ldr";
112
113#ifdef CONFIG_X86_32
114	const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
115	const char *option  = (const char *)__pa_nodebug(__dis_opt_str);
116	bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);
117
118#else /* CONFIG_X86_64 */
119	const char *cmdline = boot_command_line;
120	const char *option  = __dis_opt_str;
121	bool *res = &dis_ucode_ldr;
122#endif
123
124	/*
125	 * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not
126	 * completely accurate as xen pv guests don't see that CPUID bit set but
127	 * that's good enough as they don't land on the BSP path anyway.
128	 */
129	if (native_cpuid_ecx(1) & BIT(31))
130		return *res;
131
132	if (x86_cpuid_vendor() == X86_VENDOR_AMD) {
133		if (amd_check_current_patch_level())
134			return *res;
135	}
136
137	if (cmdline_find_option_bool(cmdline, option) <= 0)
138		*res = false;
139
140	return *res;
141}
142
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
143void __init load_ucode_bsp(void)
144{
145	unsigned int cpuid_1_eax;
146	bool intel = true;
147
148	if (!have_cpuid_p())
149		return;
150
151	cpuid_1_eax = native_cpuid_eax(1);
152
153	switch (x86_cpuid_vendor()) {
154	case X86_VENDOR_INTEL:
155		if (x86_family(cpuid_1_eax) < 6)
156			return;
157		break;
158
159	case X86_VENDOR_AMD:
160		if (x86_family(cpuid_1_eax) < 0x10)
161			return;
162		intel = false;
163		break;
164
165	default:
166		return;
167	}
168
169	if (check_loader_disabled_bsp())
170		return;
171
172	if (intel)
173		load_ucode_intel_bsp();
174	else
175		load_ucode_amd_bsp(cpuid_1_eax);
176}
177
178static bool check_loader_disabled_ap(void)
179{
180#ifdef CONFIG_X86_32
181	return *((bool *)__pa_nodebug(&dis_ucode_ldr));
182#else
183	return dis_ucode_ldr;
184#endif
185}
186
187void load_ucode_ap(void)
188{
189	unsigned int cpuid_1_eax;
190
191	if (check_loader_disabled_ap())
192		return;
193
194	cpuid_1_eax = native_cpuid_eax(1);
195
196	switch (x86_cpuid_vendor()) {
197	case X86_VENDOR_INTEL:
198		if (x86_family(cpuid_1_eax) >= 6)
199			load_ucode_intel_ap();
200		break;
201	case X86_VENDOR_AMD:
202		if (x86_family(cpuid_1_eax) >= 0x10)
203			load_ucode_amd_ap(cpuid_1_eax);
204		break;
205	default:
206		break;
207	}
208}
209
210static int __init save_microcode_in_initrd(void)
211{
212	struct cpuinfo_x86 *c = &boot_cpu_data;
213	int ret = -EINVAL;
214
215	switch (c->x86_vendor) {
216	case X86_VENDOR_INTEL:
217		if (c->x86 >= 6)
218			ret = save_microcode_in_initrd_intel();
219		break;
220	case X86_VENDOR_AMD:
221		if (c->x86 >= 0x10)
222			ret = save_microcode_in_initrd_amd(cpuid_eax(1));
223		break;
224	default:
225		break;
226	}
227
228	initrd_gone = true;
229
230	return ret;
231}
232
233struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa)
234{
235#ifdef CONFIG_BLK_DEV_INITRD
236	unsigned long start = 0;
237	size_t size;
238
239#ifdef CONFIG_X86_32
240	struct boot_params *params;
241
242	if (use_pa)
243		params = (struct boot_params *)__pa_nodebug(&boot_params);
244	else
245		params = &boot_params;
246
247	size = params->hdr.ramdisk_size;
248
249	/*
250	 * Set start only if we have an initrd image. We cannot use initrd_start
251	 * because it is not set that early yet.
252	 */
253	if (size)
254		start = params->hdr.ramdisk_image;
255
256# else /* CONFIG_X86_64 */
257	size  = (unsigned long)boot_params.ext_ramdisk_size << 32;
258	size |= boot_params.hdr.ramdisk_size;
259
260	if (size) {
261		start  = (unsigned long)boot_params.ext_ramdisk_image << 32;
262		start |= boot_params.hdr.ramdisk_image;
263
264		start += PAGE_OFFSET;
265	}
266# endif
267
268	/*
269	 * Fixup the start address: after reserve_initrd() runs, initrd_start
270	 * has the virtual address of the beginning of the initrd. It also
271	 * possibly relocates the ramdisk. In either case, initrd_start contains
272	 * the updated address so use that instead.
273	 *
274	 * initrd_gone is for the hotplug case where we've thrown out initrd
275	 * already.
276	 */
277	if (!use_pa) {
278		if (initrd_gone)
279			return (struct cpio_data){ NULL, 0, "" };
280		if (initrd_start)
281			start = initrd_start;
282	} else {
283		/*
284		 * The picture with physical addresses is a bit different: we
285		 * need to get the *physical* address to which the ramdisk was
286		 * relocated, i.e., relocated_ramdisk (not initrd_start) and
287		 * since we're running from physical addresses, we need to access
288		 * relocated_ramdisk through its *physical* address too.
289		 */
290		u64 *rr = (u64 *)__pa_nodebug(&relocated_ramdisk);
291		if (*rr)
292			start = *rr;
293	}
294
295	return find_cpio_data(path, (void *)start, size, NULL);
296#else /* !CONFIG_BLK_DEV_INITRD */
297	return (struct cpio_data){ NULL, 0, "" };
298#endif
299}
300
301void reload_early_microcode(void)
302{
303	int vendor, family;
304
305	vendor = x86_cpuid_vendor();
306	family = x86_cpuid_family();
307
308	switch (vendor) {
309	case X86_VENDOR_INTEL:
310		if (family >= 6)
311			reload_ucode_intel();
312		break;
313	case X86_VENDOR_AMD:
314		if (family >= 0x10)
315			reload_ucode_amd();
316		break;
317	default:
318		break;
319	}
320}
321
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
322/* fake device for request_firmware */
323static struct platform_device	*microcode_pdev;
324
325#ifdef CONFIG_MICROCODE_LATE_LOADING
326/*
327 * Late loading dance. Why the heavy-handed stomp_machine effort?
328 *
329 * - HT siblings must be idle and not execute other code while the other sibling
330 *   is loading microcode in order to avoid any negative interactions caused by
331 *   the loading.
332 *
333 * - In addition, microcode update on the cores must be serialized until this
334 *   requirement can be relaxed in the future. Right now, this is conservative
335 *   and good.
336 */
337#define SPINUNIT 100 /* 100 nsec */
338
339static int check_online_cpus(void)
340{
341	unsigned int cpu;
342
343	/*
344	 * Make sure all CPUs are online.  It's fine for SMT to be disabled if
345	 * all the primary threads are still online.
346	 */
347	for_each_present_cpu(cpu) {
348		if (topology_is_primary_thread(cpu) && !cpu_online(cpu)) {
349			pr_err("Not all CPUs online, aborting microcode update.\n");
350			return -EINVAL;
351		}
352	}
353
354	return 0;
355}
356
357static atomic_t late_cpus_in;
358static atomic_t late_cpus_out;
359
360static int __wait_for_cpus(atomic_t *t, long long timeout)
361{
362	int all_cpus = num_online_cpus();
363
364	atomic_inc(t);
365
366	while (atomic_read(t) < all_cpus) {
367		if (timeout < SPINUNIT) {
368			pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n",
369				all_cpus - atomic_read(t));
370			return 1;
371		}
372
373		ndelay(SPINUNIT);
374		timeout -= SPINUNIT;
375
376		touch_nmi_watchdog();
377	}
378	return 0;
379}
380
381/*
382 * Returns:
383 * < 0 - on error
384 *   0 - success (no update done or microcode was updated)
 
385 */
386static int __reload_late(void *info)
387{
388	int cpu = smp_processor_id();
389	enum ucode_state err;
390	int ret = 0;
391
392	/*
393	 * Wait for all CPUs to arrive. A load will not be attempted unless all
394	 * CPUs show up.
395	 * */
396	if (__wait_for_cpus(&late_cpus_in, NSEC_PER_SEC))
397		return -1;
398
399	/*
400	 * On an SMT system, it suffices to load the microcode on one sibling of
401	 * the core because the microcode engine is shared between the threads.
402	 * Synchronization still needs to take place so that no concurrent
403	 * loading attempts happen on multiple threads of an SMT core. See
404	 * below.
405	 */
406	if (cpumask_first(topology_sibling_cpumask(cpu)) == cpu)
407		err = microcode_ops->apply_microcode(cpu);
408	else
409		goto wait_for_siblings;
410
411	if (err >= UCODE_NFOUND) {
412		if (err == UCODE_ERROR)
413			pr_warn("Error reloading microcode on CPU %d\n", cpu);
414
415		ret = -1;
 
 
416	}
417
418wait_for_siblings:
419	if (__wait_for_cpus(&late_cpus_out, NSEC_PER_SEC))
420		panic("Timeout during microcode update!\n");
421
422	/*
423	 * At least one thread has completed update on each core.
424	 * For others, simply call the update to make sure the
425	 * per-cpu cpuinfo can be updated with right microcode
426	 * revision.
427	 */
428	if (cpumask_first(topology_sibling_cpumask(cpu)) != cpu)
429		err = microcode_ops->apply_microcode(cpu);
430
431	return ret;
432}
433
434/*
435 * Reload microcode late on all CPUs. Wait for a sec until they
436 * all gather together.
437 */
438static int microcode_reload_late(void)
439{
440	int old = boot_cpu_data.microcode, ret;
441
442	pr_err("Attempting late microcode loading - it is dangerous and taints the kernel.\n");
443	pr_err("You should switch to early loading, if possible.\n");
444
445	atomic_set(&late_cpus_in,  0);
446	atomic_set(&late_cpus_out, 0);
447
448	ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);
449	if (ret == 0)
450		microcode_check();
451
452	pr_info("Reload completed, microcode revision: 0x%x -> 0x%x\n",
453		old, boot_cpu_data.microcode);
454
455	return ret;
456}
457
458static ssize_t reload_store(struct device *dev,
459			    struct device_attribute *attr,
460			    const char *buf, size_t size)
461{
462	enum ucode_state tmp_ret = UCODE_OK;
463	int bsp = boot_cpu_data.cpu_index;
464	unsigned long val;
465	ssize_t ret = 0;
466
467	ret = kstrtoul(buf, 0, &val);
468	if (ret)
469		return ret;
470
471	if (val != 1)
472		return size;
473
474	cpus_read_lock();
 
 
 
 
475
476	ret = check_online_cpus();
477	if (ret)
478		goto put;
479
480	tmp_ret = microcode_ops->request_microcode_fw(bsp, &microcode_pdev->dev);
481	if (tmp_ret != UCODE_NEW)
482		goto put;
483
484	mutex_lock(&microcode_mutex);
485	ret = microcode_reload_late();
486	mutex_unlock(&microcode_mutex);
487
488put:
489	cpus_read_unlock();
490
491	if (ret == 0)
492		ret = size;
493
494	add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
495
496	return ret;
497}
498
499static DEVICE_ATTR_WO(reload);
500#endif
501
502static ssize_t version_show(struct device *dev,
503			struct device_attribute *attr, char *buf)
504{
505	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
506
507	return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
508}
509
510static ssize_t pf_show(struct device *dev,
511			struct device_attribute *attr, char *buf)
512{
513	struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
514
515	return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
516}
517
 
518static DEVICE_ATTR(version, 0444, version_show, NULL);
519static DEVICE_ATTR(processor_flags, 0444, pf_show, NULL);
520
521static struct attribute *mc_default_attrs[] = {
522	&dev_attr_version.attr,
523	&dev_attr_processor_flags.attr,
524	NULL
525};
526
527static const struct attribute_group mc_attr_group = {
528	.attrs			= mc_default_attrs,
529	.name			= "microcode",
530};
531
532static void microcode_fini_cpu(int cpu)
533{
534	if (microcode_ops->microcode_fini_cpu)
535		microcode_ops->microcode_fini_cpu(cpu);
536}
537
538static enum ucode_state microcode_init_cpu(int cpu)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
539{
540	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
541
542	memset(uci, 0, sizeof(*uci));
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
543
544	microcode_ops->collect_cpu_info(cpu, &uci->cpu_sig);
 
 
545
546	return microcode_ops->apply_microcode(cpu);
 
 
 
 
 
547}
548
 
 
 
 
 
 
 
549/**
550 * microcode_bsp_resume - Update boot CPU microcode during resume.
551 */
552void microcode_bsp_resume(void)
553{
554	int cpu = smp_processor_id();
555	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
556
557	if (uci->mc)
558		microcode_ops->apply_microcode(cpu);
559	else
560		reload_early_microcode();
561}
562
563static struct syscore_ops mc_syscore_ops = {
564	.resume	= microcode_bsp_resume,
565};
566
567static int mc_cpu_starting(unsigned int cpu)
568{
569	enum ucode_state err = microcode_ops->apply_microcode(cpu);
570
571	pr_debug("%s: CPU%d, err: %d\n", __func__, cpu, err);
572
573	return err == UCODE_ERROR;
574}
575
576static int mc_cpu_online(unsigned int cpu)
577{
578	struct device *dev = get_cpu_device(cpu);
579
580	if (sysfs_create_group(&dev->kobj, &mc_attr_group))
581		pr_err("Failed to create group for CPU%d\n", cpu);
582	return 0;
583}
584
585static int mc_cpu_down_prep(unsigned int cpu)
586{
587	struct device *dev;
588
589	dev = get_cpu_device(cpu);
590
591	microcode_fini_cpu(cpu);
592
593	/* Suspend is in progress, only remove the interface */
594	sysfs_remove_group(&dev->kobj, &mc_attr_group);
595	pr_debug("%s: CPU%d\n", __func__, cpu);
596
597	return 0;
598}
599
600static void setup_online_cpu(struct work_struct *work)
601{
602	int cpu = smp_processor_id();
603	enum ucode_state err;
604
605	err = microcode_init_cpu(cpu);
606	if (err == UCODE_ERROR) {
607		pr_err("Error applying microcode on CPU%d\n", cpu);
608		return;
609	}
610
611	mc_cpu_online(cpu);
612}
613
614static struct attribute *cpu_root_microcode_attrs[] = {
615#ifdef CONFIG_MICROCODE_LATE_LOADING
616	&dev_attr_reload.attr,
617#endif
618	NULL
619};
620
621static const struct attribute_group cpu_root_microcode_group = {
622	.name  = "microcode",
623	.attrs = cpu_root_microcode_attrs,
624};
625
626static int __init microcode_init(void)
627{
628	struct cpuinfo_x86 *c = &boot_cpu_data;
629	int error;
630
631	if (dis_ucode_ldr)
632		return -EINVAL;
633
634	if (c->x86_vendor == X86_VENDOR_INTEL)
635		microcode_ops = init_intel_microcode();
636	else if (c->x86_vendor == X86_VENDOR_AMD)
637		microcode_ops = init_amd_microcode();
638	else
639		pr_err("no support for this CPU vendor\n");
640
641	if (!microcode_ops)
642		return -ENODEV;
643
644	microcode_pdev = platform_device_register_simple("microcode", -1, NULL, 0);
 
645	if (IS_ERR(microcode_pdev))
646		return PTR_ERR(microcode_pdev);
647
648	error = sysfs_create_group(&cpu_subsys.dev_root->kobj, &cpu_root_microcode_group);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
649	if (error) {
650		pr_err("Error creating microcode group!\n");
651		goto out_pdev;
652	}
653
654	/* Do per-CPU setup */
655	schedule_on_each_cpu(setup_online_cpu);
 
656
657	register_syscore_ops(&mc_syscore_ops);
658	cpuhp_setup_state_nocalls(CPUHP_AP_MICROCODE_LOADER, "x86/microcode:starting",
659				  mc_cpu_starting, NULL);
660	cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
661				  mc_cpu_online, mc_cpu_down_prep);
662
663	pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);
664
665	return 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
666
667 out_pdev:
668	platform_device_unregister(microcode_pdev);
669	return error;
670
671}
672fs_initcall(save_microcode_in_initrd);
673late_initcall(microcode_init);