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v5.4
  1# SPDX-License-Identifier: GPL-2.0
  2comment "Processor Type"
  3
  4choice
  5	prompt "CPU family support"
  6	default M68KCLASSIC if MMU
  7	default COLDFIRE if !MMU
  8	help
  9	  The Freescale (was Motorola) M68K family of processors implements
 10	  the full 68000 processor instruction set.
 11	  The Freescale ColdFire family of processors is a modern derivative
 12	  of the 68000 processor family. They are mainly targeted at embedded
 13	  applications, and are all System-On-Chip (SOC) devices, as opposed
 14	  to stand alone CPUs. They implement a subset of the original 68000
 15	  processor instruction set.
 16	  If you anticipate running this kernel on a computer with a classic
 17	  MC68xxx processor, select M68KCLASSIC.
 18	  If you anticipate running this kernel on a computer with a ColdFire
 19	  processor, select COLDFIRE.
 20
 21config M68KCLASSIC
 22	bool "Classic M68K CPU family support"
 
 23
 24config COLDFIRE
 25	bool "Coldfire CPU family support"
 26	select ARCH_HAVE_CUSTOM_GPIO_H
 27	select CPU_HAS_NO_BITFIELDS
 
 28	select CPU_HAS_NO_MULDIV64
 29	select GENERIC_CSUM
 30	select GPIOLIB
 31	select HAVE_CLK
 32
 33endchoice
 34
 35if M68KCLASSIC
 36
 37config M68000
 38	bool "MC68000"
 39	depends on !MMU
 40	select CPU_HAS_NO_BITFIELDS
 
 41	select CPU_HAS_NO_MULDIV64
 42	select CPU_HAS_NO_UNALIGNED
 43	select GENERIC_CSUM
 44	select CPU_NO_EFFICIENT_FFS
 45	select HAVE_ARCH_HASH
 
 46	help
 47	  The Freescale (was Motorola) 68000 CPU is the first generation of
 48	  the well known M68K family of processors. The CPU core as well as
 49	  being available as a stand alone CPU was also used in many
 50	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
 51	  a paging MMU.
 52
 53config MCPU32
 54	bool
 55	select CPU_HAS_NO_BITFIELDS
 56	select CPU_HAS_NO_UNALIGNED
 57	select CPU_NO_EFFICIENT_FFS
 58	help
 59	  The Freescale (was then Motorola) CPU32 is a CPU core that is
 60	  based on the 68020 processor. For the most part it is used in
 61	  System-On-Chip parts, and does not contain a paging MMU.
 62
 63config M68020
 64	bool "68020 support"
 65	depends on MMU
 66	select FPU
 67	select CPU_HAS_ADDRESS_SPACES
 68	help
 69	  If you anticipate running this kernel on a computer with a MC68020
 70	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
 71	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
 72	  Sun 3, which provides its own version.
 73
 74config M68030
 75	bool "68030 support"
 76	depends on MMU && !MMU_SUN3
 77	select FPU
 78	select CPU_HAS_ADDRESS_SPACES
 79	help
 80	  If you anticipate running this kernel on a computer with a MC68030
 81	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
 82	  work, as it does not include an MMU (Memory Management Unit).
 83
 84config M68040
 85	bool "68040 support"
 86	depends on MMU && !MMU_SUN3
 87	select FPU
 88	select CPU_HAS_ADDRESS_SPACES
 89	help
 90	  If you anticipate running this kernel on a computer with a MC68LC040
 91	  or MC68040 processor, say Y. Otherwise, say N. Note that an
 92	  MC68EC040 will not work, as it does not include an MMU (Memory
 93	  Management Unit).
 94
 95config M68060
 96	bool "68060 support"
 97	depends on MMU && !MMU_SUN3
 98	select FPU
 99	select CPU_HAS_ADDRESS_SPACES
100	help
101	  If you anticipate running this kernel on a computer with a MC68060
102	  processor, say Y. Otherwise, say N.
103
104config M68328
105	bool "MC68328"
106	depends on !MMU
107	select M68000
108	help
109	  Motorola 68328 processor support.
110
111config M68EZ328
112	bool "MC68EZ328"
113	depends on !MMU
114	select M68000
115	help
116	  Motorola 68EX328 processor support.
117
118config M68VZ328
119	bool "MC68VZ328"
120	depends on !MMU
121	select M68000
122	help
123	  Motorola 68VZ328 processor support.
124
125endif # M68KCLASSIC
126
127if COLDFIRE
128
129choice
130	prompt "ColdFire SoC type"
131	default M520x
132	help
133	  Select the type of ColdFire System-on-Chip (SoC) that you want
134	  to build for.
135
136config M5206
137	bool "MCF5206"
138	depends on !MMU
139	select COLDFIRE_SW_A7
 
140	select HAVE_MBAR
141	select CPU_NO_EFFICIENT_FFS
142	help
143	  Motorola ColdFire 5206 processor support.
144
145config M5206e
146	bool "MCF5206e"
147	depends on !MMU
148	select COLDFIRE_SW_A7
 
149	select HAVE_MBAR
150	select CPU_NO_EFFICIENT_FFS
151	help
152	  Motorola ColdFire 5206e processor support.
153
154config M520x
155	bool "MCF520x"
156	depends on !MMU
157	select GENERIC_CLOCKEVENTS
158	select HAVE_CACHE_SPLIT
159	help
160	   Freescale Coldfire 5207/5208 processor support.
161
162config M523x
163	bool "MCF523x"
164	depends on !MMU
165	select GENERIC_CLOCKEVENTS
166	select HAVE_CACHE_SPLIT
167	select HAVE_IPSBAR
168	help
169	  Freescale Coldfire 5230/1/2/4/5 processor support
170
171config M5249
172	bool "MCF5249"
173	depends on !MMU
174	select COLDFIRE_SW_A7
 
175	select HAVE_MBAR
176	select CPU_NO_EFFICIENT_FFS
177	help
178	  Motorola ColdFire 5249 processor support.
179
180config M525x
181	bool "MCF525x"
182	depends on !MMU
183	select COLDFIRE_SW_A7
 
184	select HAVE_MBAR
185	select CPU_NO_EFFICIENT_FFS
186	help
187	  Freescale (Motorola) Coldfire 5251/5253 processor support.
188
189config M5271
190	bool "MCF5271"
191	depends on !MMU
 
192	select M527x
193	select HAVE_CACHE_SPLIT
194	select HAVE_IPSBAR
195	select GENERIC_CLOCKEVENTS
196	help
197	  Freescale (Motorola) ColdFire 5270/5271 processor support.
198
199config M5272
200	bool "MCF5272"
201	depends on !MMU
202	select COLDFIRE_SW_A7
 
203	select HAVE_MBAR
204	select CPU_NO_EFFICIENT_FFS
205	help
206	  Motorola ColdFire 5272 processor support.
207
208config M5275
209	bool "MCF5275"
210	depends on !MMU
 
211	select M527x
212	select HAVE_CACHE_SPLIT
213	select HAVE_IPSBAR
214	select GENERIC_CLOCKEVENTS
215	help
216	  Freescale (Motorola) ColdFire 5274/5275 processor support.
217
218config M528x
219	bool "MCF528x"
220	depends on !MMU
221	select GENERIC_CLOCKEVENTS
222	select HAVE_CACHE_SPLIT
223	select HAVE_IPSBAR
224	help
225	  Motorola ColdFire 5280/5282 processor support.
226
227config M5307
228	bool "MCF5307"
229	depends on !MMU
 
230	select COLDFIRE_SW_A7
231	select HAVE_CACHE_CB
232	select HAVE_MBAR
233	select CPU_NO_EFFICIENT_FFS
234	help
235	  Motorola ColdFire 5307 processor support.
236
237config M532x
238	bool "MCF532x"
239	depends on !MMU
 
240	select M53xx
241	select HAVE_CACHE_CB
242	help
243	  Freescale (Motorola) ColdFire 532x processor support.
244
245config M537x
246	bool "MCF537x"
247	depends on !MMU
 
248	select M53xx
249	select HAVE_CACHE_CB
250	help
251	  Freescale ColdFire 537x processor support.
252
253config M5407
254	bool "MCF5407"
255	depends on !MMU
256	select COLDFIRE_SW_A7
 
257	select HAVE_CACHE_CB
258	select HAVE_MBAR
259	select CPU_NO_EFFICIENT_FFS
260	help
261	  Motorola ColdFire 5407 processor support.
262
263config M547x
264	bool "MCF547x"
265	select M54xx
 
266	select MMU_COLDFIRE if MMU
267	select FPU if MMU
268	select HAVE_CACHE_CB
269	select HAVE_MBAR
270	select CPU_NO_EFFICIENT_FFS
271	help
272	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
273
274config M548x
275	bool "MCF548x"
 
276	select MMU_COLDFIRE if MMU
277	select FPU if MMU
278	select M54xx
279	select HAVE_CACHE_CB
280	select HAVE_MBAR
281	select CPU_NO_EFFICIENT_FFS
282	help
283	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
284
285config M5441x
286	bool "MCF5441x"
 
287	select MMU_COLDFIRE if MMU
288	select GENERIC_CLOCKEVENTS
289	select HAVE_CACHE_CB
290	help
291	  Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
292
293endchoice
294
295config M527x
296	bool
297
298config M53xx
299	bool
300
301config M54xx
302	select HAVE_PCI
303	bool
304
305endif # COLDFIRE
 
 
 
 
 
 
 
 
 
306
 
307
308comment "Processor Specific Options"
309
310config M68KFPU_EMU
311	bool "Math emulation support"
312	depends on MMU
313	help
314	  At some point in the future, this will cause floating-point math
315	  instructions to be emulated by the kernel on machines that lack a
316	  floating-point math coprocessor.  Thrill-seekers and chronically
317	  sleep-deprived psychotic hacker types can say Y now, everyone else
318	  should probably wait a while.
319
320config M68KFPU_EMU_EXTRAPREC
321	bool "Math emulation extra precision"
322	depends on M68KFPU_EMU
323	help
324	  The fpu uses normally a few bit more during calculations for
325	  correct rounding, the emulator can (often) do the same but this
326	  extra calculation can cost quite some time, so you can disable
327	  it here. The emulator will then "only" calculate with a 64 bit
328	  mantissa and round slightly incorrect, what is more than enough
329	  for normal usage.
330
331config M68KFPU_EMU_ONLY
332	bool "Math emulation only kernel"
333	depends on M68KFPU_EMU
334	help
335	  This option prevents any floating-point instructions from being
336	  compiled into the kernel, thereby the kernel doesn't save any
337	  floating point context anymore during task switches, so this
338	  kernel will only be usable on machines without a floating-point
339	  math coprocessor. This makes the kernel a bit faster as no tests
340	  needs to be executed whether a floating-point instruction in the
341	  kernel should be executed or not.
342
343config ADVANCED
344	bool "Advanced configuration options"
345	depends on MMU
346	---help---
347	  This gives you access to some advanced options for the CPU. The
348	  defaults should be fine for most users, but these options may make
349	  it possible for you to improve performance somewhat if you know what
350	  you are doing.
351
352	  Note that the answer to this question won't directly affect the
353	  kernel: saying N will just cause the configurator to skip all
354	  the questions about these options.
355
356	  Most users should say N to this question.
357
358config RMW_INSNS
359	bool "Use read-modify-write instructions"
360	depends on ADVANCED
361	---help---
362	  This allows to use certain instructions that work with indivisible
363	  read-modify-write bus cycles. While this is faster than the
364	  workaround of disabling interrupts, it can conflict with DMA
365	  ( = direct memory access) on many Amiga systems, and it is also said
366	  to destabilize other machines. It is very likely that this will
367	  cause serious problems on any Amiga or Atari Medusa if set. The only
368	  configuration where it should work are 68030-based Ataris, where it
369	  apparently improves performance. But you've been warned! Unless you
370	  really know what you are doing, say N. Try Y only if you're quite
371	  adventurous.
372
373config SINGLE_MEMORY_CHUNK
374	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
375	depends on MMU
376	default y if SUN3
377	select NEED_MULTIPLE_NODES
378	help
379	  Ignore all but the first contiguous chunk of physical memory for VM
380	  purposes.  This will save a few bytes kernel size and may speed up
381	  some operations.  Say N if not sure.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
382
383config ARCH_DISCONTIGMEM_ENABLE
384	def_bool MMU && !SINGLE_MEMORY_CHUNK
385
386config 060_WRITETHROUGH
387	bool "Use write-through caching for 68060 supervisor accesses"
388	depends on ADVANCED && M68060
389	---help---
390	  The 68060 generally uses copyback caching of recently accessed data.
391	  Copyback caching means that memory writes will be held in an on-chip
392	  cache and only written back to memory some time later.  Saying Y
393	  here will force supervisor (kernel) accesses to use writethrough
394	  caching.  Writethrough caching means that data is written to memory
395	  straight away, so that cache and memory data always agree.
396	  Writethrough caching is less efficient, but is needed for some
397	  drivers on 68060 based systems where the 68060 bus snooping signal
398	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
399	  this problem.
400
401config M68K_L2_CACHE
402	bool
403	depends on MAC
404	default y
405
406config NODES_SHIFT
407	int
408	default "3"
409	depends on !SINGLE_MEMORY_CHUNK
410
411config CPU_HAS_NO_BITFIELDS
412	bool
413
 
 
 
414config CPU_HAS_NO_MULDIV64
415	bool
416
417config CPU_HAS_NO_UNALIGNED
418	bool
419
420config CPU_HAS_ADDRESS_SPACES
421	bool
 
422
423config FPU
424	bool
425
426config COLDFIRE_SW_A7
427	bool
428
429config HAVE_CACHE_SPLIT
430	bool
431
432config HAVE_CACHE_CB
433	bool
434
435config HAVE_MBAR
436	bool
437
438config HAVE_IPSBAR
439	bool
440
441config CLOCK_FREQ
442	int "Set the core clock frequency"
443	default "25000000" if M5206
444	default "54000000" if M5206e
445	default "166666666" if M520x
446	default "140000000" if M5249
447	default "150000000" if M527x || M523x
448	default "90000000" if M5307
449	default "50000000" if M5407
450	default "266000000" if M54xx
451	default "66666666"
452	depends on COLDFIRE
453	help
454	  Define the CPU clock frequency in use. This is the core clock
455	  frequency, it may or may not be the same as the external clock
456	  crystal fitted to your board. Some processors have an internal
457	  PLL and can have their frequency programmed at run time, others
458	  use internal dividers. In general the kernel won't setup a PLL
459	  if it is fitted (there are some exceptions). This value will be
460	  specific to the exact CPU that you are using.
461
462config OLDMASK
463	bool "Old mask 5307 (1H55J) silicon"
464	depends on M5307
465	help
466	  Build support for the older revision ColdFire 5307 silicon.
467	  Specifically this is the 1H55J mask revision.
468
469if HAVE_CACHE_SPLIT
470choice
471	prompt "Split Cache Configuration"
472	default CACHE_I
473
474config CACHE_I
475	bool "Instruction"
476	help
477	  Use all of the ColdFire CPU cache memory as an instruction cache.
478
479config CACHE_D
480	bool "Data"
481	help
482	  Use all of the ColdFire CPU cache memory as a data cache.
483
484config CACHE_BOTH
485	bool "Both"
486	help
487	  Split the ColdFire CPU cache, and use half as an instruction cache
488	  and half as a data cache.
489endchoice
490endif
491
492if HAVE_CACHE_CB
493choice
494	prompt "Data cache mode"
495	default CACHE_WRITETHRU
496
497config CACHE_WRITETHRU
498	bool "Write-through"
499	help
500	  The ColdFire CPU cache is set into Write-through mode.
501
502config CACHE_COPYBACK
503	bool "Copy-back"
504	help
505	  The ColdFire CPU cache is set into Copy-back mode.
506endchoice
507endif
508
v6.2
  1# SPDX-License-Identifier: GPL-2.0
  2comment "Processor Type"
  3
  4choice
  5	prompt "CPU family support"
  6	default M68KCLASSIC if MMU
  7	default COLDFIRE if !MMU
  8	help
  9	  The Freescale (was Motorola) M68K family of processors implements
 10	  the full 68000 processor instruction set.
 11	  The Freescale ColdFire family of processors is a modern derivative
 12	  of the 68000 processor family. They are mainly targeted at embedded
 13	  applications, and are all System-On-Chip (SOC) devices, as opposed
 14	  to stand alone CPUs. They implement a subset of the original 68000
 15	  processor instruction set.
 16	  If you anticipate running this kernel on a computer with a classic
 17	  MC68xxx processor, select M68KCLASSIC.
 18	  If you anticipate running this kernel on a computer with a ColdFire
 19	  processor, select COLDFIRE.
 20
 21config M68KCLASSIC
 22	bool "Classic M68K CPU family support"
 23	select HAVE_ARCH_PFN_VALID
 24
 25config COLDFIRE
 26	bool "Coldfire CPU family support"
 27	select ARCH_HAVE_CUSTOM_GPIO_H
 28	select CPU_HAS_NO_BITFIELDS
 29	select CPU_HAS_NO_CAS
 30	select CPU_HAS_NO_MULDIV64
 31	select GENERIC_CSUM
 32	select GPIOLIB
 33	select HAVE_LEGACY_CLK
 34
 35endchoice
 36
 37if M68KCLASSIC
 38
 39config M68000
 40	def_bool y
 41	depends on !MMU
 42	select CPU_HAS_NO_BITFIELDS
 43	select CPU_HAS_NO_CAS
 44	select CPU_HAS_NO_MULDIV64
 45	select CPU_HAS_NO_UNALIGNED
 46	select GENERIC_CSUM
 47	select CPU_NO_EFFICIENT_FFS
 48	select HAVE_ARCH_HASH
 49	select LEGACY_TIMER_TICK
 50	help
 51	  The Freescale (was Motorola) 68000 CPU is the first generation of
 52	  the well known M68K family of processors. The CPU core as well as
 53	  being available as a stand alone CPU was also used in many
 54	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
 55	  a paging MMU.
 56
 
 
 
 
 
 
 
 
 
 
 57config M68020
 58	bool "68020 support"
 59	depends on MMU
 60	select FPU
 61	select CPU_HAS_ADDRESS_SPACES
 62	help
 63	  If you anticipate running this kernel on a computer with a MC68020
 64	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
 65	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
 66	  Sun 3, which provides its own version.
 67
 68config M68030
 69	bool "68030 support"
 70	depends on MMU && !MMU_SUN3
 71	select FPU
 72	select CPU_HAS_ADDRESS_SPACES
 73	help
 74	  If you anticipate running this kernel on a computer with a MC68030
 75	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
 76	  work, as it does not include an MMU (Memory Management Unit).
 77
 78config M68040
 79	bool "68040 support"
 80	depends on MMU && !MMU_SUN3
 81	select FPU
 82	select CPU_HAS_ADDRESS_SPACES
 83	help
 84	  If you anticipate running this kernel on a computer with a MC68LC040
 85	  or MC68040 processor, say Y. Otherwise, say N. Note that an
 86	  MC68EC040 will not work, as it does not include an MMU (Memory
 87	  Management Unit).
 88
 89config M68060
 90	bool "68060 support"
 91	depends on MMU && !MMU_SUN3
 92	select FPU
 93	select CPU_HAS_ADDRESS_SPACES
 94	help
 95	  If you anticipate running this kernel on a computer with a MC68060
 96	  processor, say Y. Otherwise, say N.
 97
 98config M68328
 99	bool
100	depends on !MMU
101	select M68000
102	help
103	  Motorola 68328 processor support.
104
105config M68EZ328
106	bool
107	depends on !MMU
108	select M68000
109	help
110	  Motorola 68EX328 processor support.
111
112config M68VZ328
113	bool
114	depends on !MMU
115	select M68000
116	help
117	  Motorola 68VZ328 processor support.
118
119endif # M68KCLASSIC
120
121if COLDFIRE
122
123choice
124	prompt "ColdFire SoC type"
125	default M520x
126	help
127	  Select the type of ColdFire System-on-Chip (SoC) that you want
128	  to build for.
129
130config M5206
131	bool "MCF5206"
132	depends on !MMU
133	select COLDFIRE_SW_A7
134	select COLDFIRE_TIMERS
135	select HAVE_MBAR
136	select CPU_NO_EFFICIENT_FFS
137	help
138	  Motorola ColdFire 5206 processor support.
139
140config M5206e
141	bool "MCF5206e"
142	depends on !MMU
143	select COLDFIRE_SW_A7
144	select COLDFIRE_TIMERS
145	select HAVE_MBAR
146	select CPU_NO_EFFICIENT_FFS
147	help
148	  Motorola ColdFire 5206e processor support.
149
150config M520x
151	bool "MCF520x"
152	depends on !MMU
153	select COLDFIRE_PIT_TIMER
154	select HAVE_CACHE_SPLIT
155	help
156	  Freescale Coldfire 5207/5208 processor support.
157
158config M523x
159	bool "MCF523x"
160	depends on !MMU
161	select COLDFIRE_PIT_TIMER
162	select HAVE_CACHE_SPLIT
163	select HAVE_IPSBAR
164	help
165	  Freescale Coldfire 5230/1/2/4/5 processor support
166
167config M5249
168	bool "MCF5249"
169	depends on !MMU
170	select COLDFIRE_SW_A7
171	select COLDFIRE_TIMERS
172	select HAVE_MBAR
173	select CPU_NO_EFFICIENT_FFS
174	help
175	  Motorola ColdFire 5249 processor support.
176
177config M525x
178	bool "MCF525x"
179	depends on !MMU
180	select COLDFIRE_SW_A7
181	select COLDFIRE_TIMERS
182	select HAVE_MBAR
183	select CPU_NO_EFFICIENT_FFS
184	help
185	  Freescale (Motorola) Coldfire 5251/5253 processor support.
186
187config M5271
188	bool "MCF5271"
189	depends on !MMU
190	select COLDFIRE_PIT_TIMER
191	select M527x
192	select HAVE_CACHE_SPLIT
193	select HAVE_IPSBAR
 
194	help
195	  Freescale (Motorola) ColdFire 5270/5271 processor support.
196
197config M5272
198	bool "MCF5272"
199	depends on !MMU
200	select COLDFIRE_SW_A7
201	select COLDFIRE_TIMERS
202	select HAVE_MBAR
203	select CPU_NO_EFFICIENT_FFS
204	help
205	  Motorola ColdFire 5272 processor support.
206
207config M5275
208	bool "MCF5275"
209	depends on !MMU
210	select COLDFIRE_PIT_TIMER
211	select M527x
212	select HAVE_CACHE_SPLIT
213	select HAVE_IPSBAR
 
214	help
215	  Freescale (Motorola) ColdFire 5274/5275 processor support.
216
217config M528x
218	bool "MCF528x"
219	depends on !MMU
220	select COLDFIRE_PIT_TIMER
221	select HAVE_CACHE_SPLIT
222	select HAVE_IPSBAR
223	help
224	  Motorola ColdFire 5280/5282 processor support.
225
226config M5307
227	bool "MCF5307"
228	depends on !MMU
229	select COLDFIRE_TIMERS
230	select COLDFIRE_SW_A7
231	select HAVE_CACHE_CB
232	select HAVE_MBAR
233	select CPU_NO_EFFICIENT_FFS
234	help
235	  Motorola ColdFire 5307 processor support.
236
237config M532x
238	bool "MCF532x"
239	depends on !MMU
240	select COLDFIRE_TIMERS
241	select M53xx
242	select HAVE_CACHE_CB
243	help
244	  Freescale (Motorola) ColdFire 532x processor support.
245
246config M537x
247	bool "MCF537x"
248	depends on !MMU
249	select COLDFIRE_TIMERS
250	select M53xx
251	select HAVE_CACHE_CB
252	help
253	  Freescale ColdFire 537x processor support.
254
255config M5407
256	bool "MCF5407"
257	depends on !MMU
258	select COLDFIRE_SW_A7
259	select COLDFIRE_TIMERS
260	select HAVE_CACHE_CB
261	select HAVE_MBAR
262	select CPU_NO_EFFICIENT_FFS
263	help
264	  Motorola ColdFire 5407 processor support.
265
266config M547x
267	bool "MCF547x"
268	select M54xx
269	select COLDFIRE_SLTIMERS
270	select MMU_COLDFIRE if MMU
271	select FPU if MMU
272	select HAVE_CACHE_CB
273	select HAVE_MBAR
274	select CPU_NO_EFFICIENT_FFS
275	help
276	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
277
278config M548x
279	bool "MCF548x"
280	select COLDFIRE_SLTIMERS
281	select MMU_COLDFIRE if MMU
282	select FPU if MMU
283	select M54xx
284	select HAVE_CACHE_CB
285	select HAVE_MBAR
286	select CPU_NO_EFFICIENT_FFS
287	help
288	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
289
290config M5441x
291	bool "MCF5441x"
292	select COLDFIRE_PIT_TIMER
293	select MMU_COLDFIRE if MMU
 
294	select HAVE_CACHE_CB
295	help
296	  Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
297
298endchoice
299
300config M527x
301	bool
302
303config M53xx
304	bool
305
306config M54xx
307	select HAVE_PCI
308	bool
309
310config COLDFIRE_PIT_TIMER
311	bool
312
313config COLDFIRE_TIMERS
314	bool
315	select LEGACY_TIMER_TICK
316
317config COLDFIRE_SLTIMERS
318	bool
319	select LEGACY_TIMER_TICK
320
321endif # COLDFIRE
322
323comment "Processor Specific Options"
324
325config M68KFPU_EMU
326	bool "Math emulation support"
327	depends on M68KCLASSIC && FPU
328	help
329	  At some point in the future, this will cause floating-point math
330	  instructions to be emulated by the kernel on machines that lack a
331	  floating-point math coprocessor.  Thrill-seekers and chronically
332	  sleep-deprived psychotic hacker types can say Y now, everyone else
333	  should probably wait a while.
334
335config M68KFPU_EMU_EXTRAPREC
336	bool "Math emulation extra precision"
337	depends on M68KFPU_EMU
338	help
339	  The fpu uses normally a few bit more during calculations for
340	  correct rounding, the emulator can (often) do the same but this
341	  extra calculation can cost quite some time, so you can disable
342	  it here. The emulator will then "only" calculate with a 64 bit
343	  mantissa and round slightly incorrect, what is more than enough
344	  for normal usage.
345
346config M68KFPU_EMU_ONLY
347	bool "Math emulation only kernel"
348	depends on M68KFPU_EMU
349	help
350	  This option prevents any floating-point instructions from being
351	  compiled into the kernel, thereby the kernel doesn't save any
352	  floating point context anymore during task switches, so this
353	  kernel will only be usable on machines without a floating-point
354	  math coprocessor. This makes the kernel a bit faster as no tests
355	  needs to be executed whether a floating-point instruction in the
356	  kernel should be executed or not.
357
358config ADVANCED
359	bool "Advanced configuration options"
360	depends on MMU
361	help
362	  This gives you access to some advanced options for the CPU. The
363	  defaults should be fine for most users, but these options may make
364	  it possible for you to improve performance somewhat if you know what
365	  you are doing.
366
367	  Note that the answer to this question won't directly affect the
368	  kernel: saying N will just cause the configurator to skip all
369	  the questions about these options.
370
371	  Most users should say N to this question.
372
373config RMW_INSNS
374	bool "Use read-modify-write instructions"
375	depends on ADVANCED && !CPU_HAS_NO_CAS
376	help
377	  This allows to use certain instructions that work with indivisible
378	  read-modify-write bus cycles. While this is faster than the
379	  workaround of disabling interrupts, it can conflict with DMA
380	  ( = direct memory access) on many Amiga systems, and it is also said
381	  to destabilize other machines. It is very likely that this will
382	  cause serious problems on any Amiga or Atari Medusa if set. The only
383	  configuration where it should work are 68030-based Ataris, where it
384	  apparently improves performance. But you've been warned! Unless you
385	  really know what you are doing, say N. Try Y only if you're quite
386	  adventurous.
387
388config SINGLE_MEMORY_CHUNK
389	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
390	depends on MMU
391	default y if SUN3 || MMU_COLDFIRE
 
392	help
393	  Ignore all but the first contiguous chunk of physical memory for VM
394	  purposes.  This will save a few bytes kernel size and may speed up
395	  some operations.
396	  When this option os set to N, you may want to lower "Maximum zone
397	  order" to save memory that could be wasted for unused memory map.
398	  Say N if not sure.
399
400config ARCH_FORCE_MAX_ORDER
401	int "Maximum zone order" if ADVANCED
402	depends on !SINGLE_MEMORY_CHUNK
403	default "11"
404	help
405	  The kernel memory allocator divides physically contiguous memory
406	  blocks into "zones", where each zone is a power of two number of
407	  pages.  This option selects the largest power of two that the kernel
408	  keeps in the memory allocator.  If you need to allocate very large
409	  blocks of physically contiguous memory, then you may need to
410	  increase this value.
411
412	  For systems that have holes in their physical address space this
413	  value also defines the minimal size of the hole that allows
414	  freeing unused memory map.
415
416	  This config option is actually maximum order plus one. For example,
417	  a value of 11 means that the largest free memory block is 2^10 pages.
418
419config 060_WRITETHROUGH
420	bool "Use write-through caching for 68060 supervisor accesses"
421	depends on ADVANCED && M68060
422	help
423	  The 68060 generally uses copyback caching of recently accessed data.
424	  Copyback caching means that memory writes will be held in an on-chip
425	  cache and only written back to memory some time later.  Saying Y
426	  here will force supervisor (kernel) accesses to use writethrough
427	  caching.  Writethrough caching means that data is written to memory
428	  straight away, so that cache and memory data always agree.
429	  Writethrough caching is less efficient, but is needed for some
430	  drivers on 68060 based systems where the 68060 bus snooping signal
431	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
432	  this problem.
433
434config M68K_L2_CACHE
435	bool
436	depends on MAC
437	default y
438
 
 
 
 
 
439config CPU_HAS_NO_BITFIELDS
440	bool
441
442config CPU_HAS_NO_CAS
443	bool
444
445config CPU_HAS_NO_MULDIV64
446	bool
447
448config CPU_HAS_NO_UNALIGNED
449	bool
450
451config CPU_HAS_ADDRESS_SPACES
452	bool
453	select ALTERNATE_USER_ADDRESS_SPACE
454
455config FPU
456	bool
457
458config COLDFIRE_SW_A7
459	bool
460
461config HAVE_CACHE_SPLIT
462	bool
463
464config HAVE_CACHE_CB
465	bool
466
467config HAVE_MBAR
468	bool
469
470config HAVE_IPSBAR
471	bool
472
473config CLOCK_FREQ
474	int "Set the core clock frequency"
475	default "25000000" if M5206
476	default "54000000" if M5206e
477	default "166666666" if M520x
478	default "140000000" if M5249
479	default "150000000" if M527x || M523x
480	default "90000000" if M5307
481	default "50000000" if M5407
482	default "266000000" if M54xx
483	default "66666666"
484	depends on COLDFIRE
485	help
486	  Define the CPU clock frequency in use. This is the core clock
487	  frequency, it may or may not be the same as the external clock
488	  crystal fitted to your board. Some processors have an internal
489	  PLL and can have their frequency programmed at run time, others
490	  use internal dividers. In general the kernel won't setup a PLL
491	  if it is fitted (there are some exceptions). This value will be
492	  specific to the exact CPU that you are using.
493
494config OLDMASK
495	bool "Old mask 5307 (1H55J) silicon"
496	depends on M5307
497	help
498	  Build support for the older revision ColdFire 5307 silicon.
499	  Specifically this is the 1H55J mask revision.
500
501if HAVE_CACHE_SPLIT
502choice
503	prompt "Split Cache Configuration"
504	default CACHE_I
505
506config CACHE_I
507	bool "Instruction"
508	help
509	  Use all of the ColdFire CPU cache memory as an instruction cache.
510
511config CACHE_D
512	bool "Data"
513	help
514	  Use all of the ColdFire CPU cache memory as a data cache.
515
516config CACHE_BOTH
517	bool "Both"
518	help
519	  Split the ColdFire CPU cache, and use half as an instruction cache
520	  and half as a data cache.
521endchoice
522endif # HAVE_CACHE_SPLIT
523
524if HAVE_CACHE_CB
525choice
526	prompt "Data cache mode"
527	default CACHE_WRITETHRU
528
529config CACHE_WRITETHRU
530	bool "Write-through"
531	help
532	  The ColdFire CPU cache is set into Write-through mode.
533
534config CACHE_COPYBACK
535	bool "Copy-back"
536	help
537	  The ColdFire CPU cache is set into Copy-back mode.
538endchoice
539endif # HAVE_CACHE_CB