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v5.4
  1# SPDX-License-Identifier: GPL-2.0
  2comment "Processor Type"
  3
  4choice
  5	prompt "CPU family support"
  6	default M68KCLASSIC if MMU
  7	default COLDFIRE if !MMU
  8	help
  9	  The Freescale (was Motorola) M68K family of processors implements
 10	  the full 68000 processor instruction set.
 11	  The Freescale ColdFire family of processors is a modern derivative
 12	  of the 68000 processor family. They are mainly targeted at embedded
 13	  applications, and are all System-On-Chip (SOC) devices, as opposed
 14	  to stand alone CPUs. They implement a subset of the original 68000
 15	  processor instruction set.
 16	  If you anticipate running this kernel on a computer with a classic
 17	  MC68xxx processor, select M68KCLASSIC.
 18	  If you anticipate running this kernel on a computer with a ColdFire
 19	  processor, select COLDFIRE.
 20
 21config M68KCLASSIC
 22	bool "Classic M68K CPU family support"
 23
 24config COLDFIRE
 25	bool "Coldfire CPU family support"
 
 
 26	select ARCH_HAVE_CUSTOM_GPIO_H
 27	select CPU_HAS_NO_BITFIELDS
 28	select CPU_HAS_NO_MULDIV64
 29	select GENERIC_CSUM
 30	select GPIOLIB
 31	select HAVE_CLK
 32
 33endchoice
 34
 35if M68KCLASSIC
 36
 37config M68000
 38	bool "MC68000"
 39	depends on !MMU
 40	select CPU_HAS_NO_BITFIELDS
 41	select CPU_HAS_NO_MULDIV64
 42	select CPU_HAS_NO_UNALIGNED
 43	select GENERIC_CSUM
 44	select CPU_NO_EFFICIENT_FFS
 45	select HAVE_ARCH_HASH
 46	help
 47	  The Freescale (was Motorola) 68000 CPU is the first generation of
 48	  the well known M68K family of processors. The CPU core as well as
 49	  being available as a stand alone CPU was also used in many
 50	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
 51	  a paging MMU.
 52
 53config MCPU32
 54	bool
 55	select CPU_HAS_NO_BITFIELDS
 56	select CPU_HAS_NO_UNALIGNED
 57	select CPU_NO_EFFICIENT_FFS
 58	help
 59	  The Freescale (was then Motorola) CPU32 is a CPU core that is
 60	  based on the 68020 processor. For the most part it is used in
 61	  System-On-Chip parts, and does not contain a paging MMU.
 62
 63config M68020
 64	bool "68020 support"
 65	depends on MMU
 66	select FPU
 67	select CPU_HAS_ADDRESS_SPACES
 68	help
 69	  If you anticipate running this kernel on a computer with a MC68020
 70	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
 71	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
 72	  Sun 3, which provides its own version.
 73
 74config M68030
 75	bool "68030 support"
 76	depends on MMU && !MMU_SUN3
 77	select FPU
 78	select CPU_HAS_ADDRESS_SPACES
 79	help
 80	  If you anticipate running this kernel on a computer with a MC68030
 81	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
 82	  work, as it does not include an MMU (Memory Management Unit).
 83
 84config M68040
 85	bool "68040 support"
 86	depends on MMU && !MMU_SUN3
 87	select FPU
 88	select CPU_HAS_ADDRESS_SPACES
 89	help
 90	  If you anticipate running this kernel on a computer with a MC68LC040
 91	  or MC68040 processor, say Y. Otherwise, say N. Note that an
 92	  MC68EC040 will not work, as it does not include an MMU (Memory
 93	  Management Unit).
 94
 95config M68060
 96	bool "68060 support"
 97	depends on MMU && !MMU_SUN3
 98	select FPU
 99	select CPU_HAS_ADDRESS_SPACES
100	help
101	  If you anticipate running this kernel on a computer with a MC68060
102	  processor, say Y. Otherwise, say N.
103
104config M68328
105	bool "MC68328"
106	depends on !MMU
107	select M68000
108	help
109	  Motorola 68328 processor support.
110
111config M68EZ328
112	bool "MC68EZ328"
113	depends on !MMU
114	select M68000
115	help
116	  Motorola 68EX328 processor support.
117
118config M68VZ328
119	bool "MC68VZ328"
120	depends on !MMU
121	select M68000
122	help
123	  Motorola 68VZ328 processor support.
124
 
 
 
 
 
 
 
125endif # M68KCLASSIC
126
127if COLDFIRE
128
129choice
130	prompt "ColdFire SoC type"
131	default M520x
132	help
133	  Select the type of ColdFire System-on-Chip (SoC) that you want
134	  to build for.
135
136config M5206
137	bool "MCF5206"
138	depends on !MMU
139	select COLDFIRE_SW_A7
140	select HAVE_MBAR
141	select CPU_NO_EFFICIENT_FFS
142	help
143	  Motorola ColdFire 5206 processor support.
144
145config M5206e
146	bool "MCF5206e"
147	depends on !MMU
148	select COLDFIRE_SW_A7
149	select HAVE_MBAR
150	select CPU_NO_EFFICIENT_FFS
151	help
152	  Motorola ColdFire 5206e processor support.
153
154config M520x
155	bool "MCF520x"
156	depends on !MMU
157	select GENERIC_CLOCKEVENTS
158	select HAVE_CACHE_SPLIT
159	help
160	   Freescale Coldfire 5207/5208 processor support.
161
162config M523x
163	bool "MCF523x"
164	depends on !MMU
165	select GENERIC_CLOCKEVENTS
166	select HAVE_CACHE_SPLIT
167	select HAVE_IPSBAR
168	help
169	  Freescale Coldfire 5230/1/2/4/5 processor support
170
171config M5249
172	bool "MCF5249"
173	depends on !MMU
174	select COLDFIRE_SW_A7
175	select HAVE_MBAR
176	select CPU_NO_EFFICIENT_FFS
177	help
178	  Motorola ColdFire 5249 processor support.
179
180config M525x
181	bool "MCF525x"
182	depends on !MMU
183	select COLDFIRE_SW_A7
184	select HAVE_MBAR
185	select CPU_NO_EFFICIENT_FFS
186	help
187	  Freescale (Motorola) Coldfire 5251/5253 processor support.
188
189config M5271
190	bool "MCF5271"
191	depends on !MMU
192	select M527x
193	select HAVE_CACHE_SPLIT
194	select HAVE_IPSBAR
195	select GENERIC_CLOCKEVENTS
196	help
197	  Freescale (Motorola) ColdFire 5270/5271 processor support.
198
199config M5272
200	bool "MCF5272"
201	depends on !MMU
202	select COLDFIRE_SW_A7
203	select HAVE_MBAR
204	select CPU_NO_EFFICIENT_FFS
205	help
206	  Motorola ColdFire 5272 processor support.
207
208config M5275
209	bool "MCF5275"
210	depends on !MMU
211	select M527x
212	select HAVE_CACHE_SPLIT
213	select HAVE_IPSBAR
214	select GENERIC_CLOCKEVENTS
215	help
216	  Freescale (Motorola) ColdFire 5274/5275 processor support.
217
218config M528x
219	bool "MCF528x"
220	depends on !MMU
221	select GENERIC_CLOCKEVENTS
222	select HAVE_CACHE_SPLIT
223	select HAVE_IPSBAR
224	help
225	  Motorola ColdFire 5280/5282 processor support.
226
227config M5307
228	bool "MCF5307"
229	depends on !MMU
230	select COLDFIRE_SW_A7
231	select HAVE_CACHE_CB
232	select HAVE_MBAR
233	select CPU_NO_EFFICIENT_FFS
234	help
235	  Motorola ColdFire 5307 processor support.
236
237config M532x
238	bool "MCF532x"
239	depends on !MMU
240	select M53xx
241	select HAVE_CACHE_CB
242	help
243	  Freescale (Motorola) ColdFire 532x processor support.
244
245config M537x
246	bool "MCF537x"
247	depends on !MMU
248	select M53xx
249	select HAVE_CACHE_CB
250	help
251	  Freescale ColdFire 537x processor support.
252
253config M5407
254	bool "MCF5407"
255	depends on !MMU
256	select COLDFIRE_SW_A7
257	select HAVE_CACHE_CB
258	select HAVE_MBAR
259	select CPU_NO_EFFICIENT_FFS
260	help
261	  Motorola ColdFire 5407 processor support.
262
 
 
 
263config M547x
264	bool "MCF547x"
265	select M54xx
266	select MMU_COLDFIRE if MMU
267	select FPU if MMU
268	select HAVE_CACHE_CB
269	select HAVE_MBAR
270	select CPU_NO_EFFICIENT_FFS
271	help
272	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
273
274config M548x
275	bool "MCF548x"
276	select MMU_COLDFIRE if MMU
277	select FPU if MMU
278	select M54xx
279	select HAVE_CACHE_CB
280	select HAVE_MBAR
281	select CPU_NO_EFFICIENT_FFS
282	help
283	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
284
285config M5441x
286	bool "MCF5441x"
287	select MMU_COLDFIRE if MMU
288	select GENERIC_CLOCKEVENTS
289	select HAVE_CACHE_CB
290	help
291	  Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
292
293endchoice
294
295config M527x
296	bool
297
298config M53xx
299	bool
300
301config M54xx
302	select HAVE_PCI
303	bool
304
305endif # COLDFIRE
306
307
308comment "Processor Specific Options"
309
310config M68KFPU_EMU
311	bool "Math emulation support"
312	depends on MMU
 
313	help
314	  At some point in the future, this will cause floating-point math
315	  instructions to be emulated by the kernel on machines that lack a
316	  floating-point math coprocessor.  Thrill-seekers and chronically
317	  sleep-deprived psychotic hacker types can say Y now, everyone else
318	  should probably wait a while.
319
320config M68KFPU_EMU_EXTRAPREC
321	bool "Math emulation extra precision"
322	depends on M68KFPU_EMU
323	help
324	  The fpu uses normally a few bit more during calculations for
325	  correct rounding, the emulator can (often) do the same but this
326	  extra calculation can cost quite some time, so you can disable
327	  it here. The emulator will then "only" calculate with a 64 bit
328	  mantissa and round slightly incorrect, what is more than enough
329	  for normal usage.
330
331config M68KFPU_EMU_ONLY
332	bool "Math emulation only kernel"
333	depends on M68KFPU_EMU
334	help
335	  This option prevents any floating-point instructions from being
336	  compiled into the kernel, thereby the kernel doesn't save any
337	  floating point context anymore during task switches, so this
338	  kernel will only be usable on machines without a floating-point
339	  math coprocessor. This makes the kernel a bit faster as no tests
340	  needs to be executed whether a floating-point instruction in the
341	  kernel should be executed or not.
342
343config ADVANCED
344	bool "Advanced configuration options"
345	depends on MMU
346	---help---
347	  This gives you access to some advanced options for the CPU. The
348	  defaults should be fine for most users, but these options may make
349	  it possible for you to improve performance somewhat if you know what
350	  you are doing.
351
352	  Note that the answer to this question won't directly affect the
353	  kernel: saying N will just cause the configurator to skip all
354	  the questions about these options.
355
356	  Most users should say N to this question.
357
358config RMW_INSNS
359	bool "Use read-modify-write instructions"
360	depends on ADVANCED
361	---help---
362	  This allows to use certain instructions that work with indivisible
363	  read-modify-write bus cycles. While this is faster than the
364	  workaround of disabling interrupts, it can conflict with DMA
365	  ( = direct memory access) on many Amiga systems, and it is also said
366	  to destabilize other machines. It is very likely that this will
367	  cause serious problems on any Amiga or Atari Medusa if set. The only
368	  configuration where it should work are 68030-based Ataris, where it
369	  apparently improves performance. But you've been warned! Unless you
370	  really know what you are doing, say N. Try Y only if you're quite
371	  adventurous.
372
373config SINGLE_MEMORY_CHUNK
374	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
375	depends on MMU
376	default y if SUN3
377	select NEED_MULTIPLE_NODES
378	help
379	  Ignore all but the first contiguous chunk of physical memory for VM
380	  purposes.  This will save a few bytes kernel size and may speed up
381	  some operations.  Say N if not sure.
382
383config ARCH_DISCONTIGMEM_ENABLE
384	def_bool MMU && !SINGLE_MEMORY_CHUNK
385
386config 060_WRITETHROUGH
387	bool "Use write-through caching for 68060 supervisor accesses"
388	depends on ADVANCED && M68060
389	---help---
390	  The 68060 generally uses copyback caching of recently accessed data.
391	  Copyback caching means that memory writes will be held in an on-chip
392	  cache and only written back to memory some time later.  Saying Y
393	  here will force supervisor (kernel) accesses to use writethrough
394	  caching.  Writethrough caching means that data is written to memory
395	  straight away, so that cache and memory data always agree.
396	  Writethrough caching is less efficient, but is needed for some
397	  drivers on 68060 based systems where the 68060 bus snooping signal
398	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
399	  this problem.
400
401config M68K_L2_CACHE
402	bool
403	depends on MAC
404	default y
405
406config NODES_SHIFT
407	int
408	default "3"
409	depends on !SINGLE_MEMORY_CHUNK
410
411config CPU_HAS_NO_BITFIELDS
412	bool
413
414config CPU_HAS_NO_MULDIV64
415	bool
416
417config CPU_HAS_NO_UNALIGNED
418	bool
419
420config CPU_HAS_ADDRESS_SPACES
421	bool
422
423config FPU
424	bool
425
426config COLDFIRE_SW_A7
427	bool
428
429config HAVE_CACHE_SPLIT
430	bool
431
432config HAVE_CACHE_CB
433	bool
434
435config HAVE_MBAR
436	bool
437
438config HAVE_IPSBAR
439	bool
440
 
 
 
 
 
 
 
 
 
 
 
 
441config CLOCK_FREQ
442	int "Set the core clock frequency"
443	default "25000000" if M5206
444	default "54000000" if M5206e
445	default "166666666" if M520x
446	default "140000000" if M5249
447	default "150000000" if M527x || M523x
448	default "90000000" if M5307
449	default "50000000" if M5407
450	default "266000000" if M54xx
451	default "66666666"
452	depends on COLDFIRE
453	help
454	  Define the CPU clock frequency in use. This is the core clock
455	  frequency, it may or may not be the same as the external clock
456	  crystal fitted to your board. Some processors have an internal
457	  PLL and can have their frequency programmed at run time, others
458	  use internal dividers. In general the kernel won't setup a PLL
459	  if it is fitted (there are some exceptions). This value will be
460	  specific to the exact CPU that you are using.
461
462config OLDMASK
463	bool "Old mask 5307 (1H55J) silicon"
464	depends on M5307
465	help
466	  Build support for the older revision ColdFire 5307 silicon.
467	  Specifically this is the 1H55J mask revision.
468
469if HAVE_CACHE_SPLIT
470choice
471	prompt "Split Cache Configuration"
472	default CACHE_I
473
474config CACHE_I
475	bool "Instruction"
476	help
477	  Use all of the ColdFire CPU cache memory as an instruction cache.
478
479config CACHE_D
480	bool "Data"
481	help
482	  Use all of the ColdFire CPU cache memory as a data cache.
483
484config CACHE_BOTH
485	bool "Both"
486	help
487	  Split the ColdFire CPU cache, and use half as an instruction cache
488	  and half as a data cache.
489endchoice
490endif
491
492if HAVE_CACHE_CB
493choice
494	prompt "Data cache mode"
495	default CACHE_WRITETHRU
496
497config CACHE_WRITETHRU
498	bool "Write-through"
499	help
500	  The ColdFire CPU cache is set into Write-through mode.
501
502config CACHE_COPYBACK
503	bool "Copy-back"
504	help
505	  The ColdFire CPU cache is set into Copy-back mode.
506endchoice
507endif
508
v3.5.6
 
  1comment "Processor Type"
  2
  3choice
  4	prompt "CPU family support"
  5	default M68KCLASSIC if MMU
  6	default COLDFIRE if !MMU
  7	help
  8	  The Freescale (was Motorola) M68K family of processors implements
  9	  the full 68000 processor instruction set.
 10	  The Freescale ColdFire family of processors is a modern derivative
 11	  of the 68000 processor family. They are mainly targeted at embedded
 12	  applications, and are all System-On-Chip (SOC) devices, as opposed
 13	  to stand alone CPUs. They implement a subset of the original 68000
 14	  processor instruction set.
 15	  If you anticipate running this kernel on a computer with a classic
 16	  MC68xxx processor, select M68KCLASSIC.
 17	  If you anticipate running this kernel on a computer with a ColdFire
 18	  processor, select COLDFIRE.
 19
 20config M68KCLASSIC
 21	bool "Classic M68K CPU family support"
 22
 23config COLDFIRE
 24	bool "Coldfire CPU family support"
 25	select GENERIC_GPIO
 26	select ARCH_REQUIRE_GPIOLIB
 27	select ARCH_HAVE_CUSTOM_GPIO_H
 28	select CPU_HAS_NO_BITFIELDS
 29	select CPU_HAS_NO_MULDIV64
 30	select GENERIC_CSUM
 
 
 31
 32endchoice
 33
 34if M68KCLASSIC
 35
 36config M68000
 37	bool
 
 38	select CPU_HAS_NO_BITFIELDS
 39	select CPU_HAS_NO_MULDIV64
 
 40	select GENERIC_CSUM
 
 
 41	help
 42	  The Freescale (was Motorola) 68000 CPU is the first generation of
 43	  the well known M68K family of processors. The CPU core as well as
 44	  being available as a stand alone CPU was also used in many
 45	  System-On-Chip devices (eg 68328, 68302, etc). It does not contain
 46	  a paging MMU.
 47
 48config MCPU32
 49	bool
 50	select CPU_HAS_NO_BITFIELDS
 
 
 51	help
 52	  The Freescale (was then Motorola) CPU32 is a CPU core that is
 53	  based on the 68020 processor. For the most part it is used in
 54	  System-On-Chip parts, and does not contain a paging MMU.
 55
 56config M68020
 57	bool "68020 support"
 58	depends on MMU
 59	select GENERIC_ATOMIC64
 60	select CPU_HAS_ADDRESS_SPACES
 61	help
 62	  If you anticipate running this kernel on a computer with a MC68020
 63	  processor, say Y. Otherwise, say N. Note that the 68020 requires a
 64	  68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
 65	  Sun 3, which provides its own version.
 66
 67config M68030
 68	bool "68030 support"
 69	depends on MMU && !MMU_SUN3
 70	select GENERIC_ATOMIC64
 71	select CPU_HAS_ADDRESS_SPACES
 72	help
 73	  If you anticipate running this kernel on a computer with a MC68030
 74	  processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
 75	  work, as it does not include an MMU (Memory Management Unit).
 76
 77config M68040
 78	bool "68040 support"
 79	depends on MMU && !MMU_SUN3
 80	select GENERIC_ATOMIC64
 81	select CPU_HAS_ADDRESS_SPACES
 82	help
 83	  If you anticipate running this kernel on a computer with a MC68LC040
 84	  or MC68040 processor, say Y. Otherwise, say N. Note that an
 85	  MC68EC040 will not work, as it does not include an MMU (Memory
 86	  Management Unit).
 87
 88config M68060
 89	bool "68060 support"
 90	depends on MMU && !MMU_SUN3
 91	select GENERIC_ATOMIC64
 92	select CPU_HAS_ADDRESS_SPACES
 93	help
 94	  If you anticipate running this kernel on a computer with a MC68060
 95	  processor, say Y. Otherwise, say N.
 96
 97config M68328
 98	bool "MC68328"
 99	depends on !MMU
100	select M68000
101	help
102	  Motorola 68328 processor support.
103
104config M68EZ328
105	bool "MC68EZ328"
106	depends on !MMU
107	select M68000
108	help
109	  Motorola 68EX328 processor support.
110
111config M68VZ328
112	bool "MC68VZ328"
113	depends on !MMU
114	select M68000
115	help
116	  Motorola 68VZ328 processor support.
117
118config M68360
119	bool "MC68360"
120	depends on !MMU
121	select MCPU32
122	help
123	  Motorola 68360 processor support.
124
125endif # M68KCLASSIC
126
127if COLDFIRE
128
 
 
 
 
 
 
 
129config M5206
130	bool "MCF5206"
131	depends on !MMU
132	select COLDFIRE_SW_A7
133	select HAVE_MBAR
 
134	help
135	  Motorola ColdFire 5206 processor support.
136
137config M5206e
138	bool "MCF5206e"
139	depends on !MMU
140	select COLDFIRE_SW_A7
141	select HAVE_MBAR
 
142	help
143	  Motorola ColdFire 5206e processor support.
144
145config M520x
146	bool "MCF520x"
147	depends on !MMU
148	select GENERIC_CLOCKEVENTS
149	select HAVE_CACHE_SPLIT
150	help
151	   Freescale Coldfire 5207/5208 processor support.
152
153config M523x
154	bool "MCF523x"
155	depends on !MMU
156	select GENERIC_CLOCKEVENTS
157	select HAVE_CACHE_SPLIT
158	select HAVE_IPSBAR
159	help
160	  Freescale Coldfire 5230/1/2/4/5 processor support
161
162config M5249
163	bool "MCF5249"
164	depends on !MMU
165	select COLDFIRE_SW_A7
166	select HAVE_MBAR
 
167	help
168	  Motorola ColdFire 5249 processor support.
169
170config M527x
171	bool
 
 
 
 
 
 
172
173config M5271
174	bool "MCF5271"
175	depends on !MMU
176	select M527x
177	select HAVE_CACHE_SPLIT
178	select HAVE_IPSBAR
179	select GENERIC_CLOCKEVENTS
180	help
181	  Freescale (Motorola) ColdFire 5270/5271 processor support.
182
183config M5272
184	bool "MCF5272"
185	depends on !MMU
186	select COLDFIRE_SW_A7
187	select HAVE_MBAR
 
188	help
189	  Motorola ColdFire 5272 processor support.
190
191config M5275
192	bool "MCF5275"
193	depends on !MMU
194	select M527x
195	select HAVE_CACHE_SPLIT
196	select HAVE_IPSBAR
197	select GENERIC_CLOCKEVENTS
198	help
199	  Freescale (Motorola) ColdFire 5274/5275 processor support.
200
201config M528x
202	bool "MCF528x"
203	depends on !MMU
204	select GENERIC_CLOCKEVENTS
205	select HAVE_CACHE_SPLIT
206	select HAVE_IPSBAR
207	help
208	  Motorola ColdFire 5280/5282 processor support.
209
210config M5307
211	bool "MCF5307"
212	depends on !MMU
213	select COLDFIRE_SW_A7
214	select HAVE_CACHE_CB
215	select HAVE_MBAR
 
216	help
217	  Motorola ColdFire 5307 processor support.
218
219config M532x
220	bool "MCF532x"
221	depends on !MMU
 
222	select HAVE_CACHE_CB
223	help
224	  Freescale (Motorola) ColdFire 532x processor support.
225
 
 
 
 
 
 
 
 
226config M5407
227	bool "MCF5407"
228	depends on !MMU
229	select COLDFIRE_SW_A7
230	select HAVE_CACHE_CB
231	select HAVE_MBAR
 
232	help
233	  Motorola ColdFire 5407 processor support.
234
235config M54xx
236	bool
237
238config M547x
239	bool "MCF547x"
240	select M54xx
241	select MMU_COLDFIRE if MMU
 
242	select HAVE_CACHE_CB
243	select HAVE_MBAR
 
244	help
245	  Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
246
247config M548x
248	bool "MCF548x"
249	select MMU_COLDFIRE if MMU
 
250	select M54xx
251	select HAVE_CACHE_CB
252	select HAVE_MBAR
 
253	help
254	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
255
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
256endif # COLDFIRE
257
258
259comment "Processor Specific Options"
260
261config M68KFPU_EMU
262	bool "Math emulation support (EXPERIMENTAL)"
263	depends on MMU
264	depends on EXPERIMENTAL
265	help
266	  At some point in the future, this will cause floating-point math
267	  instructions to be emulated by the kernel on machines that lack a
268	  floating-point math coprocessor.  Thrill-seekers and chronically
269	  sleep-deprived psychotic hacker types can say Y now, everyone else
270	  should probably wait a while.
271
272config M68KFPU_EMU_EXTRAPREC
273	bool "Math emulation extra precision"
274	depends on M68KFPU_EMU
275	help
276	  The fpu uses normally a few bit more during calculations for
277	  correct rounding, the emulator can (often) do the same but this
278	  extra calculation can cost quite some time, so you can disable
279	  it here. The emulator will then "only" calculate with a 64 bit
280	  mantissa and round slightly incorrect, what is more than enough
281	  for normal usage.
282
283config M68KFPU_EMU_ONLY
284	bool "Math emulation only kernel"
285	depends on M68KFPU_EMU
286	help
287	  This option prevents any floating-point instructions from being
288	  compiled into the kernel, thereby the kernel doesn't save any
289	  floating point context anymore during task switches, so this
290	  kernel will only be usable on machines without a floating-point
291	  math coprocessor. This makes the kernel a bit faster as no tests
292	  needs to be executed whether a floating-point instruction in the
293	  kernel should be executed or not.
294
295config ADVANCED
296	bool "Advanced configuration options"
297	depends on MMU
298	---help---
299	  This gives you access to some advanced options for the CPU. The
300	  defaults should be fine for most users, but these options may make
301	  it possible for you to improve performance somewhat if you know what
302	  you are doing.
303
304	  Note that the answer to this question won't directly affect the
305	  kernel: saying N will just cause the configurator to skip all
306	  the questions about these options.
307
308	  Most users should say N to this question.
309
310config RMW_INSNS
311	bool "Use read-modify-write instructions"
312	depends on ADVANCED
313	---help---
314	  This allows to use certain instructions that work with indivisible
315	  read-modify-write bus cycles. While this is faster than the
316	  workaround of disabling interrupts, it can conflict with DMA
317	  ( = direct memory access) on many Amiga systems, and it is also said
318	  to destabilize other machines. It is very likely that this will
319	  cause serious problems on any Amiga or Atari Medusa if set. The only
320	  configuration where it should work are 68030-based Ataris, where it
321	  apparently improves performance. But you've been warned! Unless you
322	  really know what you are doing, say N. Try Y only if you're quite
323	  adventurous.
324
325config SINGLE_MEMORY_CHUNK
326	bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
327	depends on MMU
328	default y if SUN3
329	select NEED_MULTIPLE_NODES
330	help
331	  Ignore all but the first contiguous chunk of physical memory for VM
332	  purposes.  This will save a few bytes kernel size and may speed up
333	  some operations.  Say N if not sure.
334
335config ARCH_DISCONTIGMEM_ENABLE
336	def_bool MMU && !SINGLE_MEMORY_CHUNK
337
338config 060_WRITETHROUGH
339	bool "Use write-through caching for 68060 supervisor accesses"
340	depends on ADVANCED && M68060
341	---help---
342	  The 68060 generally uses copyback caching of recently accessed data.
343	  Copyback caching means that memory writes will be held in an on-chip
344	  cache and only written back to memory some time later.  Saying Y
345	  here will force supervisor (kernel) accesses to use writethrough
346	  caching.  Writethrough caching means that data is written to memory
347	  straight away, so that cache and memory data always agree.
348	  Writethrough caching is less efficient, but is needed for some
349	  drivers on 68060 based systems where the 68060 bus snooping signal
350	  is hardwired on.  The 53c710 SCSI driver is known to suffer from
351	  this problem.
352
353config M68K_L2_CACHE
354	bool
355	depends on MAC
356	default y
357
358config NODES_SHIFT
359	int
360	default "3"
361	depends on !SINGLE_MEMORY_CHUNK
362
 
 
 
 
 
 
 
 
 
 
 
 
363config FPU
364	bool
365
366config COLDFIRE_SW_A7
367	bool
368
369config HAVE_CACHE_SPLIT
370	bool
371
372config HAVE_CACHE_CB
373	bool
374
375config HAVE_MBAR
376	bool
377
378config HAVE_IPSBAR
379	bool
380
381config CLOCK_SET
382	bool "Enable setting the CPU clock frequency"
383	depends on COLDFIRE
384	default n
385	help
386	  On some CPU's you do not need to know what the core CPU clock
387	  frequency is. On these you can disable clock setting. On some
388	  traditional 68K parts, and on all ColdFire parts you need to set
389	  the appropriate CPU clock frequency. On these devices many of the
390	  onboard peripherals derive their timing from the master CPU clock
391	  frequency.
392
393config CLOCK_FREQ
394	int "Set the core clock frequency"
 
 
 
 
 
 
 
 
395	default "66666666"
396	depends on CLOCK_SET
397	help
398	  Define the CPU clock frequency in use. This is the core clock
399	  frequency, it may or may not be the same as the external clock
400	  crystal fitted to your board. Some processors have an internal
401	  PLL and can have their frequency programmed at run time, others
402	  use internal dividers. In general the kernel won't setup a PLL
403	  if it is fitted (there are some exceptions). This value will be
404	  specific to the exact CPU that you are using.
405
406config OLDMASK
407	bool "Old mask 5307 (1H55J) silicon"
408	depends on M5307
409	help
410	  Build support for the older revision ColdFire 5307 silicon.
411	  Specifically this is the 1H55J mask revision.
412
413if HAVE_CACHE_SPLIT
414choice
415	prompt "Split Cache Configuration"
416	default CACHE_I
417
418config CACHE_I
419	bool "Instruction"
420	help
421	  Use all of the ColdFire CPU cache memory as an instruction cache.
422
423config CACHE_D
424	bool "Data"
425	help
426	  Use all of the ColdFire CPU cache memory as a data cache.
427
428config CACHE_BOTH
429	bool "Both"
430	help
431	  Split the ColdFire CPU cache, and use half as an instruction cache
432	  and half as a data cache.
433endchoice
434endif
435
436if HAVE_CACHE_CB
437choice
438	prompt "Data cache mode"
439	default CACHE_WRITETHRU
440
441config CACHE_WRITETHRU
442	bool "Write-through"
443	help
444	  The ColdFire CPU cache is set into Write-through mode.
445
446config CACHE_COPYBACK
447	bool "Copy-back"
448	help
449	  The ColdFire CPU cache is set into Copy-back mode.
450endchoice
451endif
452