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1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/**************************************************************************
3 *
4 * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include <drm/ttm/ttm_placement.h>
29
30#include "vmwgfx_drv.h"
31#include "vmwgfx_resource_priv.h"
32#include "vmwgfx_so.h"
33#include "vmwgfx_binding.h"
34#include "device_include/svga3d_surfacedefs.h"
35
36#define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
37#define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
38#define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
39 (svga3d_flags & ((uint64_t)U32_MAX))
40
41/**
42 * struct vmw_user_surface - User-space visible surface resource
43 *
44 * @base: The TTM base object handling user-space visibility.
45 * @srf: The surface metadata.
46 * @size: TTM accounting size for the surface.
47 * @master: master of the creating client. Used for security check.
48 */
49struct vmw_user_surface {
50 struct ttm_prime_object prime;
51 struct vmw_surface srf;
52 uint32_t size;
53 struct drm_master *master;
54 struct ttm_base_object *backup_base;
55};
56
57/**
58 * struct vmw_surface_offset - Backing store mip level offset info
59 *
60 * @face: Surface face.
61 * @mip: Mip level.
62 * @bo_offset: Offset into backing store of this mip level.
63 *
64 */
65struct vmw_surface_offset {
66 uint32_t face;
67 uint32_t mip;
68 uint32_t bo_offset;
69};
70
71static void vmw_user_surface_free(struct vmw_resource *res);
72static struct vmw_resource *
73vmw_user_surface_base_to_res(struct ttm_base_object *base);
74static int vmw_legacy_srf_bind(struct vmw_resource *res,
75 struct ttm_validate_buffer *val_buf);
76static int vmw_legacy_srf_unbind(struct vmw_resource *res,
77 bool readback,
78 struct ttm_validate_buffer *val_buf);
79static int vmw_legacy_srf_create(struct vmw_resource *res);
80static int vmw_legacy_srf_destroy(struct vmw_resource *res);
81static int vmw_gb_surface_create(struct vmw_resource *res);
82static int vmw_gb_surface_bind(struct vmw_resource *res,
83 struct ttm_validate_buffer *val_buf);
84static int vmw_gb_surface_unbind(struct vmw_resource *res,
85 bool readback,
86 struct ttm_validate_buffer *val_buf);
87static int vmw_gb_surface_destroy(struct vmw_resource *res);
88static int
89vmw_gb_surface_define_internal(struct drm_device *dev,
90 struct drm_vmw_gb_surface_create_ext_req *req,
91 struct drm_vmw_gb_surface_create_rep *rep,
92 struct drm_file *file_priv);
93static int
94vmw_gb_surface_reference_internal(struct drm_device *dev,
95 struct drm_vmw_surface_arg *req,
96 struct drm_vmw_gb_surface_ref_ext_rep *rep,
97 struct drm_file *file_priv);
98
99static const struct vmw_user_resource_conv user_surface_conv = {
100 .object_type = VMW_RES_SURFACE,
101 .base_obj_to_res = vmw_user_surface_base_to_res,
102 .res_free = vmw_user_surface_free
103};
104
105const struct vmw_user_resource_conv *user_surface_converter =
106 &user_surface_conv;
107
108
109static uint64_t vmw_user_surface_size;
110
111static const struct vmw_res_func vmw_legacy_surface_func = {
112 .res_type = vmw_res_surface,
113 .needs_backup = false,
114 .may_evict = true,
115 .prio = 1,
116 .dirty_prio = 1,
117 .type_name = "legacy surfaces",
118 .backup_placement = &vmw_srf_placement,
119 .create = &vmw_legacy_srf_create,
120 .destroy = &vmw_legacy_srf_destroy,
121 .bind = &vmw_legacy_srf_bind,
122 .unbind = &vmw_legacy_srf_unbind
123};
124
125static const struct vmw_res_func vmw_gb_surface_func = {
126 .res_type = vmw_res_surface,
127 .needs_backup = true,
128 .may_evict = true,
129 .prio = 1,
130 .dirty_prio = 2,
131 .type_name = "guest backed surfaces",
132 .backup_placement = &vmw_mob_placement,
133 .create = vmw_gb_surface_create,
134 .destroy = vmw_gb_surface_destroy,
135 .bind = vmw_gb_surface_bind,
136 .unbind = vmw_gb_surface_unbind
137};
138
139/**
140 * struct vmw_surface_dma - SVGA3D DMA command
141 */
142struct vmw_surface_dma {
143 SVGA3dCmdHeader header;
144 SVGA3dCmdSurfaceDMA body;
145 SVGA3dCopyBox cb;
146 SVGA3dCmdSurfaceDMASuffix suffix;
147};
148
149/**
150 * struct vmw_surface_define - SVGA3D Surface Define command
151 */
152struct vmw_surface_define {
153 SVGA3dCmdHeader header;
154 SVGA3dCmdDefineSurface body;
155};
156
157/**
158 * struct vmw_surface_destroy - SVGA3D Surface Destroy command
159 */
160struct vmw_surface_destroy {
161 SVGA3dCmdHeader header;
162 SVGA3dCmdDestroySurface body;
163};
164
165
166/**
167 * vmw_surface_dma_size - Compute fifo size for a dma command.
168 *
169 * @srf: Pointer to a struct vmw_surface
170 *
171 * Computes the required size for a surface dma command for backup or
172 * restoration of the surface represented by @srf.
173 */
174static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
175{
176 return srf->num_sizes * sizeof(struct vmw_surface_dma);
177}
178
179
180/**
181 * vmw_surface_define_size - Compute fifo size for a surface define command.
182 *
183 * @srf: Pointer to a struct vmw_surface
184 *
185 * Computes the required size for a surface define command for the definition
186 * of the surface represented by @srf.
187 */
188static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
189{
190 return sizeof(struct vmw_surface_define) + srf->num_sizes *
191 sizeof(SVGA3dSize);
192}
193
194
195/**
196 * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
197 *
198 * Computes the required size for a surface destroy command for the destruction
199 * of a hw surface.
200 */
201static inline uint32_t vmw_surface_destroy_size(void)
202{
203 return sizeof(struct vmw_surface_destroy);
204}
205
206/**
207 * vmw_surface_destroy_encode - Encode a surface_destroy command.
208 *
209 * @id: The surface id
210 * @cmd_space: Pointer to memory area in which the commands should be encoded.
211 */
212static void vmw_surface_destroy_encode(uint32_t id,
213 void *cmd_space)
214{
215 struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
216 cmd_space;
217
218 cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
219 cmd->header.size = sizeof(cmd->body);
220 cmd->body.sid = id;
221}
222
223/**
224 * vmw_surface_define_encode - Encode a surface_define command.
225 *
226 * @srf: Pointer to a struct vmw_surface object.
227 * @cmd_space: Pointer to memory area in which the commands should be encoded.
228 */
229static void vmw_surface_define_encode(const struct vmw_surface *srf,
230 void *cmd_space)
231{
232 struct vmw_surface_define *cmd = (struct vmw_surface_define *)
233 cmd_space;
234 struct drm_vmw_size *src_size;
235 SVGA3dSize *cmd_size;
236 uint32_t cmd_len;
237 int i;
238
239 cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
240
241 cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
242 cmd->header.size = cmd_len;
243 cmd->body.sid = srf->res.id;
244 /*
245 * Downcast of surfaceFlags, was upcasted when received from user-space,
246 * since driver internally stores as 64 bit.
247 * For legacy surface define only 32 bit flag is supported.
248 */
249 cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->flags;
250 cmd->body.format = srf->format;
251 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
252 cmd->body.face[i].numMipLevels = srf->mip_levels[i];
253
254 cmd += 1;
255 cmd_size = (SVGA3dSize *) cmd;
256 src_size = srf->sizes;
257
258 for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
259 cmd_size->width = src_size->width;
260 cmd_size->height = src_size->height;
261 cmd_size->depth = src_size->depth;
262 }
263}
264
265/**
266 * vmw_surface_dma_encode - Encode a surface_dma command.
267 *
268 * @srf: Pointer to a struct vmw_surface object.
269 * @cmd_space: Pointer to memory area in which the commands should be encoded.
270 * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
271 * should be placed or read from.
272 * @to_surface: Boolean whether to DMA to the surface or from the surface.
273 */
274static void vmw_surface_dma_encode(struct vmw_surface *srf,
275 void *cmd_space,
276 const SVGAGuestPtr *ptr,
277 bool to_surface)
278{
279 uint32_t i;
280 struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
281 const struct svga3d_surface_desc *desc =
282 svga3dsurface_get_desc(srf->format);
283
284 for (i = 0; i < srf->num_sizes; ++i) {
285 SVGA3dCmdHeader *header = &cmd->header;
286 SVGA3dCmdSurfaceDMA *body = &cmd->body;
287 SVGA3dCopyBox *cb = &cmd->cb;
288 SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
289 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
290 const struct drm_vmw_size *cur_size = &srf->sizes[i];
291
292 header->id = SVGA_3D_CMD_SURFACE_DMA;
293 header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
294
295 body->guest.ptr = *ptr;
296 body->guest.ptr.offset += cur_offset->bo_offset;
297 body->guest.pitch = svga3dsurface_calculate_pitch(desc,
298 cur_size);
299 body->host.sid = srf->res.id;
300 body->host.face = cur_offset->face;
301 body->host.mipmap = cur_offset->mip;
302 body->transfer = ((to_surface) ? SVGA3D_WRITE_HOST_VRAM :
303 SVGA3D_READ_HOST_VRAM);
304 cb->x = 0;
305 cb->y = 0;
306 cb->z = 0;
307 cb->srcx = 0;
308 cb->srcy = 0;
309 cb->srcz = 0;
310 cb->w = cur_size->width;
311 cb->h = cur_size->height;
312 cb->d = cur_size->depth;
313
314 suffix->suffixSize = sizeof(*suffix);
315 suffix->maximumOffset =
316 svga3dsurface_get_image_buffer_size(desc, cur_size,
317 body->guest.pitch);
318 suffix->flags.discard = 0;
319 suffix->flags.unsynchronized = 0;
320 suffix->flags.reserved = 0;
321 ++cmd;
322 }
323};
324
325
326/**
327 * vmw_hw_surface_destroy - destroy a Device surface
328 *
329 * @res: Pointer to a struct vmw_resource embedded in a struct
330 * vmw_surface.
331 *
332 * Destroys a the device surface associated with a struct vmw_surface if
333 * any, and adjusts accounting and resource count accordingly.
334 */
335static void vmw_hw_surface_destroy(struct vmw_resource *res)
336{
337
338 struct vmw_private *dev_priv = res->dev_priv;
339 struct vmw_surface *srf;
340 void *cmd;
341
342 if (res->func->destroy == vmw_gb_surface_destroy) {
343 (void) vmw_gb_surface_destroy(res);
344 return;
345 }
346
347 if (res->id != -1) {
348
349 cmd = VMW_FIFO_RESERVE(dev_priv, vmw_surface_destroy_size());
350 if (unlikely(!cmd))
351 return;
352
353 vmw_surface_destroy_encode(res->id, cmd);
354 vmw_fifo_commit(dev_priv, vmw_surface_destroy_size());
355
356 /*
357 * used_memory_size_atomic, or separate lock
358 * to avoid taking dev_priv::cmdbuf_mutex in
359 * the destroy path.
360 */
361
362 mutex_lock(&dev_priv->cmdbuf_mutex);
363 srf = vmw_res_to_srf(res);
364 dev_priv->used_memory_size -= res->backup_size;
365 mutex_unlock(&dev_priv->cmdbuf_mutex);
366 }
367}
368
369/**
370 * vmw_legacy_srf_create - Create a device surface as part of the
371 * resource validation process.
372 *
373 * @res: Pointer to a struct vmw_surface.
374 *
375 * If the surface doesn't have a hw id.
376 *
377 * Returns -EBUSY if there wasn't sufficient device resources to
378 * complete the validation. Retry after freeing up resources.
379 *
380 * May return other errors if the kernel is out of guest resources.
381 */
382static int vmw_legacy_srf_create(struct vmw_resource *res)
383{
384 struct vmw_private *dev_priv = res->dev_priv;
385 struct vmw_surface *srf;
386 uint32_t submit_size;
387 uint8_t *cmd;
388 int ret;
389
390 if (likely(res->id != -1))
391 return 0;
392
393 srf = vmw_res_to_srf(res);
394 if (unlikely(dev_priv->used_memory_size + res->backup_size >=
395 dev_priv->memory_size))
396 return -EBUSY;
397
398 /*
399 * Alloc id for the resource.
400 */
401
402 ret = vmw_resource_alloc_id(res);
403 if (unlikely(ret != 0)) {
404 DRM_ERROR("Failed to allocate a surface id.\n");
405 goto out_no_id;
406 }
407
408 if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
409 ret = -EBUSY;
410 goto out_no_fifo;
411 }
412
413 /*
414 * Encode surface define- commands.
415 */
416
417 submit_size = vmw_surface_define_size(srf);
418 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
419 if (unlikely(!cmd)) {
420 ret = -ENOMEM;
421 goto out_no_fifo;
422 }
423
424 vmw_surface_define_encode(srf, cmd);
425 vmw_fifo_commit(dev_priv, submit_size);
426 vmw_fifo_resource_inc(dev_priv);
427
428 /*
429 * Surface memory usage accounting.
430 */
431
432 dev_priv->used_memory_size += res->backup_size;
433 return 0;
434
435out_no_fifo:
436 vmw_resource_release_id(res);
437out_no_id:
438 return ret;
439}
440
441/**
442 * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
443 *
444 * @res: Pointer to a struct vmw_res embedded in a struct
445 * vmw_surface.
446 * @val_buf: Pointer to a struct ttm_validate_buffer containing
447 * information about the backup buffer.
448 * @bind: Boolean wether to DMA to the surface.
449 *
450 * Transfer backup data to or from a legacy surface as part of the
451 * validation process.
452 * May return other errors if the kernel is out of guest resources.
453 * The backup buffer will be fenced or idle upon successful completion,
454 * and if the surface needs persistent backup storage, the backup buffer
455 * will also be returned reserved iff @bind is true.
456 */
457static int vmw_legacy_srf_dma(struct vmw_resource *res,
458 struct ttm_validate_buffer *val_buf,
459 bool bind)
460{
461 SVGAGuestPtr ptr;
462 struct vmw_fence_obj *fence;
463 uint32_t submit_size;
464 struct vmw_surface *srf = vmw_res_to_srf(res);
465 uint8_t *cmd;
466 struct vmw_private *dev_priv = res->dev_priv;
467
468 BUG_ON(!val_buf->bo);
469 submit_size = vmw_surface_dma_size(srf);
470 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
471 if (unlikely(!cmd))
472 return -ENOMEM;
473
474 vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
475 vmw_surface_dma_encode(srf, cmd, &ptr, bind);
476
477 vmw_fifo_commit(dev_priv, submit_size);
478
479 /*
480 * Create a fence object and fence the backup buffer.
481 */
482
483 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
484 &fence, NULL);
485
486 vmw_bo_fence_single(val_buf->bo, fence);
487
488 if (likely(fence != NULL))
489 vmw_fence_obj_unreference(&fence);
490
491 return 0;
492}
493
494/**
495 * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
496 * surface validation process.
497 *
498 * @res: Pointer to a struct vmw_res embedded in a struct
499 * vmw_surface.
500 * @val_buf: Pointer to a struct ttm_validate_buffer containing
501 * information about the backup buffer.
502 *
503 * This function will copy backup data to the surface if the
504 * backup buffer is dirty.
505 */
506static int vmw_legacy_srf_bind(struct vmw_resource *res,
507 struct ttm_validate_buffer *val_buf)
508{
509 if (!res->backup_dirty)
510 return 0;
511
512 return vmw_legacy_srf_dma(res, val_buf, true);
513}
514
515
516/**
517 * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
518 * surface eviction process.
519 *
520 * @res: Pointer to a struct vmw_res embedded in a struct
521 * vmw_surface.
522 * @val_buf: Pointer to a struct ttm_validate_buffer containing
523 * information about the backup buffer.
524 *
525 * This function will copy backup data from the surface.
526 */
527static int vmw_legacy_srf_unbind(struct vmw_resource *res,
528 bool readback,
529 struct ttm_validate_buffer *val_buf)
530{
531 if (unlikely(readback))
532 return vmw_legacy_srf_dma(res, val_buf, false);
533 return 0;
534}
535
536/**
537 * vmw_legacy_srf_destroy - Destroy a device surface as part of a
538 * resource eviction process.
539 *
540 * @res: Pointer to a struct vmw_res embedded in a struct
541 * vmw_surface.
542 */
543static int vmw_legacy_srf_destroy(struct vmw_resource *res)
544{
545 struct vmw_private *dev_priv = res->dev_priv;
546 uint32_t submit_size;
547 uint8_t *cmd;
548
549 BUG_ON(res->id == -1);
550
551 /*
552 * Encode the dma- and surface destroy commands.
553 */
554
555 submit_size = vmw_surface_destroy_size();
556 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
557 if (unlikely(!cmd))
558 return -ENOMEM;
559
560 vmw_surface_destroy_encode(res->id, cmd);
561 vmw_fifo_commit(dev_priv, submit_size);
562
563 /*
564 * Surface memory usage accounting.
565 */
566
567 dev_priv->used_memory_size -= res->backup_size;
568
569 /*
570 * Release the surface ID.
571 */
572
573 vmw_resource_release_id(res);
574 vmw_fifo_resource_dec(dev_priv);
575
576 return 0;
577}
578
579
580/**
581 * vmw_surface_init - initialize a struct vmw_surface
582 *
583 * @dev_priv: Pointer to a device private struct.
584 * @srf: Pointer to the struct vmw_surface to initialize.
585 * @res_free: Pointer to a resource destructor used to free
586 * the object.
587 */
588static int vmw_surface_init(struct vmw_private *dev_priv,
589 struct vmw_surface *srf,
590 void (*res_free) (struct vmw_resource *res))
591{
592 int ret;
593 struct vmw_resource *res = &srf->res;
594
595 BUG_ON(!res_free);
596 ret = vmw_resource_init(dev_priv, res, true, res_free,
597 (dev_priv->has_mob) ? &vmw_gb_surface_func :
598 &vmw_legacy_surface_func);
599
600 if (unlikely(ret != 0)) {
601 res_free(res);
602 return ret;
603 }
604
605 /*
606 * The surface won't be visible to hardware until a
607 * surface validate.
608 */
609
610 INIT_LIST_HEAD(&srf->view_list);
611 res->hw_destroy = vmw_hw_surface_destroy;
612 return ret;
613}
614
615/**
616 * vmw_user_surface_base_to_res - TTM base object to resource converter for
617 * user visible surfaces
618 *
619 * @base: Pointer to a TTM base object
620 *
621 * Returns the struct vmw_resource embedded in a struct vmw_surface
622 * for the user-visible object identified by the TTM base object @base.
623 */
624static struct vmw_resource *
625vmw_user_surface_base_to_res(struct ttm_base_object *base)
626{
627 return &(container_of(base, struct vmw_user_surface,
628 prime.base)->srf.res);
629}
630
631/**
632 * vmw_user_surface_free - User visible surface resource destructor
633 *
634 * @res: A struct vmw_resource embedded in a struct vmw_surface.
635 */
636static void vmw_user_surface_free(struct vmw_resource *res)
637{
638 struct vmw_surface *srf = vmw_res_to_srf(res);
639 struct vmw_user_surface *user_srf =
640 container_of(srf, struct vmw_user_surface, srf);
641 struct vmw_private *dev_priv = srf->res.dev_priv;
642 uint32_t size = user_srf->size;
643
644 if (user_srf->master)
645 drm_master_put(&user_srf->master);
646 kfree(srf->offsets);
647 kfree(srf->sizes);
648 kfree(srf->snooper.image);
649 ttm_prime_object_kfree(user_srf, prime);
650 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
651}
652
653/**
654 * vmw_user_surface_free - User visible surface TTM base object destructor
655 *
656 * @p_base: Pointer to a pointer to a TTM base object
657 * embedded in a struct vmw_user_surface.
658 *
659 * Drops the base object's reference on its resource, and the
660 * pointer pointed to by *p_base is set to NULL.
661 */
662static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
663{
664 struct ttm_base_object *base = *p_base;
665 struct vmw_user_surface *user_srf =
666 container_of(base, struct vmw_user_surface, prime.base);
667 struct vmw_resource *res = &user_srf->srf.res;
668
669 *p_base = NULL;
670 if (user_srf->backup_base)
671 ttm_base_object_unref(&user_srf->backup_base);
672 vmw_resource_unreference(&res);
673}
674
675/**
676 * vmw_user_surface_destroy_ioctl - Ioctl function implementing
677 * the user surface destroy functionality.
678 *
679 * @dev: Pointer to a struct drm_device.
680 * @data: Pointer to data copied from / to user-space.
681 * @file_priv: Pointer to a drm file private structure.
682 */
683int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
684 struct drm_file *file_priv)
685{
686 struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
687 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
688
689 return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
690}
691
692/**
693 * vmw_user_surface_define_ioctl - Ioctl function implementing
694 * the user surface define functionality.
695 *
696 * @dev: Pointer to a struct drm_device.
697 * @data: Pointer to data copied from / to user-space.
698 * @file_priv: Pointer to a drm file private structure.
699 */
700int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
701 struct drm_file *file_priv)
702{
703 struct vmw_private *dev_priv = vmw_priv(dev);
704 struct vmw_user_surface *user_srf;
705 struct vmw_surface *srf;
706 struct vmw_resource *res;
707 struct vmw_resource *tmp;
708 union drm_vmw_surface_create_arg *arg =
709 (union drm_vmw_surface_create_arg *)data;
710 struct drm_vmw_surface_create_req *req = &arg->req;
711 struct drm_vmw_surface_arg *rep = &arg->rep;
712 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
713 struct ttm_operation_ctx ctx = {
714 .interruptible = true,
715 .no_wait_gpu = false
716 };
717 int ret;
718 int i, j;
719 uint32_t cur_bo_offset;
720 struct drm_vmw_size *cur_size;
721 struct vmw_surface_offset *cur_offset;
722 uint32_t num_sizes;
723 uint32_t size;
724 const struct svga3d_surface_desc *desc;
725
726 if (unlikely(vmw_user_surface_size == 0))
727 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
728 VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
729
730 num_sizes = 0;
731 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
732 if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
733 return -EINVAL;
734 num_sizes += req->mip_levels[i];
735 }
736
737 if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
738 num_sizes == 0)
739 return -EINVAL;
740
741 size = vmw_user_surface_size +
742 ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
743 ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
744
745 desc = svga3dsurface_get_desc(req->format);
746 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
747 VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
748 req->format);
749 return -EINVAL;
750 }
751
752 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
753 if (unlikely(ret != 0))
754 return ret;
755
756 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
757 size, &ctx);
758 if (unlikely(ret != 0)) {
759 if (ret != -ERESTARTSYS)
760 DRM_ERROR("Out of graphics memory for surface.\n");
761 goto out_unlock;
762 }
763
764 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
765 if (unlikely(!user_srf)) {
766 ret = -ENOMEM;
767 goto out_no_user_srf;
768 }
769
770 srf = &user_srf->srf;
771 res = &srf->res;
772
773 /* Driver internally stores as 64-bit flags */
774 srf->flags = (SVGA3dSurfaceAllFlags)req->flags;
775 srf->format = req->format;
776 srf->scanout = req->scanout;
777
778 memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
779 srf->num_sizes = num_sizes;
780 user_srf->size = size;
781 srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long)
782 req->size_addr,
783 sizeof(*srf->sizes) * srf->num_sizes);
784 if (IS_ERR(srf->sizes)) {
785 ret = PTR_ERR(srf->sizes);
786 goto out_no_sizes;
787 }
788 srf->offsets = kmalloc_array(srf->num_sizes,
789 sizeof(*srf->offsets),
790 GFP_KERNEL);
791 if (unlikely(!srf->offsets)) {
792 ret = -ENOMEM;
793 goto out_no_offsets;
794 }
795
796 srf->base_size = *srf->sizes;
797 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
798 srf->multisample_count = 0;
799 srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
800 srf->quality_level = SVGA3D_MS_QUALITY_NONE;
801
802 cur_bo_offset = 0;
803 cur_offset = srf->offsets;
804 cur_size = srf->sizes;
805
806 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
807 for (j = 0; j < srf->mip_levels[i]; ++j) {
808 uint32_t stride = svga3dsurface_calculate_pitch
809 (desc, cur_size);
810
811 cur_offset->face = i;
812 cur_offset->mip = j;
813 cur_offset->bo_offset = cur_bo_offset;
814 cur_bo_offset += svga3dsurface_get_image_buffer_size
815 (desc, cur_size, stride);
816 ++cur_offset;
817 ++cur_size;
818 }
819 }
820 res->backup_size = cur_bo_offset;
821 if (srf->scanout &&
822 srf->num_sizes == 1 &&
823 srf->sizes[0].width == 64 &&
824 srf->sizes[0].height == 64 &&
825 srf->format == SVGA3D_A8R8G8B8) {
826
827 srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
828 if (!srf->snooper.image) {
829 DRM_ERROR("Failed to allocate cursor_image\n");
830 ret = -ENOMEM;
831 goto out_no_copy;
832 }
833 } else {
834 srf->snooper.image = NULL;
835 }
836
837 user_srf->prime.base.shareable = false;
838 user_srf->prime.base.tfile = NULL;
839 if (drm_is_primary_client(file_priv))
840 user_srf->master = drm_master_get(file_priv->master);
841
842 /**
843 * From this point, the generic resource management functions
844 * destroy the object on failure.
845 */
846
847 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
848 if (unlikely(ret != 0))
849 goto out_unlock;
850
851 /*
852 * A gb-aware client referencing a shared surface will
853 * expect a backup buffer to be present.
854 */
855 if (dev_priv->has_mob && req->shareable) {
856 uint32_t backup_handle;
857
858 ret = vmw_user_bo_alloc(dev_priv, tfile,
859 res->backup_size,
860 true,
861 &backup_handle,
862 &res->backup,
863 &user_srf->backup_base);
864 if (unlikely(ret != 0)) {
865 vmw_resource_unreference(&res);
866 goto out_unlock;
867 }
868 }
869
870 tmp = vmw_resource_reference(&srf->res);
871 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
872 req->shareable, VMW_RES_SURFACE,
873 &vmw_user_surface_base_release, NULL);
874
875 if (unlikely(ret != 0)) {
876 vmw_resource_unreference(&tmp);
877 vmw_resource_unreference(&res);
878 goto out_unlock;
879 }
880
881 rep->sid = user_srf->prime.base.handle;
882 vmw_resource_unreference(&res);
883
884 ttm_read_unlock(&dev_priv->reservation_sem);
885 return 0;
886out_no_copy:
887 kfree(srf->offsets);
888out_no_offsets:
889 kfree(srf->sizes);
890out_no_sizes:
891 ttm_prime_object_kfree(user_srf, prime);
892out_no_user_srf:
893 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
894out_unlock:
895 ttm_read_unlock(&dev_priv->reservation_sem);
896 return ret;
897}
898
899
900static int
901vmw_surface_handle_reference(struct vmw_private *dev_priv,
902 struct drm_file *file_priv,
903 uint32_t u_handle,
904 enum drm_vmw_handle_type handle_type,
905 struct ttm_base_object **base_p)
906{
907 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
908 struct vmw_user_surface *user_srf;
909 uint32_t handle;
910 struct ttm_base_object *base;
911 int ret;
912 bool require_exist = false;
913
914 if (handle_type == DRM_VMW_HANDLE_PRIME) {
915 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
916 if (unlikely(ret != 0))
917 return ret;
918 } else {
919 if (unlikely(drm_is_render_client(file_priv)))
920 require_exist = true;
921
922 handle = u_handle;
923 }
924
925 ret = -EINVAL;
926 base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
927 if (unlikely(!base)) {
928 VMW_DEBUG_USER("Could not find surface to reference.\n");
929 goto out_no_lookup;
930 }
931
932 if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
933 VMW_DEBUG_USER("Referenced object is not a surface.\n");
934 goto out_bad_resource;
935 }
936
937 if (handle_type != DRM_VMW_HANDLE_PRIME) {
938 user_srf = container_of(base, struct vmw_user_surface,
939 prime.base);
940
941 /*
942 * Make sure the surface creator has the same
943 * authenticating master, or is already registered with us.
944 */
945 if (drm_is_primary_client(file_priv) &&
946 user_srf->master != file_priv->master)
947 require_exist = true;
948
949 ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
950 require_exist);
951 if (unlikely(ret != 0)) {
952 DRM_ERROR("Could not add a reference to a surface.\n");
953 goto out_bad_resource;
954 }
955 }
956
957 *base_p = base;
958 return 0;
959
960out_bad_resource:
961 ttm_base_object_unref(&base);
962out_no_lookup:
963 if (handle_type == DRM_VMW_HANDLE_PRIME)
964 (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
965
966 return ret;
967}
968
969/**
970 * vmw_user_surface_define_ioctl - Ioctl function implementing
971 * the user surface reference functionality.
972 *
973 * @dev: Pointer to a struct drm_device.
974 * @data: Pointer to data copied from / to user-space.
975 * @file_priv: Pointer to a drm file private structure.
976 */
977int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
978 struct drm_file *file_priv)
979{
980 struct vmw_private *dev_priv = vmw_priv(dev);
981 union drm_vmw_surface_reference_arg *arg =
982 (union drm_vmw_surface_reference_arg *)data;
983 struct drm_vmw_surface_arg *req = &arg->req;
984 struct drm_vmw_surface_create_req *rep = &arg->rep;
985 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
986 struct vmw_surface *srf;
987 struct vmw_user_surface *user_srf;
988 struct drm_vmw_size __user *user_sizes;
989 struct ttm_base_object *base;
990 int ret;
991
992 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
993 req->handle_type, &base);
994 if (unlikely(ret != 0))
995 return ret;
996
997 user_srf = container_of(base, struct vmw_user_surface, prime.base);
998 srf = &user_srf->srf;
999
1000 /* Downcast of flags when sending back to user space */
1001 rep->flags = (uint32_t)srf->flags;
1002 rep->format = srf->format;
1003 memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
1004 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1005 rep->size_addr;
1006
1007 if (user_sizes)
1008 ret = copy_to_user(user_sizes, &srf->base_size,
1009 sizeof(srf->base_size));
1010 if (unlikely(ret != 0)) {
1011 VMW_DEBUG_USER("copy_to_user failed %p %u\n", user_sizes,
1012 srf->num_sizes);
1013 ttm_ref_object_base_unref(tfile, base->handle, TTM_REF_USAGE);
1014 ret = -EFAULT;
1015 }
1016
1017 ttm_base_object_unref(&base);
1018
1019 return ret;
1020}
1021
1022/**
1023 * vmw_surface_define_encode - Encode a surface_define command.
1024 *
1025 * @srf: Pointer to a struct vmw_surface object.
1026 * @cmd_space: Pointer to memory area in which the commands should be encoded.
1027 */
1028static int vmw_gb_surface_create(struct vmw_resource *res)
1029{
1030 struct vmw_private *dev_priv = res->dev_priv;
1031 struct vmw_surface *srf = vmw_res_to_srf(res);
1032 uint32_t cmd_len, cmd_id, submit_len;
1033 int ret;
1034 struct {
1035 SVGA3dCmdHeader header;
1036 SVGA3dCmdDefineGBSurface body;
1037 } *cmd;
1038 struct {
1039 SVGA3dCmdHeader header;
1040 SVGA3dCmdDefineGBSurface_v2 body;
1041 } *cmd2;
1042 struct {
1043 SVGA3dCmdHeader header;
1044 SVGA3dCmdDefineGBSurface_v3 body;
1045 } *cmd3;
1046
1047 if (likely(res->id != -1))
1048 return 0;
1049
1050 vmw_fifo_resource_inc(dev_priv);
1051 ret = vmw_resource_alloc_id(res);
1052 if (unlikely(ret != 0)) {
1053 DRM_ERROR("Failed to allocate a surface id.\n");
1054 goto out_no_id;
1055 }
1056
1057 if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
1058 ret = -EBUSY;
1059 goto out_no_fifo;
1060 }
1061
1062 if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1063 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1064 cmd_len = sizeof(cmd3->body);
1065 submit_len = sizeof(*cmd3);
1066 } else if (srf->array_size > 0) {
1067 /* has_dx checked on creation time. */
1068 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1069 cmd_len = sizeof(cmd2->body);
1070 submit_len = sizeof(*cmd2);
1071 } else {
1072 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
1073 cmd_len = sizeof(cmd->body);
1074 submit_len = sizeof(*cmd);
1075 }
1076
1077 cmd = VMW_FIFO_RESERVE(dev_priv, submit_len);
1078 cmd2 = (typeof(cmd2))cmd;
1079 cmd3 = (typeof(cmd3))cmd;
1080 if (unlikely(!cmd)) {
1081 ret = -ENOMEM;
1082 goto out_no_fifo;
1083 }
1084
1085 if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1086 cmd3->header.id = cmd_id;
1087 cmd3->header.size = cmd_len;
1088 cmd3->body.sid = srf->res.id;
1089 cmd3->body.surfaceFlags = srf->flags;
1090 cmd3->body.format = srf->format;
1091 cmd3->body.numMipLevels = srf->mip_levels[0];
1092 cmd3->body.multisampleCount = srf->multisample_count;
1093 cmd3->body.multisamplePattern = srf->multisample_pattern;
1094 cmd3->body.qualityLevel = srf->quality_level;
1095 cmd3->body.autogenFilter = srf->autogen_filter;
1096 cmd3->body.size.width = srf->base_size.width;
1097 cmd3->body.size.height = srf->base_size.height;
1098 cmd3->body.size.depth = srf->base_size.depth;
1099 cmd3->body.arraySize = srf->array_size;
1100 } else if (srf->array_size > 0) {
1101 cmd2->header.id = cmd_id;
1102 cmd2->header.size = cmd_len;
1103 cmd2->body.sid = srf->res.id;
1104 cmd2->body.surfaceFlags = srf->flags;
1105 cmd2->body.format = srf->format;
1106 cmd2->body.numMipLevels = srf->mip_levels[0];
1107 cmd2->body.multisampleCount = srf->multisample_count;
1108 cmd2->body.autogenFilter = srf->autogen_filter;
1109 cmd2->body.size.width = srf->base_size.width;
1110 cmd2->body.size.height = srf->base_size.height;
1111 cmd2->body.size.depth = srf->base_size.depth;
1112 cmd2->body.arraySize = srf->array_size;
1113 } else {
1114 cmd->header.id = cmd_id;
1115 cmd->header.size = cmd_len;
1116 cmd->body.sid = srf->res.id;
1117 cmd->body.surfaceFlags = srf->flags;
1118 cmd->body.format = srf->format;
1119 cmd->body.numMipLevels = srf->mip_levels[0];
1120 cmd->body.multisampleCount = srf->multisample_count;
1121 cmd->body.autogenFilter = srf->autogen_filter;
1122 cmd->body.size.width = srf->base_size.width;
1123 cmd->body.size.height = srf->base_size.height;
1124 cmd->body.size.depth = srf->base_size.depth;
1125 }
1126
1127 vmw_fifo_commit(dev_priv, submit_len);
1128
1129 return 0;
1130
1131out_no_fifo:
1132 vmw_resource_release_id(res);
1133out_no_id:
1134 vmw_fifo_resource_dec(dev_priv);
1135 return ret;
1136}
1137
1138
1139static int vmw_gb_surface_bind(struct vmw_resource *res,
1140 struct ttm_validate_buffer *val_buf)
1141{
1142 struct vmw_private *dev_priv = res->dev_priv;
1143 struct {
1144 SVGA3dCmdHeader header;
1145 SVGA3dCmdBindGBSurface body;
1146 } *cmd1;
1147 struct {
1148 SVGA3dCmdHeader header;
1149 SVGA3dCmdUpdateGBSurface body;
1150 } *cmd2;
1151 uint32_t submit_size;
1152 struct ttm_buffer_object *bo = val_buf->bo;
1153
1154 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1155
1156 submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
1157
1158 cmd1 = VMW_FIFO_RESERVE(dev_priv, submit_size);
1159 if (unlikely(!cmd1))
1160 return -ENOMEM;
1161
1162 cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1163 cmd1->header.size = sizeof(cmd1->body);
1164 cmd1->body.sid = res->id;
1165 cmd1->body.mobid = bo->mem.start;
1166 if (res->backup_dirty) {
1167 cmd2 = (void *) &cmd1[1];
1168 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1169 cmd2->header.size = sizeof(cmd2->body);
1170 cmd2->body.sid = res->id;
1171 res->backup_dirty = false;
1172 }
1173 vmw_fifo_commit(dev_priv, submit_size);
1174
1175 return 0;
1176}
1177
1178static int vmw_gb_surface_unbind(struct vmw_resource *res,
1179 bool readback,
1180 struct ttm_validate_buffer *val_buf)
1181{
1182 struct vmw_private *dev_priv = res->dev_priv;
1183 struct ttm_buffer_object *bo = val_buf->bo;
1184 struct vmw_fence_obj *fence;
1185
1186 struct {
1187 SVGA3dCmdHeader header;
1188 SVGA3dCmdReadbackGBSurface body;
1189 } *cmd1;
1190 struct {
1191 SVGA3dCmdHeader header;
1192 SVGA3dCmdInvalidateGBSurface body;
1193 } *cmd2;
1194 struct {
1195 SVGA3dCmdHeader header;
1196 SVGA3dCmdBindGBSurface body;
1197 } *cmd3;
1198 uint32_t submit_size;
1199 uint8_t *cmd;
1200
1201
1202 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1203
1204 submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
1205 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
1206 if (unlikely(!cmd))
1207 return -ENOMEM;
1208
1209 if (readback) {
1210 cmd1 = (void *) cmd;
1211 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1212 cmd1->header.size = sizeof(cmd1->body);
1213 cmd1->body.sid = res->id;
1214 cmd3 = (void *) &cmd1[1];
1215 } else {
1216 cmd2 = (void *) cmd;
1217 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1218 cmd2->header.size = sizeof(cmd2->body);
1219 cmd2->body.sid = res->id;
1220 cmd3 = (void *) &cmd2[1];
1221 }
1222
1223 cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1224 cmd3->header.size = sizeof(cmd3->body);
1225 cmd3->body.sid = res->id;
1226 cmd3->body.mobid = SVGA3D_INVALID_ID;
1227
1228 vmw_fifo_commit(dev_priv, submit_size);
1229
1230 /*
1231 * Create a fence object and fence the backup buffer.
1232 */
1233
1234 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
1235 &fence, NULL);
1236
1237 vmw_bo_fence_single(val_buf->bo, fence);
1238
1239 if (likely(fence != NULL))
1240 vmw_fence_obj_unreference(&fence);
1241
1242 return 0;
1243}
1244
1245static int vmw_gb_surface_destroy(struct vmw_resource *res)
1246{
1247 struct vmw_private *dev_priv = res->dev_priv;
1248 struct vmw_surface *srf = vmw_res_to_srf(res);
1249 struct {
1250 SVGA3dCmdHeader header;
1251 SVGA3dCmdDestroyGBSurface body;
1252 } *cmd;
1253
1254 if (likely(res->id == -1))
1255 return 0;
1256
1257 mutex_lock(&dev_priv->binding_mutex);
1258 vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1259 vmw_binding_res_list_scrub(&res->binding_head);
1260
1261 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
1262 if (unlikely(!cmd)) {
1263 mutex_unlock(&dev_priv->binding_mutex);
1264 return -ENOMEM;
1265 }
1266
1267 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
1268 cmd->header.size = sizeof(cmd->body);
1269 cmd->body.sid = res->id;
1270 vmw_fifo_commit(dev_priv, sizeof(*cmd));
1271 mutex_unlock(&dev_priv->binding_mutex);
1272 vmw_resource_release_id(res);
1273 vmw_fifo_resource_dec(dev_priv);
1274
1275 return 0;
1276}
1277
1278
1279/**
1280 * vmw_gb_surface_define_ioctl - Ioctl function implementing
1281 * the user surface define functionality.
1282 *
1283 * @dev: Pointer to a struct drm_device.
1284 * @data: Pointer to data copied from / to user-space.
1285 * @file_priv: Pointer to a drm file private structure.
1286 */
1287int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1288 struct drm_file *file_priv)
1289{
1290 union drm_vmw_gb_surface_create_arg *arg =
1291 (union drm_vmw_gb_surface_create_arg *)data;
1292 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1293 struct drm_vmw_gb_surface_create_ext_req req_ext;
1294
1295 req_ext.base = arg->req;
1296 req_ext.version = drm_vmw_gb_surface_v1;
1297 req_ext.svga3d_flags_upper_32_bits = 0;
1298 req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1299 req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
1300 req_ext.must_be_zero = 0;
1301
1302 return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
1303}
1304
1305/**
1306 * vmw_gb_surface_reference_ioctl - Ioctl function implementing
1307 * the user surface reference functionality.
1308 *
1309 * @dev: Pointer to a struct drm_device.
1310 * @data: Pointer to data copied from / to user-space.
1311 * @file_priv: Pointer to a drm file private structure.
1312 */
1313int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1314 struct drm_file *file_priv)
1315{
1316 union drm_vmw_gb_surface_reference_arg *arg =
1317 (union drm_vmw_gb_surface_reference_arg *)data;
1318 struct drm_vmw_surface_arg *req = &arg->req;
1319 struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
1320 struct drm_vmw_gb_surface_ref_ext_rep rep_ext;
1321 int ret;
1322
1323 ret = vmw_gb_surface_reference_internal(dev, req, &rep_ext, file_priv);
1324
1325 if (unlikely(ret != 0))
1326 return ret;
1327
1328 rep->creq = rep_ext.creq.base;
1329 rep->crep = rep_ext.crep;
1330
1331 return ret;
1332}
1333
1334/**
1335 * vmw_surface_gb_priv_define - Define a private GB surface
1336 *
1337 * @dev: Pointer to a struct drm_device
1338 * @user_accounting_size: Used to track user-space memory usage, set
1339 * to 0 for kernel mode only memory
1340 * @svga3d_flags: SVGA3d surface flags for the device
1341 * @format: requested surface format
1342 * @for_scanout: true if inteded to be used for scanout buffer
1343 * @num_mip_levels: number of MIP levels
1344 * @multisample_count:
1345 * @array_size: Surface array size.
1346 * @size: width, heigh, depth of the surface requested
1347 * @multisample_pattern: Multisampling pattern when msaa is supported
1348 * @quality_level: Precision settings
1349 * @user_srf_out: allocated user_srf. Set to NULL on failure.
1350 *
1351 * GB surfaces allocated by this function will not have a user mode handle, and
1352 * thus will only be visible to vmwgfx. For optimization reasons the
1353 * surface may later be given a user mode handle by another function to make
1354 * it available to user mode drivers.
1355 */
1356int vmw_surface_gb_priv_define(struct drm_device *dev,
1357 uint32_t user_accounting_size,
1358 SVGA3dSurfaceAllFlags svga3d_flags,
1359 SVGA3dSurfaceFormat format,
1360 bool for_scanout,
1361 uint32_t num_mip_levels,
1362 uint32_t multisample_count,
1363 uint32_t array_size,
1364 struct drm_vmw_size size,
1365 SVGA3dMSPattern multisample_pattern,
1366 SVGA3dMSQualityLevel quality_level,
1367 struct vmw_surface **srf_out)
1368{
1369 struct vmw_private *dev_priv = vmw_priv(dev);
1370 struct vmw_user_surface *user_srf;
1371 struct ttm_operation_ctx ctx = {
1372 .interruptible = true,
1373 .no_wait_gpu = false
1374 };
1375 struct vmw_surface *srf;
1376 int ret;
1377 u32 num_layers = 1;
1378 u32 sample_count = 1;
1379
1380 *srf_out = NULL;
1381
1382 if (for_scanout) {
1383 if (!svga3dsurface_is_screen_target_format(format)) {
1384 VMW_DEBUG_USER("Invalid Screen Target surface format.");
1385 return -EINVAL;
1386 }
1387
1388 if (size.width > dev_priv->texture_max_width ||
1389 size.height > dev_priv->texture_max_height) {
1390 VMW_DEBUG_USER("%ux%u\n, exceeds max surface size %ux%u",
1391 size.width, size.height,
1392 dev_priv->texture_max_width,
1393 dev_priv->texture_max_height);
1394 return -EINVAL;
1395 }
1396 } else {
1397 const struct svga3d_surface_desc *desc;
1398
1399 desc = svga3dsurface_get_desc(format);
1400 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
1401 VMW_DEBUG_USER("Invalid surface format.\n");
1402 return -EINVAL;
1403 }
1404 }
1405
1406 /* array_size must be null for non-GL3 host. */
1407 if (array_size > 0 && !dev_priv->has_dx) {
1408 VMW_DEBUG_USER("Tried to create DX surface on non-DX host.\n");
1409 return -EINVAL;
1410 }
1411
1412 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1413 if (unlikely(ret != 0))
1414 return ret;
1415
1416 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
1417 user_accounting_size, &ctx);
1418 if (unlikely(ret != 0)) {
1419 if (ret != -ERESTARTSYS)
1420 DRM_ERROR("Out of graphics memory for surface"
1421 " creation.\n");
1422 goto out_unlock;
1423 }
1424
1425 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
1426 if (unlikely(!user_srf)) {
1427 ret = -ENOMEM;
1428 goto out_no_user_srf;
1429 }
1430
1431 *srf_out = &user_srf->srf;
1432 user_srf->size = user_accounting_size;
1433 user_srf->prime.base.shareable = false;
1434 user_srf->prime.base.tfile = NULL;
1435
1436 srf = &user_srf->srf;
1437 srf->flags = svga3d_flags;
1438 srf->format = format;
1439 srf->scanout = for_scanout;
1440 srf->mip_levels[0] = num_mip_levels;
1441 srf->num_sizes = 1;
1442 srf->sizes = NULL;
1443 srf->offsets = NULL;
1444 srf->base_size = size;
1445 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
1446 srf->array_size = array_size;
1447 srf->multisample_count = multisample_count;
1448 srf->multisample_pattern = multisample_pattern;
1449 srf->quality_level = quality_level;
1450
1451 if (array_size)
1452 num_layers = array_size;
1453 else if (svga3d_flags & SVGA3D_SURFACE_CUBEMAP)
1454 num_layers = SVGA3D_MAX_SURFACE_FACES;
1455
1456 if (srf->flags & SVGA3D_SURFACE_MULTISAMPLE)
1457 sample_count = srf->multisample_count;
1458
1459 srf->res.backup_size =
1460 svga3dsurface_get_serialized_size_extended(srf->format,
1461 srf->base_size,
1462 srf->mip_levels[0],
1463 num_layers,
1464 sample_count);
1465
1466 if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
1467 srf->res.backup_size += sizeof(SVGA3dDXSOState);
1468
1469 /*
1470 * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
1471 * size greater than STDU max width/height. This is really a workaround
1472 * to support creation of big framebuffer requested by some user-space
1473 * for whole topology. That big framebuffer won't really be used for
1474 * binding with screen target as during prepare_fb a separate surface is
1475 * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
1476 */
1477 if (dev_priv->active_display_unit == vmw_du_screen_target &&
1478 for_scanout && size.width <= dev_priv->stdu_max_width &&
1479 size.height <= dev_priv->stdu_max_height)
1480 srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
1481
1482 /*
1483 * From this point, the generic resource management functions
1484 * destroy the object on failure.
1485 */
1486 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
1487
1488 ttm_read_unlock(&dev_priv->reservation_sem);
1489 return ret;
1490
1491out_no_user_srf:
1492 ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
1493
1494out_unlock:
1495 ttm_read_unlock(&dev_priv->reservation_sem);
1496 return ret;
1497}
1498
1499/**
1500 * vmw_gb_surface_define_ext_ioctl - Ioctl function implementing
1501 * the user surface define functionality.
1502 *
1503 * @dev: Pointer to a struct drm_device.
1504 * @data: Pointer to data copied from / to user-space.
1505 * @file_priv: Pointer to a drm file private structure.
1506 */
1507int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, void *data,
1508 struct drm_file *file_priv)
1509{
1510 union drm_vmw_gb_surface_create_ext_arg *arg =
1511 (union drm_vmw_gb_surface_create_ext_arg *)data;
1512 struct drm_vmw_gb_surface_create_ext_req *req = &arg->req;
1513 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1514
1515 return vmw_gb_surface_define_internal(dev, req, rep, file_priv);
1516}
1517
1518/**
1519 * vmw_gb_surface_reference_ext_ioctl - Ioctl function implementing
1520 * the user surface reference functionality.
1521 *
1522 * @dev: Pointer to a struct drm_device.
1523 * @data: Pointer to data copied from / to user-space.
1524 * @file_priv: Pointer to a drm file private structure.
1525 */
1526int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, void *data,
1527 struct drm_file *file_priv)
1528{
1529 union drm_vmw_gb_surface_reference_ext_arg *arg =
1530 (union drm_vmw_gb_surface_reference_ext_arg *)data;
1531 struct drm_vmw_surface_arg *req = &arg->req;
1532 struct drm_vmw_gb_surface_ref_ext_rep *rep = &arg->rep;
1533
1534 return vmw_gb_surface_reference_internal(dev, req, rep, file_priv);
1535}
1536
1537/**
1538 * vmw_gb_surface_define_internal - Ioctl function implementing
1539 * the user surface define functionality.
1540 *
1541 * @dev: Pointer to a struct drm_device.
1542 * @req: Request argument from user-space.
1543 * @rep: Response argument to user-space.
1544 * @file_priv: Pointer to a drm file private structure.
1545 */
1546static int
1547vmw_gb_surface_define_internal(struct drm_device *dev,
1548 struct drm_vmw_gb_surface_create_ext_req *req,
1549 struct drm_vmw_gb_surface_create_rep *rep,
1550 struct drm_file *file_priv)
1551{
1552 struct vmw_private *dev_priv = vmw_priv(dev);
1553 struct vmw_user_surface *user_srf;
1554 struct vmw_surface *srf;
1555 struct vmw_resource *res;
1556 struct vmw_resource *tmp;
1557 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1558 int ret;
1559 uint32_t size;
1560 uint32_t backup_handle = 0;
1561 SVGA3dSurfaceAllFlags svga3d_flags_64 =
1562 SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
1563 req->base.svga3d_flags);
1564
1565 if (!dev_priv->has_sm4_1) {
1566 /*
1567 * If SM4_1 is not support then cannot send 64-bit flag to
1568 * device.
1569 */
1570 if (req->svga3d_flags_upper_32_bits != 0)
1571 return -EINVAL;
1572
1573 if (req->base.multisample_count != 0)
1574 return -EINVAL;
1575
1576 if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
1577 return -EINVAL;
1578
1579 if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
1580 return -EINVAL;
1581 }
1582
1583 if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1584 req->base.multisample_count == 0)
1585 return -EINVAL;
1586
1587 if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS)
1588 return -EINVAL;
1589
1590 if (unlikely(vmw_user_surface_size == 0))
1591 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
1592 VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
1593
1594 size = vmw_user_surface_size;
1595
1596 /* Define a surface based on the parameters. */
1597 ret = vmw_surface_gb_priv_define(dev,
1598 size,
1599 svga3d_flags_64,
1600 req->base.format,
1601 req->base.drm_surface_flags &
1602 drm_vmw_surface_flag_scanout,
1603 req->base.mip_levels,
1604 req->base.multisample_count,
1605 req->base.array_size,
1606 req->base.base_size,
1607 req->multisample_pattern,
1608 req->quality_level,
1609 &srf);
1610 if (unlikely(ret != 0))
1611 return ret;
1612
1613 user_srf = container_of(srf, struct vmw_user_surface, srf);
1614 if (drm_is_primary_client(file_priv))
1615 user_srf->master = drm_master_get(file_priv->master);
1616
1617 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1618 if (unlikely(ret != 0))
1619 return ret;
1620
1621 res = &user_srf->srf.res;
1622
1623 if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
1624 ret = vmw_user_bo_lookup(tfile, req->base.buffer_handle,
1625 &res->backup,
1626 &user_srf->backup_base);
1627 if (ret == 0) {
1628 if (res->backup->base.num_pages * PAGE_SIZE <
1629 res->backup_size) {
1630 VMW_DEBUG_USER("Surface backup buffer too small.\n");
1631 vmw_bo_unreference(&res->backup);
1632 ret = -EINVAL;
1633 goto out_unlock;
1634 } else {
1635 backup_handle = req->base.buffer_handle;
1636 }
1637 }
1638 } else if (req->base.drm_surface_flags &
1639 drm_vmw_surface_flag_create_buffer)
1640 ret = vmw_user_bo_alloc(dev_priv, tfile,
1641 res->backup_size,
1642 req->base.drm_surface_flags &
1643 drm_vmw_surface_flag_shareable,
1644 &backup_handle,
1645 &res->backup,
1646 &user_srf->backup_base);
1647
1648 if (unlikely(ret != 0)) {
1649 vmw_resource_unreference(&res);
1650 goto out_unlock;
1651 }
1652
1653 tmp = vmw_resource_reference(res);
1654 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
1655 req->base.drm_surface_flags &
1656 drm_vmw_surface_flag_shareable,
1657 VMW_RES_SURFACE,
1658 &vmw_user_surface_base_release, NULL);
1659
1660 if (unlikely(ret != 0)) {
1661 vmw_resource_unreference(&tmp);
1662 vmw_resource_unreference(&res);
1663 goto out_unlock;
1664 }
1665
1666 rep->handle = user_srf->prime.base.handle;
1667 rep->backup_size = res->backup_size;
1668 if (res->backup) {
1669 rep->buffer_map_handle =
1670 drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
1671 rep->buffer_size = res->backup->base.num_pages * PAGE_SIZE;
1672 rep->buffer_handle = backup_handle;
1673 } else {
1674 rep->buffer_map_handle = 0;
1675 rep->buffer_size = 0;
1676 rep->buffer_handle = SVGA3D_INVALID_ID;
1677 }
1678
1679 vmw_resource_unreference(&res);
1680
1681out_unlock:
1682 ttm_read_unlock(&dev_priv->reservation_sem);
1683 return ret;
1684}
1685
1686/**
1687 * vmw_gb_surface_reference_internal - Ioctl function implementing
1688 * the user surface reference functionality.
1689 *
1690 * @dev: Pointer to a struct drm_device.
1691 * @req: Pointer to user-space request surface arg.
1692 * @rep: Pointer to response to user-space.
1693 * @file_priv: Pointer to a drm file private structure.
1694 */
1695static int
1696vmw_gb_surface_reference_internal(struct drm_device *dev,
1697 struct drm_vmw_surface_arg *req,
1698 struct drm_vmw_gb_surface_ref_ext_rep *rep,
1699 struct drm_file *file_priv)
1700{
1701 struct vmw_private *dev_priv = vmw_priv(dev);
1702 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1703 struct vmw_surface *srf;
1704 struct vmw_user_surface *user_srf;
1705 struct ttm_base_object *base;
1706 uint32_t backup_handle;
1707 int ret = -EINVAL;
1708
1709 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1710 req->handle_type, &base);
1711 if (unlikely(ret != 0))
1712 return ret;
1713
1714 user_srf = container_of(base, struct vmw_user_surface, prime.base);
1715 srf = &user_srf->srf;
1716 if (!srf->res.backup) {
1717 DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1718 goto out_bad_resource;
1719 }
1720
1721 mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1722 ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
1723 mutex_unlock(&dev_priv->cmdbuf_mutex);
1724
1725 if (unlikely(ret != 0)) {
1726 DRM_ERROR("Could not add a reference to a GB surface "
1727 "backup buffer.\n");
1728 (void) ttm_ref_object_base_unref(tfile, base->handle,
1729 TTM_REF_USAGE);
1730 goto out_bad_resource;
1731 }
1732
1733 rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(srf->flags);
1734 rep->creq.base.format = srf->format;
1735 rep->creq.base.mip_levels = srf->mip_levels[0];
1736 rep->creq.base.drm_surface_flags = 0;
1737 rep->creq.base.multisample_count = srf->multisample_count;
1738 rep->creq.base.autogen_filter = srf->autogen_filter;
1739 rep->creq.base.array_size = srf->array_size;
1740 rep->creq.base.buffer_handle = backup_handle;
1741 rep->creq.base.base_size = srf->base_size;
1742 rep->crep.handle = user_srf->prime.base.handle;
1743 rep->crep.backup_size = srf->res.backup_size;
1744 rep->crep.buffer_handle = backup_handle;
1745 rep->crep.buffer_map_handle =
1746 drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1747 rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
1748
1749 rep->creq.version = drm_vmw_gb_surface_v1;
1750 rep->creq.svga3d_flags_upper_32_bits =
1751 SVGA3D_FLAGS_UPPER_32(srf->flags);
1752 rep->creq.multisample_pattern = srf->multisample_pattern;
1753 rep->creq.quality_level = srf->quality_level;
1754 rep->creq.must_be_zero = 0;
1755
1756out_bad_resource:
1757 ttm_base_object_unref(&base);
1758
1759 return ret;
1760}
1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/**************************************************************************
3 *
4 * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include <drm/ttm/ttm_placement.h>
29
30#include "vmwgfx_drv.h"
31#include "vmwgfx_resource_priv.h"
32#include "vmwgfx_so.h"
33#include "vmwgfx_binding.h"
34#include "vmw_surface_cache.h"
35#include "device_include/svga3d_surfacedefs.h"
36
37#define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
38#define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
39#define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
40 (svga3d_flags & ((uint64_t)U32_MAX))
41
42/**
43 * struct vmw_user_surface - User-space visible surface resource
44 *
45 * @prime: The TTM prime object.
46 * @base: The TTM base object handling user-space visibility.
47 * @srf: The surface metadata.
48 * @master: Master of the creating client. Used for security check.
49 */
50struct vmw_user_surface {
51 struct ttm_prime_object prime;
52 struct vmw_surface srf;
53 struct drm_master *master;
54};
55
56/**
57 * struct vmw_surface_offset - Backing store mip level offset info
58 *
59 * @face: Surface face.
60 * @mip: Mip level.
61 * @bo_offset: Offset into backing store of this mip level.
62 *
63 */
64struct vmw_surface_offset {
65 uint32_t face;
66 uint32_t mip;
67 uint32_t bo_offset;
68};
69
70/**
71 * struct vmw_surface_dirty - Surface dirty-tracker
72 * @cache: Cached layout information of the surface.
73 * @num_subres: Number of subresources.
74 * @boxes: Array of SVGA3dBoxes indicating dirty regions. One per subresource.
75 */
76struct vmw_surface_dirty {
77 struct vmw_surface_cache cache;
78 u32 num_subres;
79 SVGA3dBox boxes[];
80};
81
82static void vmw_user_surface_free(struct vmw_resource *res);
83static struct vmw_resource *
84vmw_user_surface_base_to_res(struct ttm_base_object *base);
85static int vmw_legacy_srf_bind(struct vmw_resource *res,
86 struct ttm_validate_buffer *val_buf);
87static int vmw_legacy_srf_unbind(struct vmw_resource *res,
88 bool readback,
89 struct ttm_validate_buffer *val_buf);
90static int vmw_legacy_srf_create(struct vmw_resource *res);
91static int vmw_legacy_srf_destroy(struct vmw_resource *res);
92static int vmw_gb_surface_create(struct vmw_resource *res);
93static int vmw_gb_surface_bind(struct vmw_resource *res,
94 struct ttm_validate_buffer *val_buf);
95static int vmw_gb_surface_unbind(struct vmw_resource *res,
96 bool readback,
97 struct ttm_validate_buffer *val_buf);
98static int vmw_gb_surface_destroy(struct vmw_resource *res);
99static int
100vmw_gb_surface_define_internal(struct drm_device *dev,
101 struct drm_vmw_gb_surface_create_ext_req *req,
102 struct drm_vmw_gb_surface_create_rep *rep,
103 struct drm_file *file_priv);
104static int
105vmw_gb_surface_reference_internal(struct drm_device *dev,
106 struct drm_vmw_surface_arg *req,
107 struct drm_vmw_gb_surface_ref_ext_rep *rep,
108 struct drm_file *file_priv);
109
110static void vmw_surface_dirty_free(struct vmw_resource *res);
111static int vmw_surface_dirty_alloc(struct vmw_resource *res);
112static int vmw_surface_dirty_sync(struct vmw_resource *res);
113static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
114 size_t end);
115static int vmw_surface_clean(struct vmw_resource *res);
116
117static const struct vmw_user_resource_conv user_surface_conv = {
118 .object_type = VMW_RES_SURFACE,
119 .base_obj_to_res = vmw_user_surface_base_to_res,
120 .res_free = vmw_user_surface_free
121};
122
123const struct vmw_user_resource_conv *user_surface_converter =
124 &user_surface_conv;
125
126static const struct vmw_res_func vmw_legacy_surface_func = {
127 .res_type = vmw_res_surface,
128 .needs_backup = false,
129 .may_evict = true,
130 .prio = 1,
131 .dirty_prio = 1,
132 .type_name = "legacy surfaces",
133 .backup_placement = &vmw_srf_placement,
134 .create = &vmw_legacy_srf_create,
135 .destroy = &vmw_legacy_srf_destroy,
136 .bind = &vmw_legacy_srf_bind,
137 .unbind = &vmw_legacy_srf_unbind
138};
139
140static const struct vmw_res_func vmw_gb_surface_func = {
141 .res_type = vmw_res_surface,
142 .needs_backup = true,
143 .may_evict = true,
144 .prio = 1,
145 .dirty_prio = 2,
146 .type_name = "guest backed surfaces",
147 .backup_placement = &vmw_mob_placement,
148 .create = vmw_gb_surface_create,
149 .destroy = vmw_gb_surface_destroy,
150 .bind = vmw_gb_surface_bind,
151 .unbind = vmw_gb_surface_unbind,
152 .dirty_alloc = vmw_surface_dirty_alloc,
153 .dirty_free = vmw_surface_dirty_free,
154 .dirty_sync = vmw_surface_dirty_sync,
155 .dirty_range_add = vmw_surface_dirty_range_add,
156 .clean = vmw_surface_clean,
157};
158
159/*
160 * struct vmw_surface_dma - SVGA3D DMA command
161 */
162struct vmw_surface_dma {
163 SVGA3dCmdHeader header;
164 SVGA3dCmdSurfaceDMA body;
165 SVGA3dCopyBox cb;
166 SVGA3dCmdSurfaceDMASuffix suffix;
167};
168
169/*
170 * struct vmw_surface_define - SVGA3D Surface Define command
171 */
172struct vmw_surface_define {
173 SVGA3dCmdHeader header;
174 SVGA3dCmdDefineSurface body;
175};
176
177/*
178 * struct vmw_surface_destroy - SVGA3D Surface Destroy command
179 */
180struct vmw_surface_destroy {
181 SVGA3dCmdHeader header;
182 SVGA3dCmdDestroySurface body;
183};
184
185
186/**
187 * vmw_surface_dma_size - Compute fifo size for a dma command.
188 *
189 * @srf: Pointer to a struct vmw_surface
190 *
191 * Computes the required size for a surface dma command for backup or
192 * restoration of the surface represented by @srf.
193 */
194static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
195{
196 return srf->metadata.num_sizes * sizeof(struct vmw_surface_dma);
197}
198
199
200/**
201 * vmw_surface_define_size - Compute fifo size for a surface define command.
202 *
203 * @srf: Pointer to a struct vmw_surface
204 *
205 * Computes the required size for a surface define command for the definition
206 * of the surface represented by @srf.
207 */
208static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
209{
210 return sizeof(struct vmw_surface_define) + srf->metadata.num_sizes *
211 sizeof(SVGA3dSize);
212}
213
214
215/**
216 * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
217 *
218 * Computes the required size for a surface destroy command for the destruction
219 * of a hw surface.
220 */
221static inline uint32_t vmw_surface_destroy_size(void)
222{
223 return sizeof(struct vmw_surface_destroy);
224}
225
226/**
227 * vmw_surface_destroy_encode - Encode a surface_destroy command.
228 *
229 * @id: The surface id
230 * @cmd_space: Pointer to memory area in which the commands should be encoded.
231 */
232static void vmw_surface_destroy_encode(uint32_t id,
233 void *cmd_space)
234{
235 struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
236 cmd_space;
237
238 cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
239 cmd->header.size = sizeof(cmd->body);
240 cmd->body.sid = id;
241}
242
243/**
244 * vmw_surface_define_encode - Encode a surface_define command.
245 *
246 * @srf: Pointer to a struct vmw_surface object.
247 * @cmd_space: Pointer to memory area in which the commands should be encoded.
248 */
249static void vmw_surface_define_encode(const struct vmw_surface *srf,
250 void *cmd_space)
251{
252 struct vmw_surface_define *cmd = (struct vmw_surface_define *)
253 cmd_space;
254 struct drm_vmw_size *src_size;
255 SVGA3dSize *cmd_size;
256 uint32_t cmd_len;
257 int i;
258
259 cmd_len = sizeof(cmd->body) + srf->metadata.num_sizes *
260 sizeof(SVGA3dSize);
261
262 cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
263 cmd->header.size = cmd_len;
264 cmd->body.sid = srf->res.id;
265 /*
266 * Downcast of surfaceFlags, was upcasted when received from user-space,
267 * since driver internally stores as 64 bit.
268 * For legacy surface define only 32 bit flag is supported.
269 */
270 cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->metadata.flags;
271 cmd->body.format = srf->metadata.format;
272 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
273 cmd->body.face[i].numMipLevels = srf->metadata.mip_levels[i];
274
275 cmd += 1;
276 cmd_size = (SVGA3dSize *) cmd;
277 src_size = srf->metadata.sizes;
278
279 for (i = 0; i < srf->metadata.num_sizes; ++i, cmd_size++, src_size++) {
280 cmd_size->width = src_size->width;
281 cmd_size->height = src_size->height;
282 cmd_size->depth = src_size->depth;
283 }
284}
285
286/**
287 * vmw_surface_dma_encode - Encode a surface_dma command.
288 *
289 * @srf: Pointer to a struct vmw_surface object.
290 * @cmd_space: Pointer to memory area in which the commands should be encoded.
291 * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
292 * should be placed or read from.
293 * @to_surface: Boolean whether to DMA to the surface or from the surface.
294 */
295static void vmw_surface_dma_encode(struct vmw_surface *srf,
296 void *cmd_space,
297 const SVGAGuestPtr *ptr,
298 bool to_surface)
299{
300 uint32_t i;
301 struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
302 const struct SVGA3dSurfaceDesc *desc =
303 vmw_surface_get_desc(srf->metadata.format);
304
305 for (i = 0; i < srf->metadata.num_sizes; ++i) {
306 SVGA3dCmdHeader *header = &cmd->header;
307 SVGA3dCmdSurfaceDMA *body = &cmd->body;
308 SVGA3dCopyBox *cb = &cmd->cb;
309 SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
310 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
311 const struct drm_vmw_size *cur_size = &srf->metadata.sizes[i];
312
313 header->id = SVGA_3D_CMD_SURFACE_DMA;
314 header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
315
316 body->guest.ptr = *ptr;
317 body->guest.ptr.offset += cur_offset->bo_offset;
318 body->guest.pitch = vmw_surface_calculate_pitch(desc, cur_size);
319 body->host.sid = srf->res.id;
320 body->host.face = cur_offset->face;
321 body->host.mipmap = cur_offset->mip;
322 body->transfer = ((to_surface) ? SVGA3D_WRITE_HOST_VRAM :
323 SVGA3D_READ_HOST_VRAM);
324 cb->x = 0;
325 cb->y = 0;
326 cb->z = 0;
327 cb->srcx = 0;
328 cb->srcy = 0;
329 cb->srcz = 0;
330 cb->w = cur_size->width;
331 cb->h = cur_size->height;
332 cb->d = cur_size->depth;
333
334 suffix->suffixSize = sizeof(*suffix);
335 suffix->maximumOffset =
336 vmw_surface_get_image_buffer_size(desc, cur_size,
337 body->guest.pitch);
338 suffix->flags.discard = 0;
339 suffix->flags.unsynchronized = 0;
340 suffix->flags.reserved = 0;
341 ++cmd;
342 }
343};
344
345
346/**
347 * vmw_hw_surface_destroy - destroy a Device surface
348 *
349 * @res: Pointer to a struct vmw_resource embedded in a struct
350 * vmw_surface.
351 *
352 * Destroys a the device surface associated with a struct vmw_surface if
353 * any, and adjusts resource count accordingly.
354 */
355static void vmw_hw_surface_destroy(struct vmw_resource *res)
356{
357
358 struct vmw_private *dev_priv = res->dev_priv;
359 void *cmd;
360
361 if (res->func->destroy == vmw_gb_surface_destroy) {
362 (void) vmw_gb_surface_destroy(res);
363 return;
364 }
365
366 if (res->id != -1) {
367
368 cmd = VMW_CMD_RESERVE(dev_priv, vmw_surface_destroy_size());
369 if (unlikely(!cmd))
370 return;
371
372 vmw_surface_destroy_encode(res->id, cmd);
373 vmw_cmd_commit(dev_priv, vmw_surface_destroy_size());
374
375 /*
376 * used_memory_size_atomic, or separate lock
377 * to avoid taking dev_priv::cmdbuf_mutex in
378 * the destroy path.
379 */
380
381 mutex_lock(&dev_priv->cmdbuf_mutex);
382 dev_priv->used_memory_size -= res->backup_size;
383 mutex_unlock(&dev_priv->cmdbuf_mutex);
384 }
385}
386
387/**
388 * vmw_legacy_srf_create - Create a device surface as part of the
389 * resource validation process.
390 *
391 * @res: Pointer to a struct vmw_surface.
392 *
393 * If the surface doesn't have a hw id.
394 *
395 * Returns -EBUSY if there wasn't sufficient device resources to
396 * complete the validation. Retry after freeing up resources.
397 *
398 * May return other errors if the kernel is out of guest resources.
399 */
400static int vmw_legacy_srf_create(struct vmw_resource *res)
401{
402 struct vmw_private *dev_priv = res->dev_priv;
403 struct vmw_surface *srf;
404 uint32_t submit_size;
405 uint8_t *cmd;
406 int ret;
407
408 if (likely(res->id != -1))
409 return 0;
410
411 srf = vmw_res_to_srf(res);
412 if (unlikely(dev_priv->used_memory_size + res->backup_size >=
413 dev_priv->memory_size))
414 return -EBUSY;
415
416 /*
417 * Alloc id for the resource.
418 */
419
420 ret = vmw_resource_alloc_id(res);
421 if (unlikely(ret != 0)) {
422 DRM_ERROR("Failed to allocate a surface id.\n");
423 goto out_no_id;
424 }
425
426 if (unlikely(res->id >= SVGA3D_HB_MAX_SURFACE_IDS)) {
427 ret = -EBUSY;
428 goto out_no_fifo;
429 }
430
431 /*
432 * Encode surface define- commands.
433 */
434
435 submit_size = vmw_surface_define_size(srf);
436 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
437 if (unlikely(!cmd)) {
438 ret = -ENOMEM;
439 goto out_no_fifo;
440 }
441
442 vmw_surface_define_encode(srf, cmd);
443 vmw_cmd_commit(dev_priv, submit_size);
444 vmw_fifo_resource_inc(dev_priv);
445
446 /*
447 * Surface memory usage accounting.
448 */
449
450 dev_priv->used_memory_size += res->backup_size;
451 return 0;
452
453out_no_fifo:
454 vmw_resource_release_id(res);
455out_no_id:
456 return ret;
457}
458
459/**
460 * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
461 *
462 * @res: Pointer to a struct vmw_res embedded in a struct
463 * vmw_surface.
464 * @val_buf: Pointer to a struct ttm_validate_buffer containing
465 * information about the backup buffer.
466 * @bind: Boolean wether to DMA to the surface.
467 *
468 * Transfer backup data to or from a legacy surface as part of the
469 * validation process.
470 * May return other errors if the kernel is out of guest resources.
471 * The backup buffer will be fenced or idle upon successful completion,
472 * and if the surface needs persistent backup storage, the backup buffer
473 * will also be returned reserved iff @bind is true.
474 */
475static int vmw_legacy_srf_dma(struct vmw_resource *res,
476 struct ttm_validate_buffer *val_buf,
477 bool bind)
478{
479 SVGAGuestPtr ptr;
480 struct vmw_fence_obj *fence;
481 uint32_t submit_size;
482 struct vmw_surface *srf = vmw_res_to_srf(res);
483 uint8_t *cmd;
484 struct vmw_private *dev_priv = res->dev_priv;
485
486 BUG_ON(!val_buf->bo);
487 submit_size = vmw_surface_dma_size(srf);
488 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
489 if (unlikely(!cmd))
490 return -ENOMEM;
491
492 vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
493 vmw_surface_dma_encode(srf, cmd, &ptr, bind);
494
495 vmw_cmd_commit(dev_priv, submit_size);
496
497 /*
498 * Create a fence object and fence the backup buffer.
499 */
500
501 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
502 &fence, NULL);
503
504 vmw_bo_fence_single(val_buf->bo, fence);
505
506 if (likely(fence != NULL))
507 vmw_fence_obj_unreference(&fence);
508
509 return 0;
510}
511
512/**
513 * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
514 * surface validation process.
515 *
516 * @res: Pointer to a struct vmw_res embedded in a struct
517 * vmw_surface.
518 * @val_buf: Pointer to a struct ttm_validate_buffer containing
519 * information about the backup buffer.
520 *
521 * This function will copy backup data to the surface if the
522 * backup buffer is dirty.
523 */
524static int vmw_legacy_srf_bind(struct vmw_resource *res,
525 struct ttm_validate_buffer *val_buf)
526{
527 if (!res->backup_dirty)
528 return 0;
529
530 return vmw_legacy_srf_dma(res, val_buf, true);
531}
532
533
534/**
535 * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
536 * surface eviction process.
537 *
538 * @res: Pointer to a struct vmw_res embedded in a struct
539 * vmw_surface.
540 * @readback: Readback - only true if dirty
541 * @val_buf: Pointer to a struct ttm_validate_buffer containing
542 * information about the backup buffer.
543 *
544 * This function will copy backup data from the surface.
545 */
546static int vmw_legacy_srf_unbind(struct vmw_resource *res,
547 bool readback,
548 struct ttm_validate_buffer *val_buf)
549{
550 if (unlikely(readback))
551 return vmw_legacy_srf_dma(res, val_buf, false);
552 return 0;
553}
554
555/**
556 * vmw_legacy_srf_destroy - Destroy a device surface as part of a
557 * resource eviction process.
558 *
559 * @res: Pointer to a struct vmw_res embedded in a struct
560 * vmw_surface.
561 */
562static int vmw_legacy_srf_destroy(struct vmw_resource *res)
563{
564 struct vmw_private *dev_priv = res->dev_priv;
565 uint32_t submit_size;
566 uint8_t *cmd;
567
568 BUG_ON(res->id == -1);
569
570 /*
571 * Encode the dma- and surface destroy commands.
572 */
573
574 submit_size = vmw_surface_destroy_size();
575 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
576 if (unlikely(!cmd))
577 return -ENOMEM;
578
579 vmw_surface_destroy_encode(res->id, cmd);
580 vmw_cmd_commit(dev_priv, submit_size);
581
582 /*
583 * Surface memory usage accounting.
584 */
585
586 dev_priv->used_memory_size -= res->backup_size;
587
588 /*
589 * Release the surface ID.
590 */
591
592 vmw_resource_release_id(res);
593 vmw_fifo_resource_dec(dev_priv);
594
595 return 0;
596}
597
598
599/**
600 * vmw_surface_init - initialize a struct vmw_surface
601 *
602 * @dev_priv: Pointer to a device private struct.
603 * @srf: Pointer to the struct vmw_surface to initialize.
604 * @res_free: Pointer to a resource destructor used to free
605 * the object.
606 */
607static int vmw_surface_init(struct vmw_private *dev_priv,
608 struct vmw_surface *srf,
609 void (*res_free) (struct vmw_resource *res))
610{
611 int ret;
612 struct vmw_resource *res = &srf->res;
613
614 BUG_ON(!res_free);
615 ret = vmw_resource_init(dev_priv, res, true, res_free,
616 (dev_priv->has_mob) ? &vmw_gb_surface_func :
617 &vmw_legacy_surface_func);
618
619 if (unlikely(ret != 0)) {
620 res_free(res);
621 return ret;
622 }
623
624 /*
625 * The surface won't be visible to hardware until a
626 * surface validate.
627 */
628
629 INIT_LIST_HEAD(&srf->view_list);
630 res->hw_destroy = vmw_hw_surface_destroy;
631 return ret;
632}
633
634/**
635 * vmw_user_surface_base_to_res - TTM base object to resource converter for
636 * user visible surfaces
637 *
638 * @base: Pointer to a TTM base object
639 *
640 * Returns the struct vmw_resource embedded in a struct vmw_surface
641 * for the user-visible object identified by the TTM base object @base.
642 */
643static struct vmw_resource *
644vmw_user_surface_base_to_res(struct ttm_base_object *base)
645{
646 return &(container_of(base, struct vmw_user_surface,
647 prime.base)->srf.res);
648}
649
650/**
651 * vmw_user_surface_free - User visible surface resource destructor
652 *
653 * @res: A struct vmw_resource embedded in a struct vmw_surface.
654 */
655static void vmw_user_surface_free(struct vmw_resource *res)
656{
657 struct vmw_surface *srf = vmw_res_to_srf(res);
658 struct vmw_user_surface *user_srf =
659 container_of(srf, struct vmw_user_surface, srf);
660
661 WARN_ON_ONCE(res->dirty);
662 if (user_srf->master)
663 drm_master_put(&user_srf->master);
664 kfree(srf->offsets);
665 kfree(srf->metadata.sizes);
666 kfree(srf->snooper.image);
667 ttm_prime_object_kfree(user_srf, prime);
668}
669
670/**
671 * vmw_user_surface_base_release - User visible surface TTM base object destructor
672 *
673 * @p_base: Pointer to a pointer to a TTM base object
674 * embedded in a struct vmw_user_surface.
675 *
676 * Drops the base object's reference on its resource, and the
677 * pointer pointed to by *p_base is set to NULL.
678 */
679static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
680{
681 struct ttm_base_object *base = *p_base;
682 struct vmw_user_surface *user_srf =
683 container_of(base, struct vmw_user_surface, prime.base);
684 struct vmw_resource *res = &user_srf->srf.res;
685
686 if (res && res->backup)
687 drm_gem_object_put(&res->backup->base.base);
688
689 *p_base = NULL;
690 vmw_resource_unreference(&res);
691}
692
693/**
694 * vmw_surface_destroy_ioctl - Ioctl function implementing
695 * the user surface destroy functionality.
696 *
697 * @dev: Pointer to a struct drm_device.
698 * @data: Pointer to data copied from / to user-space.
699 * @file_priv: Pointer to a drm file private structure.
700 */
701int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
702 struct drm_file *file_priv)
703{
704 struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
705 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
706
707 return ttm_ref_object_base_unref(tfile, arg->sid);
708}
709
710/**
711 * vmw_surface_define_ioctl - Ioctl function implementing
712 * the user surface define functionality.
713 *
714 * @dev: Pointer to a struct drm_device.
715 * @data: Pointer to data copied from / to user-space.
716 * @file_priv: Pointer to a drm file private structure.
717 */
718int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
719 struct drm_file *file_priv)
720{
721 struct vmw_private *dev_priv = vmw_priv(dev);
722 struct vmw_user_surface *user_srf;
723 struct vmw_surface *srf;
724 struct vmw_surface_metadata *metadata;
725 struct vmw_resource *res;
726 struct vmw_resource *tmp;
727 union drm_vmw_surface_create_arg *arg =
728 (union drm_vmw_surface_create_arg *)data;
729 struct drm_vmw_surface_create_req *req = &arg->req;
730 struct drm_vmw_surface_arg *rep = &arg->rep;
731 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
732 int ret;
733 int i, j;
734 uint32_t cur_bo_offset;
735 struct drm_vmw_size *cur_size;
736 struct vmw_surface_offset *cur_offset;
737 uint32_t num_sizes;
738 const SVGA3dSurfaceDesc *desc;
739
740 num_sizes = 0;
741 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
742 if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
743 return -EINVAL;
744 num_sizes += req->mip_levels[i];
745 }
746
747 if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
748 num_sizes == 0)
749 return -EINVAL;
750
751 desc = vmw_surface_get_desc(req->format);
752 if (unlikely(desc->blockDesc == SVGA3DBLOCKDESC_NONE)) {
753 VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
754 req->format);
755 return -EINVAL;
756 }
757
758 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
759 if (unlikely(!user_srf)) {
760 ret = -ENOMEM;
761 goto out_unlock;
762 }
763
764 srf = &user_srf->srf;
765 metadata = &srf->metadata;
766 res = &srf->res;
767
768 /* Driver internally stores as 64-bit flags */
769 metadata->flags = (SVGA3dSurfaceAllFlags)req->flags;
770 metadata->format = req->format;
771 metadata->scanout = req->scanout;
772
773 memcpy(metadata->mip_levels, req->mip_levels,
774 sizeof(metadata->mip_levels));
775 metadata->num_sizes = num_sizes;
776 metadata->sizes =
777 memdup_user((struct drm_vmw_size __user *)(unsigned long)
778 req->size_addr,
779 sizeof(*metadata->sizes) * metadata->num_sizes);
780 if (IS_ERR(metadata->sizes)) {
781 ret = PTR_ERR(metadata->sizes);
782 goto out_no_sizes;
783 }
784 srf->offsets = kmalloc_array(metadata->num_sizes, sizeof(*srf->offsets),
785 GFP_KERNEL);
786 if (unlikely(!srf->offsets)) {
787 ret = -ENOMEM;
788 goto out_no_offsets;
789 }
790
791 metadata->base_size = *srf->metadata.sizes;
792 metadata->autogen_filter = SVGA3D_TEX_FILTER_NONE;
793 metadata->multisample_count = 0;
794 metadata->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
795 metadata->quality_level = SVGA3D_MS_QUALITY_NONE;
796
797 cur_bo_offset = 0;
798 cur_offset = srf->offsets;
799 cur_size = metadata->sizes;
800
801 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
802 for (j = 0; j < metadata->mip_levels[i]; ++j) {
803 uint32_t stride = vmw_surface_calculate_pitch(
804 desc, cur_size);
805
806 cur_offset->face = i;
807 cur_offset->mip = j;
808 cur_offset->bo_offset = cur_bo_offset;
809 cur_bo_offset += vmw_surface_get_image_buffer_size
810 (desc, cur_size, stride);
811 ++cur_offset;
812 ++cur_size;
813 }
814 }
815 res->backup_size = cur_bo_offset;
816 if (metadata->scanout &&
817 metadata->num_sizes == 1 &&
818 metadata->sizes[0].width == VMW_CURSOR_SNOOP_WIDTH &&
819 metadata->sizes[0].height == VMW_CURSOR_SNOOP_HEIGHT &&
820 metadata->format == VMW_CURSOR_SNOOP_FORMAT) {
821 const struct SVGA3dSurfaceDesc *desc =
822 vmw_surface_get_desc(VMW_CURSOR_SNOOP_FORMAT);
823 const u32 cursor_size_bytes = VMW_CURSOR_SNOOP_WIDTH *
824 VMW_CURSOR_SNOOP_HEIGHT *
825 desc->pitchBytesPerBlock;
826 srf->snooper.image = kzalloc(cursor_size_bytes, GFP_KERNEL);
827 if (!srf->snooper.image) {
828 DRM_ERROR("Failed to allocate cursor_image\n");
829 ret = -ENOMEM;
830 goto out_no_copy;
831 }
832 } else {
833 srf->snooper.image = NULL;
834 }
835
836 user_srf->prime.base.shareable = false;
837 user_srf->prime.base.tfile = NULL;
838 if (drm_is_primary_client(file_priv))
839 user_srf->master = drm_file_get_master(file_priv);
840
841 /**
842 * From this point, the generic resource management functions
843 * destroy the object on failure.
844 */
845
846 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
847 if (unlikely(ret != 0))
848 goto out_unlock;
849
850 /*
851 * A gb-aware client referencing a shared surface will
852 * expect a backup buffer to be present.
853 */
854 if (dev_priv->has_mob && req->shareable) {
855 uint32_t backup_handle;
856
857 ret = vmw_gem_object_create_with_handle(dev_priv,
858 file_priv,
859 res->backup_size,
860 &backup_handle,
861 &res->backup);
862 if (unlikely(ret != 0)) {
863 vmw_resource_unreference(&res);
864 goto out_unlock;
865 }
866 vmw_bo_reference(res->backup);
867 /*
868 * We don't expose the handle to the userspace and surface
869 * already holds a gem reference
870 */
871 drm_gem_handle_delete(file_priv, backup_handle);
872 }
873
874 tmp = vmw_resource_reference(&srf->res);
875 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
876 req->shareable, VMW_RES_SURFACE,
877 &vmw_user_surface_base_release);
878
879 if (unlikely(ret != 0)) {
880 vmw_resource_unreference(&tmp);
881 vmw_resource_unreference(&res);
882 goto out_unlock;
883 }
884
885 rep->sid = user_srf->prime.base.handle;
886 vmw_resource_unreference(&res);
887
888 return 0;
889out_no_copy:
890 kfree(srf->offsets);
891out_no_offsets:
892 kfree(metadata->sizes);
893out_no_sizes:
894 ttm_prime_object_kfree(user_srf, prime);
895out_unlock:
896 return ret;
897}
898
899
900static int
901vmw_surface_handle_reference(struct vmw_private *dev_priv,
902 struct drm_file *file_priv,
903 uint32_t u_handle,
904 enum drm_vmw_handle_type handle_type,
905 struct ttm_base_object **base_p)
906{
907 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
908 struct vmw_user_surface *user_srf;
909 uint32_t handle;
910 struct ttm_base_object *base;
911 int ret;
912
913 if (handle_type == DRM_VMW_HANDLE_PRIME) {
914 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
915 if (unlikely(ret != 0))
916 return ret;
917 } else {
918 handle = u_handle;
919 }
920
921 ret = -EINVAL;
922 base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
923 if (unlikely(!base)) {
924 VMW_DEBUG_USER("Could not find surface to reference.\n");
925 goto out_no_lookup;
926 }
927
928 if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
929 VMW_DEBUG_USER("Referenced object is not a surface.\n");
930 goto out_bad_resource;
931 }
932 if (handle_type != DRM_VMW_HANDLE_PRIME) {
933 bool require_exist = false;
934
935 user_srf = container_of(base, struct vmw_user_surface,
936 prime.base);
937
938 /* Error out if we are unauthenticated primary */
939 if (drm_is_primary_client(file_priv) &&
940 !file_priv->authenticated) {
941 ret = -EACCES;
942 goto out_bad_resource;
943 }
944
945 /*
946 * Make sure the surface creator has the same
947 * authenticating master, or is already registered with us.
948 */
949 if (drm_is_primary_client(file_priv) &&
950 user_srf->master != file_priv->master)
951 require_exist = true;
952
953 if (unlikely(drm_is_render_client(file_priv)))
954 require_exist = true;
955
956 ret = ttm_ref_object_add(tfile, base, NULL, require_exist);
957 if (unlikely(ret != 0)) {
958 DRM_ERROR("Could not add a reference to a surface.\n");
959 goto out_bad_resource;
960 }
961 }
962
963 *base_p = base;
964 return 0;
965
966out_bad_resource:
967 ttm_base_object_unref(&base);
968out_no_lookup:
969 if (handle_type == DRM_VMW_HANDLE_PRIME)
970 (void) ttm_ref_object_base_unref(tfile, handle);
971
972 return ret;
973}
974
975/**
976 * vmw_surface_reference_ioctl - Ioctl function implementing
977 * the user surface reference functionality.
978 *
979 * @dev: Pointer to a struct drm_device.
980 * @data: Pointer to data copied from / to user-space.
981 * @file_priv: Pointer to a drm file private structure.
982 */
983int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
984 struct drm_file *file_priv)
985{
986 struct vmw_private *dev_priv = vmw_priv(dev);
987 union drm_vmw_surface_reference_arg *arg =
988 (union drm_vmw_surface_reference_arg *)data;
989 struct drm_vmw_surface_arg *req = &arg->req;
990 struct drm_vmw_surface_create_req *rep = &arg->rep;
991 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
992 struct vmw_surface *srf;
993 struct vmw_user_surface *user_srf;
994 struct drm_vmw_size __user *user_sizes;
995 struct ttm_base_object *base;
996 int ret;
997
998 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
999 req->handle_type, &base);
1000 if (unlikely(ret != 0))
1001 return ret;
1002
1003 user_srf = container_of(base, struct vmw_user_surface, prime.base);
1004 srf = &user_srf->srf;
1005
1006 /* Downcast of flags when sending back to user space */
1007 rep->flags = (uint32_t)srf->metadata.flags;
1008 rep->format = srf->metadata.format;
1009 memcpy(rep->mip_levels, srf->metadata.mip_levels,
1010 sizeof(srf->metadata.mip_levels));
1011 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1012 rep->size_addr;
1013
1014 if (user_sizes)
1015 ret = copy_to_user(user_sizes, &srf->metadata.base_size,
1016 sizeof(srf->metadata.base_size));
1017 if (unlikely(ret != 0)) {
1018 VMW_DEBUG_USER("copy_to_user failed %p %u\n", user_sizes,
1019 srf->metadata.num_sizes);
1020 ttm_ref_object_base_unref(tfile, base->handle);
1021 ret = -EFAULT;
1022 }
1023
1024 ttm_base_object_unref(&base);
1025
1026 return ret;
1027}
1028
1029/**
1030 * vmw_gb_surface_create - Encode a surface_define command.
1031 *
1032 * @res: Pointer to a struct vmw_resource embedded in a struct
1033 * vmw_surface.
1034 */
1035static int vmw_gb_surface_create(struct vmw_resource *res)
1036{
1037 struct vmw_private *dev_priv = res->dev_priv;
1038 struct vmw_surface *srf = vmw_res_to_srf(res);
1039 struct vmw_surface_metadata *metadata = &srf->metadata;
1040 uint32_t cmd_len, cmd_id, submit_len;
1041 int ret;
1042 struct {
1043 SVGA3dCmdHeader header;
1044 SVGA3dCmdDefineGBSurface body;
1045 } *cmd;
1046 struct {
1047 SVGA3dCmdHeader header;
1048 SVGA3dCmdDefineGBSurface_v2 body;
1049 } *cmd2;
1050 struct {
1051 SVGA3dCmdHeader header;
1052 SVGA3dCmdDefineGBSurface_v3 body;
1053 } *cmd3;
1054 struct {
1055 SVGA3dCmdHeader header;
1056 SVGA3dCmdDefineGBSurface_v4 body;
1057 } *cmd4;
1058
1059 if (likely(res->id != -1))
1060 return 0;
1061
1062 vmw_fifo_resource_inc(dev_priv);
1063 ret = vmw_resource_alloc_id(res);
1064 if (unlikely(ret != 0)) {
1065 DRM_ERROR("Failed to allocate a surface id.\n");
1066 goto out_no_id;
1067 }
1068
1069 if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
1070 ret = -EBUSY;
1071 goto out_no_fifo;
1072 }
1073
1074 if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1075 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V4;
1076 cmd_len = sizeof(cmd4->body);
1077 submit_len = sizeof(*cmd4);
1078 } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1079 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1080 cmd_len = sizeof(cmd3->body);
1081 submit_len = sizeof(*cmd3);
1082 } else if (metadata->array_size > 0) {
1083 /* VMW_SM_4 support verified at creation time. */
1084 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1085 cmd_len = sizeof(cmd2->body);
1086 submit_len = sizeof(*cmd2);
1087 } else {
1088 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
1089 cmd_len = sizeof(cmd->body);
1090 submit_len = sizeof(*cmd);
1091 }
1092
1093 cmd = VMW_CMD_RESERVE(dev_priv, submit_len);
1094 cmd2 = (typeof(cmd2))cmd;
1095 cmd3 = (typeof(cmd3))cmd;
1096 cmd4 = (typeof(cmd4))cmd;
1097 if (unlikely(!cmd)) {
1098 ret = -ENOMEM;
1099 goto out_no_fifo;
1100 }
1101
1102 if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1103 cmd4->header.id = cmd_id;
1104 cmd4->header.size = cmd_len;
1105 cmd4->body.sid = srf->res.id;
1106 cmd4->body.surfaceFlags = metadata->flags;
1107 cmd4->body.format = metadata->format;
1108 cmd4->body.numMipLevels = metadata->mip_levels[0];
1109 cmd4->body.multisampleCount = metadata->multisample_count;
1110 cmd4->body.multisamplePattern = metadata->multisample_pattern;
1111 cmd4->body.qualityLevel = metadata->quality_level;
1112 cmd4->body.autogenFilter = metadata->autogen_filter;
1113 cmd4->body.size.width = metadata->base_size.width;
1114 cmd4->body.size.height = metadata->base_size.height;
1115 cmd4->body.size.depth = metadata->base_size.depth;
1116 cmd4->body.arraySize = metadata->array_size;
1117 cmd4->body.bufferByteStride = metadata->buffer_byte_stride;
1118 } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1119 cmd3->header.id = cmd_id;
1120 cmd3->header.size = cmd_len;
1121 cmd3->body.sid = srf->res.id;
1122 cmd3->body.surfaceFlags = metadata->flags;
1123 cmd3->body.format = metadata->format;
1124 cmd3->body.numMipLevels = metadata->mip_levels[0];
1125 cmd3->body.multisampleCount = metadata->multisample_count;
1126 cmd3->body.multisamplePattern = metadata->multisample_pattern;
1127 cmd3->body.qualityLevel = metadata->quality_level;
1128 cmd3->body.autogenFilter = metadata->autogen_filter;
1129 cmd3->body.size.width = metadata->base_size.width;
1130 cmd3->body.size.height = metadata->base_size.height;
1131 cmd3->body.size.depth = metadata->base_size.depth;
1132 cmd3->body.arraySize = metadata->array_size;
1133 } else if (metadata->array_size > 0) {
1134 cmd2->header.id = cmd_id;
1135 cmd2->header.size = cmd_len;
1136 cmd2->body.sid = srf->res.id;
1137 cmd2->body.surfaceFlags = metadata->flags;
1138 cmd2->body.format = metadata->format;
1139 cmd2->body.numMipLevels = metadata->mip_levels[0];
1140 cmd2->body.multisampleCount = metadata->multisample_count;
1141 cmd2->body.autogenFilter = metadata->autogen_filter;
1142 cmd2->body.size.width = metadata->base_size.width;
1143 cmd2->body.size.height = metadata->base_size.height;
1144 cmd2->body.size.depth = metadata->base_size.depth;
1145 cmd2->body.arraySize = metadata->array_size;
1146 } else {
1147 cmd->header.id = cmd_id;
1148 cmd->header.size = cmd_len;
1149 cmd->body.sid = srf->res.id;
1150 cmd->body.surfaceFlags = metadata->flags;
1151 cmd->body.format = metadata->format;
1152 cmd->body.numMipLevels = metadata->mip_levels[0];
1153 cmd->body.multisampleCount = metadata->multisample_count;
1154 cmd->body.autogenFilter = metadata->autogen_filter;
1155 cmd->body.size.width = metadata->base_size.width;
1156 cmd->body.size.height = metadata->base_size.height;
1157 cmd->body.size.depth = metadata->base_size.depth;
1158 }
1159
1160 vmw_cmd_commit(dev_priv, submit_len);
1161
1162 return 0;
1163
1164out_no_fifo:
1165 vmw_resource_release_id(res);
1166out_no_id:
1167 vmw_fifo_resource_dec(dev_priv);
1168 return ret;
1169}
1170
1171
1172static int vmw_gb_surface_bind(struct vmw_resource *res,
1173 struct ttm_validate_buffer *val_buf)
1174{
1175 struct vmw_private *dev_priv = res->dev_priv;
1176 struct {
1177 SVGA3dCmdHeader header;
1178 SVGA3dCmdBindGBSurface body;
1179 } *cmd1;
1180 struct {
1181 SVGA3dCmdHeader header;
1182 SVGA3dCmdUpdateGBSurface body;
1183 } *cmd2;
1184 uint32_t submit_size;
1185 struct ttm_buffer_object *bo = val_buf->bo;
1186
1187 BUG_ON(bo->resource->mem_type != VMW_PL_MOB);
1188
1189 submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
1190
1191 cmd1 = VMW_CMD_RESERVE(dev_priv, submit_size);
1192 if (unlikely(!cmd1))
1193 return -ENOMEM;
1194
1195 cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1196 cmd1->header.size = sizeof(cmd1->body);
1197 cmd1->body.sid = res->id;
1198 cmd1->body.mobid = bo->resource->start;
1199 if (res->backup_dirty) {
1200 cmd2 = (void *) &cmd1[1];
1201 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1202 cmd2->header.size = sizeof(cmd2->body);
1203 cmd2->body.sid = res->id;
1204 }
1205 vmw_cmd_commit(dev_priv, submit_size);
1206
1207 if (res->backup->dirty && res->backup_dirty) {
1208 /* We've just made a full upload. Cear dirty regions. */
1209 vmw_bo_dirty_clear_res(res);
1210 }
1211
1212 res->backup_dirty = false;
1213
1214 return 0;
1215}
1216
1217static int vmw_gb_surface_unbind(struct vmw_resource *res,
1218 bool readback,
1219 struct ttm_validate_buffer *val_buf)
1220{
1221 struct vmw_private *dev_priv = res->dev_priv;
1222 struct ttm_buffer_object *bo = val_buf->bo;
1223 struct vmw_fence_obj *fence;
1224
1225 struct {
1226 SVGA3dCmdHeader header;
1227 SVGA3dCmdReadbackGBSurface body;
1228 } *cmd1;
1229 struct {
1230 SVGA3dCmdHeader header;
1231 SVGA3dCmdInvalidateGBSurface body;
1232 } *cmd2;
1233 struct {
1234 SVGA3dCmdHeader header;
1235 SVGA3dCmdBindGBSurface body;
1236 } *cmd3;
1237 uint32_t submit_size;
1238 uint8_t *cmd;
1239
1240
1241 BUG_ON(bo->resource->mem_type != VMW_PL_MOB);
1242
1243 submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
1244 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
1245 if (unlikely(!cmd))
1246 return -ENOMEM;
1247
1248 if (readback) {
1249 cmd1 = (void *) cmd;
1250 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1251 cmd1->header.size = sizeof(cmd1->body);
1252 cmd1->body.sid = res->id;
1253 cmd3 = (void *) &cmd1[1];
1254 } else {
1255 cmd2 = (void *) cmd;
1256 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1257 cmd2->header.size = sizeof(cmd2->body);
1258 cmd2->body.sid = res->id;
1259 cmd3 = (void *) &cmd2[1];
1260 }
1261
1262 cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1263 cmd3->header.size = sizeof(cmd3->body);
1264 cmd3->body.sid = res->id;
1265 cmd3->body.mobid = SVGA3D_INVALID_ID;
1266
1267 vmw_cmd_commit(dev_priv, submit_size);
1268
1269 /*
1270 * Create a fence object and fence the backup buffer.
1271 */
1272
1273 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
1274 &fence, NULL);
1275
1276 vmw_bo_fence_single(val_buf->bo, fence);
1277
1278 if (likely(fence != NULL))
1279 vmw_fence_obj_unreference(&fence);
1280
1281 return 0;
1282}
1283
1284static int vmw_gb_surface_destroy(struct vmw_resource *res)
1285{
1286 struct vmw_private *dev_priv = res->dev_priv;
1287 struct vmw_surface *srf = vmw_res_to_srf(res);
1288 struct {
1289 SVGA3dCmdHeader header;
1290 SVGA3dCmdDestroyGBSurface body;
1291 } *cmd;
1292
1293 if (likely(res->id == -1))
1294 return 0;
1295
1296 mutex_lock(&dev_priv->binding_mutex);
1297 vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1298 vmw_binding_res_list_scrub(&res->binding_head);
1299
1300 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
1301 if (unlikely(!cmd)) {
1302 mutex_unlock(&dev_priv->binding_mutex);
1303 return -ENOMEM;
1304 }
1305
1306 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
1307 cmd->header.size = sizeof(cmd->body);
1308 cmd->body.sid = res->id;
1309 vmw_cmd_commit(dev_priv, sizeof(*cmd));
1310 mutex_unlock(&dev_priv->binding_mutex);
1311 vmw_resource_release_id(res);
1312 vmw_fifo_resource_dec(dev_priv);
1313
1314 return 0;
1315}
1316
1317/**
1318 * vmw_gb_surface_define_ioctl - Ioctl function implementing
1319 * the user surface define functionality.
1320 *
1321 * @dev: Pointer to a struct drm_device.
1322 * @data: Pointer to data copied from / to user-space.
1323 * @file_priv: Pointer to a drm file private structure.
1324 */
1325int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1326 struct drm_file *file_priv)
1327{
1328 union drm_vmw_gb_surface_create_arg *arg =
1329 (union drm_vmw_gb_surface_create_arg *)data;
1330 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1331 struct drm_vmw_gb_surface_create_ext_req req_ext;
1332
1333 req_ext.base = arg->req;
1334 req_ext.version = drm_vmw_gb_surface_v1;
1335 req_ext.svga3d_flags_upper_32_bits = 0;
1336 req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1337 req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
1338 req_ext.buffer_byte_stride = 0;
1339 req_ext.must_be_zero = 0;
1340
1341 return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
1342}
1343
1344/**
1345 * vmw_gb_surface_reference_ioctl - Ioctl function implementing
1346 * the user surface reference functionality.
1347 *
1348 * @dev: Pointer to a struct drm_device.
1349 * @data: Pointer to data copied from / to user-space.
1350 * @file_priv: Pointer to a drm file private structure.
1351 */
1352int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1353 struct drm_file *file_priv)
1354{
1355 union drm_vmw_gb_surface_reference_arg *arg =
1356 (union drm_vmw_gb_surface_reference_arg *)data;
1357 struct drm_vmw_surface_arg *req = &arg->req;
1358 struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
1359 struct drm_vmw_gb_surface_ref_ext_rep rep_ext;
1360 int ret;
1361
1362 ret = vmw_gb_surface_reference_internal(dev, req, &rep_ext, file_priv);
1363
1364 if (unlikely(ret != 0))
1365 return ret;
1366
1367 rep->creq = rep_ext.creq.base;
1368 rep->crep = rep_ext.crep;
1369
1370 return ret;
1371}
1372
1373/**
1374 * vmw_gb_surface_define_ext_ioctl - Ioctl function implementing
1375 * the user surface define functionality.
1376 *
1377 * @dev: Pointer to a struct drm_device.
1378 * @data: Pointer to data copied from / to user-space.
1379 * @file_priv: Pointer to a drm file private structure.
1380 */
1381int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, void *data,
1382 struct drm_file *file_priv)
1383{
1384 union drm_vmw_gb_surface_create_ext_arg *arg =
1385 (union drm_vmw_gb_surface_create_ext_arg *)data;
1386 struct drm_vmw_gb_surface_create_ext_req *req = &arg->req;
1387 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1388
1389 return vmw_gb_surface_define_internal(dev, req, rep, file_priv);
1390}
1391
1392/**
1393 * vmw_gb_surface_reference_ext_ioctl - Ioctl function implementing
1394 * the user surface reference functionality.
1395 *
1396 * @dev: Pointer to a struct drm_device.
1397 * @data: Pointer to data copied from / to user-space.
1398 * @file_priv: Pointer to a drm file private structure.
1399 */
1400int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, void *data,
1401 struct drm_file *file_priv)
1402{
1403 union drm_vmw_gb_surface_reference_ext_arg *arg =
1404 (union drm_vmw_gb_surface_reference_ext_arg *)data;
1405 struct drm_vmw_surface_arg *req = &arg->req;
1406 struct drm_vmw_gb_surface_ref_ext_rep *rep = &arg->rep;
1407
1408 return vmw_gb_surface_reference_internal(dev, req, rep, file_priv);
1409}
1410
1411/**
1412 * vmw_gb_surface_define_internal - Ioctl function implementing
1413 * the user surface define functionality.
1414 *
1415 * @dev: Pointer to a struct drm_device.
1416 * @req: Request argument from user-space.
1417 * @rep: Response argument to user-space.
1418 * @file_priv: Pointer to a drm file private structure.
1419 */
1420static int
1421vmw_gb_surface_define_internal(struct drm_device *dev,
1422 struct drm_vmw_gb_surface_create_ext_req *req,
1423 struct drm_vmw_gb_surface_create_rep *rep,
1424 struct drm_file *file_priv)
1425{
1426 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1427 struct vmw_private *dev_priv = vmw_priv(dev);
1428 struct vmw_user_surface *user_srf;
1429 struct vmw_surface_metadata metadata = {0};
1430 struct vmw_surface *srf;
1431 struct vmw_resource *res;
1432 struct vmw_resource *tmp;
1433 int ret = 0;
1434 uint32_t backup_handle = 0;
1435 SVGA3dSurfaceAllFlags svga3d_flags_64 =
1436 SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
1437 req->base.svga3d_flags);
1438
1439 /* array_size must be null for non-GL3 host. */
1440 if (req->base.array_size > 0 && !has_sm4_context(dev_priv)) {
1441 VMW_DEBUG_USER("SM4 surface not supported.\n");
1442 return -EINVAL;
1443 }
1444
1445 if (!has_sm4_1_context(dev_priv)) {
1446 if (req->svga3d_flags_upper_32_bits != 0)
1447 ret = -EINVAL;
1448
1449 if (req->base.multisample_count != 0)
1450 ret = -EINVAL;
1451
1452 if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
1453 ret = -EINVAL;
1454
1455 if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
1456 ret = -EINVAL;
1457
1458 if (ret) {
1459 VMW_DEBUG_USER("SM4.1 surface not supported.\n");
1460 return ret;
1461 }
1462 }
1463
1464 if (req->buffer_byte_stride > 0 && !has_sm5_context(dev_priv)) {
1465 VMW_DEBUG_USER("SM5 surface not supported.\n");
1466 return -EINVAL;
1467 }
1468
1469 if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1470 req->base.multisample_count == 0) {
1471 VMW_DEBUG_USER("Invalid sample count.\n");
1472 return -EINVAL;
1473 }
1474
1475 if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS) {
1476 VMW_DEBUG_USER("Invalid mip level.\n");
1477 return -EINVAL;
1478 }
1479
1480 metadata.flags = svga3d_flags_64;
1481 metadata.format = req->base.format;
1482 metadata.mip_levels[0] = req->base.mip_levels;
1483 metadata.multisample_count = req->base.multisample_count;
1484 metadata.multisample_pattern = req->multisample_pattern;
1485 metadata.quality_level = req->quality_level;
1486 metadata.array_size = req->base.array_size;
1487 metadata.buffer_byte_stride = req->buffer_byte_stride;
1488 metadata.num_sizes = 1;
1489 metadata.base_size = req->base.base_size;
1490 metadata.scanout = req->base.drm_surface_flags &
1491 drm_vmw_surface_flag_scanout;
1492
1493 /* Define a surface based on the parameters. */
1494 ret = vmw_gb_surface_define(dev_priv, &metadata, &srf);
1495 if (ret != 0) {
1496 VMW_DEBUG_USER("Failed to define surface.\n");
1497 return ret;
1498 }
1499
1500 user_srf = container_of(srf, struct vmw_user_surface, srf);
1501 if (drm_is_primary_client(file_priv))
1502 user_srf->master = drm_file_get_master(file_priv);
1503
1504 res = &user_srf->srf.res;
1505
1506 if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
1507 ret = vmw_user_bo_lookup(file_priv, req->base.buffer_handle,
1508 &res->backup);
1509 if (ret == 0) {
1510 if (res->backup->base.base.size < res->backup_size) {
1511 VMW_DEBUG_USER("Surface backup buffer too small.\n");
1512 vmw_bo_unreference(&res->backup);
1513 ret = -EINVAL;
1514 goto out_unlock;
1515 } else {
1516 backup_handle = req->base.buffer_handle;
1517 }
1518 }
1519 } else if (req->base.drm_surface_flags &
1520 (drm_vmw_surface_flag_create_buffer |
1521 drm_vmw_surface_flag_coherent)) {
1522 ret = vmw_gem_object_create_with_handle(dev_priv, file_priv,
1523 res->backup_size,
1524 &backup_handle,
1525 &res->backup);
1526 if (ret == 0)
1527 vmw_bo_reference(res->backup);
1528 }
1529
1530 if (unlikely(ret != 0)) {
1531 vmw_resource_unreference(&res);
1532 goto out_unlock;
1533 }
1534
1535 if (req->base.drm_surface_flags & drm_vmw_surface_flag_coherent) {
1536 struct vmw_buffer_object *backup = res->backup;
1537
1538 ttm_bo_reserve(&backup->base, false, false, NULL);
1539 if (!res->func->dirty_alloc)
1540 ret = -EINVAL;
1541 if (!ret)
1542 ret = vmw_bo_dirty_add(backup);
1543 if (!ret) {
1544 res->coherent = true;
1545 ret = res->func->dirty_alloc(res);
1546 }
1547 ttm_bo_unreserve(&backup->base);
1548 if (ret) {
1549 vmw_resource_unreference(&res);
1550 goto out_unlock;
1551 }
1552
1553 }
1554
1555 tmp = vmw_resource_reference(res);
1556 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
1557 req->base.drm_surface_flags &
1558 drm_vmw_surface_flag_shareable,
1559 VMW_RES_SURFACE,
1560 &vmw_user_surface_base_release);
1561
1562 if (unlikely(ret != 0)) {
1563 vmw_resource_unreference(&tmp);
1564 vmw_resource_unreference(&res);
1565 goto out_unlock;
1566 }
1567
1568 rep->handle = user_srf->prime.base.handle;
1569 rep->backup_size = res->backup_size;
1570 if (res->backup) {
1571 rep->buffer_map_handle =
1572 drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
1573 rep->buffer_size = res->backup->base.base.size;
1574 rep->buffer_handle = backup_handle;
1575 } else {
1576 rep->buffer_map_handle = 0;
1577 rep->buffer_size = 0;
1578 rep->buffer_handle = SVGA3D_INVALID_ID;
1579 }
1580 vmw_resource_unreference(&res);
1581
1582out_unlock:
1583 return ret;
1584}
1585
1586/**
1587 * vmw_gb_surface_reference_internal - Ioctl function implementing
1588 * the user surface reference functionality.
1589 *
1590 * @dev: Pointer to a struct drm_device.
1591 * @req: Pointer to user-space request surface arg.
1592 * @rep: Pointer to response to user-space.
1593 * @file_priv: Pointer to a drm file private structure.
1594 */
1595static int
1596vmw_gb_surface_reference_internal(struct drm_device *dev,
1597 struct drm_vmw_surface_arg *req,
1598 struct drm_vmw_gb_surface_ref_ext_rep *rep,
1599 struct drm_file *file_priv)
1600{
1601 struct vmw_private *dev_priv = vmw_priv(dev);
1602 struct vmw_surface *srf;
1603 struct vmw_user_surface *user_srf;
1604 struct vmw_surface_metadata *metadata;
1605 struct ttm_base_object *base;
1606 u32 backup_handle;
1607 int ret;
1608
1609 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1610 req->handle_type, &base);
1611 if (unlikely(ret != 0))
1612 return ret;
1613
1614 user_srf = container_of(base, struct vmw_user_surface, prime.base);
1615 srf = &user_srf->srf;
1616 if (!srf->res.backup) {
1617 DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1618 goto out_bad_resource;
1619 }
1620 metadata = &srf->metadata;
1621
1622 mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1623 ret = drm_gem_handle_create(file_priv, &srf->res.backup->base.base,
1624 &backup_handle);
1625 mutex_unlock(&dev_priv->cmdbuf_mutex);
1626 if (ret != 0) {
1627 drm_err(dev, "Wasn't able to create a backing handle for surface sid = %u.\n",
1628 req->sid);
1629 goto out_bad_resource;
1630 }
1631
1632 rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(metadata->flags);
1633 rep->creq.base.format = metadata->format;
1634 rep->creq.base.mip_levels = metadata->mip_levels[0];
1635 rep->creq.base.drm_surface_flags = 0;
1636 rep->creq.base.multisample_count = metadata->multisample_count;
1637 rep->creq.base.autogen_filter = metadata->autogen_filter;
1638 rep->creq.base.array_size = metadata->array_size;
1639 rep->creq.base.buffer_handle = backup_handle;
1640 rep->creq.base.base_size = metadata->base_size;
1641 rep->crep.handle = user_srf->prime.base.handle;
1642 rep->crep.backup_size = srf->res.backup_size;
1643 rep->crep.buffer_handle = backup_handle;
1644 rep->crep.buffer_map_handle =
1645 drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1646 rep->crep.buffer_size = srf->res.backup->base.base.size;
1647
1648 rep->creq.version = drm_vmw_gb_surface_v1;
1649 rep->creq.svga3d_flags_upper_32_bits =
1650 SVGA3D_FLAGS_UPPER_32(metadata->flags);
1651 rep->creq.multisample_pattern = metadata->multisample_pattern;
1652 rep->creq.quality_level = metadata->quality_level;
1653 rep->creq.must_be_zero = 0;
1654
1655out_bad_resource:
1656 ttm_base_object_unref(&base);
1657
1658 return ret;
1659}
1660
1661/**
1662 * vmw_subres_dirty_add - Add a dirty region to a subresource
1663 * @dirty: The surfaces's dirty tracker.
1664 * @loc_start: The location corresponding to the start of the region.
1665 * @loc_end: The location corresponding to the end of the region.
1666 *
1667 * As we are assuming that @loc_start and @loc_end represent a sequential
1668 * range of backing store memory, if the region spans multiple lines then
1669 * regardless of the x coordinate, the full lines are dirtied.
1670 * Correspondingly if the region spans multiple z slices, then full rather
1671 * than partial z slices are dirtied.
1672 */
1673static void vmw_subres_dirty_add(struct vmw_surface_dirty *dirty,
1674 const struct vmw_surface_loc *loc_start,
1675 const struct vmw_surface_loc *loc_end)
1676{
1677 const struct vmw_surface_cache *cache = &dirty->cache;
1678 SVGA3dBox *box = &dirty->boxes[loc_start->sub_resource];
1679 u32 mip = loc_start->sub_resource % cache->num_mip_levels;
1680 const struct drm_vmw_size *size = &cache->mip[mip].size;
1681 u32 box_c2 = box->z + box->d;
1682
1683 if (WARN_ON(loc_start->sub_resource >= dirty->num_subres))
1684 return;
1685
1686 if (box->d == 0 || box->z > loc_start->z)
1687 box->z = loc_start->z;
1688 if (box_c2 < loc_end->z)
1689 box->d = loc_end->z - box->z;
1690
1691 if (loc_start->z + 1 == loc_end->z) {
1692 box_c2 = box->y + box->h;
1693 if (box->h == 0 || box->y > loc_start->y)
1694 box->y = loc_start->y;
1695 if (box_c2 < loc_end->y)
1696 box->h = loc_end->y - box->y;
1697
1698 if (loc_start->y + 1 == loc_end->y) {
1699 box_c2 = box->x + box->w;
1700 if (box->w == 0 || box->x > loc_start->x)
1701 box->x = loc_start->x;
1702 if (box_c2 < loc_end->x)
1703 box->w = loc_end->x - box->x;
1704 } else {
1705 box->x = 0;
1706 box->w = size->width;
1707 }
1708 } else {
1709 box->y = 0;
1710 box->h = size->height;
1711 box->x = 0;
1712 box->w = size->width;
1713 }
1714}
1715
1716/**
1717 * vmw_subres_dirty_full - Mark a full subresource as dirty
1718 * @dirty: The surface's dirty tracker.
1719 * @subres: The subresource
1720 */
1721static void vmw_subres_dirty_full(struct vmw_surface_dirty *dirty, u32 subres)
1722{
1723 const struct vmw_surface_cache *cache = &dirty->cache;
1724 u32 mip = subres % cache->num_mip_levels;
1725 const struct drm_vmw_size *size = &cache->mip[mip].size;
1726 SVGA3dBox *box = &dirty->boxes[subres];
1727
1728 box->x = 0;
1729 box->y = 0;
1730 box->z = 0;
1731 box->w = size->width;
1732 box->h = size->height;
1733 box->d = size->depth;
1734}
1735
1736/*
1737 * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for texture
1738 * surfaces.
1739 */
1740static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
1741 size_t start, size_t end)
1742{
1743 struct vmw_surface_dirty *dirty =
1744 (struct vmw_surface_dirty *) res->dirty;
1745 size_t backup_end = res->backup_offset + res->backup_size;
1746 struct vmw_surface_loc loc1, loc2;
1747 const struct vmw_surface_cache *cache;
1748
1749 start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1750 end = min(end, backup_end) - res->backup_offset;
1751 cache = &dirty->cache;
1752 vmw_surface_get_loc(cache, &loc1, start);
1753 vmw_surface_get_loc(cache, &loc2, end - 1);
1754 vmw_surface_inc_loc(cache, &loc2);
1755
1756 if (loc1.sheet != loc2.sheet) {
1757 u32 sub_res;
1758
1759 /*
1760 * Multiple multisample sheets. To do this in an optimized
1761 * fashion, compute the dirty region for each sheet and the
1762 * resulting union. Since this is not a common case, just dirty
1763 * the whole surface.
1764 */
1765 for (sub_res = 0; sub_res < dirty->num_subres; ++sub_res)
1766 vmw_subres_dirty_full(dirty, sub_res);
1767 return;
1768 }
1769 if (loc1.sub_resource + 1 == loc2.sub_resource) {
1770 /* Dirty range covers a single sub-resource */
1771 vmw_subres_dirty_add(dirty, &loc1, &loc2);
1772 } else {
1773 /* Dirty range covers multiple sub-resources */
1774 struct vmw_surface_loc loc_min, loc_max;
1775 u32 sub_res;
1776
1777 vmw_surface_max_loc(cache, loc1.sub_resource, &loc_max);
1778 vmw_subres_dirty_add(dirty, &loc1, &loc_max);
1779 vmw_surface_min_loc(cache, loc2.sub_resource - 1, &loc_min);
1780 vmw_subres_dirty_add(dirty, &loc_min, &loc2);
1781 for (sub_res = loc1.sub_resource + 1;
1782 sub_res < loc2.sub_resource - 1; ++sub_res)
1783 vmw_subres_dirty_full(dirty, sub_res);
1784 }
1785}
1786
1787/*
1788 * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for buffer
1789 * surfaces.
1790 */
1791static void vmw_surface_buf_dirty_range_add(struct vmw_resource *res,
1792 size_t start, size_t end)
1793{
1794 struct vmw_surface_dirty *dirty =
1795 (struct vmw_surface_dirty *) res->dirty;
1796 const struct vmw_surface_cache *cache = &dirty->cache;
1797 size_t backup_end = res->backup_offset + cache->mip_chain_bytes;
1798 SVGA3dBox *box = &dirty->boxes[0];
1799 u32 box_c2;
1800
1801 box->h = box->d = 1;
1802 start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1803 end = min(end, backup_end) - res->backup_offset;
1804 box_c2 = box->x + box->w;
1805 if (box->w == 0 || box->x > start)
1806 box->x = start;
1807 if (box_c2 < end)
1808 box->w = end - box->x;
1809}
1810
1811/*
1812 * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for surfaces
1813 */
1814static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
1815 size_t end)
1816{
1817 struct vmw_surface *srf = vmw_res_to_srf(res);
1818
1819 if (WARN_ON(end <= res->backup_offset ||
1820 start >= res->backup_offset + res->backup_size))
1821 return;
1822
1823 if (srf->metadata.format == SVGA3D_BUFFER)
1824 vmw_surface_buf_dirty_range_add(res, start, end);
1825 else
1826 vmw_surface_tex_dirty_range_add(res, start, end);
1827}
1828
1829/*
1830 * vmw_surface_dirty_sync - The surface's dirty_sync callback.
1831 */
1832static int vmw_surface_dirty_sync(struct vmw_resource *res)
1833{
1834 struct vmw_private *dev_priv = res->dev_priv;
1835 u32 i, num_dirty;
1836 struct vmw_surface_dirty *dirty =
1837 (struct vmw_surface_dirty *) res->dirty;
1838 size_t alloc_size;
1839 const struct vmw_surface_cache *cache = &dirty->cache;
1840 struct {
1841 SVGA3dCmdHeader header;
1842 SVGA3dCmdDXUpdateSubResource body;
1843 } *cmd1;
1844 struct {
1845 SVGA3dCmdHeader header;
1846 SVGA3dCmdUpdateGBImage body;
1847 } *cmd2;
1848 void *cmd;
1849
1850 num_dirty = 0;
1851 for (i = 0; i < dirty->num_subres; ++i) {
1852 const SVGA3dBox *box = &dirty->boxes[i];
1853
1854 if (box->d)
1855 num_dirty++;
1856 }
1857
1858 if (!num_dirty)
1859 goto out;
1860
1861 alloc_size = num_dirty * ((has_sm4_context(dev_priv)) ? sizeof(*cmd1) : sizeof(*cmd2));
1862 cmd = VMW_CMD_RESERVE(dev_priv, alloc_size);
1863 if (!cmd)
1864 return -ENOMEM;
1865
1866 cmd1 = cmd;
1867 cmd2 = cmd;
1868
1869 for (i = 0; i < dirty->num_subres; ++i) {
1870 const SVGA3dBox *box = &dirty->boxes[i];
1871
1872 if (!box->d)
1873 continue;
1874
1875 /*
1876 * DX_UPDATE_SUBRESOURCE is aware of array surfaces.
1877 * UPDATE_GB_IMAGE is not.
1878 */
1879 if (has_sm4_context(dev_priv)) {
1880 cmd1->header.id = SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE;
1881 cmd1->header.size = sizeof(cmd1->body);
1882 cmd1->body.sid = res->id;
1883 cmd1->body.subResource = i;
1884 cmd1->body.box = *box;
1885 cmd1++;
1886 } else {
1887 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1888 cmd2->header.size = sizeof(cmd2->body);
1889 cmd2->body.image.sid = res->id;
1890 cmd2->body.image.face = i / cache->num_mip_levels;
1891 cmd2->body.image.mipmap = i -
1892 (cache->num_mip_levels * cmd2->body.image.face);
1893 cmd2->body.box = *box;
1894 cmd2++;
1895 }
1896
1897 }
1898 vmw_cmd_commit(dev_priv, alloc_size);
1899 out:
1900 memset(&dirty->boxes[0], 0, sizeof(dirty->boxes[0]) *
1901 dirty->num_subres);
1902
1903 return 0;
1904}
1905
1906/*
1907 * vmw_surface_dirty_alloc - The surface's dirty_alloc callback.
1908 */
1909static int vmw_surface_dirty_alloc(struct vmw_resource *res)
1910{
1911 struct vmw_surface *srf = vmw_res_to_srf(res);
1912 const struct vmw_surface_metadata *metadata = &srf->metadata;
1913 struct vmw_surface_dirty *dirty;
1914 u32 num_layers = 1;
1915 u32 num_mip;
1916 u32 num_subres;
1917 u32 num_samples;
1918 size_t dirty_size;
1919 int ret;
1920
1921 if (metadata->array_size)
1922 num_layers = metadata->array_size;
1923 else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
1924 num_layers *= SVGA3D_MAX_SURFACE_FACES;
1925
1926 num_mip = metadata->mip_levels[0];
1927 if (!num_mip)
1928 num_mip = 1;
1929
1930 num_subres = num_layers * num_mip;
1931 dirty_size = struct_size(dirty, boxes, num_subres);
1932
1933 dirty = kvzalloc(dirty_size, GFP_KERNEL);
1934 if (!dirty) {
1935 ret = -ENOMEM;
1936 goto out_no_dirty;
1937 }
1938
1939 num_samples = max_t(u32, 1, metadata->multisample_count);
1940 ret = vmw_surface_setup_cache(&metadata->base_size, metadata->format,
1941 num_mip, num_layers, num_samples,
1942 &dirty->cache);
1943 if (ret)
1944 goto out_no_cache;
1945
1946 dirty->num_subres = num_subres;
1947 res->dirty = (struct vmw_resource_dirty *) dirty;
1948
1949 return 0;
1950
1951out_no_cache:
1952 kvfree(dirty);
1953out_no_dirty:
1954 return ret;
1955}
1956
1957/*
1958 * vmw_surface_dirty_free - The surface's dirty_free callback
1959 */
1960static void vmw_surface_dirty_free(struct vmw_resource *res)
1961{
1962 struct vmw_surface_dirty *dirty =
1963 (struct vmw_surface_dirty *) res->dirty;
1964
1965 kvfree(dirty);
1966 res->dirty = NULL;
1967}
1968
1969/*
1970 * vmw_surface_clean - The surface's clean callback
1971 */
1972static int vmw_surface_clean(struct vmw_resource *res)
1973{
1974 struct vmw_private *dev_priv = res->dev_priv;
1975 size_t alloc_size;
1976 struct {
1977 SVGA3dCmdHeader header;
1978 SVGA3dCmdReadbackGBSurface body;
1979 } *cmd;
1980
1981 alloc_size = sizeof(*cmd);
1982 cmd = VMW_CMD_RESERVE(dev_priv, alloc_size);
1983 if (!cmd)
1984 return -ENOMEM;
1985
1986 cmd->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1987 cmd->header.size = sizeof(cmd->body);
1988 cmd->body.sid = res->id;
1989 vmw_cmd_commit(dev_priv, alloc_size);
1990
1991 return 0;
1992}
1993
1994/*
1995 * vmw_gb_surface_define - Define a private GB surface
1996 *
1997 * @dev_priv: Pointer to a device private.
1998 * @metadata: Metadata representing the surface to create.
1999 * @user_srf_out: allocated user_srf. Set to NULL on failure.
2000 *
2001 * GB surfaces allocated by this function will not have a user mode handle, and
2002 * thus will only be visible to vmwgfx. For optimization reasons the
2003 * surface may later be given a user mode handle by another function to make
2004 * it available to user mode drivers.
2005 */
2006int vmw_gb_surface_define(struct vmw_private *dev_priv,
2007 const struct vmw_surface_metadata *req,
2008 struct vmw_surface **srf_out)
2009{
2010 struct vmw_surface_metadata *metadata;
2011 struct vmw_user_surface *user_srf;
2012 struct vmw_surface *srf;
2013 u32 sample_count = 1;
2014 u32 num_layers = 1;
2015 int ret;
2016
2017 *srf_out = NULL;
2018
2019 if (req->scanout) {
2020 if (!vmw_surface_is_screen_target_format(req->format)) {
2021 VMW_DEBUG_USER("Invalid Screen Target surface format.");
2022 return -EINVAL;
2023 }
2024
2025 if (req->base_size.width > dev_priv->texture_max_width ||
2026 req->base_size.height > dev_priv->texture_max_height) {
2027 VMW_DEBUG_USER("%ux%u\n, exceed max surface size %ux%u",
2028 req->base_size.width,
2029 req->base_size.height,
2030 dev_priv->texture_max_width,
2031 dev_priv->texture_max_height);
2032 return -EINVAL;
2033 }
2034 } else {
2035 const SVGA3dSurfaceDesc *desc =
2036 vmw_surface_get_desc(req->format);
2037
2038 if (desc->blockDesc == SVGA3DBLOCKDESC_NONE) {
2039 VMW_DEBUG_USER("Invalid surface format.\n");
2040 return -EINVAL;
2041 }
2042 }
2043
2044 if (req->autogen_filter != SVGA3D_TEX_FILTER_NONE)
2045 return -EINVAL;
2046
2047 if (req->num_sizes != 1)
2048 return -EINVAL;
2049
2050 if (req->sizes != NULL)
2051 return -EINVAL;
2052
2053 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
2054 if (unlikely(!user_srf)) {
2055 ret = -ENOMEM;
2056 goto out_unlock;
2057 }
2058
2059 *srf_out = &user_srf->srf;
2060 user_srf->prime.base.shareable = false;
2061 user_srf->prime.base.tfile = NULL;
2062
2063 srf = &user_srf->srf;
2064 srf->metadata = *req;
2065 srf->offsets = NULL;
2066
2067 metadata = &srf->metadata;
2068
2069 if (metadata->array_size)
2070 num_layers = req->array_size;
2071 else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
2072 num_layers = SVGA3D_MAX_SURFACE_FACES;
2073
2074 if (metadata->flags & SVGA3D_SURFACE_MULTISAMPLE)
2075 sample_count = metadata->multisample_count;
2076
2077 srf->res.backup_size =
2078 vmw_surface_get_serialized_size_extended(
2079 metadata->format,
2080 metadata->base_size,
2081 metadata->mip_levels[0],
2082 num_layers,
2083 sample_count);
2084
2085 if (metadata->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
2086 srf->res.backup_size += sizeof(SVGA3dDXSOState);
2087
2088 /*
2089 * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
2090 * size greater than STDU max width/height. This is really a workaround
2091 * to support creation of big framebuffer requested by some user-space
2092 * for whole topology. That big framebuffer won't really be used for
2093 * binding with screen target as during prepare_fb a separate surface is
2094 * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
2095 */
2096 if (dev_priv->active_display_unit == vmw_du_screen_target &&
2097 metadata->scanout &&
2098 metadata->base_size.width <= dev_priv->stdu_max_width &&
2099 metadata->base_size.height <= dev_priv->stdu_max_height)
2100 metadata->flags |= SVGA3D_SURFACE_SCREENTARGET;
2101
2102 /*
2103 * From this point, the generic resource management functions
2104 * destroy the object on failure.
2105 */
2106 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
2107
2108 return ret;
2109
2110out_unlock:
2111 return ret;
2112}