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1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/**************************************************************************
3 *
4 * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include <drm/ttm/ttm_placement.h>
29
30#include "vmwgfx_drv.h"
31#include "vmwgfx_resource_priv.h"
32#include "vmwgfx_so.h"
33#include "vmwgfx_binding.h"
34#include "device_include/svga3d_surfacedefs.h"
35
36#define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
37#define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
38#define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
39 (svga3d_flags & ((uint64_t)U32_MAX))
40
41/**
42 * struct vmw_user_surface - User-space visible surface resource
43 *
44 * @base: The TTM base object handling user-space visibility.
45 * @srf: The surface metadata.
46 * @size: TTM accounting size for the surface.
47 * @master: master of the creating client. Used for security check.
48 */
49struct vmw_user_surface {
50 struct ttm_prime_object prime;
51 struct vmw_surface srf;
52 uint32_t size;
53 struct drm_master *master;
54 struct ttm_base_object *backup_base;
55};
56
57/**
58 * struct vmw_surface_offset - Backing store mip level offset info
59 *
60 * @face: Surface face.
61 * @mip: Mip level.
62 * @bo_offset: Offset into backing store of this mip level.
63 *
64 */
65struct vmw_surface_offset {
66 uint32_t face;
67 uint32_t mip;
68 uint32_t bo_offset;
69};
70
71static void vmw_user_surface_free(struct vmw_resource *res);
72static struct vmw_resource *
73vmw_user_surface_base_to_res(struct ttm_base_object *base);
74static int vmw_legacy_srf_bind(struct vmw_resource *res,
75 struct ttm_validate_buffer *val_buf);
76static int vmw_legacy_srf_unbind(struct vmw_resource *res,
77 bool readback,
78 struct ttm_validate_buffer *val_buf);
79static int vmw_legacy_srf_create(struct vmw_resource *res);
80static int vmw_legacy_srf_destroy(struct vmw_resource *res);
81static int vmw_gb_surface_create(struct vmw_resource *res);
82static int vmw_gb_surface_bind(struct vmw_resource *res,
83 struct ttm_validate_buffer *val_buf);
84static int vmw_gb_surface_unbind(struct vmw_resource *res,
85 bool readback,
86 struct ttm_validate_buffer *val_buf);
87static int vmw_gb_surface_destroy(struct vmw_resource *res);
88static int
89vmw_gb_surface_define_internal(struct drm_device *dev,
90 struct drm_vmw_gb_surface_create_ext_req *req,
91 struct drm_vmw_gb_surface_create_rep *rep,
92 struct drm_file *file_priv);
93static int
94vmw_gb_surface_reference_internal(struct drm_device *dev,
95 struct drm_vmw_surface_arg *req,
96 struct drm_vmw_gb_surface_ref_ext_rep *rep,
97 struct drm_file *file_priv);
98
99static const struct vmw_user_resource_conv user_surface_conv = {
100 .object_type = VMW_RES_SURFACE,
101 .base_obj_to_res = vmw_user_surface_base_to_res,
102 .res_free = vmw_user_surface_free
103};
104
105const struct vmw_user_resource_conv *user_surface_converter =
106 &user_surface_conv;
107
108
109static uint64_t vmw_user_surface_size;
110
111static const struct vmw_res_func vmw_legacy_surface_func = {
112 .res_type = vmw_res_surface,
113 .needs_backup = false,
114 .may_evict = true,
115 .prio = 1,
116 .dirty_prio = 1,
117 .type_name = "legacy surfaces",
118 .backup_placement = &vmw_srf_placement,
119 .create = &vmw_legacy_srf_create,
120 .destroy = &vmw_legacy_srf_destroy,
121 .bind = &vmw_legacy_srf_bind,
122 .unbind = &vmw_legacy_srf_unbind
123};
124
125static const struct vmw_res_func vmw_gb_surface_func = {
126 .res_type = vmw_res_surface,
127 .needs_backup = true,
128 .may_evict = true,
129 .prio = 1,
130 .dirty_prio = 2,
131 .type_name = "guest backed surfaces",
132 .backup_placement = &vmw_mob_placement,
133 .create = vmw_gb_surface_create,
134 .destroy = vmw_gb_surface_destroy,
135 .bind = vmw_gb_surface_bind,
136 .unbind = vmw_gb_surface_unbind
137};
138
139/**
140 * struct vmw_surface_dma - SVGA3D DMA command
141 */
142struct vmw_surface_dma {
143 SVGA3dCmdHeader header;
144 SVGA3dCmdSurfaceDMA body;
145 SVGA3dCopyBox cb;
146 SVGA3dCmdSurfaceDMASuffix suffix;
147};
148
149/**
150 * struct vmw_surface_define - SVGA3D Surface Define command
151 */
152struct vmw_surface_define {
153 SVGA3dCmdHeader header;
154 SVGA3dCmdDefineSurface body;
155};
156
157/**
158 * struct vmw_surface_destroy - SVGA3D Surface Destroy command
159 */
160struct vmw_surface_destroy {
161 SVGA3dCmdHeader header;
162 SVGA3dCmdDestroySurface body;
163};
164
165
166/**
167 * vmw_surface_dma_size - Compute fifo size for a dma command.
168 *
169 * @srf: Pointer to a struct vmw_surface
170 *
171 * Computes the required size for a surface dma command for backup or
172 * restoration of the surface represented by @srf.
173 */
174static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
175{
176 return srf->num_sizes * sizeof(struct vmw_surface_dma);
177}
178
179
180/**
181 * vmw_surface_define_size - Compute fifo size for a surface define command.
182 *
183 * @srf: Pointer to a struct vmw_surface
184 *
185 * Computes the required size for a surface define command for the definition
186 * of the surface represented by @srf.
187 */
188static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
189{
190 return sizeof(struct vmw_surface_define) + srf->num_sizes *
191 sizeof(SVGA3dSize);
192}
193
194
195/**
196 * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
197 *
198 * Computes the required size for a surface destroy command for the destruction
199 * of a hw surface.
200 */
201static inline uint32_t vmw_surface_destroy_size(void)
202{
203 return sizeof(struct vmw_surface_destroy);
204}
205
206/**
207 * vmw_surface_destroy_encode - Encode a surface_destroy command.
208 *
209 * @id: The surface id
210 * @cmd_space: Pointer to memory area in which the commands should be encoded.
211 */
212static void vmw_surface_destroy_encode(uint32_t id,
213 void *cmd_space)
214{
215 struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
216 cmd_space;
217
218 cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
219 cmd->header.size = sizeof(cmd->body);
220 cmd->body.sid = id;
221}
222
223/**
224 * vmw_surface_define_encode - Encode a surface_define command.
225 *
226 * @srf: Pointer to a struct vmw_surface object.
227 * @cmd_space: Pointer to memory area in which the commands should be encoded.
228 */
229static void vmw_surface_define_encode(const struct vmw_surface *srf,
230 void *cmd_space)
231{
232 struct vmw_surface_define *cmd = (struct vmw_surface_define *)
233 cmd_space;
234 struct drm_vmw_size *src_size;
235 SVGA3dSize *cmd_size;
236 uint32_t cmd_len;
237 int i;
238
239 cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
240
241 cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
242 cmd->header.size = cmd_len;
243 cmd->body.sid = srf->res.id;
244 /*
245 * Downcast of surfaceFlags, was upcasted when received from user-space,
246 * since driver internally stores as 64 bit.
247 * For legacy surface define only 32 bit flag is supported.
248 */
249 cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->flags;
250 cmd->body.format = srf->format;
251 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
252 cmd->body.face[i].numMipLevels = srf->mip_levels[i];
253
254 cmd += 1;
255 cmd_size = (SVGA3dSize *) cmd;
256 src_size = srf->sizes;
257
258 for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
259 cmd_size->width = src_size->width;
260 cmd_size->height = src_size->height;
261 cmd_size->depth = src_size->depth;
262 }
263}
264
265/**
266 * vmw_surface_dma_encode - Encode a surface_dma command.
267 *
268 * @srf: Pointer to a struct vmw_surface object.
269 * @cmd_space: Pointer to memory area in which the commands should be encoded.
270 * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
271 * should be placed or read from.
272 * @to_surface: Boolean whether to DMA to the surface or from the surface.
273 */
274static void vmw_surface_dma_encode(struct vmw_surface *srf,
275 void *cmd_space,
276 const SVGAGuestPtr *ptr,
277 bool to_surface)
278{
279 uint32_t i;
280 struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
281 const struct svga3d_surface_desc *desc =
282 svga3dsurface_get_desc(srf->format);
283
284 for (i = 0; i < srf->num_sizes; ++i) {
285 SVGA3dCmdHeader *header = &cmd->header;
286 SVGA3dCmdSurfaceDMA *body = &cmd->body;
287 SVGA3dCopyBox *cb = &cmd->cb;
288 SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
289 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
290 const struct drm_vmw_size *cur_size = &srf->sizes[i];
291
292 header->id = SVGA_3D_CMD_SURFACE_DMA;
293 header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
294
295 body->guest.ptr = *ptr;
296 body->guest.ptr.offset += cur_offset->bo_offset;
297 body->guest.pitch = svga3dsurface_calculate_pitch(desc,
298 cur_size);
299 body->host.sid = srf->res.id;
300 body->host.face = cur_offset->face;
301 body->host.mipmap = cur_offset->mip;
302 body->transfer = ((to_surface) ? SVGA3D_WRITE_HOST_VRAM :
303 SVGA3D_READ_HOST_VRAM);
304 cb->x = 0;
305 cb->y = 0;
306 cb->z = 0;
307 cb->srcx = 0;
308 cb->srcy = 0;
309 cb->srcz = 0;
310 cb->w = cur_size->width;
311 cb->h = cur_size->height;
312 cb->d = cur_size->depth;
313
314 suffix->suffixSize = sizeof(*suffix);
315 suffix->maximumOffset =
316 svga3dsurface_get_image_buffer_size(desc, cur_size,
317 body->guest.pitch);
318 suffix->flags.discard = 0;
319 suffix->flags.unsynchronized = 0;
320 suffix->flags.reserved = 0;
321 ++cmd;
322 }
323};
324
325
326/**
327 * vmw_hw_surface_destroy - destroy a Device surface
328 *
329 * @res: Pointer to a struct vmw_resource embedded in a struct
330 * vmw_surface.
331 *
332 * Destroys a the device surface associated with a struct vmw_surface if
333 * any, and adjusts accounting and resource count accordingly.
334 */
335static void vmw_hw_surface_destroy(struct vmw_resource *res)
336{
337
338 struct vmw_private *dev_priv = res->dev_priv;
339 struct vmw_surface *srf;
340 void *cmd;
341
342 if (res->func->destroy == vmw_gb_surface_destroy) {
343 (void) vmw_gb_surface_destroy(res);
344 return;
345 }
346
347 if (res->id != -1) {
348
349 cmd = VMW_FIFO_RESERVE(dev_priv, vmw_surface_destroy_size());
350 if (unlikely(!cmd))
351 return;
352
353 vmw_surface_destroy_encode(res->id, cmd);
354 vmw_fifo_commit(dev_priv, vmw_surface_destroy_size());
355
356 /*
357 * used_memory_size_atomic, or separate lock
358 * to avoid taking dev_priv::cmdbuf_mutex in
359 * the destroy path.
360 */
361
362 mutex_lock(&dev_priv->cmdbuf_mutex);
363 srf = vmw_res_to_srf(res);
364 dev_priv->used_memory_size -= res->backup_size;
365 mutex_unlock(&dev_priv->cmdbuf_mutex);
366 }
367}
368
369/**
370 * vmw_legacy_srf_create - Create a device surface as part of the
371 * resource validation process.
372 *
373 * @res: Pointer to a struct vmw_surface.
374 *
375 * If the surface doesn't have a hw id.
376 *
377 * Returns -EBUSY if there wasn't sufficient device resources to
378 * complete the validation. Retry after freeing up resources.
379 *
380 * May return other errors if the kernel is out of guest resources.
381 */
382static int vmw_legacy_srf_create(struct vmw_resource *res)
383{
384 struct vmw_private *dev_priv = res->dev_priv;
385 struct vmw_surface *srf;
386 uint32_t submit_size;
387 uint8_t *cmd;
388 int ret;
389
390 if (likely(res->id != -1))
391 return 0;
392
393 srf = vmw_res_to_srf(res);
394 if (unlikely(dev_priv->used_memory_size + res->backup_size >=
395 dev_priv->memory_size))
396 return -EBUSY;
397
398 /*
399 * Alloc id for the resource.
400 */
401
402 ret = vmw_resource_alloc_id(res);
403 if (unlikely(ret != 0)) {
404 DRM_ERROR("Failed to allocate a surface id.\n");
405 goto out_no_id;
406 }
407
408 if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
409 ret = -EBUSY;
410 goto out_no_fifo;
411 }
412
413 /*
414 * Encode surface define- commands.
415 */
416
417 submit_size = vmw_surface_define_size(srf);
418 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
419 if (unlikely(!cmd)) {
420 ret = -ENOMEM;
421 goto out_no_fifo;
422 }
423
424 vmw_surface_define_encode(srf, cmd);
425 vmw_fifo_commit(dev_priv, submit_size);
426 vmw_fifo_resource_inc(dev_priv);
427
428 /*
429 * Surface memory usage accounting.
430 */
431
432 dev_priv->used_memory_size += res->backup_size;
433 return 0;
434
435out_no_fifo:
436 vmw_resource_release_id(res);
437out_no_id:
438 return ret;
439}
440
441/**
442 * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
443 *
444 * @res: Pointer to a struct vmw_res embedded in a struct
445 * vmw_surface.
446 * @val_buf: Pointer to a struct ttm_validate_buffer containing
447 * information about the backup buffer.
448 * @bind: Boolean wether to DMA to the surface.
449 *
450 * Transfer backup data to or from a legacy surface as part of the
451 * validation process.
452 * May return other errors if the kernel is out of guest resources.
453 * The backup buffer will be fenced or idle upon successful completion,
454 * and if the surface needs persistent backup storage, the backup buffer
455 * will also be returned reserved iff @bind is true.
456 */
457static int vmw_legacy_srf_dma(struct vmw_resource *res,
458 struct ttm_validate_buffer *val_buf,
459 bool bind)
460{
461 SVGAGuestPtr ptr;
462 struct vmw_fence_obj *fence;
463 uint32_t submit_size;
464 struct vmw_surface *srf = vmw_res_to_srf(res);
465 uint8_t *cmd;
466 struct vmw_private *dev_priv = res->dev_priv;
467
468 BUG_ON(!val_buf->bo);
469 submit_size = vmw_surface_dma_size(srf);
470 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
471 if (unlikely(!cmd))
472 return -ENOMEM;
473
474 vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
475 vmw_surface_dma_encode(srf, cmd, &ptr, bind);
476
477 vmw_fifo_commit(dev_priv, submit_size);
478
479 /*
480 * Create a fence object and fence the backup buffer.
481 */
482
483 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
484 &fence, NULL);
485
486 vmw_bo_fence_single(val_buf->bo, fence);
487
488 if (likely(fence != NULL))
489 vmw_fence_obj_unreference(&fence);
490
491 return 0;
492}
493
494/**
495 * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
496 * surface validation process.
497 *
498 * @res: Pointer to a struct vmw_res embedded in a struct
499 * vmw_surface.
500 * @val_buf: Pointer to a struct ttm_validate_buffer containing
501 * information about the backup buffer.
502 *
503 * This function will copy backup data to the surface if the
504 * backup buffer is dirty.
505 */
506static int vmw_legacy_srf_bind(struct vmw_resource *res,
507 struct ttm_validate_buffer *val_buf)
508{
509 if (!res->backup_dirty)
510 return 0;
511
512 return vmw_legacy_srf_dma(res, val_buf, true);
513}
514
515
516/**
517 * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
518 * surface eviction process.
519 *
520 * @res: Pointer to a struct vmw_res embedded in a struct
521 * vmw_surface.
522 * @val_buf: Pointer to a struct ttm_validate_buffer containing
523 * information about the backup buffer.
524 *
525 * This function will copy backup data from the surface.
526 */
527static int vmw_legacy_srf_unbind(struct vmw_resource *res,
528 bool readback,
529 struct ttm_validate_buffer *val_buf)
530{
531 if (unlikely(readback))
532 return vmw_legacy_srf_dma(res, val_buf, false);
533 return 0;
534}
535
536/**
537 * vmw_legacy_srf_destroy - Destroy a device surface as part of a
538 * resource eviction process.
539 *
540 * @res: Pointer to a struct vmw_res embedded in a struct
541 * vmw_surface.
542 */
543static int vmw_legacy_srf_destroy(struct vmw_resource *res)
544{
545 struct vmw_private *dev_priv = res->dev_priv;
546 uint32_t submit_size;
547 uint8_t *cmd;
548
549 BUG_ON(res->id == -1);
550
551 /*
552 * Encode the dma- and surface destroy commands.
553 */
554
555 submit_size = vmw_surface_destroy_size();
556 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
557 if (unlikely(!cmd))
558 return -ENOMEM;
559
560 vmw_surface_destroy_encode(res->id, cmd);
561 vmw_fifo_commit(dev_priv, submit_size);
562
563 /*
564 * Surface memory usage accounting.
565 */
566
567 dev_priv->used_memory_size -= res->backup_size;
568
569 /*
570 * Release the surface ID.
571 */
572
573 vmw_resource_release_id(res);
574 vmw_fifo_resource_dec(dev_priv);
575
576 return 0;
577}
578
579
580/**
581 * vmw_surface_init - initialize a struct vmw_surface
582 *
583 * @dev_priv: Pointer to a device private struct.
584 * @srf: Pointer to the struct vmw_surface to initialize.
585 * @res_free: Pointer to a resource destructor used to free
586 * the object.
587 */
588static int vmw_surface_init(struct vmw_private *dev_priv,
589 struct vmw_surface *srf,
590 void (*res_free) (struct vmw_resource *res))
591{
592 int ret;
593 struct vmw_resource *res = &srf->res;
594
595 BUG_ON(!res_free);
596 ret = vmw_resource_init(dev_priv, res, true, res_free,
597 (dev_priv->has_mob) ? &vmw_gb_surface_func :
598 &vmw_legacy_surface_func);
599
600 if (unlikely(ret != 0)) {
601 res_free(res);
602 return ret;
603 }
604
605 /*
606 * The surface won't be visible to hardware until a
607 * surface validate.
608 */
609
610 INIT_LIST_HEAD(&srf->view_list);
611 res->hw_destroy = vmw_hw_surface_destroy;
612 return ret;
613}
614
615/**
616 * vmw_user_surface_base_to_res - TTM base object to resource converter for
617 * user visible surfaces
618 *
619 * @base: Pointer to a TTM base object
620 *
621 * Returns the struct vmw_resource embedded in a struct vmw_surface
622 * for the user-visible object identified by the TTM base object @base.
623 */
624static struct vmw_resource *
625vmw_user_surface_base_to_res(struct ttm_base_object *base)
626{
627 return &(container_of(base, struct vmw_user_surface,
628 prime.base)->srf.res);
629}
630
631/**
632 * vmw_user_surface_free - User visible surface resource destructor
633 *
634 * @res: A struct vmw_resource embedded in a struct vmw_surface.
635 */
636static void vmw_user_surface_free(struct vmw_resource *res)
637{
638 struct vmw_surface *srf = vmw_res_to_srf(res);
639 struct vmw_user_surface *user_srf =
640 container_of(srf, struct vmw_user_surface, srf);
641 struct vmw_private *dev_priv = srf->res.dev_priv;
642 uint32_t size = user_srf->size;
643
644 if (user_srf->master)
645 drm_master_put(&user_srf->master);
646 kfree(srf->offsets);
647 kfree(srf->sizes);
648 kfree(srf->snooper.image);
649 ttm_prime_object_kfree(user_srf, prime);
650 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
651}
652
653/**
654 * vmw_user_surface_free - User visible surface TTM base object destructor
655 *
656 * @p_base: Pointer to a pointer to a TTM base object
657 * embedded in a struct vmw_user_surface.
658 *
659 * Drops the base object's reference on its resource, and the
660 * pointer pointed to by *p_base is set to NULL.
661 */
662static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
663{
664 struct ttm_base_object *base = *p_base;
665 struct vmw_user_surface *user_srf =
666 container_of(base, struct vmw_user_surface, prime.base);
667 struct vmw_resource *res = &user_srf->srf.res;
668
669 *p_base = NULL;
670 if (user_srf->backup_base)
671 ttm_base_object_unref(&user_srf->backup_base);
672 vmw_resource_unreference(&res);
673}
674
675/**
676 * vmw_user_surface_destroy_ioctl - Ioctl function implementing
677 * the user surface destroy functionality.
678 *
679 * @dev: Pointer to a struct drm_device.
680 * @data: Pointer to data copied from / to user-space.
681 * @file_priv: Pointer to a drm file private structure.
682 */
683int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
684 struct drm_file *file_priv)
685{
686 struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
687 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
688
689 return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
690}
691
692/**
693 * vmw_user_surface_define_ioctl - Ioctl function implementing
694 * the user surface define functionality.
695 *
696 * @dev: Pointer to a struct drm_device.
697 * @data: Pointer to data copied from / to user-space.
698 * @file_priv: Pointer to a drm file private structure.
699 */
700int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
701 struct drm_file *file_priv)
702{
703 struct vmw_private *dev_priv = vmw_priv(dev);
704 struct vmw_user_surface *user_srf;
705 struct vmw_surface *srf;
706 struct vmw_resource *res;
707 struct vmw_resource *tmp;
708 union drm_vmw_surface_create_arg *arg =
709 (union drm_vmw_surface_create_arg *)data;
710 struct drm_vmw_surface_create_req *req = &arg->req;
711 struct drm_vmw_surface_arg *rep = &arg->rep;
712 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
713 struct ttm_operation_ctx ctx = {
714 .interruptible = true,
715 .no_wait_gpu = false
716 };
717 int ret;
718 int i, j;
719 uint32_t cur_bo_offset;
720 struct drm_vmw_size *cur_size;
721 struct vmw_surface_offset *cur_offset;
722 uint32_t num_sizes;
723 uint32_t size;
724 const struct svga3d_surface_desc *desc;
725
726 if (unlikely(vmw_user_surface_size == 0))
727 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
728 VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
729
730 num_sizes = 0;
731 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
732 if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
733 return -EINVAL;
734 num_sizes += req->mip_levels[i];
735 }
736
737 if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
738 num_sizes == 0)
739 return -EINVAL;
740
741 size = vmw_user_surface_size +
742 ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
743 ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
744
745 desc = svga3dsurface_get_desc(req->format);
746 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
747 VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
748 req->format);
749 return -EINVAL;
750 }
751
752 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
753 if (unlikely(ret != 0))
754 return ret;
755
756 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
757 size, &ctx);
758 if (unlikely(ret != 0)) {
759 if (ret != -ERESTARTSYS)
760 DRM_ERROR("Out of graphics memory for surface.\n");
761 goto out_unlock;
762 }
763
764 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
765 if (unlikely(!user_srf)) {
766 ret = -ENOMEM;
767 goto out_no_user_srf;
768 }
769
770 srf = &user_srf->srf;
771 res = &srf->res;
772
773 /* Driver internally stores as 64-bit flags */
774 srf->flags = (SVGA3dSurfaceAllFlags)req->flags;
775 srf->format = req->format;
776 srf->scanout = req->scanout;
777
778 memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
779 srf->num_sizes = num_sizes;
780 user_srf->size = size;
781 srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long)
782 req->size_addr,
783 sizeof(*srf->sizes) * srf->num_sizes);
784 if (IS_ERR(srf->sizes)) {
785 ret = PTR_ERR(srf->sizes);
786 goto out_no_sizes;
787 }
788 srf->offsets = kmalloc_array(srf->num_sizes,
789 sizeof(*srf->offsets),
790 GFP_KERNEL);
791 if (unlikely(!srf->offsets)) {
792 ret = -ENOMEM;
793 goto out_no_offsets;
794 }
795
796 srf->base_size = *srf->sizes;
797 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
798 srf->multisample_count = 0;
799 srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
800 srf->quality_level = SVGA3D_MS_QUALITY_NONE;
801
802 cur_bo_offset = 0;
803 cur_offset = srf->offsets;
804 cur_size = srf->sizes;
805
806 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
807 for (j = 0; j < srf->mip_levels[i]; ++j) {
808 uint32_t stride = svga3dsurface_calculate_pitch
809 (desc, cur_size);
810
811 cur_offset->face = i;
812 cur_offset->mip = j;
813 cur_offset->bo_offset = cur_bo_offset;
814 cur_bo_offset += svga3dsurface_get_image_buffer_size
815 (desc, cur_size, stride);
816 ++cur_offset;
817 ++cur_size;
818 }
819 }
820 res->backup_size = cur_bo_offset;
821 if (srf->scanout &&
822 srf->num_sizes == 1 &&
823 srf->sizes[0].width == 64 &&
824 srf->sizes[0].height == 64 &&
825 srf->format == SVGA3D_A8R8G8B8) {
826
827 srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
828 if (!srf->snooper.image) {
829 DRM_ERROR("Failed to allocate cursor_image\n");
830 ret = -ENOMEM;
831 goto out_no_copy;
832 }
833 } else {
834 srf->snooper.image = NULL;
835 }
836
837 user_srf->prime.base.shareable = false;
838 user_srf->prime.base.tfile = NULL;
839 if (drm_is_primary_client(file_priv))
840 user_srf->master = drm_master_get(file_priv->master);
841
842 /**
843 * From this point, the generic resource management functions
844 * destroy the object on failure.
845 */
846
847 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
848 if (unlikely(ret != 0))
849 goto out_unlock;
850
851 /*
852 * A gb-aware client referencing a shared surface will
853 * expect a backup buffer to be present.
854 */
855 if (dev_priv->has_mob && req->shareable) {
856 uint32_t backup_handle;
857
858 ret = vmw_user_bo_alloc(dev_priv, tfile,
859 res->backup_size,
860 true,
861 &backup_handle,
862 &res->backup,
863 &user_srf->backup_base);
864 if (unlikely(ret != 0)) {
865 vmw_resource_unreference(&res);
866 goto out_unlock;
867 }
868 }
869
870 tmp = vmw_resource_reference(&srf->res);
871 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
872 req->shareable, VMW_RES_SURFACE,
873 &vmw_user_surface_base_release, NULL);
874
875 if (unlikely(ret != 0)) {
876 vmw_resource_unreference(&tmp);
877 vmw_resource_unreference(&res);
878 goto out_unlock;
879 }
880
881 rep->sid = user_srf->prime.base.handle;
882 vmw_resource_unreference(&res);
883
884 ttm_read_unlock(&dev_priv->reservation_sem);
885 return 0;
886out_no_copy:
887 kfree(srf->offsets);
888out_no_offsets:
889 kfree(srf->sizes);
890out_no_sizes:
891 ttm_prime_object_kfree(user_srf, prime);
892out_no_user_srf:
893 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
894out_unlock:
895 ttm_read_unlock(&dev_priv->reservation_sem);
896 return ret;
897}
898
899
900static int
901vmw_surface_handle_reference(struct vmw_private *dev_priv,
902 struct drm_file *file_priv,
903 uint32_t u_handle,
904 enum drm_vmw_handle_type handle_type,
905 struct ttm_base_object **base_p)
906{
907 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
908 struct vmw_user_surface *user_srf;
909 uint32_t handle;
910 struct ttm_base_object *base;
911 int ret;
912 bool require_exist = false;
913
914 if (handle_type == DRM_VMW_HANDLE_PRIME) {
915 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
916 if (unlikely(ret != 0))
917 return ret;
918 } else {
919 if (unlikely(drm_is_render_client(file_priv)))
920 require_exist = true;
921
922 handle = u_handle;
923 }
924
925 ret = -EINVAL;
926 base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
927 if (unlikely(!base)) {
928 VMW_DEBUG_USER("Could not find surface to reference.\n");
929 goto out_no_lookup;
930 }
931
932 if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
933 VMW_DEBUG_USER("Referenced object is not a surface.\n");
934 goto out_bad_resource;
935 }
936
937 if (handle_type != DRM_VMW_HANDLE_PRIME) {
938 user_srf = container_of(base, struct vmw_user_surface,
939 prime.base);
940
941 /*
942 * Make sure the surface creator has the same
943 * authenticating master, or is already registered with us.
944 */
945 if (drm_is_primary_client(file_priv) &&
946 user_srf->master != file_priv->master)
947 require_exist = true;
948
949 ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
950 require_exist);
951 if (unlikely(ret != 0)) {
952 DRM_ERROR("Could not add a reference to a surface.\n");
953 goto out_bad_resource;
954 }
955 }
956
957 *base_p = base;
958 return 0;
959
960out_bad_resource:
961 ttm_base_object_unref(&base);
962out_no_lookup:
963 if (handle_type == DRM_VMW_HANDLE_PRIME)
964 (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
965
966 return ret;
967}
968
969/**
970 * vmw_user_surface_define_ioctl - Ioctl function implementing
971 * the user surface reference functionality.
972 *
973 * @dev: Pointer to a struct drm_device.
974 * @data: Pointer to data copied from / to user-space.
975 * @file_priv: Pointer to a drm file private structure.
976 */
977int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
978 struct drm_file *file_priv)
979{
980 struct vmw_private *dev_priv = vmw_priv(dev);
981 union drm_vmw_surface_reference_arg *arg =
982 (union drm_vmw_surface_reference_arg *)data;
983 struct drm_vmw_surface_arg *req = &arg->req;
984 struct drm_vmw_surface_create_req *rep = &arg->rep;
985 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
986 struct vmw_surface *srf;
987 struct vmw_user_surface *user_srf;
988 struct drm_vmw_size __user *user_sizes;
989 struct ttm_base_object *base;
990 int ret;
991
992 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
993 req->handle_type, &base);
994 if (unlikely(ret != 0))
995 return ret;
996
997 user_srf = container_of(base, struct vmw_user_surface, prime.base);
998 srf = &user_srf->srf;
999
1000 /* Downcast of flags when sending back to user space */
1001 rep->flags = (uint32_t)srf->flags;
1002 rep->format = srf->format;
1003 memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
1004 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1005 rep->size_addr;
1006
1007 if (user_sizes)
1008 ret = copy_to_user(user_sizes, &srf->base_size,
1009 sizeof(srf->base_size));
1010 if (unlikely(ret != 0)) {
1011 VMW_DEBUG_USER("copy_to_user failed %p %u\n", user_sizes,
1012 srf->num_sizes);
1013 ttm_ref_object_base_unref(tfile, base->handle, TTM_REF_USAGE);
1014 ret = -EFAULT;
1015 }
1016
1017 ttm_base_object_unref(&base);
1018
1019 return ret;
1020}
1021
1022/**
1023 * vmw_surface_define_encode - Encode a surface_define command.
1024 *
1025 * @srf: Pointer to a struct vmw_surface object.
1026 * @cmd_space: Pointer to memory area in which the commands should be encoded.
1027 */
1028static int vmw_gb_surface_create(struct vmw_resource *res)
1029{
1030 struct vmw_private *dev_priv = res->dev_priv;
1031 struct vmw_surface *srf = vmw_res_to_srf(res);
1032 uint32_t cmd_len, cmd_id, submit_len;
1033 int ret;
1034 struct {
1035 SVGA3dCmdHeader header;
1036 SVGA3dCmdDefineGBSurface body;
1037 } *cmd;
1038 struct {
1039 SVGA3dCmdHeader header;
1040 SVGA3dCmdDefineGBSurface_v2 body;
1041 } *cmd2;
1042 struct {
1043 SVGA3dCmdHeader header;
1044 SVGA3dCmdDefineGBSurface_v3 body;
1045 } *cmd3;
1046
1047 if (likely(res->id != -1))
1048 return 0;
1049
1050 vmw_fifo_resource_inc(dev_priv);
1051 ret = vmw_resource_alloc_id(res);
1052 if (unlikely(ret != 0)) {
1053 DRM_ERROR("Failed to allocate a surface id.\n");
1054 goto out_no_id;
1055 }
1056
1057 if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
1058 ret = -EBUSY;
1059 goto out_no_fifo;
1060 }
1061
1062 if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1063 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1064 cmd_len = sizeof(cmd3->body);
1065 submit_len = sizeof(*cmd3);
1066 } else if (srf->array_size > 0) {
1067 /* has_dx checked on creation time. */
1068 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1069 cmd_len = sizeof(cmd2->body);
1070 submit_len = sizeof(*cmd2);
1071 } else {
1072 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
1073 cmd_len = sizeof(cmd->body);
1074 submit_len = sizeof(*cmd);
1075 }
1076
1077 cmd = VMW_FIFO_RESERVE(dev_priv, submit_len);
1078 cmd2 = (typeof(cmd2))cmd;
1079 cmd3 = (typeof(cmd3))cmd;
1080 if (unlikely(!cmd)) {
1081 ret = -ENOMEM;
1082 goto out_no_fifo;
1083 }
1084
1085 if (dev_priv->has_sm4_1 && srf->array_size > 0) {
1086 cmd3->header.id = cmd_id;
1087 cmd3->header.size = cmd_len;
1088 cmd3->body.sid = srf->res.id;
1089 cmd3->body.surfaceFlags = srf->flags;
1090 cmd3->body.format = srf->format;
1091 cmd3->body.numMipLevels = srf->mip_levels[0];
1092 cmd3->body.multisampleCount = srf->multisample_count;
1093 cmd3->body.multisamplePattern = srf->multisample_pattern;
1094 cmd3->body.qualityLevel = srf->quality_level;
1095 cmd3->body.autogenFilter = srf->autogen_filter;
1096 cmd3->body.size.width = srf->base_size.width;
1097 cmd3->body.size.height = srf->base_size.height;
1098 cmd3->body.size.depth = srf->base_size.depth;
1099 cmd3->body.arraySize = srf->array_size;
1100 } else if (srf->array_size > 0) {
1101 cmd2->header.id = cmd_id;
1102 cmd2->header.size = cmd_len;
1103 cmd2->body.sid = srf->res.id;
1104 cmd2->body.surfaceFlags = srf->flags;
1105 cmd2->body.format = srf->format;
1106 cmd2->body.numMipLevels = srf->mip_levels[0];
1107 cmd2->body.multisampleCount = srf->multisample_count;
1108 cmd2->body.autogenFilter = srf->autogen_filter;
1109 cmd2->body.size.width = srf->base_size.width;
1110 cmd2->body.size.height = srf->base_size.height;
1111 cmd2->body.size.depth = srf->base_size.depth;
1112 cmd2->body.arraySize = srf->array_size;
1113 } else {
1114 cmd->header.id = cmd_id;
1115 cmd->header.size = cmd_len;
1116 cmd->body.sid = srf->res.id;
1117 cmd->body.surfaceFlags = srf->flags;
1118 cmd->body.format = srf->format;
1119 cmd->body.numMipLevels = srf->mip_levels[0];
1120 cmd->body.multisampleCount = srf->multisample_count;
1121 cmd->body.autogenFilter = srf->autogen_filter;
1122 cmd->body.size.width = srf->base_size.width;
1123 cmd->body.size.height = srf->base_size.height;
1124 cmd->body.size.depth = srf->base_size.depth;
1125 }
1126
1127 vmw_fifo_commit(dev_priv, submit_len);
1128
1129 return 0;
1130
1131out_no_fifo:
1132 vmw_resource_release_id(res);
1133out_no_id:
1134 vmw_fifo_resource_dec(dev_priv);
1135 return ret;
1136}
1137
1138
1139static int vmw_gb_surface_bind(struct vmw_resource *res,
1140 struct ttm_validate_buffer *val_buf)
1141{
1142 struct vmw_private *dev_priv = res->dev_priv;
1143 struct {
1144 SVGA3dCmdHeader header;
1145 SVGA3dCmdBindGBSurface body;
1146 } *cmd1;
1147 struct {
1148 SVGA3dCmdHeader header;
1149 SVGA3dCmdUpdateGBSurface body;
1150 } *cmd2;
1151 uint32_t submit_size;
1152 struct ttm_buffer_object *bo = val_buf->bo;
1153
1154 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1155
1156 submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
1157
1158 cmd1 = VMW_FIFO_RESERVE(dev_priv, submit_size);
1159 if (unlikely(!cmd1))
1160 return -ENOMEM;
1161
1162 cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1163 cmd1->header.size = sizeof(cmd1->body);
1164 cmd1->body.sid = res->id;
1165 cmd1->body.mobid = bo->mem.start;
1166 if (res->backup_dirty) {
1167 cmd2 = (void *) &cmd1[1];
1168 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1169 cmd2->header.size = sizeof(cmd2->body);
1170 cmd2->body.sid = res->id;
1171 res->backup_dirty = false;
1172 }
1173 vmw_fifo_commit(dev_priv, submit_size);
1174
1175 return 0;
1176}
1177
1178static int vmw_gb_surface_unbind(struct vmw_resource *res,
1179 bool readback,
1180 struct ttm_validate_buffer *val_buf)
1181{
1182 struct vmw_private *dev_priv = res->dev_priv;
1183 struct ttm_buffer_object *bo = val_buf->bo;
1184 struct vmw_fence_obj *fence;
1185
1186 struct {
1187 SVGA3dCmdHeader header;
1188 SVGA3dCmdReadbackGBSurface body;
1189 } *cmd1;
1190 struct {
1191 SVGA3dCmdHeader header;
1192 SVGA3dCmdInvalidateGBSurface body;
1193 } *cmd2;
1194 struct {
1195 SVGA3dCmdHeader header;
1196 SVGA3dCmdBindGBSurface body;
1197 } *cmd3;
1198 uint32_t submit_size;
1199 uint8_t *cmd;
1200
1201
1202 BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1203
1204 submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
1205 cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
1206 if (unlikely(!cmd))
1207 return -ENOMEM;
1208
1209 if (readback) {
1210 cmd1 = (void *) cmd;
1211 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1212 cmd1->header.size = sizeof(cmd1->body);
1213 cmd1->body.sid = res->id;
1214 cmd3 = (void *) &cmd1[1];
1215 } else {
1216 cmd2 = (void *) cmd;
1217 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1218 cmd2->header.size = sizeof(cmd2->body);
1219 cmd2->body.sid = res->id;
1220 cmd3 = (void *) &cmd2[1];
1221 }
1222
1223 cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1224 cmd3->header.size = sizeof(cmd3->body);
1225 cmd3->body.sid = res->id;
1226 cmd3->body.mobid = SVGA3D_INVALID_ID;
1227
1228 vmw_fifo_commit(dev_priv, submit_size);
1229
1230 /*
1231 * Create a fence object and fence the backup buffer.
1232 */
1233
1234 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
1235 &fence, NULL);
1236
1237 vmw_bo_fence_single(val_buf->bo, fence);
1238
1239 if (likely(fence != NULL))
1240 vmw_fence_obj_unreference(&fence);
1241
1242 return 0;
1243}
1244
1245static int vmw_gb_surface_destroy(struct vmw_resource *res)
1246{
1247 struct vmw_private *dev_priv = res->dev_priv;
1248 struct vmw_surface *srf = vmw_res_to_srf(res);
1249 struct {
1250 SVGA3dCmdHeader header;
1251 SVGA3dCmdDestroyGBSurface body;
1252 } *cmd;
1253
1254 if (likely(res->id == -1))
1255 return 0;
1256
1257 mutex_lock(&dev_priv->binding_mutex);
1258 vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1259 vmw_binding_res_list_scrub(&res->binding_head);
1260
1261 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
1262 if (unlikely(!cmd)) {
1263 mutex_unlock(&dev_priv->binding_mutex);
1264 return -ENOMEM;
1265 }
1266
1267 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
1268 cmd->header.size = sizeof(cmd->body);
1269 cmd->body.sid = res->id;
1270 vmw_fifo_commit(dev_priv, sizeof(*cmd));
1271 mutex_unlock(&dev_priv->binding_mutex);
1272 vmw_resource_release_id(res);
1273 vmw_fifo_resource_dec(dev_priv);
1274
1275 return 0;
1276}
1277
1278
1279/**
1280 * vmw_gb_surface_define_ioctl - Ioctl function implementing
1281 * the user surface define functionality.
1282 *
1283 * @dev: Pointer to a struct drm_device.
1284 * @data: Pointer to data copied from / to user-space.
1285 * @file_priv: Pointer to a drm file private structure.
1286 */
1287int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1288 struct drm_file *file_priv)
1289{
1290 union drm_vmw_gb_surface_create_arg *arg =
1291 (union drm_vmw_gb_surface_create_arg *)data;
1292 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1293 struct drm_vmw_gb_surface_create_ext_req req_ext;
1294
1295 req_ext.base = arg->req;
1296 req_ext.version = drm_vmw_gb_surface_v1;
1297 req_ext.svga3d_flags_upper_32_bits = 0;
1298 req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1299 req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
1300 req_ext.must_be_zero = 0;
1301
1302 return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
1303}
1304
1305/**
1306 * vmw_gb_surface_reference_ioctl - Ioctl function implementing
1307 * the user surface reference functionality.
1308 *
1309 * @dev: Pointer to a struct drm_device.
1310 * @data: Pointer to data copied from / to user-space.
1311 * @file_priv: Pointer to a drm file private structure.
1312 */
1313int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1314 struct drm_file *file_priv)
1315{
1316 union drm_vmw_gb_surface_reference_arg *arg =
1317 (union drm_vmw_gb_surface_reference_arg *)data;
1318 struct drm_vmw_surface_arg *req = &arg->req;
1319 struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
1320 struct drm_vmw_gb_surface_ref_ext_rep rep_ext;
1321 int ret;
1322
1323 ret = vmw_gb_surface_reference_internal(dev, req, &rep_ext, file_priv);
1324
1325 if (unlikely(ret != 0))
1326 return ret;
1327
1328 rep->creq = rep_ext.creq.base;
1329 rep->crep = rep_ext.crep;
1330
1331 return ret;
1332}
1333
1334/**
1335 * vmw_surface_gb_priv_define - Define a private GB surface
1336 *
1337 * @dev: Pointer to a struct drm_device
1338 * @user_accounting_size: Used to track user-space memory usage, set
1339 * to 0 for kernel mode only memory
1340 * @svga3d_flags: SVGA3d surface flags for the device
1341 * @format: requested surface format
1342 * @for_scanout: true if inteded to be used for scanout buffer
1343 * @num_mip_levels: number of MIP levels
1344 * @multisample_count:
1345 * @array_size: Surface array size.
1346 * @size: width, heigh, depth of the surface requested
1347 * @multisample_pattern: Multisampling pattern when msaa is supported
1348 * @quality_level: Precision settings
1349 * @user_srf_out: allocated user_srf. Set to NULL on failure.
1350 *
1351 * GB surfaces allocated by this function will not have a user mode handle, and
1352 * thus will only be visible to vmwgfx. For optimization reasons the
1353 * surface may later be given a user mode handle by another function to make
1354 * it available to user mode drivers.
1355 */
1356int vmw_surface_gb_priv_define(struct drm_device *dev,
1357 uint32_t user_accounting_size,
1358 SVGA3dSurfaceAllFlags svga3d_flags,
1359 SVGA3dSurfaceFormat format,
1360 bool for_scanout,
1361 uint32_t num_mip_levels,
1362 uint32_t multisample_count,
1363 uint32_t array_size,
1364 struct drm_vmw_size size,
1365 SVGA3dMSPattern multisample_pattern,
1366 SVGA3dMSQualityLevel quality_level,
1367 struct vmw_surface **srf_out)
1368{
1369 struct vmw_private *dev_priv = vmw_priv(dev);
1370 struct vmw_user_surface *user_srf;
1371 struct ttm_operation_ctx ctx = {
1372 .interruptible = true,
1373 .no_wait_gpu = false
1374 };
1375 struct vmw_surface *srf;
1376 int ret;
1377 u32 num_layers = 1;
1378 u32 sample_count = 1;
1379
1380 *srf_out = NULL;
1381
1382 if (for_scanout) {
1383 if (!svga3dsurface_is_screen_target_format(format)) {
1384 VMW_DEBUG_USER("Invalid Screen Target surface format.");
1385 return -EINVAL;
1386 }
1387
1388 if (size.width > dev_priv->texture_max_width ||
1389 size.height > dev_priv->texture_max_height) {
1390 VMW_DEBUG_USER("%ux%u\n, exceeds max surface size %ux%u",
1391 size.width, size.height,
1392 dev_priv->texture_max_width,
1393 dev_priv->texture_max_height);
1394 return -EINVAL;
1395 }
1396 } else {
1397 const struct svga3d_surface_desc *desc;
1398
1399 desc = svga3dsurface_get_desc(format);
1400 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
1401 VMW_DEBUG_USER("Invalid surface format.\n");
1402 return -EINVAL;
1403 }
1404 }
1405
1406 /* array_size must be null for non-GL3 host. */
1407 if (array_size > 0 && !dev_priv->has_dx) {
1408 VMW_DEBUG_USER("Tried to create DX surface on non-DX host.\n");
1409 return -EINVAL;
1410 }
1411
1412 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1413 if (unlikely(ret != 0))
1414 return ret;
1415
1416 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
1417 user_accounting_size, &ctx);
1418 if (unlikely(ret != 0)) {
1419 if (ret != -ERESTARTSYS)
1420 DRM_ERROR("Out of graphics memory for surface"
1421 " creation.\n");
1422 goto out_unlock;
1423 }
1424
1425 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
1426 if (unlikely(!user_srf)) {
1427 ret = -ENOMEM;
1428 goto out_no_user_srf;
1429 }
1430
1431 *srf_out = &user_srf->srf;
1432 user_srf->size = user_accounting_size;
1433 user_srf->prime.base.shareable = false;
1434 user_srf->prime.base.tfile = NULL;
1435
1436 srf = &user_srf->srf;
1437 srf->flags = svga3d_flags;
1438 srf->format = format;
1439 srf->scanout = for_scanout;
1440 srf->mip_levels[0] = num_mip_levels;
1441 srf->num_sizes = 1;
1442 srf->sizes = NULL;
1443 srf->offsets = NULL;
1444 srf->base_size = size;
1445 srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
1446 srf->array_size = array_size;
1447 srf->multisample_count = multisample_count;
1448 srf->multisample_pattern = multisample_pattern;
1449 srf->quality_level = quality_level;
1450
1451 if (array_size)
1452 num_layers = array_size;
1453 else if (svga3d_flags & SVGA3D_SURFACE_CUBEMAP)
1454 num_layers = SVGA3D_MAX_SURFACE_FACES;
1455
1456 if (srf->flags & SVGA3D_SURFACE_MULTISAMPLE)
1457 sample_count = srf->multisample_count;
1458
1459 srf->res.backup_size =
1460 svga3dsurface_get_serialized_size_extended(srf->format,
1461 srf->base_size,
1462 srf->mip_levels[0],
1463 num_layers,
1464 sample_count);
1465
1466 if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
1467 srf->res.backup_size += sizeof(SVGA3dDXSOState);
1468
1469 /*
1470 * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
1471 * size greater than STDU max width/height. This is really a workaround
1472 * to support creation of big framebuffer requested by some user-space
1473 * for whole topology. That big framebuffer won't really be used for
1474 * binding with screen target as during prepare_fb a separate surface is
1475 * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
1476 */
1477 if (dev_priv->active_display_unit == vmw_du_screen_target &&
1478 for_scanout && size.width <= dev_priv->stdu_max_width &&
1479 size.height <= dev_priv->stdu_max_height)
1480 srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
1481
1482 /*
1483 * From this point, the generic resource management functions
1484 * destroy the object on failure.
1485 */
1486 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
1487
1488 ttm_read_unlock(&dev_priv->reservation_sem);
1489 return ret;
1490
1491out_no_user_srf:
1492 ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
1493
1494out_unlock:
1495 ttm_read_unlock(&dev_priv->reservation_sem);
1496 return ret;
1497}
1498
1499/**
1500 * vmw_gb_surface_define_ext_ioctl - Ioctl function implementing
1501 * the user surface define functionality.
1502 *
1503 * @dev: Pointer to a struct drm_device.
1504 * @data: Pointer to data copied from / to user-space.
1505 * @file_priv: Pointer to a drm file private structure.
1506 */
1507int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, void *data,
1508 struct drm_file *file_priv)
1509{
1510 union drm_vmw_gb_surface_create_ext_arg *arg =
1511 (union drm_vmw_gb_surface_create_ext_arg *)data;
1512 struct drm_vmw_gb_surface_create_ext_req *req = &arg->req;
1513 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1514
1515 return vmw_gb_surface_define_internal(dev, req, rep, file_priv);
1516}
1517
1518/**
1519 * vmw_gb_surface_reference_ext_ioctl - Ioctl function implementing
1520 * the user surface reference functionality.
1521 *
1522 * @dev: Pointer to a struct drm_device.
1523 * @data: Pointer to data copied from / to user-space.
1524 * @file_priv: Pointer to a drm file private structure.
1525 */
1526int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, void *data,
1527 struct drm_file *file_priv)
1528{
1529 union drm_vmw_gb_surface_reference_ext_arg *arg =
1530 (union drm_vmw_gb_surface_reference_ext_arg *)data;
1531 struct drm_vmw_surface_arg *req = &arg->req;
1532 struct drm_vmw_gb_surface_ref_ext_rep *rep = &arg->rep;
1533
1534 return vmw_gb_surface_reference_internal(dev, req, rep, file_priv);
1535}
1536
1537/**
1538 * vmw_gb_surface_define_internal - Ioctl function implementing
1539 * the user surface define functionality.
1540 *
1541 * @dev: Pointer to a struct drm_device.
1542 * @req: Request argument from user-space.
1543 * @rep: Response argument to user-space.
1544 * @file_priv: Pointer to a drm file private structure.
1545 */
1546static int
1547vmw_gb_surface_define_internal(struct drm_device *dev,
1548 struct drm_vmw_gb_surface_create_ext_req *req,
1549 struct drm_vmw_gb_surface_create_rep *rep,
1550 struct drm_file *file_priv)
1551{
1552 struct vmw_private *dev_priv = vmw_priv(dev);
1553 struct vmw_user_surface *user_srf;
1554 struct vmw_surface *srf;
1555 struct vmw_resource *res;
1556 struct vmw_resource *tmp;
1557 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1558 int ret;
1559 uint32_t size;
1560 uint32_t backup_handle = 0;
1561 SVGA3dSurfaceAllFlags svga3d_flags_64 =
1562 SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
1563 req->base.svga3d_flags);
1564
1565 if (!dev_priv->has_sm4_1) {
1566 /*
1567 * If SM4_1 is not support then cannot send 64-bit flag to
1568 * device.
1569 */
1570 if (req->svga3d_flags_upper_32_bits != 0)
1571 return -EINVAL;
1572
1573 if (req->base.multisample_count != 0)
1574 return -EINVAL;
1575
1576 if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
1577 return -EINVAL;
1578
1579 if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
1580 return -EINVAL;
1581 }
1582
1583 if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1584 req->base.multisample_count == 0)
1585 return -EINVAL;
1586
1587 if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS)
1588 return -EINVAL;
1589
1590 if (unlikely(vmw_user_surface_size == 0))
1591 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
1592 VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
1593
1594 size = vmw_user_surface_size;
1595
1596 /* Define a surface based on the parameters. */
1597 ret = vmw_surface_gb_priv_define(dev,
1598 size,
1599 svga3d_flags_64,
1600 req->base.format,
1601 req->base.drm_surface_flags &
1602 drm_vmw_surface_flag_scanout,
1603 req->base.mip_levels,
1604 req->base.multisample_count,
1605 req->base.array_size,
1606 req->base.base_size,
1607 req->multisample_pattern,
1608 req->quality_level,
1609 &srf);
1610 if (unlikely(ret != 0))
1611 return ret;
1612
1613 user_srf = container_of(srf, struct vmw_user_surface, srf);
1614 if (drm_is_primary_client(file_priv))
1615 user_srf->master = drm_master_get(file_priv->master);
1616
1617 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1618 if (unlikely(ret != 0))
1619 return ret;
1620
1621 res = &user_srf->srf.res;
1622
1623 if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
1624 ret = vmw_user_bo_lookup(tfile, req->base.buffer_handle,
1625 &res->backup,
1626 &user_srf->backup_base);
1627 if (ret == 0) {
1628 if (res->backup->base.num_pages * PAGE_SIZE <
1629 res->backup_size) {
1630 VMW_DEBUG_USER("Surface backup buffer too small.\n");
1631 vmw_bo_unreference(&res->backup);
1632 ret = -EINVAL;
1633 goto out_unlock;
1634 } else {
1635 backup_handle = req->base.buffer_handle;
1636 }
1637 }
1638 } else if (req->base.drm_surface_flags &
1639 drm_vmw_surface_flag_create_buffer)
1640 ret = vmw_user_bo_alloc(dev_priv, tfile,
1641 res->backup_size,
1642 req->base.drm_surface_flags &
1643 drm_vmw_surface_flag_shareable,
1644 &backup_handle,
1645 &res->backup,
1646 &user_srf->backup_base);
1647
1648 if (unlikely(ret != 0)) {
1649 vmw_resource_unreference(&res);
1650 goto out_unlock;
1651 }
1652
1653 tmp = vmw_resource_reference(res);
1654 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
1655 req->base.drm_surface_flags &
1656 drm_vmw_surface_flag_shareable,
1657 VMW_RES_SURFACE,
1658 &vmw_user_surface_base_release, NULL);
1659
1660 if (unlikely(ret != 0)) {
1661 vmw_resource_unreference(&tmp);
1662 vmw_resource_unreference(&res);
1663 goto out_unlock;
1664 }
1665
1666 rep->handle = user_srf->prime.base.handle;
1667 rep->backup_size = res->backup_size;
1668 if (res->backup) {
1669 rep->buffer_map_handle =
1670 drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
1671 rep->buffer_size = res->backup->base.num_pages * PAGE_SIZE;
1672 rep->buffer_handle = backup_handle;
1673 } else {
1674 rep->buffer_map_handle = 0;
1675 rep->buffer_size = 0;
1676 rep->buffer_handle = SVGA3D_INVALID_ID;
1677 }
1678
1679 vmw_resource_unreference(&res);
1680
1681out_unlock:
1682 ttm_read_unlock(&dev_priv->reservation_sem);
1683 return ret;
1684}
1685
1686/**
1687 * vmw_gb_surface_reference_internal - Ioctl function implementing
1688 * the user surface reference functionality.
1689 *
1690 * @dev: Pointer to a struct drm_device.
1691 * @req: Pointer to user-space request surface arg.
1692 * @rep: Pointer to response to user-space.
1693 * @file_priv: Pointer to a drm file private structure.
1694 */
1695static int
1696vmw_gb_surface_reference_internal(struct drm_device *dev,
1697 struct drm_vmw_surface_arg *req,
1698 struct drm_vmw_gb_surface_ref_ext_rep *rep,
1699 struct drm_file *file_priv)
1700{
1701 struct vmw_private *dev_priv = vmw_priv(dev);
1702 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1703 struct vmw_surface *srf;
1704 struct vmw_user_surface *user_srf;
1705 struct ttm_base_object *base;
1706 uint32_t backup_handle;
1707 int ret = -EINVAL;
1708
1709 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1710 req->handle_type, &base);
1711 if (unlikely(ret != 0))
1712 return ret;
1713
1714 user_srf = container_of(base, struct vmw_user_surface, prime.base);
1715 srf = &user_srf->srf;
1716 if (!srf->res.backup) {
1717 DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1718 goto out_bad_resource;
1719 }
1720
1721 mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1722 ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
1723 mutex_unlock(&dev_priv->cmdbuf_mutex);
1724
1725 if (unlikely(ret != 0)) {
1726 DRM_ERROR("Could not add a reference to a GB surface "
1727 "backup buffer.\n");
1728 (void) ttm_ref_object_base_unref(tfile, base->handle,
1729 TTM_REF_USAGE);
1730 goto out_bad_resource;
1731 }
1732
1733 rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(srf->flags);
1734 rep->creq.base.format = srf->format;
1735 rep->creq.base.mip_levels = srf->mip_levels[0];
1736 rep->creq.base.drm_surface_flags = 0;
1737 rep->creq.base.multisample_count = srf->multisample_count;
1738 rep->creq.base.autogen_filter = srf->autogen_filter;
1739 rep->creq.base.array_size = srf->array_size;
1740 rep->creq.base.buffer_handle = backup_handle;
1741 rep->creq.base.base_size = srf->base_size;
1742 rep->crep.handle = user_srf->prime.base.handle;
1743 rep->crep.backup_size = srf->res.backup_size;
1744 rep->crep.buffer_handle = backup_handle;
1745 rep->crep.buffer_map_handle =
1746 drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1747 rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
1748
1749 rep->creq.version = drm_vmw_gb_surface_v1;
1750 rep->creq.svga3d_flags_upper_32_bits =
1751 SVGA3D_FLAGS_UPPER_32(srf->flags);
1752 rep->creq.multisample_pattern = srf->multisample_pattern;
1753 rep->creq.quality_level = srf->quality_level;
1754 rep->creq.must_be_zero = 0;
1755
1756out_bad_resource:
1757 ttm_base_object_unref(&base);
1758
1759 return ret;
1760}
1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/**************************************************************************
3 *
4 * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include <drm/ttm/ttm_placement.h>
29
30#include "vmwgfx_drv.h"
31#include "vmwgfx_resource_priv.h"
32#include "vmwgfx_so.h"
33#include "vmwgfx_binding.h"
34#include "device_include/svga3d_surfacedefs.h"
35
36#define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
37#define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
38#define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
39 (svga3d_flags & ((uint64_t)U32_MAX))
40
41/**
42 * struct vmw_user_surface - User-space visible surface resource
43 *
44 * @prime: The TTM prime object.
45 * @base: The TTM base object handling user-space visibility.
46 * @srf: The surface metadata.
47 * @size: TTM accounting size for the surface.
48 * @master: Master of the creating client. Used for security check.
49 * @backup_base: The TTM base object of the backup buffer.
50 */
51struct vmw_user_surface {
52 struct ttm_prime_object prime;
53 struct vmw_surface srf;
54 uint32_t size;
55 struct drm_master *master;
56 struct ttm_base_object *backup_base;
57};
58
59/**
60 * struct vmw_surface_offset - Backing store mip level offset info
61 *
62 * @face: Surface face.
63 * @mip: Mip level.
64 * @bo_offset: Offset into backing store of this mip level.
65 *
66 */
67struct vmw_surface_offset {
68 uint32_t face;
69 uint32_t mip;
70 uint32_t bo_offset;
71};
72
73/**
74 * struct vmw_surface_dirty - Surface dirty-tracker
75 * @cache: Cached layout information of the surface.
76 * @size: Accounting size for the struct vmw_surface_dirty.
77 * @num_subres: Number of subresources.
78 * @boxes: Array of SVGA3dBoxes indicating dirty regions. One per subresource.
79 */
80struct vmw_surface_dirty {
81 struct svga3dsurface_cache cache;
82 size_t size;
83 u32 num_subres;
84 SVGA3dBox boxes[];
85};
86
87static void vmw_user_surface_free(struct vmw_resource *res);
88static struct vmw_resource *
89vmw_user_surface_base_to_res(struct ttm_base_object *base);
90static int vmw_legacy_srf_bind(struct vmw_resource *res,
91 struct ttm_validate_buffer *val_buf);
92static int vmw_legacy_srf_unbind(struct vmw_resource *res,
93 bool readback,
94 struct ttm_validate_buffer *val_buf);
95static int vmw_legacy_srf_create(struct vmw_resource *res);
96static int vmw_legacy_srf_destroy(struct vmw_resource *res);
97static int vmw_gb_surface_create(struct vmw_resource *res);
98static int vmw_gb_surface_bind(struct vmw_resource *res,
99 struct ttm_validate_buffer *val_buf);
100static int vmw_gb_surface_unbind(struct vmw_resource *res,
101 bool readback,
102 struct ttm_validate_buffer *val_buf);
103static int vmw_gb_surface_destroy(struct vmw_resource *res);
104static int
105vmw_gb_surface_define_internal(struct drm_device *dev,
106 struct drm_vmw_gb_surface_create_ext_req *req,
107 struct drm_vmw_gb_surface_create_rep *rep,
108 struct drm_file *file_priv);
109static int
110vmw_gb_surface_reference_internal(struct drm_device *dev,
111 struct drm_vmw_surface_arg *req,
112 struct drm_vmw_gb_surface_ref_ext_rep *rep,
113 struct drm_file *file_priv);
114
115static void vmw_surface_dirty_free(struct vmw_resource *res);
116static int vmw_surface_dirty_alloc(struct vmw_resource *res);
117static int vmw_surface_dirty_sync(struct vmw_resource *res);
118static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
119 size_t end);
120static int vmw_surface_clean(struct vmw_resource *res);
121
122static const struct vmw_user_resource_conv user_surface_conv = {
123 .object_type = VMW_RES_SURFACE,
124 .base_obj_to_res = vmw_user_surface_base_to_res,
125 .res_free = vmw_user_surface_free
126};
127
128const struct vmw_user_resource_conv *user_surface_converter =
129 &user_surface_conv;
130
131
132static uint64_t vmw_user_surface_size;
133
134static const struct vmw_res_func vmw_legacy_surface_func = {
135 .res_type = vmw_res_surface,
136 .needs_backup = false,
137 .may_evict = true,
138 .prio = 1,
139 .dirty_prio = 1,
140 .type_name = "legacy surfaces",
141 .backup_placement = &vmw_srf_placement,
142 .create = &vmw_legacy_srf_create,
143 .destroy = &vmw_legacy_srf_destroy,
144 .bind = &vmw_legacy_srf_bind,
145 .unbind = &vmw_legacy_srf_unbind
146};
147
148static const struct vmw_res_func vmw_gb_surface_func = {
149 .res_type = vmw_res_surface,
150 .needs_backup = true,
151 .may_evict = true,
152 .prio = 1,
153 .dirty_prio = 2,
154 .type_name = "guest backed surfaces",
155 .backup_placement = &vmw_mob_placement,
156 .create = vmw_gb_surface_create,
157 .destroy = vmw_gb_surface_destroy,
158 .bind = vmw_gb_surface_bind,
159 .unbind = vmw_gb_surface_unbind,
160 .dirty_alloc = vmw_surface_dirty_alloc,
161 .dirty_free = vmw_surface_dirty_free,
162 .dirty_sync = vmw_surface_dirty_sync,
163 .dirty_range_add = vmw_surface_dirty_range_add,
164 .clean = vmw_surface_clean,
165};
166
167/*
168 * struct vmw_surface_dma - SVGA3D DMA command
169 */
170struct vmw_surface_dma {
171 SVGA3dCmdHeader header;
172 SVGA3dCmdSurfaceDMA body;
173 SVGA3dCopyBox cb;
174 SVGA3dCmdSurfaceDMASuffix suffix;
175};
176
177/*
178 * struct vmw_surface_define - SVGA3D Surface Define command
179 */
180struct vmw_surface_define {
181 SVGA3dCmdHeader header;
182 SVGA3dCmdDefineSurface body;
183};
184
185/*
186 * struct vmw_surface_destroy - SVGA3D Surface Destroy command
187 */
188struct vmw_surface_destroy {
189 SVGA3dCmdHeader header;
190 SVGA3dCmdDestroySurface body;
191};
192
193
194/**
195 * vmw_surface_dma_size - Compute fifo size for a dma command.
196 *
197 * @srf: Pointer to a struct vmw_surface
198 *
199 * Computes the required size for a surface dma command for backup or
200 * restoration of the surface represented by @srf.
201 */
202static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
203{
204 return srf->metadata.num_sizes * sizeof(struct vmw_surface_dma);
205}
206
207
208/**
209 * vmw_surface_define_size - Compute fifo size for a surface define command.
210 *
211 * @srf: Pointer to a struct vmw_surface
212 *
213 * Computes the required size for a surface define command for the definition
214 * of the surface represented by @srf.
215 */
216static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
217{
218 return sizeof(struct vmw_surface_define) + srf->metadata.num_sizes *
219 sizeof(SVGA3dSize);
220}
221
222
223/**
224 * vmw_surface_destroy_size - Compute fifo size for a surface destroy command.
225 *
226 * Computes the required size for a surface destroy command for the destruction
227 * of a hw surface.
228 */
229static inline uint32_t vmw_surface_destroy_size(void)
230{
231 return sizeof(struct vmw_surface_destroy);
232}
233
234/**
235 * vmw_surface_destroy_encode - Encode a surface_destroy command.
236 *
237 * @id: The surface id
238 * @cmd_space: Pointer to memory area in which the commands should be encoded.
239 */
240static void vmw_surface_destroy_encode(uint32_t id,
241 void *cmd_space)
242{
243 struct vmw_surface_destroy *cmd = (struct vmw_surface_destroy *)
244 cmd_space;
245
246 cmd->header.id = SVGA_3D_CMD_SURFACE_DESTROY;
247 cmd->header.size = sizeof(cmd->body);
248 cmd->body.sid = id;
249}
250
251/**
252 * vmw_surface_define_encode - Encode a surface_define command.
253 *
254 * @srf: Pointer to a struct vmw_surface object.
255 * @cmd_space: Pointer to memory area in which the commands should be encoded.
256 */
257static void vmw_surface_define_encode(const struct vmw_surface *srf,
258 void *cmd_space)
259{
260 struct vmw_surface_define *cmd = (struct vmw_surface_define *)
261 cmd_space;
262 struct drm_vmw_size *src_size;
263 SVGA3dSize *cmd_size;
264 uint32_t cmd_len;
265 int i;
266
267 cmd_len = sizeof(cmd->body) + srf->metadata.num_sizes *
268 sizeof(SVGA3dSize);
269
270 cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
271 cmd->header.size = cmd_len;
272 cmd->body.sid = srf->res.id;
273 /*
274 * Downcast of surfaceFlags, was upcasted when received from user-space,
275 * since driver internally stores as 64 bit.
276 * For legacy surface define only 32 bit flag is supported.
277 */
278 cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->metadata.flags;
279 cmd->body.format = srf->metadata.format;
280 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
281 cmd->body.face[i].numMipLevels = srf->metadata.mip_levels[i];
282
283 cmd += 1;
284 cmd_size = (SVGA3dSize *) cmd;
285 src_size = srf->metadata.sizes;
286
287 for (i = 0; i < srf->metadata.num_sizes; ++i, cmd_size++, src_size++) {
288 cmd_size->width = src_size->width;
289 cmd_size->height = src_size->height;
290 cmd_size->depth = src_size->depth;
291 }
292}
293
294/**
295 * vmw_surface_dma_encode - Encode a surface_dma command.
296 *
297 * @srf: Pointer to a struct vmw_surface object.
298 * @cmd_space: Pointer to memory area in which the commands should be encoded.
299 * @ptr: Pointer to an SVGAGuestPtr indicating where the surface contents
300 * should be placed or read from.
301 * @to_surface: Boolean whether to DMA to the surface or from the surface.
302 */
303static void vmw_surface_dma_encode(struct vmw_surface *srf,
304 void *cmd_space,
305 const SVGAGuestPtr *ptr,
306 bool to_surface)
307{
308 uint32_t i;
309 struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
310 const struct svga3d_surface_desc *desc =
311 svga3dsurface_get_desc(srf->metadata.format);
312
313 for (i = 0; i < srf->metadata.num_sizes; ++i) {
314 SVGA3dCmdHeader *header = &cmd->header;
315 SVGA3dCmdSurfaceDMA *body = &cmd->body;
316 SVGA3dCopyBox *cb = &cmd->cb;
317 SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
318 const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
319 const struct drm_vmw_size *cur_size = &srf->metadata.sizes[i];
320
321 header->id = SVGA_3D_CMD_SURFACE_DMA;
322 header->size = sizeof(*body) + sizeof(*cb) + sizeof(*suffix);
323
324 body->guest.ptr = *ptr;
325 body->guest.ptr.offset += cur_offset->bo_offset;
326 body->guest.pitch = svga3dsurface_calculate_pitch(desc,
327 cur_size);
328 body->host.sid = srf->res.id;
329 body->host.face = cur_offset->face;
330 body->host.mipmap = cur_offset->mip;
331 body->transfer = ((to_surface) ? SVGA3D_WRITE_HOST_VRAM :
332 SVGA3D_READ_HOST_VRAM);
333 cb->x = 0;
334 cb->y = 0;
335 cb->z = 0;
336 cb->srcx = 0;
337 cb->srcy = 0;
338 cb->srcz = 0;
339 cb->w = cur_size->width;
340 cb->h = cur_size->height;
341 cb->d = cur_size->depth;
342
343 suffix->suffixSize = sizeof(*suffix);
344 suffix->maximumOffset =
345 svga3dsurface_get_image_buffer_size(desc, cur_size,
346 body->guest.pitch);
347 suffix->flags.discard = 0;
348 suffix->flags.unsynchronized = 0;
349 suffix->flags.reserved = 0;
350 ++cmd;
351 }
352};
353
354
355/**
356 * vmw_hw_surface_destroy - destroy a Device surface
357 *
358 * @res: Pointer to a struct vmw_resource embedded in a struct
359 * vmw_surface.
360 *
361 * Destroys a the device surface associated with a struct vmw_surface if
362 * any, and adjusts accounting and resource count accordingly.
363 */
364static void vmw_hw_surface_destroy(struct vmw_resource *res)
365{
366
367 struct vmw_private *dev_priv = res->dev_priv;
368 void *cmd;
369
370 if (res->func->destroy == vmw_gb_surface_destroy) {
371 (void) vmw_gb_surface_destroy(res);
372 return;
373 }
374
375 if (res->id != -1) {
376
377 cmd = VMW_CMD_RESERVE(dev_priv, vmw_surface_destroy_size());
378 if (unlikely(!cmd))
379 return;
380
381 vmw_surface_destroy_encode(res->id, cmd);
382 vmw_cmd_commit(dev_priv, vmw_surface_destroy_size());
383
384 /*
385 * used_memory_size_atomic, or separate lock
386 * to avoid taking dev_priv::cmdbuf_mutex in
387 * the destroy path.
388 */
389
390 mutex_lock(&dev_priv->cmdbuf_mutex);
391 dev_priv->used_memory_size -= res->backup_size;
392 mutex_unlock(&dev_priv->cmdbuf_mutex);
393 }
394}
395
396/**
397 * vmw_legacy_srf_create - Create a device surface as part of the
398 * resource validation process.
399 *
400 * @res: Pointer to a struct vmw_surface.
401 *
402 * If the surface doesn't have a hw id.
403 *
404 * Returns -EBUSY if there wasn't sufficient device resources to
405 * complete the validation. Retry after freeing up resources.
406 *
407 * May return other errors if the kernel is out of guest resources.
408 */
409static int vmw_legacy_srf_create(struct vmw_resource *res)
410{
411 struct vmw_private *dev_priv = res->dev_priv;
412 struct vmw_surface *srf;
413 uint32_t submit_size;
414 uint8_t *cmd;
415 int ret;
416
417 if (likely(res->id != -1))
418 return 0;
419
420 srf = vmw_res_to_srf(res);
421 if (unlikely(dev_priv->used_memory_size + res->backup_size >=
422 dev_priv->memory_size))
423 return -EBUSY;
424
425 /*
426 * Alloc id for the resource.
427 */
428
429 ret = vmw_resource_alloc_id(res);
430 if (unlikely(ret != 0)) {
431 DRM_ERROR("Failed to allocate a surface id.\n");
432 goto out_no_id;
433 }
434
435 if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
436 ret = -EBUSY;
437 goto out_no_fifo;
438 }
439
440 /*
441 * Encode surface define- commands.
442 */
443
444 submit_size = vmw_surface_define_size(srf);
445 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
446 if (unlikely(!cmd)) {
447 ret = -ENOMEM;
448 goto out_no_fifo;
449 }
450
451 vmw_surface_define_encode(srf, cmd);
452 vmw_cmd_commit(dev_priv, submit_size);
453 vmw_fifo_resource_inc(dev_priv);
454
455 /*
456 * Surface memory usage accounting.
457 */
458
459 dev_priv->used_memory_size += res->backup_size;
460 return 0;
461
462out_no_fifo:
463 vmw_resource_release_id(res);
464out_no_id:
465 return ret;
466}
467
468/**
469 * vmw_legacy_srf_dma - Copy backup data to or from a legacy surface.
470 *
471 * @res: Pointer to a struct vmw_res embedded in a struct
472 * vmw_surface.
473 * @val_buf: Pointer to a struct ttm_validate_buffer containing
474 * information about the backup buffer.
475 * @bind: Boolean wether to DMA to the surface.
476 *
477 * Transfer backup data to or from a legacy surface as part of the
478 * validation process.
479 * May return other errors if the kernel is out of guest resources.
480 * The backup buffer will be fenced or idle upon successful completion,
481 * and if the surface needs persistent backup storage, the backup buffer
482 * will also be returned reserved iff @bind is true.
483 */
484static int vmw_legacy_srf_dma(struct vmw_resource *res,
485 struct ttm_validate_buffer *val_buf,
486 bool bind)
487{
488 SVGAGuestPtr ptr;
489 struct vmw_fence_obj *fence;
490 uint32_t submit_size;
491 struct vmw_surface *srf = vmw_res_to_srf(res);
492 uint8_t *cmd;
493 struct vmw_private *dev_priv = res->dev_priv;
494
495 BUG_ON(!val_buf->bo);
496 submit_size = vmw_surface_dma_size(srf);
497 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
498 if (unlikely(!cmd))
499 return -ENOMEM;
500
501 vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
502 vmw_surface_dma_encode(srf, cmd, &ptr, bind);
503
504 vmw_cmd_commit(dev_priv, submit_size);
505
506 /*
507 * Create a fence object and fence the backup buffer.
508 */
509
510 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
511 &fence, NULL);
512
513 vmw_bo_fence_single(val_buf->bo, fence);
514
515 if (likely(fence != NULL))
516 vmw_fence_obj_unreference(&fence);
517
518 return 0;
519}
520
521/**
522 * vmw_legacy_srf_bind - Perform a legacy surface bind as part of the
523 * surface validation process.
524 *
525 * @res: Pointer to a struct vmw_res embedded in a struct
526 * vmw_surface.
527 * @val_buf: Pointer to a struct ttm_validate_buffer containing
528 * information about the backup buffer.
529 *
530 * This function will copy backup data to the surface if the
531 * backup buffer is dirty.
532 */
533static int vmw_legacy_srf_bind(struct vmw_resource *res,
534 struct ttm_validate_buffer *val_buf)
535{
536 if (!res->backup_dirty)
537 return 0;
538
539 return vmw_legacy_srf_dma(res, val_buf, true);
540}
541
542
543/**
544 * vmw_legacy_srf_unbind - Perform a legacy surface unbind as part of the
545 * surface eviction process.
546 *
547 * @res: Pointer to a struct vmw_res embedded in a struct
548 * vmw_surface.
549 * @readback: Readback - only true if dirty
550 * @val_buf: Pointer to a struct ttm_validate_buffer containing
551 * information about the backup buffer.
552 *
553 * This function will copy backup data from the surface.
554 */
555static int vmw_legacy_srf_unbind(struct vmw_resource *res,
556 bool readback,
557 struct ttm_validate_buffer *val_buf)
558{
559 if (unlikely(readback))
560 return vmw_legacy_srf_dma(res, val_buf, false);
561 return 0;
562}
563
564/**
565 * vmw_legacy_srf_destroy - Destroy a device surface as part of a
566 * resource eviction process.
567 *
568 * @res: Pointer to a struct vmw_res embedded in a struct
569 * vmw_surface.
570 */
571static int vmw_legacy_srf_destroy(struct vmw_resource *res)
572{
573 struct vmw_private *dev_priv = res->dev_priv;
574 uint32_t submit_size;
575 uint8_t *cmd;
576
577 BUG_ON(res->id == -1);
578
579 /*
580 * Encode the dma- and surface destroy commands.
581 */
582
583 submit_size = vmw_surface_destroy_size();
584 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
585 if (unlikely(!cmd))
586 return -ENOMEM;
587
588 vmw_surface_destroy_encode(res->id, cmd);
589 vmw_cmd_commit(dev_priv, submit_size);
590
591 /*
592 * Surface memory usage accounting.
593 */
594
595 dev_priv->used_memory_size -= res->backup_size;
596
597 /*
598 * Release the surface ID.
599 */
600
601 vmw_resource_release_id(res);
602 vmw_fifo_resource_dec(dev_priv);
603
604 return 0;
605}
606
607
608/**
609 * vmw_surface_init - initialize a struct vmw_surface
610 *
611 * @dev_priv: Pointer to a device private struct.
612 * @srf: Pointer to the struct vmw_surface to initialize.
613 * @res_free: Pointer to a resource destructor used to free
614 * the object.
615 */
616static int vmw_surface_init(struct vmw_private *dev_priv,
617 struct vmw_surface *srf,
618 void (*res_free) (struct vmw_resource *res))
619{
620 int ret;
621 struct vmw_resource *res = &srf->res;
622
623 BUG_ON(!res_free);
624 ret = vmw_resource_init(dev_priv, res, true, res_free,
625 (dev_priv->has_mob) ? &vmw_gb_surface_func :
626 &vmw_legacy_surface_func);
627
628 if (unlikely(ret != 0)) {
629 res_free(res);
630 return ret;
631 }
632
633 /*
634 * The surface won't be visible to hardware until a
635 * surface validate.
636 */
637
638 INIT_LIST_HEAD(&srf->view_list);
639 res->hw_destroy = vmw_hw_surface_destroy;
640 return ret;
641}
642
643/**
644 * vmw_user_surface_base_to_res - TTM base object to resource converter for
645 * user visible surfaces
646 *
647 * @base: Pointer to a TTM base object
648 *
649 * Returns the struct vmw_resource embedded in a struct vmw_surface
650 * for the user-visible object identified by the TTM base object @base.
651 */
652static struct vmw_resource *
653vmw_user_surface_base_to_res(struct ttm_base_object *base)
654{
655 return &(container_of(base, struct vmw_user_surface,
656 prime.base)->srf.res);
657}
658
659/**
660 * vmw_user_surface_free - User visible surface resource destructor
661 *
662 * @res: A struct vmw_resource embedded in a struct vmw_surface.
663 */
664static void vmw_user_surface_free(struct vmw_resource *res)
665{
666 struct vmw_surface *srf = vmw_res_to_srf(res);
667 struct vmw_user_surface *user_srf =
668 container_of(srf, struct vmw_user_surface, srf);
669 struct vmw_private *dev_priv = srf->res.dev_priv;
670 uint32_t size = user_srf->size;
671
672 WARN_ON_ONCE(res->dirty);
673 if (user_srf->master)
674 drm_master_put(&user_srf->master);
675 kfree(srf->offsets);
676 kfree(srf->metadata.sizes);
677 kfree(srf->snooper.image);
678 ttm_prime_object_kfree(user_srf, prime);
679 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
680}
681
682/**
683 * vmw_user_surface_base_release - User visible surface TTM base object destructor
684 *
685 * @p_base: Pointer to a pointer to a TTM base object
686 * embedded in a struct vmw_user_surface.
687 *
688 * Drops the base object's reference on its resource, and the
689 * pointer pointed to by *p_base is set to NULL.
690 */
691static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
692{
693 struct ttm_base_object *base = *p_base;
694 struct vmw_user_surface *user_srf =
695 container_of(base, struct vmw_user_surface, prime.base);
696 struct vmw_resource *res = &user_srf->srf.res;
697
698 *p_base = NULL;
699 if (user_srf->backup_base)
700 ttm_base_object_unref(&user_srf->backup_base);
701 vmw_resource_unreference(&res);
702}
703
704/**
705 * vmw_surface_destroy_ioctl - Ioctl function implementing
706 * the user surface destroy functionality.
707 *
708 * @dev: Pointer to a struct drm_device.
709 * @data: Pointer to data copied from / to user-space.
710 * @file_priv: Pointer to a drm file private structure.
711 */
712int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
713 struct drm_file *file_priv)
714{
715 struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
716 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
717
718 return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
719}
720
721/**
722 * vmw_surface_define_ioctl - Ioctl function implementing
723 * the user surface define functionality.
724 *
725 * @dev: Pointer to a struct drm_device.
726 * @data: Pointer to data copied from / to user-space.
727 * @file_priv: Pointer to a drm file private structure.
728 */
729int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
730 struct drm_file *file_priv)
731{
732 struct vmw_private *dev_priv = vmw_priv(dev);
733 struct vmw_user_surface *user_srf;
734 struct vmw_surface *srf;
735 struct vmw_surface_metadata *metadata;
736 struct vmw_resource *res;
737 struct vmw_resource *tmp;
738 union drm_vmw_surface_create_arg *arg =
739 (union drm_vmw_surface_create_arg *)data;
740 struct drm_vmw_surface_create_req *req = &arg->req;
741 struct drm_vmw_surface_arg *rep = &arg->rep;
742 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
743 struct ttm_operation_ctx ctx = {
744 .interruptible = true,
745 .no_wait_gpu = false
746 };
747 int ret;
748 int i, j;
749 uint32_t cur_bo_offset;
750 struct drm_vmw_size *cur_size;
751 struct vmw_surface_offset *cur_offset;
752 uint32_t num_sizes;
753 uint32_t size;
754 const struct svga3d_surface_desc *desc;
755
756 if (unlikely(vmw_user_surface_size == 0))
757 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
758 VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
759
760 num_sizes = 0;
761 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
762 if (req->mip_levels[i] > DRM_VMW_MAX_MIP_LEVELS)
763 return -EINVAL;
764 num_sizes += req->mip_levels[i];
765 }
766
767 if (num_sizes > DRM_VMW_MAX_SURFACE_FACES * DRM_VMW_MAX_MIP_LEVELS ||
768 num_sizes == 0)
769 return -EINVAL;
770
771 size = vmw_user_surface_size +
772 ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
773 ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
774
775 desc = svga3dsurface_get_desc(req->format);
776 if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
777 VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
778 req->format);
779 return -EINVAL;
780 }
781
782 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
783 size, &ctx);
784 if (unlikely(ret != 0)) {
785 if (ret != -ERESTARTSYS)
786 DRM_ERROR("Out of graphics memory for surface.\n");
787 goto out_unlock;
788 }
789
790 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
791 if (unlikely(!user_srf)) {
792 ret = -ENOMEM;
793 goto out_no_user_srf;
794 }
795
796 srf = &user_srf->srf;
797 metadata = &srf->metadata;
798 res = &srf->res;
799
800 /* Driver internally stores as 64-bit flags */
801 metadata->flags = (SVGA3dSurfaceAllFlags)req->flags;
802 metadata->format = req->format;
803 metadata->scanout = req->scanout;
804
805 memcpy(metadata->mip_levels, req->mip_levels,
806 sizeof(metadata->mip_levels));
807 metadata->num_sizes = num_sizes;
808 user_srf->size = size;
809 metadata->sizes =
810 memdup_user((struct drm_vmw_size __user *)(unsigned long)
811 req->size_addr,
812 sizeof(*metadata->sizes) * metadata->num_sizes);
813 if (IS_ERR(metadata->sizes)) {
814 ret = PTR_ERR(metadata->sizes);
815 goto out_no_sizes;
816 }
817 srf->offsets = kmalloc_array(metadata->num_sizes, sizeof(*srf->offsets),
818 GFP_KERNEL);
819 if (unlikely(!srf->offsets)) {
820 ret = -ENOMEM;
821 goto out_no_offsets;
822 }
823
824 metadata->base_size = *srf->metadata.sizes;
825 metadata->autogen_filter = SVGA3D_TEX_FILTER_NONE;
826 metadata->multisample_count = 0;
827 metadata->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
828 metadata->quality_level = SVGA3D_MS_QUALITY_NONE;
829
830 cur_bo_offset = 0;
831 cur_offset = srf->offsets;
832 cur_size = metadata->sizes;
833
834 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
835 for (j = 0; j < metadata->mip_levels[i]; ++j) {
836 uint32_t stride = svga3dsurface_calculate_pitch
837 (desc, cur_size);
838
839 cur_offset->face = i;
840 cur_offset->mip = j;
841 cur_offset->bo_offset = cur_bo_offset;
842 cur_bo_offset += svga3dsurface_get_image_buffer_size
843 (desc, cur_size, stride);
844 ++cur_offset;
845 ++cur_size;
846 }
847 }
848 res->backup_size = cur_bo_offset;
849 if (metadata->scanout &&
850 metadata->num_sizes == 1 &&
851 metadata->sizes[0].width == 64 &&
852 metadata->sizes[0].height == 64 &&
853 metadata->format == SVGA3D_A8R8G8B8) {
854
855 srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
856 if (!srf->snooper.image) {
857 DRM_ERROR("Failed to allocate cursor_image\n");
858 ret = -ENOMEM;
859 goto out_no_copy;
860 }
861 } else {
862 srf->snooper.image = NULL;
863 }
864
865 user_srf->prime.base.shareable = false;
866 user_srf->prime.base.tfile = NULL;
867 if (drm_is_primary_client(file_priv))
868 user_srf->master = drm_file_get_master(file_priv);
869
870 /**
871 * From this point, the generic resource management functions
872 * destroy the object on failure.
873 */
874
875 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
876 if (unlikely(ret != 0))
877 goto out_unlock;
878
879 /*
880 * A gb-aware client referencing a shared surface will
881 * expect a backup buffer to be present.
882 */
883 if (dev_priv->has_mob && req->shareable) {
884 uint32_t backup_handle;
885
886 ret = vmw_user_bo_alloc(dev_priv, tfile,
887 res->backup_size,
888 true,
889 &backup_handle,
890 &res->backup,
891 &user_srf->backup_base);
892 if (unlikely(ret != 0)) {
893 vmw_resource_unreference(&res);
894 goto out_unlock;
895 }
896 }
897
898 tmp = vmw_resource_reference(&srf->res);
899 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
900 req->shareable, VMW_RES_SURFACE,
901 &vmw_user_surface_base_release, NULL);
902
903 if (unlikely(ret != 0)) {
904 vmw_resource_unreference(&tmp);
905 vmw_resource_unreference(&res);
906 goto out_unlock;
907 }
908
909 rep->sid = user_srf->prime.base.handle;
910 vmw_resource_unreference(&res);
911
912 return 0;
913out_no_copy:
914 kfree(srf->offsets);
915out_no_offsets:
916 kfree(metadata->sizes);
917out_no_sizes:
918 ttm_prime_object_kfree(user_srf, prime);
919out_no_user_srf:
920 ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
921out_unlock:
922 return ret;
923}
924
925
926static int
927vmw_surface_handle_reference(struct vmw_private *dev_priv,
928 struct drm_file *file_priv,
929 uint32_t u_handle,
930 enum drm_vmw_handle_type handle_type,
931 struct ttm_base_object **base_p)
932{
933 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
934 struct vmw_user_surface *user_srf;
935 uint32_t handle;
936 struct ttm_base_object *base;
937 int ret;
938
939 if (handle_type == DRM_VMW_HANDLE_PRIME) {
940 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
941 if (unlikely(ret != 0))
942 return ret;
943 } else {
944 handle = u_handle;
945 }
946
947 ret = -EINVAL;
948 base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
949 if (unlikely(!base)) {
950 VMW_DEBUG_USER("Could not find surface to reference.\n");
951 goto out_no_lookup;
952 }
953
954 if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
955 VMW_DEBUG_USER("Referenced object is not a surface.\n");
956 goto out_bad_resource;
957 }
958
959 if (handle_type != DRM_VMW_HANDLE_PRIME) {
960 bool require_exist = false;
961
962 user_srf = container_of(base, struct vmw_user_surface,
963 prime.base);
964
965 /* Error out if we are unauthenticated primary */
966 if (drm_is_primary_client(file_priv) &&
967 !file_priv->authenticated) {
968 ret = -EACCES;
969 goto out_bad_resource;
970 }
971
972 /*
973 * Make sure the surface creator has the same
974 * authenticating master, or is already registered with us.
975 */
976 if (drm_is_primary_client(file_priv) &&
977 user_srf->master != file_priv->master)
978 require_exist = true;
979
980 if (unlikely(drm_is_render_client(file_priv)))
981 require_exist = true;
982
983 ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
984 require_exist);
985 if (unlikely(ret != 0)) {
986 DRM_ERROR("Could not add a reference to a surface.\n");
987 goto out_bad_resource;
988 }
989 }
990
991 *base_p = base;
992 return 0;
993
994out_bad_resource:
995 ttm_base_object_unref(&base);
996out_no_lookup:
997 if (handle_type == DRM_VMW_HANDLE_PRIME)
998 (void) ttm_ref_object_base_unref(tfile, handle, TTM_REF_USAGE);
999
1000 return ret;
1001}
1002
1003/**
1004 * vmw_surface_reference_ioctl - Ioctl function implementing
1005 * the user surface reference functionality.
1006 *
1007 * @dev: Pointer to a struct drm_device.
1008 * @data: Pointer to data copied from / to user-space.
1009 * @file_priv: Pointer to a drm file private structure.
1010 */
1011int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
1012 struct drm_file *file_priv)
1013{
1014 struct vmw_private *dev_priv = vmw_priv(dev);
1015 union drm_vmw_surface_reference_arg *arg =
1016 (union drm_vmw_surface_reference_arg *)data;
1017 struct drm_vmw_surface_arg *req = &arg->req;
1018 struct drm_vmw_surface_create_req *rep = &arg->rep;
1019 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1020 struct vmw_surface *srf;
1021 struct vmw_user_surface *user_srf;
1022 struct drm_vmw_size __user *user_sizes;
1023 struct ttm_base_object *base;
1024 int ret;
1025
1026 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1027 req->handle_type, &base);
1028 if (unlikely(ret != 0))
1029 return ret;
1030
1031 user_srf = container_of(base, struct vmw_user_surface, prime.base);
1032 srf = &user_srf->srf;
1033
1034 /* Downcast of flags when sending back to user space */
1035 rep->flags = (uint32_t)srf->metadata.flags;
1036 rep->format = srf->metadata.format;
1037 memcpy(rep->mip_levels, srf->metadata.mip_levels,
1038 sizeof(srf->metadata.mip_levels));
1039 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1040 rep->size_addr;
1041
1042 if (user_sizes)
1043 ret = copy_to_user(user_sizes, &srf->metadata.base_size,
1044 sizeof(srf->metadata.base_size));
1045 if (unlikely(ret != 0)) {
1046 VMW_DEBUG_USER("copy_to_user failed %p %u\n", user_sizes,
1047 srf->metadata.num_sizes);
1048 ttm_ref_object_base_unref(tfile, base->handle, TTM_REF_USAGE);
1049 ret = -EFAULT;
1050 }
1051
1052 ttm_base_object_unref(&base);
1053
1054 return ret;
1055}
1056
1057/**
1058 * vmw_gb_surface_create - Encode a surface_define command.
1059 *
1060 * @res: Pointer to a struct vmw_resource embedded in a struct
1061 * vmw_surface.
1062 */
1063static int vmw_gb_surface_create(struct vmw_resource *res)
1064{
1065 struct vmw_private *dev_priv = res->dev_priv;
1066 struct vmw_surface *srf = vmw_res_to_srf(res);
1067 struct vmw_surface_metadata *metadata = &srf->metadata;
1068 uint32_t cmd_len, cmd_id, submit_len;
1069 int ret;
1070 struct {
1071 SVGA3dCmdHeader header;
1072 SVGA3dCmdDefineGBSurface body;
1073 } *cmd;
1074 struct {
1075 SVGA3dCmdHeader header;
1076 SVGA3dCmdDefineGBSurface_v2 body;
1077 } *cmd2;
1078 struct {
1079 SVGA3dCmdHeader header;
1080 SVGA3dCmdDefineGBSurface_v3 body;
1081 } *cmd3;
1082 struct {
1083 SVGA3dCmdHeader header;
1084 SVGA3dCmdDefineGBSurface_v4 body;
1085 } *cmd4;
1086
1087 if (likely(res->id != -1))
1088 return 0;
1089
1090 vmw_fifo_resource_inc(dev_priv);
1091 ret = vmw_resource_alloc_id(res);
1092 if (unlikely(ret != 0)) {
1093 DRM_ERROR("Failed to allocate a surface id.\n");
1094 goto out_no_id;
1095 }
1096
1097 if (unlikely(res->id >= VMWGFX_NUM_GB_SURFACE)) {
1098 ret = -EBUSY;
1099 goto out_no_fifo;
1100 }
1101
1102 if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1103 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V4;
1104 cmd_len = sizeof(cmd4->body);
1105 submit_len = sizeof(*cmd4);
1106 } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1107 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1108 cmd_len = sizeof(cmd3->body);
1109 submit_len = sizeof(*cmd3);
1110 } else if (metadata->array_size > 0) {
1111 /* VMW_SM_4 support verified at creation time. */
1112 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1113 cmd_len = sizeof(cmd2->body);
1114 submit_len = sizeof(*cmd2);
1115 } else {
1116 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE;
1117 cmd_len = sizeof(cmd->body);
1118 submit_len = sizeof(*cmd);
1119 }
1120
1121 cmd = VMW_CMD_RESERVE(dev_priv, submit_len);
1122 cmd2 = (typeof(cmd2))cmd;
1123 cmd3 = (typeof(cmd3))cmd;
1124 cmd4 = (typeof(cmd4))cmd;
1125 if (unlikely(!cmd)) {
1126 ret = -ENOMEM;
1127 goto out_no_fifo;
1128 }
1129
1130 if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1131 cmd4->header.id = cmd_id;
1132 cmd4->header.size = cmd_len;
1133 cmd4->body.sid = srf->res.id;
1134 cmd4->body.surfaceFlags = metadata->flags;
1135 cmd4->body.format = metadata->format;
1136 cmd4->body.numMipLevels = metadata->mip_levels[0];
1137 cmd4->body.multisampleCount = metadata->multisample_count;
1138 cmd4->body.multisamplePattern = metadata->multisample_pattern;
1139 cmd4->body.qualityLevel = metadata->quality_level;
1140 cmd4->body.autogenFilter = metadata->autogen_filter;
1141 cmd4->body.size.width = metadata->base_size.width;
1142 cmd4->body.size.height = metadata->base_size.height;
1143 cmd4->body.size.depth = metadata->base_size.depth;
1144 cmd4->body.arraySize = metadata->array_size;
1145 cmd4->body.bufferByteStride = metadata->buffer_byte_stride;
1146 } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1147 cmd3->header.id = cmd_id;
1148 cmd3->header.size = cmd_len;
1149 cmd3->body.sid = srf->res.id;
1150 cmd3->body.surfaceFlags = metadata->flags;
1151 cmd3->body.format = metadata->format;
1152 cmd3->body.numMipLevels = metadata->mip_levels[0];
1153 cmd3->body.multisampleCount = metadata->multisample_count;
1154 cmd3->body.multisamplePattern = metadata->multisample_pattern;
1155 cmd3->body.qualityLevel = metadata->quality_level;
1156 cmd3->body.autogenFilter = metadata->autogen_filter;
1157 cmd3->body.size.width = metadata->base_size.width;
1158 cmd3->body.size.height = metadata->base_size.height;
1159 cmd3->body.size.depth = metadata->base_size.depth;
1160 cmd3->body.arraySize = metadata->array_size;
1161 } else if (metadata->array_size > 0) {
1162 cmd2->header.id = cmd_id;
1163 cmd2->header.size = cmd_len;
1164 cmd2->body.sid = srf->res.id;
1165 cmd2->body.surfaceFlags = metadata->flags;
1166 cmd2->body.format = metadata->format;
1167 cmd2->body.numMipLevels = metadata->mip_levels[0];
1168 cmd2->body.multisampleCount = metadata->multisample_count;
1169 cmd2->body.autogenFilter = metadata->autogen_filter;
1170 cmd2->body.size.width = metadata->base_size.width;
1171 cmd2->body.size.height = metadata->base_size.height;
1172 cmd2->body.size.depth = metadata->base_size.depth;
1173 cmd2->body.arraySize = metadata->array_size;
1174 } else {
1175 cmd->header.id = cmd_id;
1176 cmd->header.size = cmd_len;
1177 cmd->body.sid = srf->res.id;
1178 cmd->body.surfaceFlags = metadata->flags;
1179 cmd->body.format = metadata->format;
1180 cmd->body.numMipLevels = metadata->mip_levels[0];
1181 cmd->body.multisampleCount = metadata->multisample_count;
1182 cmd->body.autogenFilter = metadata->autogen_filter;
1183 cmd->body.size.width = metadata->base_size.width;
1184 cmd->body.size.height = metadata->base_size.height;
1185 cmd->body.size.depth = metadata->base_size.depth;
1186 }
1187
1188 vmw_cmd_commit(dev_priv, submit_len);
1189
1190 return 0;
1191
1192out_no_fifo:
1193 vmw_resource_release_id(res);
1194out_no_id:
1195 vmw_fifo_resource_dec(dev_priv);
1196 return ret;
1197}
1198
1199
1200static int vmw_gb_surface_bind(struct vmw_resource *res,
1201 struct ttm_validate_buffer *val_buf)
1202{
1203 struct vmw_private *dev_priv = res->dev_priv;
1204 struct {
1205 SVGA3dCmdHeader header;
1206 SVGA3dCmdBindGBSurface body;
1207 } *cmd1;
1208 struct {
1209 SVGA3dCmdHeader header;
1210 SVGA3dCmdUpdateGBSurface body;
1211 } *cmd2;
1212 uint32_t submit_size;
1213 struct ttm_buffer_object *bo = val_buf->bo;
1214
1215 BUG_ON(bo->resource->mem_type != VMW_PL_MOB);
1216
1217 submit_size = sizeof(*cmd1) + (res->backup_dirty ? sizeof(*cmd2) : 0);
1218
1219 cmd1 = VMW_CMD_RESERVE(dev_priv, submit_size);
1220 if (unlikely(!cmd1))
1221 return -ENOMEM;
1222
1223 cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1224 cmd1->header.size = sizeof(cmd1->body);
1225 cmd1->body.sid = res->id;
1226 cmd1->body.mobid = bo->resource->start;
1227 if (res->backup_dirty) {
1228 cmd2 = (void *) &cmd1[1];
1229 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1230 cmd2->header.size = sizeof(cmd2->body);
1231 cmd2->body.sid = res->id;
1232 }
1233 vmw_cmd_commit(dev_priv, submit_size);
1234
1235 if (res->backup->dirty && res->backup_dirty) {
1236 /* We've just made a full upload. Cear dirty regions. */
1237 vmw_bo_dirty_clear_res(res);
1238 }
1239
1240 res->backup_dirty = false;
1241
1242 return 0;
1243}
1244
1245static int vmw_gb_surface_unbind(struct vmw_resource *res,
1246 bool readback,
1247 struct ttm_validate_buffer *val_buf)
1248{
1249 struct vmw_private *dev_priv = res->dev_priv;
1250 struct ttm_buffer_object *bo = val_buf->bo;
1251 struct vmw_fence_obj *fence;
1252
1253 struct {
1254 SVGA3dCmdHeader header;
1255 SVGA3dCmdReadbackGBSurface body;
1256 } *cmd1;
1257 struct {
1258 SVGA3dCmdHeader header;
1259 SVGA3dCmdInvalidateGBSurface body;
1260 } *cmd2;
1261 struct {
1262 SVGA3dCmdHeader header;
1263 SVGA3dCmdBindGBSurface body;
1264 } *cmd3;
1265 uint32_t submit_size;
1266 uint8_t *cmd;
1267
1268
1269 BUG_ON(bo->resource->mem_type != VMW_PL_MOB);
1270
1271 submit_size = sizeof(*cmd3) + (readback ? sizeof(*cmd1) : sizeof(*cmd2));
1272 cmd = VMW_CMD_RESERVE(dev_priv, submit_size);
1273 if (unlikely(!cmd))
1274 return -ENOMEM;
1275
1276 if (readback) {
1277 cmd1 = (void *) cmd;
1278 cmd1->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
1279 cmd1->header.size = sizeof(cmd1->body);
1280 cmd1->body.sid = res->id;
1281 cmd3 = (void *) &cmd1[1];
1282 } else {
1283 cmd2 = (void *) cmd;
1284 cmd2->header.id = SVGA_3D_CMD_INVALIDATE_GB_SURFACE;
1285 cmd2->header.size = sizeof(cmd2->body);
1286 cmd2->body.sid = res->id;
1287 cmd3 = (void *) &cmd2[1];
1288 }
1289
1290 cmd3->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1291 cmd3->header.size = sizeof(cmd3->body);
1292 cmd3->body.sid = res->id;
1293 cmd3->body.mobid = SVGA3D_INVALID_ID;
1294
1295 vmw_cmd_commit(dev_priv, submit_size);
1296
1297 /*
1298 * Create a fence object and fence the backup buffer.
1299 */
1300
1301 (void) vmw_execbuf_fence_commands(NULL, dev_priv,
1302 &fence, NULL);
1303
1304 vmw_bo_fence_single(val_buf->bo, fence);
1305
1306 if (likely(fence != NULL))
1307 vmw_fence_obj_unreference(&fence);
1308
1309 return 0;
1310}
1311
1312static int vmw_gb_surface_destroy(struct vmw_resource *res)
1313{
1314 struct vmw_private *dev_priv = res->dev_priv;
1315 struct vmw_surface *srf = vmw_res_to_srf(res);
1316 struct {
1317 SVGA3dCmdHeader header;
1318 SVGA3dCmdDestroyGBSurface body;
1319 } *cmd;
1320
1321 if (likely(res->id == -1))
1322 return 0;
1323
1324 mutex_lock(&dev_priv->binding_mutex);
1325 vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1326 vmw_binding_res_list_scrub(&res->binding_head);
1327
1328 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
1329 if (unlikely(!cmd)) {
1330 mutex_unlock(&dev_priv->binding_mutex);
1331 return -ENOMEM;
1332 }
1333
1334 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SURFACE;
1335 cmd->header.size = sizeof(cmd->body);
1336 cmd->body.sid = res->id;
1337 vmw_cmd_commit(dev_priv, sizeof(*cmd));
1338 mutex_unlock(&dev_priv->binding_mutex);
1339 vmw_resource_release_id(res);
1340 vmw_fifo_resource_dec(dev_priv);
1341
1342 return 0;
1343}
1344
1345/**
1346 * vmw_gb_surface_define_ioctl - Ioctl function implementing
1347 * the user surface define functionality.
1348 *
1349 * @dev: Pointer to a struct drm_device.
1350 * @data: Pointer to data copied from / to user-space.
1351 * @file_priv: Pointer to a drm file private structure.
1352 */
1353int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1354 struct drm_file *file_priv)
1355{
1356 union drm_vmw_gb_surface_create_arg *arg =
1357 (union drm_vmw_gb_surface_create_arg *)data;
1358 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1359 struct drm_vmw_gb_surface_create_ext_req req_ext;
1360
1361 req_ext.base = arg->req;
1362 req_ext.version = drm_vmw_gb_surface_v1;
1363 req_ext.svga3d_flags_upper_32_bits = 0;
1364 req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1365 req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
1366 req_ext.buffer_byte_stride = 0;
1367 req_ext.must_be_zero = 0;
1368
1369 return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
1370}
1371
1372/**
1373 * vmw_gb_surface_reference_ioctl - Ioctl function implementing
1374 * the user surface reference functionality.
1375 *
1376 * @dev: Pointer to a struct drm_device.
1377 * @data: Pointer to data copied from / to user-space.
1378 * @file_priv: Pointer to a drm file private structure.
1379 */
1380int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1381 struct drm_file *file_priv)
1382{
1383 union drm_vmw_gb_surface_reference_arg *arg =
1384 (union drm_vmw_gb_surface_reference_arg *)data;
1385 struct drm_vmw_surface_arg *req = &arg->req;
1386 struct drm_vmw_gb_surface_ref_rep *rep = &arg->rep;
1387 struct drm_vmw_gb_surface_ref_ext_rep rep_ext;
1388 int ret;
1389
1390 ret = vmw_gb_surface_reference_internal(dev, req, &rep_ext, file_priv);
1391
1392 if (unlikely(ret != 0))
1393 return ret;
1394
1395 rep->creq = rep_ext.creq.base;
1396 rep->crep = rep_ext.crep;
1397
1398 return ret;
1399}
1400
1401/**
1402 * vmw_gb_surface_define_ext_ioctl - Ioctl function implementing
1403 * the user surface define functionality.
1404 *
1405 * @dev: Pointer to a struct drm_device.
1406 * @data: Pointer to data copied from / to user-space.
1407 * @file_priv: Pointer to a drm file private structure.
1408 */
1409int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, void *data,
1410 struct drm_file *file_priv)
1411{
1412 union drm_vmw_gb_surface_create_ext_arg *arg =
1413 (union drm_vmw_gb_surface_create_ext_arg *)data;
1414 struct drm_vmw_gb_surface_create_ext_req *req = &arg->req;
1415 struct drm_vmw_gb_surface_create_rep *rep = &arg->rep;
1416
1417 return vmw_gb_surface_define_internal(dev, req, rep, file_priv);
1418}
1419
1420/**
1421 * vmw_gb_surface_reference_ext_ioctl - Ioctl function implementing
1422 * the user surface reference functionality.
1423 *
1424 * @dev: Pointer to a struct drm_device.
1425 * @data: Pointer to data copied from / to user-space.
1426 * @file_priv: Pointer to a drm file private structure.
1427 */
1428int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, void *data,
1429 struct drm_file *file_priv)
1430{
1431 union drm_vmw_gb_surface_reference_ext_arg *arg =
1432 (union drm_vmw_gb_surface_reference_ext_arg *)data;
1433 struct drm_vmw_surface_arg *req = &arg->req;
1434 struct drm_vmw_gb_surface_ref_ext_rep *rep = &arg->rep;
1435
1436 return vmw_gb_surface_reference_internal(dev, req, rep, file_priv);
1437}
1438
1439/**
1440 * vmw_gb_surface_define_internal - Ioctl function implementing
1441 * the user surface define functionality.
1442 *
1443 * @dev: Pointer to a struct drm_device.
1444 * @req: Request argument from user-space.
1445 * @rep: Response argument to user-space.
1446 * @file_priv: Pointer to a drm file private structure.
1447 */
1448static int
1449vmw_gb_surface_define_internal(struct drm_device *dev,
1450 struct drm_vmw_gb_surface_create_ext_req *req,
1451 struct drm_vmw_gb_surface_create_rep *rep,
1452 struct drm_file *file_priv)
1453{
1454 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1455 struct vmw_private *dev_priv = vmw_priv(dev);
1456 struct vmw_user_surface *user_srf;
1457 struct vmw_surface_metadata metadata = {0};
1458 struct vmw_surface *srf;
1459 struct vmw_resource *res;
1460 struct vmw_resource *tmp;
1461 int ret = 0;
1462 uint32_t size;
1463 uint32_t backup_handle = 0;
1464 SVGA3dSurfaceAllFlags svga3d_flags_64 =
1465 SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
1466 req->base.svga3d_flags);
1467
1468 /* array_size must be null for non-GL3 host. */
1469 if (req->base.array_size > 0 && !has_sm4_context(dev_priv)) {
1470 VMW_DEBUG_USER("SM4 surface not supported.\n");
1471 return -EINVAL;
1472 }
1473
1474 if (!has_sm4_1_context(dev_priv)) {
1475 if (req->svga3d_flags_upper_32_bits != 0)
1476 ret = -EINVAL;
1477
1478 if (req->base.multisample_count != 0)
1479 ret = -EINVAL;
1480
1481 if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
1482 ret = -EINVAL;
1483
1484 if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
1485 ret = -EINVAL;
1486
1487 if (ret) {
1488 VMW_DEBUG_USER("SM4.1 surface not supported.\n");
1489 return ret;
1490 }
1491 }
1492
1493 if (req->buffer_byte_stride > 0 && !has_sm5_context(dev_priv)) {
1494 VMW_DEBUG_USER("SM5 surface not supported.\n");
1495 return -EINVAL;
1496 }
1497
1498 if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1499 req->base.multisample_count == 0) {
1500 VMW_DEBUG_USER("Invalid sample count.\n");
1501 return -EINVAL;
1502 }
1503
1504 if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS) {
1505 VMW_DEBUG_USER("Invalid mip level.\n");
1506 return -EINVAL;
1507 }
1508
1509 if (unlikely(vmw_user_surface_size == 0))
1510 vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
1511 VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
1512
1513 size = vmw_user_surface_size;
1514
1515 metadata.flags = svga3d_flags_64;
1516 metadata.format = req->base.format;
1517 metadata.mip_levels[0] = req->base.mip_levels;
1518 metadata.multisample_count = req->base.multisample_count;
1519 metadata.multisample_pattern = req->multisample_pattern;
1520 metadata.quality_level = req->quality_level;
1521 metadata.array_size = req->base.array_size;
1522 metadata.buffer_byte_stride = req->buffer_byte_stride;
1523 metadata.num_sizes = 1;
1524 metadata.base_size = req->base.base_size;
1525 metadata.scanout = req->base.drm_surface_flags &
1526 drm_vmw_surface_flag_scanout;
1527
1528 /* Define a surface based on the parameters. */
1529 ret = vmw_gb_surface_define(dev_priv, size, &metadata, &srf);
1530 if (ret != 0) {
1531 VMW_DEBUG_USER("Failed to define surface.\n");
1532 return ret;
1533 }
1534
1535 user_srf = container_of(srf, struct vmw_user_surface, srf);
1536 if (drm_is_primary_client(file_priv))
1537 user_srf->master = drm_file_get_master(file_priv);
1538
1539 res = &user_srf->srf.res;
1540
1541 if (req->base.buffer_handle != SVGA3D_INVALID_ID) {
1542 ret = vmw_user_bo_lookup(tfile, req->base.buffer_handle,
1543 &res->backup,
1544 &user_srf->backup_base);
1545 if (ret == 0) {
1546 if (res->backup->base.base.size < res->backup_size) {
1547 VMW_DEBUG_USER("Surface backup buffer too small.\n");
1548 vmw_bo_unreference(&res->backup);
1549 ret = -EINVAL;
1550 goto out_unlock;
1551 } else {
1552 backup_handle = req->base.buffer_handle;
1553 }
1554 }
1555 } else if (req->base.drm_surface_flags &
1556 (drm_vmw_surface_flag_create_buffer |
1557 drm_vmw_surface_flag_coherent))
1558 ret = vmw_user_bo_alloc(dev_priv, tfile,
1559 res->backup_size,
1560 req->base.drm_surface_flags &
1561 drm_vmw_surface_flag_shareable,
1562 &backup_handle,
1563 &res->backup,
1564 &user_srf->backup_base);
1565
1566 if (unlikely(ret != 0)) {
1567 vmw_resource_unreference(&res);
1568 goto out_unlock;
1569 }
1570
1571 if (req->base.drm_surface_flags & drm_vmw_surface_flag_coherent) {
1572 struct vmw_buffer_object *backup = res->backup;
1573
1574 ttm_bo_reserve(&backup->base, false, false, NULL);
1575 if (!res->func->dirty_alloc)
1576 ret = -EINVAL;
1577 if (!ret)
1578 ret = vmw_bo_dirty_add(backup);
1579 if (!ret) {
1580 res->coherent = true;
1581 ret = res->func->dirty_alloc(res);
1582 }
1583 ttm_bo_unreserve(&backup->base);
1584 if (ret) {
1585 vmw_resource_unreference(&res);
1586 goto out_unlock;
1587 }
1588
1589 }
1590
1591 tmp = vmw_resource_reference(res);
1592 ret = ttm_prime_object_init(tfile, res->backup_size, &user_srf->prime,
1593 req->base.drm_surface_flags &
1594 drm_vmw_surface_flag_shareable,
1595 VMW_RES_SURFACE,
1596 &vmw_user_surface_base_release, NULL);
1597
1598 if (unlikely(ret != 0)) {
1599 vmw_resource_unreference(&tmp);
1600 vmw_resource_unreference(&res);
1601 goto out_unlock;
1602 }
1603
1604 rep->handle = user_srf->prime.base.handle;
1605 rep->backup_size = res->backup_size;
1606 if (res->backup) {
1607 rep->buffer_map_handle =
1608 drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
1609 rep->buffer_size = res->backup->base.base.size;
1610 rep->buffer_handle = backup_handle;
1611 } else {
1612 rep->buffer_map_handle = 0;
1613 rep->buffer_size = 0;
1614 rep->buffer_handle = SVGA3D_INVALID_ID;
1615 }
1616
1617 vmw_resource_unreference(&res);
1618
1619out_unlock:
1620 return ret;
1621}
1622
1623/**
1624 * vmw_gb_surface_reference_internal - Ioctl function implementing
1625 * the user surface reference functionality.
1626 *
1627 * @dev: Pointer to a struct drm_device.
1628 * @req: Pointer to user-space request surface arg.
1629 * @rep: Pointer to response to user-space.
1630 * @file_priv: Pointer to a drm file private structure.
1631 */
1632static int
1633vmw_gb_surface_reference_internal(struct drm_device *dev,
1634 struct drm_vmw_surface_arg *req,
1635 struct drm_vmw_gb_surface_ref_ext_rep *rep,
1636 struct drm_file *file_priv)
1637{
1638 struct vmw_private *dev_priv = vmw_priv(dev);
1639 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1640 struct vmw_surface *srf;
1641 struct vmw_user_surface *user_srf;
1642 struct vmw_surface_metadata *metadata;
1643 struct ttm_base_object *base;
1644 uint32_t backup_handle;
1645 int ret;
1646
1647 ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1648 req->handle_type, &base);
1649 if (unlikely(ret != 0))
1650 return ret;
1651
1652 user_srf = container_of(base, struct vmw_user_surface, prime.base);
1653 srf = &user_srf->srf;
1654 if (!srf->res.backup) {
1655 DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1656 goto out_bad_resource;
1657 }
1658 metadata = &srf->metadata;
1659
1660 mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1661 ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
1662 mutex_unlock(&dev_priv->cmdbuf_mutex);
1663
1664 if (unlikely(ret != 0)) {
1665 DRM_ERROR("Could not add a reference to a GB surface "
1666 "backup buffer.\n");
1667 (void) ttm_ref_object_base_unref(tfile, base->handle,
1668 TTM_REF_USAGE);
1669 goto out_bad_resource;
1670 }
1671
1672 rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(metadata->flags);
1673 rep->creq.base.format = metadata->format;
1674 rep->creq.base.mip_levels = metadata->mip_levels[0];
1675 rep->creq.base.drm_surface_flags = 0;
1676 rep->creq.base.multisample_count = metadata->multisample_count;
1677 rep->creq.base.autogen_filter = metadata->autogen_filter;
1678 rep->creq.base.array_size = metadata->array_size;
1679 rep->creq.base.buffer_handle = backup_handle;
1680 rep->creq.base.base_size = metadata->base_size;
1681 rep->crep.handle = user_srf->prime.base.handle;
1682 rep->crep.backup_size = srf->res.backup_size;
1683 rep->crep.buffer_handle = backup_handle;
1684 rep->crep.buffer_map_handle =
1685 drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1686 rep->crep.buffer_size = srf->res.backup->base.base.size;
1687
1688 rep->creq.version = drm_vmw_gb_surface_v1;
1689 rep->creq.svga3d_flags_upper_32_bits =
1690 SVGA3D_FLAGS_UPPER_32(metadata->flags);
1691 rep->creq.multisample_pattern = metadata->multisample_pattern;
1692 rep->creq.quality_level = metadata->quality_level;
1693 rep->creq.must_be_zero = 0;
1694
1695out_bad_resource:
1696 ttm_base_object_unref(&base);
1697
1698 return ret;
1699}
1700
1701/**
1702 * vmw_subres_dirty_add - Add a dirty region to a subresource
1703 * @dirty: The surfaces's dirty tracker.
1704 * @loc_start: The location corresponding to the start of the region.
1705 * @loc_end: The location corresponding to the end of the region.
1706 *
1707 * As we are assuming that @loc_start and @loc_end represent a sequential
1708 * range of backing store memory, if the region spans multiple lines then
1709 * regardless of the x coordinate, the full lines are dirtied.
1710 * Correspondingly if the region spans multiple z slices, then full rather
1711 * than partial z slices are dirtied.
1712 */
1713static void vmw_subres_dirty_add(struct vmw_surface_dirty *dirty,
1714 const struct svga3dsurface_loc *loc_start,
1715 const struct svga3dsurface_loc *loc_end)
1716{
1717 const struct svga3dsurface_cache *cache = &dirty->cache;
1718 SVGA3dBox *box = &dirty->boxes[loc_start->sub_resource];
1719 u32 mip = loc_start->sub_resource % cache->num_mip_levels;
1720 const struct drm_vmw_size *size = &cache->mip[mip].size;
1721 u32 box_c2 = box->z + box->d;
1722
1723 if (WARN_ON(loc_start->sub_resource >= dirty->num_subres))
1724 return;
1725
1726 if (box->d == 0 || box->z > loc_start->z)
1727 box->z = loc_start->z;
1728 if (box_c2 < loc_end->z)
1729 box->d = loc_end->z - box->z;
1730
1731 if (loc_start->z + 1 == loc_end->z) {
1732 box_c2 = box->y + box->h;
1733 if (box->h == 0 || box->y > loc_start->y)
1734 box->y = loc_start->y;
1735 if (box_c2 < loc_end->y)
1736 box->h = loc_end->y - box->y;
1737
1738 if (loc_start->y + 1 == loc_end->y) {
1739 box_c2 = box->x + box->w;
1740 if (box->w == 0 || box->x > loc_start->x)
1741 box->x = loc_start->x;
1742 if (box_c2 < loc_end->x)
1743 box->w = loc_end->x - box->x;
1744 } else {
1745 box->x = 0;
1746 box->w = size->width;
1747 }
1748 } else {
1749 box->y = 0;
1750 box->h = size->height;
1751 box->x = 0;
1752 box->w = size->width;
1753 }
1754}
1755
1756/**
1757 * vmw_subres_dirty_full - Mark a full subresource as dirty
1758 * @dirty: The surface's dirty tracker.
1759 * @subres: The subresource
1760 */
1761static void vmw_subres_dirty_full(struct vmw_surface_dirty *dirty, u32 subres)
1762{
1763 const struct svga3dsurface_cache *cache = &dirty->cache;
1764 u32 mip = subres % cache->num_mip_levels;
1765 const struct drm_vmw_size *size = &cache->mip[mip].size;
1766 SVGA3dBox *box = &dirty->boxes[subres];
1767
1768 box->x = 0;
1769 box->y = 0;
1770 box->z = 0;
1771 box->w = size->width;
1772 box->h = size->height;
1773 box->d = size->depth;
1774}
1775
1776/*
1777 * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for texture
1778 * surfaces.
1779 */
1780static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
1781 size_t start, size_t end)
1782{
1783 struct vmw_surface_dirty *dirty =
1784 (struct vmw_surface_dirty *) res->dirty;
1785 size_t backup_end = res->backup_offset + res->backup_size;
1786 struct svga3dsurface_loc loc1, loc2;
1787 const struct svga3dsurface_cache *cache;
1788
1789 start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1790 end = min(end, backup_end) - res->backup_offset;
1791 cache = &dirty->cache;
1792 svga3dsurface_get_loc(cache, &loc1, start);
1793 svga3dsurface_get_loc(cache, &loc2, end - 1);
1794 svga3dsurface_inc_loc(cache, &loc2);
1795
1796 if (loc1.sheet != loc2.sheet) {
1797 u32 sub_res;
1798
1799 /*
1800 * Multiple multisample sheets. To do this in an optimized
1801 * fashion, compute the dirty region for each sheet and the
1802 * resulting union. Since this is not a common case, just dirty
1803 * the whole surface.
1804 */
1805 for (sub_res = 0; sub_res < dirty->num_subres; ++sub_res)
1806 vmw_subres_dirty_full(dirty, sub_res);
1807 return;
1808 }
1809 if (loc1.sub_resource + 1 == loc2.sub_resource) {
1810 /* Dirty range covers a single sub-resource */
1811 vmw_subres_dirty_add(dirty, &loc1, &loc2);
1812 } else {
1813 /* Dirty range covers multiple sub-resources */
1814 struct svga3dsurface_loc loc_min, loc_max;
1815 u32 sub_res;
1816
1817 svga3dsurface_max_loc(cache, loc1.sub_resource, &loc_max);
1818 vmw_subres_dirty_add(dirty, &loc1, &loc_max);
1819 svga3dsurface_min_loc(cache, loc2.sub_resource - 1, &loc_min);
1820 vmw_subres_dirty_add(dirty, &loc_min, &loc2);
1821 for (sub_res = loc1.sub_resource + 1;
1822 sub_res < loc2.sub_resource - 1; ++sub_res)
1823 vmw_subres_dirty_full(dirty, sub_res);
1824 }
1825}
1826
1827/*
1828 * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for buffer
1829 * surfaces.
1830 */
1831static void vmw_surface_buf_dirty_range_add(struct vmw_resource *res,
1832 size_t start, size_t end)
1833{
1834 struct vmw_surface_dirty *dirty =
1835 (struct vmw_surface_dirty *) res->dirty;
1836 const struct svga3dsurface_cache *cache = &dirty->cache;
1837 size_t backup_end = res->backup_offset + cache->mip_chain_bytes;
1838 SVGA3dBox *box = &dirty->boxes[0];
1839 u32 box_c2;
1840
1841 box->h = box->d = 1;
1842 start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
1843 end = min(end, backup_end) - res->backup_offset;
1844 box_c2 = box->x + box->w;
1845 if (box->w == 0 || box->x > start)
1846 box->x = start;
1847 if (box_c2 < end)
1848 box->w = end - box->x;
1849}
1850
1851/*
1852 * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for surfaces
1853 */
1854static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
1855 size_t end)
1856{
1857 struct vmw_surface *srf = vmw_res_to_srf(res);
1858
1859 if (WARN_ON(end <= res->backup_offset ||
1860 start >= res->backup_offset + res->backup_size))
1861 return;
1862
1863 if (srf->metadata.format == SVGA3D_BUFFER)
1864 vmw_surface_buf_dirty_range_add(res, start, end);
1865 else
1866 vmw_surface_tex_dirty_range_add(res, start, end);
1867}
1868
1869/*
1870 * vmw_surface_dirty_sync - The surface's dirty_sync callback.
1871 */
1872static int vmw_surface_dirty_sync(struct vmw_resource *res)
1873{
1874 struct vmw_private *dev_priv = res->dev_priv;
1875 u32 i, num_dirty;
1876 struct vmw_surface_dirty *dirty =
1877 (struct vmw_surface_dirty *) res->dirty;
1878 size_t alloc_size;
1879 const struct svga3dsurface_cache *cache = &dirty->cache;
1880 struct {
1881 SVGA3dCmdHeader header;
1882 SVGA3dCmdDXUpdateSubResource body;
1883 } *cmd1;
1884 struct {
1885 SVGA3dCmdHeader header;
1886 SVGA3dCmdUpdateGBImage body;
1887 } *cmd2;
1888 void *cmd;
1889
1890 num_dirty = 0;
1891 for (i = 0; i < dirty->num_subres; ++i) {
1892 const SVGA3dBox *box = &dirty->boxes[i];
1893
1894 if (box->d)
1895 num_dirty++;
1896 }
1897
1898 if (!num_dirty)
1899 goto out;
1900
1901 alloc_size = num_dirty * ((has_sm4_context(dev_priv)) ? sizeof(*cmd1) : sizeof(*cmd2));
1902 cmd = VMW_CMD_RESERVE(dev_priv, alloc_size);
1903 if (!cmd)
1904 return -ENOMEM;
1905
1906 cmd1 = cmd;
1907 cmd2 = cmd;
1908
1909 for (i = 0; i < dirty->num_subres; ++i) {
1910 const SVGA3dBox *box = &dirty->boxes[i];
1911
1912 if (!box->d)
1913 continue;
1914
1915 /*
1916 * DX_UPDATE_SUBRESOURCE is aware of array surfaces.
1917 * UPDATE_GB_IMAGE is not.
1918 */
1919 if (has_sm4_context(dev_priv)) {
1920 cmd1->header.id = SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE;
1921 cmd1->header.size = sizeof(cmd1->body);
1922 cmd1->body.sid = res->id;
1923 cmd1->body.subResource = i;
1924 cmd1->body.box = *box;
1925 cmd1++;
1926 } else {
1927 cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1928 cmd2->header.size = sizeof(cmd2->body);
1929 cmd2->body.image.sid = res->id;
1930 cmd2->body.image.face = i / cache->num_mip_levels;
1931 cmd2->body.image.mipmap = i -
1932 (cache->num_mip_levels * cmd2->body.image.face);
1933 cmd2->body.box = *box;
1934 cmd2++;
1935 }
1936
1937 }
1938 vmw_cmd_commit(dev_priv, alloc_size);
1939 out:
1940 memset(&dirty->boxes[0], 0, sizeof(dirty->boxes[0]) *
1941 dirty->num_subres);
1942
1943 return 0;
1944}
1945
1946/*
1947 * vmw_surface_dirty_alloc - The surface's dirty_alloc callback.
1948 */
1949static int vmw_surface_dirty_alloc(struct vmw_resource *res)
1950{
1951 struct vmw_surface *srf = vmw_res_to_srf(res);
1952 const struct vmw_surface_metadata *metadata = &srf->metadata;
1953 struct vmw_surface_dirty *dirty;
1954 u32 num_layers = 1;
1955 u32 num_mip;
1956 u32 num_subres;
1957 u32 num_samples;
1958 size_t dirty_size, acc_size;
1959 static struct ttm_operation_ctx ctx = {
1960 .interruptible = false,
1961 .no_wait_gpu = false
1962 };
1963 int ret;
1964
1965 if (metadata->array_size)
1966 num_layers = metadata->array_size;
1967 else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
1968 num_layers *= SVGA3D_MAX_SURFACE_FACES;
1969
1970 num_mip = metadata->mip_levels[0];
1971 if (!num_mip)
1972 num_mip = 1;
1973
1974 num_subres = num_layers * num_mip;
1975 dirty_size = struct_size(dirty, boxes, num_subres);
1976 acc_size = ttm_round_pot(dirty_size);
1977 ret = ttm_mem_global_alloc(vmw_mem_glob(res->dev_priv),
1978 acc_size, &ctx);
1979 if (ret) {
1980 VMW_DEBUG_USER("Out of graphics memory for surface "
1981 "dirty tracker.\n");
1982 return ret;
1983 }
1984
1985 dirty = kvzalloc(dirty_size, GFP_KERNEL);
1986 if (!dirty) {
1987 ret = -ENOMEM;
1988 goto out_no_dirty;
1989 }
1990
1991 num_samples = max_t(u32, 1, metadata->multisample_count);
1992 ret = svga3dsurface_setup_cache(&metadata->base_size, metadata->format,
1993 num_mip, num_layers, num_samples,
1994 &dirty->cache);
1995 if (ret)
1996 goto out_no_cache;
1997
1998 dirty->num_subres = num_subres;
1999 dirty->size = acc_size;
2000 res->dirty = (struct vmw_resource_dirty *) dirty;
2001
2002 return 0;
2003
2004out_no_cache:
2005 kvfree(dirty);
2006out_no_dirty:
2007 ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
2008 return ret;
2009}
2010
2011/*
2012 * vmw_surface_dirty_free - The surface's dirty_free callback
2013 */
2014static void vmw_surface_dirty_free(struct vmw_resource *res)
2015{
2016 struct vmw_surface_dirty *dirty =
2017 (struct vmw_surface_dirty *) res->dirty;
2018 size_t acc_size = dirty->size;
2019
2020 kvfree(dirty);
2021 ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
2022 res->dirty = NULL;
2023}
2024
2025/*
2026 * vmw_surface_clean - The surface's clean callback
2027 */
2028static int vmw_surface_clean(struct vmw_resource *res)
2029{
2030 struct vmw_private *dev_priv = res->dev_priv;
2031 size_t alloc_size;
2032 struct {
2033 SVGA3dCmdHeader header;
2034 SVGA3dCmdReadbackGBSurface body;
2035 } *cmd;
2036
2037 alloc_size = sizeof(*cmd);
2038 cmd = VMW_CMD_RESERVE(dev_priv, alloc_size);
2039 if (!cmd)
2040 return -ENOMEM;
2041
2042 cmd->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
2043 cmd->header.size = sizeof(cmd->body);
2044 cmd->body.sid = res->id;
2045 vmw_cmd_commit(dev_priv, alloc_size);
2046
2047 return 0;
2048}
2049
2050/*
2051 * vmw_gb_surface_define - Define a private GB surface
2052 *
2053 * @dev_priv: Pointer to a device private.
2054 * @user_accounting_size: Used to track user-space memory usage, set
2055 * to 0 for kernel mode only memory
2056 * @metadata: Metadata representing the surface to create.
2057 * @user_srf_out: allocated user_srf. Set to NULL on failure.
2058 *
2059 * GB surfaces allocated by this function will not have a user mode handle, and
2060 * thus will only be visible to vmwgfx. For optimization reasons the
2061 * surface may later be given a user mode handle by another function to make
2062 * it available to user mode drivers.
2063 */
2064int vmw_gb_surface_define(struct vmw_private *dev_priv,
2065 uint32_t user_accounting_size,
2066 const struct vmw_surface_metadata *req,
2067 struct vmw_surface **srf_out)
2068{
2069 struct vmw_surface_metadata *metadata;
2070 struct vmw_user_surface *user_srf;
2071 struct vmw_surface *srf;
2072 struct ttm_operation_ctx ctx = {
2073 .interruptible = true,
2074 .no_wait_gpu = false
2075 };
2076 u32 sample_count = 1;
2077 u32 num_layers = 1;
2078 int ret;
2079
2080 *srf_out = NULL;
2081
2082 if (req->scanout) {
2083 if (!svga3dsurface_is_screen_target_format(req->format)) {
2084 VMW_DEBUG_USER("Invalid Screen Target surface format.");
2085 return -EINVAL;
2086 }
2087
2088 if (req->base_size.width > dev_priv->texture_max_width ||
2089 req->base_size.height > dev_priv->texture_max_height) {
2090 VMW_DEBUG_USER("%ux%u\n, exceed max surface size %ux%u",
2091 req->base_size.width,
2092 req->base_size.height,
2093 dev_priv->texture_max_width,
2094 dev_priv->texture_max_height);
2095 return -EINVAL;
2096 }
2097 } else {
2098 const struct svga3d_surface_desc *desc =
2099 svga3dsurface_get_desc(req->format);
2100
2101 if (desc->block_desc == SVGA3DBLOCKDESC_NONE) {
2102 VMW_DEBUG_USER("Invalid surface format.\n");
2103 return -EINVAL;
2104 }
2105 }
2106
2107 if (req->autogen_filter != SVGA3D_TEX_FILTER_NONE)
2108 return -EINVAL;
2109
2110 if (req->num_sizes != 1)
2111 return -EINVAL;
2112
2113 if (req->sizes != NULL)
2114 return -EINVAL;
2115
2116 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
2117 user_accounting_size, &ctx);
2118 if (ret != 0) {
2119 if (ret != -ERESTARTSYS)
2120 DRM_ERROR("Out of graphics memory for surface.\n");
2121 goto out_unlock;
2122 }
2123
2124 user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
2125 if (unlikely(!user_srf)) {
2126 ret = -ENOMEM;
2127 goto out_no_user_srf;
2128 }
2129
2130 *srf_out = &user_srf->srf;
2131 user_srf->size = user_accounting_size;
2132 user_srf->prime.base.shareable = false;
2133 user_srf->prime.base.tfile = NULL;
2134
2135 srf = &user_srf->srf;
2136 srf->metadata = *req;
2137 srf->offsets = NULL;
2138
2139 metadata = &srf->metadata;
2140
2141 if (metadata->array_size)
2142 num_layers = req->array_size;
2143 else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
2144 num_layers = SVGA3D_MAX_SURFACE_FACES;
2145
2146 if (metadata->flags & SVGA3D_SURFACE_MULTISAMPLE)
2147 sample_count = metadata->multisample_count;
2148
2149 srf->res.backup_size =
2150 svga3dsurface_get_serialized_size_extended(metadata->format,
2151 metadata->base_size,
2152 metadata->mip_levels[0],
2153 num_layers,
2154 sample_count);
2155
2156 if (metadata->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
2157 srf->res.backup_size += sizeof(SVGA3dDXSOState);
2158
2159 /*
2160 * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
2161 * size greater than STDU max width/height. This is really a workaround
2162 * to support creation of big framebuffer requested by some user-space
2163 * for whole topology. That big framebuffer won't really be used for
2164 * binding with screen target as during prepare_fb a separate surface is
2165 * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
2166 */
2167 if (dev_priv->active_display_unit == vmw_du_screen_target &&
2168 metadata->scanout &&
2169 metadata->base_size.width <= dev_priv->stdu_max_width &&
2170 metadata->base_size.height <= dev_priv->stdu_max_height)
2171 metadata->flags |= SVGA3D_SURFACE_SCREENTARGET;
2172
2173 /*
2174 * From this point, the generic resource management functions
2175 * destroy the object on failure.
2176 */
2177 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
2178
2179 return ret;
2180
2181out_no_user_srf:
2182 ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
2183
2184out_unlock:
2185 return ret;
2186}