Loading...
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2017-2018 Bartosz Golaszewski <brgl@bgdev.pl>
4 */
5
6#include <linux/slab.h>
7#include <linux/irq_sim.h>
8#include <linux/irq.h>
9
10struct irq_sim_devres {
11 struct irq_sim *sim;
12};
13
14static void irq_sim_irqmask(struct irq_data *data)
15{
16 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
17
18 irq_ctx->enabled = false;
19}
20
21static void irq_sim_irqunmask(struct irq_data *data)
22{
23 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
24
25 irq_ctx->enabled = true;
26}
27
28static int irq_sim_set_type(struct irq_data *data, unsigned int type)
29{
30 /* We only support rising and falling edge trigger types. */
31 if (type & ~IRQ_TYPE_EDGE_BOTH)
32 return -EINVAL;
33
34 irqd_set_trigger_type(data, type);
35
36 return 0;
37}
38
39static struct irq_chip irq_sim_irqchip = {
40 .name = "irq_sim",
41 .irq_mask = irq_sim_irqmask,
42 .irq_unmask = irq_sim_irqunmask,
43 .irq_set_type = irq_sim_set_type,
44};
45
46static void irq_sim_handle_irq(struct irq_work *work)
47{
48 struct irq_sim_work_ctx *work_ctx;
49 unsigned int offset = 0;
50 struct irq_sim *sim;
51 int irqnum;
52
53 work_ctx = container_of(work, struct irq_sim_work_ctx, work);
54 sim = container_of(work_ctx, struct irq_sim, work_ctx);
55
56 while (!bitmap_empty(work_ctx->pending, sim->irq_count)) {
57 offset = find_next_bit(work_ctx->pending,
58 sim->irq_count, offset);
59 clear_bit(offset, work_ctx->pending);
60 irqnum = irq_sim_irqnum(sim, offset);
61 handle_simple_irq(irq_to_desc(irqnum));
62 }
63}
64
65/**
66 * irq_sim_init - Initialize the interrupt simulator: allocate a range of
67 * dummy interrupts.
68 *
69 * @sim: The interrupt simulator object to initialize.
70 * @num_irqs: Number of interrupts to allocate
71 *
72 * On success: return the base of the allocated interrupt range.
73 * On failure: a negative errno.
74 */
75int irq_sim_init(struct irq_sim *sim, unsigned int num_irqs)
76{
77 int i;
78
79 sim->irqs = kmalloc_array(num_irqs, sizeof(*sim->irqs), GFP_KERNEL);
80 if (!sim->irqs)
81 return -ENOMEM;
82
83 sim->irq_base = irq_alloc_descs(-1, 0, num_irqs, 0);
84 if (sim->irq_base < 0) {
85 kfree(sim->irqs);
86 return sim->irq_base;
87 }
88
89 sim->work_ctx.pending = bitmap_zalloc(num_irqs, GFP_KERNEL);
90 if (!sim->work_ctx.pending) {
91 kfree(sim->irqs);
92 irq_free_descs(sim->irq_base, num_irqs);
93 return -ENOMEM;
94 }
95
96 for (i = 0; i < num_irqs; i++) {
97 sim->irqs[i].irqnum = sim->irq_base + i;
98 sim->irqs[i].enabled = false;
99 irq_set_chip(sim->irq_base + i, &irq_sim_irqchip);
100 irq_set_chip_data(sim->irq_base + i, &sim->irqs[i]);
101 irq_set_handler(sim->irq_base + i, &handle_simple_irq);
102 irq_modify_status(sim->irq_base + i,
103 IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE);
104 }
105
106 init_irq_work(&sim->work_ctx.work, irq_sim_handle_irq);
107 sim->irq_count = num_irqs;
108
109 return sim->irq_base;
110}
111EXPORT_SYMBOL_GPL(irq_sim_init);
112
113/**
114 * irq_sim_fini - Deinitialize the interrupt simulator: free the interrupt
115 * descriptors and allocated memory.
116 *
117 * @sim: The interrupt simulator to tear down.
118 */
119void irq_sim_fini(struct irq_sim *sim)
120{
121 irq_work_sync(&sim->work_ctx.work);
122 bitmap_free(sim->work_ctx.pending);
123 irq_free_descs(sim->irq_base, sim->irq_count);
124 kfree(sim->irqs);
125}
126EXPORT_SYMBOL_GPL(irq_sim_fini);
127
128static void devm_irq_sim_release(struct device *dev, void *res)
129{
130 struct irq_sim_devres *this = res;
131
132 irq_sim_fini(this->sim);
133}
134
135/**
136 * irq_sim_init - Initialize the interrupt simulator for a managed device.
137 *
138 * @dev: Device to initialize the simulator object for.
139 * @sim: The interrupt simulator object to initialize.
140 * @num_irqs: Number of interrupts to allocate
141 *
142 * On success: return the base of the allocated interrupt range.
143 * On failure: a negative errno.
144 */
145int devm_irq_sim_init(struct device *dev, struct irq_sim *sim,
146 unsigned int num_irqs)
147{
148 struct irq_sim_devres *dr;
149 int rv;
150
151 dr = devres_alloc(devm_irq_sim_release, sizeof(*dr), GFP_KERNEL);
152 if (!dr)
153 return -ENOMEM;
154
155 rv = irq_sim_init(sim, num_irqs);
156 if (rv < 0) {
157 devres_free(dr);
158 return rv;
159 }
160
161 dr->sim = sim;
162 devres_add(dev, dr);
163
164 return rv;
165}
166EXPORT_SYMBOL_GPL(devm_irq_sim_init);
167
168/**
169 * irq_sim_fire - Enqueue an interrupt.
170 *
171 * @sim: The interrupt simulator object.
172 * @offset: Offset of the simulated interrupt which should be fired.
173 */
174void irq_sim_fire(struct irq_sim *sim, unsigned int offset)
175{
176 if (sim->irqs[offset].enabled) {
177 set_bit(offset, sim->work_ctx.pending);
178 irq_work_queue(&sim->work_ctx.work);
179 }
180}
181EXPORT_SYMBOL_GPL(irq_sim_fire);
182
183/**
184 * irq_sim_irqnum - Get the allocated number of a dummy interrupt.
185 *
186 * @sim: The interrupt simulator object.
187 * @offset: Offset of the simulated interrupt for which to retrieve
188 * the number.
189 */
190int irq_sim_irqnum(struct irq_sim *sim, unsigned int offset)
191{
192 return sim->irqs[offset].irqnum;
193}
194EXPORT_SYMBOL_GPL(irq_sim_irqnum);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2017-2018 Bartosz Golaszewski <brgl@bgdev.pl>
4 * Copyright (C) 2020 Bartosz Golaszewski <bgolaszewski@baylibre.com>
5 */
6
7#include <linux/irq.h>
8#include <linux/irq_sim.h>
9#include <linux/irq_work.h>
10#include <linux/interrupt.h>
11#include <linux/slab.h>
12
13struct irq_sim_work_ctx {
14 struct irq_work work;
15 int irq_base;
16 unsigned int irq_count;
17 unsigned long *pending;
18 struct irq_domain *domain;
19};
20
21struct irq_sim_irq_ctx {
22 int irqnum;
23 bool enabled;
24 struct irq_sim_work_ctx *work_ctx;
25};
26
27struct irq_sim_devres {
28 struct irq_domain *domain;
29};
30
31static void irq_sim_irqmask(struct irq_data *data)
32{
33 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
34
35 irq_ctx->enabled = false;
36}
37
38static void irq_sim_irqunmask(struct irq_data *data)
39{
40 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
41
42 irq_ctx->enabled = true;
43}
44
45static int irq_sim_set_type(struct irq_data *data, unsigned int type)
46{
47 /* We only support rising and falling edge trigger types. */
48 if (type & ~IRQ_TYPE_EDGE_BOTH)
49 return -EINVAL;
50
51 irqd_set_trigger_type(data, type);
52
53 return 0;
54}
55
56static int irq_sim_get_irqchip_state(struct irq_data *data,
57 enum irqchip_irq_state which, bool *state)
58{
59 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
60 irq_hw_number_t hwirq = irqd_to_hwirq(data);
61
62 switch (which) {
63 case IRQCHIP_STATE_PENDING:
64 if (irq_ctx->enabled)
65 *state = test_bit(hwirq, irq_ctx->work_ctx->pending);
66 break;
67 default:
68 return -EINVAL;
69 }
70
71 return 0;
72}
73
74static int irq_sim_set_irqchip_state(struct irq_data *data,
75 enum irqchip_irq_state which, bool state)
76{
77 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
78 irq_hw_number_t hwirq = irqd_to_hwirq(data);
79
80 switch (which) {
81 case IRQCHIP_STATE_PENDING:
82 if (irq_ctx->enabled) {
83 assign_bit(hwirq, irq_ctx->work_ctx->pending, state);
84 if (state)
85 irq_work_queue(&irq_ctx->work_ctx->work);
86 }
87 break;
88 default:
89 return -EINVAL;
90 }
91
92 return 0;
93}
94
95static struct irq_chip irq_sim_irqchip = {
96 .name = "irq_sim",
97 .irq_mask = irq_sim_irqmask,
98 .irq_unmask = irq_sim_irqunmask,
99 .irq_set_type = irq_sim_set_type,
100 .irq_get_irqchip_state = irq_sim_get_irqchip_state,
101 .irq_set_irqchip_state = irq_sim_set_irqchip_state,
102};
103
104static void irq_sim_handle_irq(struct irq_work *work)
105{
106 struct irq_sim_work_ctx *work_ctx;
107 unsigned int offset = 0;
108 int irqnum;
109
110 work_ctx = container_of(work, struct irq_sim_work_ctx, work);
111
112 while (!bitmap_empty(work_ctx->pending, work_ctx->irq_count)) {
113 offset = find_next_bit(work_ctx->pending,
114 work_ctx->irq_count, offset);
115 clear_bit(offset, work_ctx->pending);
116 irqnum = irq_find_mapping(work_ctx->domain, offset);
117 handle_simple_irq(irq_to_desc(irqnum));
118 }
119}
120
121static int irq_sim_domain_map(struct irq_domain *domain,
122 unsigned int virq, irq_hw_number_t hw)
123{
124 struct irq_sim_work_ctx *work_ctx = domain->host_data;
125 struct irq_sim_irq_ctx *irq_ctx;
126
127 irq_ctx = kzalloc(sizeof(*irq_ctx), GFP_KERNEL);
128 if (!irq_ctx)
129 return -ENOMEM;
130
131 irq_set_chip(virq, &irq_sim_irqchip);
132 irq_set_chip_data(virq, irq_ctx);
133 irq_set_handler(virq, handle_simple_irq);
134 irq_modify_status(virq, IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE);
135 irq_ctx->work_ctx = work_ctx;
136
137 return 0;
138}
139
140static void irq_sim_domain_unmap(struct irq_domain *domain, unsigned int virq)
141{
142 struct irq_sim_irq_ctx *irq_ctx;
143 struct irq_data *irqd;
144
145 irqd = irq_domain_get_irq_data(domain, virq);
146 irq_ctx = irq_data_get_irq_chip_data(irqd);
147
148 irq_set_handler(virq, NULL);
149 irq_domain_reset_irq_data(irqd);
150 kfree(irq_ctx);
151}
152
153static const struct irq_domain_ops irq_sim_domain_ops = {
154 .map = irq_sim_domain_map,
155 .unmap = irq_sim_domain_unmap,
156};
157
158/**
159 * irq_domain_create_sim - Create a new interrupt simulator irq_domain and
160 * allocate a range of dummy interrupts.
161 *
162 * @fnode: struct fwnode_handle to be associated with this domain.
163 * @num_irqs: Number of interrupts to allocate.
164 *
165 * On success: return a new irq_domain object.
166 * On failure: a negative errno wrapped with ERR_PTR().
167 */
168struct irq_domain *irq_domain_create_sim(struct fwnode_handle *fwnode,
169 unsigned int num_irqs)
170{
171 struct irq_sim_work_ctx *work_ctx;
172
173 work_ctx = kmalloc(sizeof(*work_ctx), GFP_KERNEL);
174 if (!work_ctx)
175 goto err_out;
176
177 work_ctx->pending = bitmap_zalloc(num_irqs, GFP_KERNEL);
178 if (!work_ctx->pending)
179 goto err_free_work_ctx;
180
181 work_ctx->domain = irq_domain_create_linear(fwnode, num_irqs,
182 &irq_sim_domain_ops,
183 work_ctx);
184 if (!work_ctx->domain)
185 goto err_free_bitmap;
186
187 work_ctx->irq_count = num_irqs;
188 init_irq_work(&work_ctx->work, irq_sim_handle_irq);
189
190 return work_ctx->domain;
191
192err_free_bitmap:
193 bitmap_free(work_ctx->pending);
194err_free_work_ctx:
195 kfree(work_ctx);
196err_out:
197 return ERR_PTR(-ENOMEM);
198}
199EXPORT_SYMBOL_GPL(irq_domain_create_sim);
200
201/**
202 * irq_domain_remove_sim - Deinitialize the interrupt simulator domain: free
203 * the interrupt descriptors and allocated memory.
204 *
205 * @domain: The interrupt simulator domain to tear down.
206 */
207void irq_domain_remove_sim(struct irq_domain *domain)
208{
209 struct irq_sim_work_ctx *work_ctx = domain->host_data;
210
211 irq_work_sync(&work_ctx->work);
212 bitmap_free(work_ctx->pending);
213 kfree(work_ctx);
214
215 irq_domain_remove(domain);
216}
217EXPORT_SYMBOL_GPL(irq_domain_remove_sim);
218
219static void devm_irq_domain_release_sim(struct device *dev, void *res)
220{
221 struct irq_sim_devres *this = res;
222
223 irq_domain_remove_sim(this->domain);
224}
225
226/**
227 * devm_irq_domain_create_sim - Create a new interrupt simulator for
228 * a managed device.
229 *
230 * @dev: Device to initialize the simulator object for.
231 * @fnode: struct fwnode_handle to be associated with this domain.
232 * @num_irqs: Number of interrupts to allocate
233 *
234 * On success: return a new irq_domain object.
235 * On failure: a negative errno wrapped with ERR_PTR().
236 */
237struct irq_domain *devm_irq_domain_create_sim(struct device *dev,
238 struct fwnode_handle *fwnode,
239 unsigned int num_irqs)
240{
241 struct irq_sim_devres *dr;
242
243 dr = devres_alloc(devm_irq_domain_release_sim,
244 sizeof(*dr), GFP_KERNEL);
245 if (!dr)
246 return ERR_PTR(-ENOMEM);
247
248 dr->domain = irq_domain_create_sim(fwnode, num_irqs);
249 if (IS_ERR(dr->domain)) {
250 devres_free(dr);
251 return dr->domain;
252 }
253
254 devres_add(dev, dr);
255 return dr->domain;
256}
257EXPORT_SYMBOL_GPL(devm_irq_domain_create_sim);