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v5.4
   1/*
   2 * Copyright © 2006 Intel Corporation
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice (including the next
  12 * paragraph) shall be included in all copies or substantial portions of the
  13 * Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21 * SOFTWARE.
  22 *
  23 * Authors:
  24 *    Eric Anholt <eric@anholt.net>
  25 *
  26 */
  27
  28#include <drm/drm_dp_helper.h>
  29#include <drm/i915_drm.h>
  30
  31#include "display/intel_display.h"
 
  32#include "display/intel_gmbus.h"
  33
  34#include "i915_drv.h"
  35
  36#define _INTEL_BIOS_PRIVATE
  37#include "intel_vbt_defs.h"
  38
  39/**
  40 * DOC: Video BIOS Table (VBT)
  41 *
  42 * The Video BIOS Table, or VBT, provides platform and board specific
  43 * configuration information to the driver that is not discoverable or available
  44 * through other means. The configuration is mostly related to display
  45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
  46 * the PCI ROM.
  47 *
  48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
  49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
  50 * contain the actual configuration information. The VBT Header, and thus the
  51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
  52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
  53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
  54 * data. (Block 53, the MIPI Sequence Block is an exception.)
  55 *
  56 * The driver parses the VBT during load. The relevant information is stored in
  57 * driver private data for ease of use, and the actual VBT is not read after
  58 * that.
  59 */
  60
 
 
 
 
 
 
 
  61#define	SLAVE_ADDR1	0x70
  62#define	SLAVE_ADDR2	0x72
  63
  64/* Get BDB block size given a pointer to Block ID. */
  65static u32 _get_blocksize(const u8 *block_base)
  66{
  67	/* The MIPI Sequence Block v3+ has a separate size field. */
  68	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
  69		return *((const u32 *)(block_base + 4));
  70	else
  71		return *((const u16 *)(block_base + 1));
  72}
  73
  74/* Get BDB block size give a pointer to data after Block ID and Block Size. */
  75static u32 get_blocksize(const void *block_data)
  76{
  77	return _get_blocksize(block_data - 3);
  78}
  79
  80static const void *
  81find_section(const void *_bdb, enum bdb_block_id section_id)
  82{
  83	const struct bdb_header *bdb = _bdb;
  84	const u8 *base = _bdb;
  85	int index = 0;
  86	u32 total, current_size;
  87	enum bdb_block_id current_id;
  88
  89	/* skip to first section */
  90	index += bdb->header_size;
  91	total = bdb->bdb_size;
  92
  93	/* walk the sections looking for section_id */
  94	while (index + 3 < total) {
  95		current_id = *(base + index);
  96		current_size = _get_blocksize(base + index);
  97		index += 3;
  98
  99		if (index + current_size > total)
 100			return NULL;
 101
 102		if (current_id == section_id)
 103			return base + index;
 104
 105		index += current_size;
 106	}
 107
 108	return NULL;
 109}
 110
 111static void
 112fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
 113			const struct lvds_dvo_timing *dvo_timing)
 114{
 115	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
 116		dvo_timing->hactive_lo;
 117	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
 118		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
 119	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
 120		((dvo_timing->hsync_pulse_width_hi << 8) |
 121			dvo_timing->hsync_pulse_width_lo);
 122	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
 123		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
 124
 125	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
 126		dvo_timing->vactive_lo;
 127	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
 128		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
 129	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
 130		((dvo_timing->vsync_pulse_width_hi << 4) |
 131			dvo_timing->vsync_pulse_width_lo);
 132	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
 133		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
 134	panel_fixed_mode->clock = dvo_timing->clock * 10;
 135	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
 136
 137	if (dvo_timing->hsync_positive)
 138		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
 139	else
 140		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
 141
 142	if (dvo_timing->vsync_positive)
 143		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
 144	else
 145		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
 146
 147	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
 148		dvo_timing->himage_lo;
 149	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
 150		dvo_timing->vimage_lo;
 151
 152	/* Some VBTs have bogus h/vtotal values */
 153	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
 154		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
 155	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
 156		panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
 157
 158	drm_mode_set_name(panel_fixed_mode);
 159}
 160
 161static const struct lvds_dvo_timing *
 162get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
 163		    const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
 164		    int index)
 165{
 166	/*
 167	 * the size of fp_timing varies on the different platform.
 168	 * So calculate the DVO timing relative offset in LVDS data
 169	 * entry to get the DVO timing entry
 170	 */
 171
 172	int lfp_data_size =
 173		lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
 174		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
 175	int dvo_timing_offset =
 176		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
 177		lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
 178	char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
 179
 180	return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
 181}
 182
 183/* get lvds_fp_timing entry
 184 * this function may return NULL if the corresponding entry is invalid
 185 */
 186static const struct lvds_fp_timing *
 187get_lvds_fp_timing(const struct bdb_header *bdb,
 188		   const struct bdb_lvds_lfp_data *data,
 189		   const struct bdb_lvds_lfp_data_ptrs *ptrs,
 190		   int index)
 191{
 192	size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
 193	u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
 194	size_t ofs;
 195
 196	if (index >= ARRAY_SIZE(ptrs->ptr))
 197		return NULL;
 198	ofs = ptrs->ptr[index].fp_timing_offset;
 199	if (ofs < data_ofs ||
 200	    ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
 201		return NULL;
 202	return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
 203}
 204
 205/* Try to find integrated panel data */
 206static void
 207parse_lfp_panel_data(struct drm_i915_private *dev_priv,
 208		     const struct bdb_header *bdb)
 209{
 210	const struct bdb_lvds_options *lvds_options;
 211	const struct bdb_lvds_lfp_data *lvds_lfp_data;
 212	const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
 213	const struct lvds_dvo_timing *panel_dvo_timing;
 214	const struct lvds_fp_timing *fp_timing;
 215	struct drm_display_mode *panel_fixed_mode;
 216	int panel_type;
 217	int drrs_mode;
 218	int ret;
 219
 220	lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
 221	if (!lvds_options)
 222		return;
 223
 224	dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
 225
 226	ret = intel_opregion_get_panel_type(dev_priv);
 227	if (ret >= 0) {
 228		WARN_ON(ret > 0xf);
 229		panel_type = ret;
 230		DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
 
 231	} else {
 232		if (lvds_options->panel_type > 0xf) {
 233			DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
 234				      lvds_options->panel_type);
 
 235			return;
 236		}
 237		panel_type = lvds_options->panel_type;
 238		DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
 
 239	}
 240
 241	dev_priv->vbt.panel_type = panel_type;
 242
 243	drrs_mode = (lvds_options->dps_panel_type_bits
 244				>> (panel_type * 2)) & MODE_MASK;
 245	/*
 246	 * VBT has static DRRS = 0 and seamless DRRS = 2.
 247	 * The below piece of code is required to adjust vbt.drrs_type
 248	 * to match the enum drrs_support_type.
 249	 */
 250	switch (drrs_mode) {
 251	case 0:
 252		dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
 253		DRM_DEBUG_KMS("DRRS supported mode is static\n");
 254		break;
 255	case 2:
 256		dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
 257		DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
 
 258		break;
 259	default:
 260		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
 261		DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
 
 262		break;
 263	}
 
 
 
 
 
 
 
 
 
 
 
 
 
 264
 265	lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
 266	if (!lvds_lfp_data)
 267		return;
 268
 269	lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
 270	if (!lvds_lfp_data_ptrs)
 271		return;
 272
 273	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
 274					       lvds_lfp_data_ptrs,
 275					       panel_type);
 276
 277	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
 278	if (!panel_fixed_mode)
 279		return;
 280
 281	fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
 282
 283	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
 284
 285	DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
 
 286	drm_mode_debug_printmodeline(panel_fixed_mode);
 287
 288	fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
 289				       lvds_lfp_data_ptrs,
 290				       panel_type);
 291	if (fp_timing) {
 292		/* check the resolution, just to be sure */
 293		if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
 294		    fp_timing->y_res == panel_fixed_mode->vdisplay) {
 295			dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
 296			DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
 297				      dev_priv->vbt.bios_lvds_val);
 
 298		}
 299	}
 300}
 301
 302static void
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 303parse_lfp_backlight(struct drm_i915_private *dev_priv,
 304		    const struct bdb_header *bdb)
 305{
 306	const struct bdb_lfp_backlight_data *backlight_data;
 307	const struct lfp_backlight_data_entry *entry;
 308	int panel_type = dev_priv->vbt.panel_type;
 309
 310	backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
 311	if (!backlight_data)
 312		return;
 313
 314	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
 315		DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
 316			      backlight_data->entry_size);
 
 317		return;
 318	}
 319
 320	entry = &backlight_data->data[panel_type];
 321
 322	dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
 323	if (!dev_priv->vbt.backlight.present) {
 324		DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
 325			      entry->type);
 
 326		return;
 327	}
 328
 329	dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
 330	if (bdb->version >= 191 &&
 331	    get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
 332		const struct lfp_backlight_control_method *method;
 333
 334		method = &backlight_data->backlight_control[panel_type];
 335		dev_priv->vbt.backlight.type = method->type;
 336		dev_priv->vbt.backlight.controller = method->controller;
 337	}
 338
 339	dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
 340	dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
 341	dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
 342	DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
 343		      "active %s, min brightness %u, level %u, controller %u\n",
 344		      dev_priv->vbt.backlight.pwm_freq_hz,
 345		      dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
 346		      dev_priv->vbt.backlight.min_brightness,
 347		      backlight_data->level[panel_type],
 348		      dev_priv->vbt.backlight.controller);
 
 349}
 350
 351/* Try to find sdvo panel data */
 352static void
 353parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
 354		      const struct bdb_header *bdb)
 355{
 356	const struct bdb_sdvo_panel_dtds *dtds;
 357	struct drm_display_mode *panel_fixed_mode;
 358	int index;
 359
 360	index = i915_modparams.vbt_sdvo_panel_type;
 361	if (index == -2) {
 362		DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
 
 363		return;
 364	}
 365
 366	if (index == -1) {
 367		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
 368
 369		sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
 370		if (!sdvo_lvds_options)
 371			return;
 372
 373		index = sdvo_lvds_options->panel_type;
 374	}
 375
 376	dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
 377	if (!dtds)
 378		return;
 379
 380	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
 381	if (!panel_fixed_mode)
 382		return;
 383
 384	fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
 385
 386	dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
 387
 388	DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
 
 389	drm_mode_debug_printmodeline(panel_fixed_mode);
 390}
 391
 392static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
 393				    bool alternate)
 394{
 395	switch (INTEL_GEN(dev_priv)) {
 396	case 2:
 397		return alternate ? 66667 : 48000;
 398	case 3:
 399	case 4:
 400		return alternate ? 100000 : 96000;
 401	default:
 402		return alternate ? 100000 : 120000;
 403	}
 404}
 405
 406static void
 407parse_general_features(struct drm_i915_private *dev_priv,
 408		       const struct bdb_header *bdb)
 409{
 410	const struct bdb_general_features *general;
 411
 412	general = find_section(bdb, BDB_GENERAL_FEATURES);
 413	if (!general)
 414		return;
 415
 416	dev_priv->vbt.int_tv_support = general->int_tv_support;
 417	/* int_crt_support can't be trusted on earlier platforms */
 418	if (bdb->version >= 155 &&
 419	    (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
 420		dev_priv->vbt.int_crt_support = general->int_crt_support;
 421	dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
 422	dev_priv->vbt.lvds_ssc_freq =
 423		intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
 424	dev_priv->vbt.display_clock_mode = general->display_clock_mode;
 425	dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
 426	if (bdb->version >= 181) {
 427		dev_priv->vbt.orientation = general->rotate_180 ?
 428			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
 429			DRM_MODE_PANEL_ORIENTATION_NORMAL;
 430	} else {
 431		dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
 432	}
 433	DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
 434		      dev_priv->vbt.int_tv_support,
 435		      dev_priv->vbt.int_crt_support,
 436		      dev_priv->vbt.lvds_use_ssc,
 437		      dev_priv->vbt.lvds_ssc_freq,
 438		      dev_priv->vbt.display_clock_mode,
 439		      dev_priv->vbt.fdi_rx_polarity_inverted);
 
 440}
 441
 442static const struct child_device_config *
 443child_device_ptr(const struct bdb_general_definitions *defs, int i)
 444{
 445	return (const void *) &defs->devices[i * defs->child_dev_size];
 446}
 447
 448static void
 449parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
 450{
 451	struct sdvo_device_mapping *mapping;
 
 452	const struct child_device_config *child;
 453	int i, count = 0;
 454
 455	/*
 456	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
 457	 * accurate and doesn't have to be, as long as it's not too strict.
 458	 */
 459	if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
 460		DRM_DEBUG_KMS("Skipping SDVO device mapping\n");
 461		return;
 462	}
 463
 464	for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
 465		child = dev_priv->vbt.child_dev + i;
 466
 467		if (child->slave_addr != SLAVE_ADDR1 &&
 468		    child->slave_addr != SLAVE_ADDR2) {
 469			/*
 470			 * If the slave address is neither 0x70 nor 0x72,
 471			 * it is not a SDVO device. Skip it.
 472			 */
 473			continue;
 474		}
 475		if (child->dvo_port != DEVICE_PORT_DVOB &&
 476		    child->dvo_port != DEVICE_PORT_DVOC) {
 477			/* skip the incorrect SDVO port */
 478			DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
 
 479			continue;
 480		}
 481		DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
 482			      " %s port\n",
 483			      child->slave_addr,
 484			      (child->dvo_port == DEVICE_PORT_DVOB) ?
 485			      "SDVOB" : "SDVOC");
 
 486		mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
 487		if (!mapping->initialized) {
 488			mapping->dvo_port = child->dvo_port;
 489			mapping->slave_addr = child->slave_addr;
 490			mapping->dvo_wiring = child->dvo_wiring;
 491			mapping->ddc_pin = child->ddc_pin;
 492			mapping->i2c_pin = child->i2c_pin;
 493			mapping->initialized = 1;
 494			DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
 495				      mapping->dvo_port,
 496				      mapping->slave_addr,
 497				      mapping->dvo_wiring,
 498				      mapping->ddc_pin,
 499				      mapping->i2c_pin);
 500		} else {
 501			DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
 502					 "two SDVO device.\n");
 
 503		}
 504		if (child->slave2_addr) {
 505			/* Maybe this is a SDVO device with multiple inputs */
 506			/* And the mapping info is not added */
 507			DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
 508				" is a SDVO device with multiple inputs.\n");
 
 509		}
 510		count++;
 511	}
 512
 513	if (!count) {
 514		/* No SDVO device info is found */
 515		DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
 
 516	}
 517}
 518
 519static void
 520parse_driver_features(struct drm_i915_private *dev_priv,
 521		      const struct bdb_header *bdb)
 522{
 523	const struct bdb_driver_features *driver;
 524
 525	driver = find_section(bdb, BDB_DRIVER_FEATURES);
 526	if (!driver)
 527		return;
 528
 529	if (INTEL_GEN(dev_priv) >= 5) {
 530		/*
 531		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
 532		 * to mean "eDP". The VBT spec doesn't agree with that
 533		 * interpretation, but real world VBTs seem to.
 534		 */
 535		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
 536			dev_priv->vbt.int_lvds_support = 0;
 537	} else {
 538		/*
 539		 * FIXME it's not clear which BDB version has the LVDS config
 540		 * bits defined. Revision history in the VBT spec says:
 541		 * "0.92 | Add two definitions for VBT value of LVDS Active
 542		 *  Config (00b and 11b values defined) | 06/13/2005"
 543		 * but does not the specify the BDB version.
 544		 *
 545		 * So far version 134 (on i945gm) is the oldest VBT observed
 546		 * in the wild with the bits correctly populated. Version
 547		 * 108 (on i85x) does not have the bits correctly populated.
 548		 */
 549		if (bdb->version >= 134 &&
 550		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
 551		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
 552			dev_priv->vbt.int_lvds_support = 0;
 553	}
 554
 555	DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 556	/*
 557	 * If DRRS is not supported, drrs_type has to be set to 0.
 558	 * This is because, VBT is configured in such a way that
 559	 * static DRRS is 0 and DRRS not supported is represented by
 560	 * driver->drrs_enabled=false
 561	 */
 562	if (!driver->drrs_enabled)
 563		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
 564	dev_priv->vbt.psr.enable = driver->psr_enabled;
 
 
 565}
 566
 567static void
 568parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 569{
 570	const struct bdb_edp *edp;
 571	const struct edp_power_seq *edp_pps;
 572	const struct edp_fast_link_params *edp_link_params;
 573	int panel_type = dev_priv->vbt.panel_type;
 574
 575	edp = find_section(bdb, BDB_EDP);
 576	if (!edp)
 577		return;
 578
 579	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
 580	case EDP_18BPP:
 581		dev_priv->vbt.edp.bpp = 18;
 582		break;
 583	case EDP_24BPP:
 584		dev_priv->vbt.edp.bpp = 24;
 585		break;
 586	case EDP_30BPP:
 587		dev_priv->vbt.edp.bpp = 30;
 588		break;
 589	}
 590
 591	/* Get the eDP sequencing and link info */
 592	edp_pps = &edp->power_seqs[panel_type];
 593	edp_link_params = &edp->fast_link_params[panel_type];
 594
 595	dev_priv->vbt.edp.pps = *edp_pps;
 596
 597	switch (edp_link_params->rate) {
 598	case EDP_RATE_1_62:
 599		dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
 600		break;
 601	case EDP_RATE_2_7:
 602		dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
 603		break;
 604	default:
 605		DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
 606			      edp_link_params->rate);
 
 607		break;
 608	}
 609
 610	switch (edp_link_params->lanes) {
 611	case EDP_LANE_1:
 612		dev_priv->vbt.edp.lanes = 1;
 613		break;
 614	case EDP_LANE_2:
 615		dev_priv->vbt.edp.lanes = 2;
 616		break;
 617	case EDP_LANE_4:
 618		dev_priv->vbt.edp.lanes = 4;
 619		break;
 620	default:
 621		DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
 622			      edp_link_params->lanes);
 
 623		break;
 624	}
 625
 626	switch (edp_link_params->preemphasis) {
 627	case EDP_PREEMPHASIS_NONE:
 628		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
 629		break;
 630	case EDP_PREEMPHASIS_3_5dB:
 631		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
 632		break;
 633	case EDP_PREEMPHASIS_6dB:
 634		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
 635		break;
 636	case EDP_PREEMPHASIS_9_5dB:
 637		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
 638		break;
 639	default:
 640		DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
 641			      edp_link_params->preemphasis);
 
 642		break;
 643	}
 644
 645	switch (edp_link_params->vswing) {
 646	case EDP_VSWING_0_4V:
 647		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
 648		break;
 649	case EDP_VSWING_0_6V:
 650		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
 651		break;
 652	case EDP_VSWING_0_8V:
 653		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
 654		break;
 655	case EDP_VSWING_1_2V:
 656		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
 657		break;
 658	default:
 659		DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
 660			      edp_link_params->vswing);
 
 661		break;
 662	}
 663
 664	if (bdb->version >= 173) {
 665		u8 vswing;
 666
 667		/* Don't read from VBT if module parameter has valid value*/
 668		if (i915_modparams.edp_vswing) {
 669			dev_priv->vbt.edp.low_vswing =
 670				i915_modparams.edp_vswing == 1;
 671		} else {
 672			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
 673			dev_priv->vbt.edp.low_vswing = vswing == 0;
 674		}
 675	}
 676}
 677
 678static void
 679parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 680{
 681	const struct bdb_psr *psr;
 682	const struct psr_table *psr_table;
 683	int panel_type = dev_priv->vbt.panel_type;
 684
 685	psr = find_section(bdb, BDB_PSR);
 686	if (!psr) {
 687		DRM_DEBUG_KMS("No PSR BDB found.\n");
 688		return;
 689	}
 690
 691	psr_table = &psr->psr_table[panel_type];
 692
 693	dev_priv->vbt.psr.full_link = psr_table->full_link;
 694	dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
 695
 696	/* Allowed VBT values goes from 0 to 15 */
 697	dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
 698		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
 699
 700	switch (psr_table->lines_to_wait) {
 701	case 0:
 702		dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
 703		break;
 704	case 1:
 705		dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
 706		break;
 707	case 2:
 708		dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
 709		break;
 710	case 3:
 711		dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
 712		break;
 713	default:
 714		DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
 715			      psr_table->lines_to_wait);
 
 716		break;
 717	}
 718
 719	/*
 720	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
 721	 * Old decimal value is wake up time in multiples of 100 us.
 722	 */
 723	if (bdb->version >= 205 &&
 724	    (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
 725	     INTEL_GEN(dev_priv) >= 10)) {
 726		switch (psr_table->tp1_wakeup_time) {
 727		case 0:
 728			dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
 729			break;
 730		case 1:
 731			dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
 732			break;
 733		case 3:
 734			dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
 735			break;
 736		default:
 737			DRM_DEBUG_KMS("VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
 738					psr_table->tp1_wakeup_time);
 739			/* fallthrough */
 
 740		case 2:
 741			dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
 742			break;
 743		}
 744
 745		switch (psr_table->tp2_tp3_wakeup_time) {
 746		case 0:
 747			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
 748			break;
 749		case 1:
 750			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
 751			break;
 752		case 3:
 753			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
 754			break;
 755		default:
 756			DRM_DEBUG_KMS("VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
 757					psr_table->tp2_tp3_wakeup_time);
 758			/* fallthrough */
 
 759		case 2:
 760			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
 761		break;
 762		}
 763	} else {
 764		dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
 765		dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
 766	}
 767
 768	if (bdb->version >= 226) {
 769		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
 770
 771		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
 772		switch (wakeup_time) {
 773		case 0:
 774			wakeup_time = 500;
 775			break;
 776		case 1:
 777			wakeup_time = 100;
 778			break;
 779		case 3:
 780			wakeup_time = 50;
 781			break;
 782		default:
 783		case 2:
 784			wakeup_time = 2500;
 785			break;
 786		}
 787		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
 788	} else {
 789		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
 790		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
 791	}
 792}
 793
 794static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
 795				      u16 version, enum port port)
 796{
 797	if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
 798		dev_priv->vbt.dsi.bl_ports = BIT(port);
 799		if (dev_priv->vbt.dsi.config->cabc_supported)
 800			dev_priv->vbt.dsi.cabc_ports = BIT(port);
 801
 802		return;
 803	}
 804
 805	switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
 806	case DL_DCS_PORT_A:
 807		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
 808		break;
 809	case DL_DCS_PORT_C:
 810		dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
 811		break;
 812	default:
 813	case DL_DCS_PORT_A_AND_C:
 814		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
 815		break;
 816	}
 817
 818	if (!dev_priv->vbt.dsi.config->cabc_supported)
 819		return;
 820
 821	switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
 822	case DL_DCS_PORT_A:
 823		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
 824		break;
 825	case DL_DCS_PORT_C:
 826		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
 827		break;
 828	default:
 829	case DL_DCS_PORT_A_AND_C:
 830		dev_priv->vbt.dsi.cabc_ports =
 831					BIT(PORT_A) | BIT(PORT_C);
 832		break;
 833	}
 834}
 835
 836static void
 837parse_mipi_config(struct drm_i915_private *dev_priv,
 838		  const struct bdb_header *bdb)
 839{
 840	const struct bdb_mipi_config *start;
 841	const struct mipi_config *config;
 842	const struct mipi_pps_data *pps;
 843	int panel_type = dev_priv->vbt.panel_type;
 844	enum port port;
 845
 846	/* parse MIPI blocks only if LFP type is MIPI */
 847	if (!intel_bios_is_dsi_present(dev_priv, &port))
 848		return;
 849
 850	/* Initialize this to undefined indicating no generic MIPI support */
 851	dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
 852
 853	/* Block #40 is already parsed and panel_fixed_mode is
 854	 * stored in dev_priv->lfp_lvds_vbt_mode
 855	 * resuse this when needed
 856	 */
 857
 858	/* Parse #52 for panel index used from panel_type already
 859	 * parsed
 860	 */
 861	start = find_section(bdb, BDB_MIPI_CONFIG);
 862	if (!start) {
 863		DRM_DEBUG_KMS("No MIPI config BDB found");
 864		return;
 865	}
 866
 867	DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
 868								panel_type);
 869
 870	/*
 871	 * get hold of the correct configuration block and pps data as per
 872	 * the panel_type as index
 873	 */
 874	config = &start->config[panel_type];
 875	pps = &start->pps[panel_type];
 876
 877	/* store as of now full data. Trim when we realise all is not needed */
 878	dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
 879	if (!dev_priv->vbt.dsi.config)
 880		return;
 881
 882	dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
 883	if (!dev_priv->vbt.dsi.pps) {
 884		kfree(dev_priv->vbt.dsi.config);
 885		return;
 886	}
 887
 888	parse_dsi_backlight_ports(dev_priv, bdb->version, port);
 889
 890	/* FIXME is the 90 vs. 270 correct? */
 891	switch (config->rotation) {
 892	case ENABLE_ROTATION_0:
 893		/*
 894		 * Most (all?) VBTs claim 0 degrees despite having
 895		 * an upside down panel, thus we do not trust this.
 896		 */
 897		dev_priv->vbt.dsi.orientation =
 898			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
 899		break;
 900	case ENABLE_ROTATION_90:
 901		dev_priv->vbt.dsi.orientation =
 902			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
 903		break;
 904	case ENABLE_ROTATION_180:
 905		dev_priv->vbt.dsi.orientation =
 906			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
 907		break;
 908	case ENABLE_ROTATION_270:
 909		dev_priv->vbt.dsi.orientation =
 910			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
 911		break;
 912	}
 913
 914	/* We have mandatory mipi config blocks. Initialize as generic panel */
 915	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
 916}
 917
 918/* Find the sequence block and size for the given panel. */
 919static const u8 *
 920find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
 921			  u16 panel_id, u32 *seq_size)
 922{
 923	u32 total = get_blocksize(sequence);
 924	const u8 *data = &sequence->data[0];
 925	u8 current_id;
 926	u32 current_size;
 927	int header_size = sequence->version >= 3 ? 5 : 3;
 928	int index = 0;
 929	int i;
 930
 931	/* skip new block size */
 932	if (sequence->version >= 3)
 933		data += 4;
 934
 935	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
 936		if (index + header_size > total) {
 937			DRM_ERROR("Invalid sequence block (header)\n");
 938			return NULL;
 939		}
 940
 941		current_id = *(data + index);
 942		if (sequence->version >= 3)
 943			current_size = *((const u32 *)(data + index + 1));
 944		else
 945			current_size = *((const u16 *)(data + index + 1));
 946
 947		index += header_size;
 948
 949		if (index + current_size > total) {
 950			DRM_ERROR("Invalid sequence block\n");
 951			return NULL;
 952		}
 953
 954		if (current_id == panel_id) {
 955			*seq_size = current_size;
 956			return data + index;
 957		}
 958
 959		index += current_size;
 960	}
 961
 962	DRM_ERROR("Sequence block detected but no valid configuration\n");
 963
 964	return NULL;
 965}
 966
 967static int goto_next_sequence(const u8 *data, int index, int total)
 968{
 969	u16 len;
 970
 971	/* Skip Sequence Byte. */
 972	for (index = index + 1; index < total; index += len) {
 973		u8 operation_byte = *(data + index);
 974		index++;
 975
 976		switch (operation_byte) {
 977		case MIPI_SEQ_ELEM_END:
 978			return index;
 979		case MIPI_SEQ_ELEM_SEND_PKT:
 980			if (index + 4 > total)
 981				return 0;
 982
 983			len = *((const u16 *)(data + index + 2)) + 4;
 984			break;
 985		case MIPI_SEQ_ELEM_DELAY:
 986			len = 4;
 987			break;
 988		case MIPI_SEQ_ELEM_GPIO:
 989			len = 2;
 990			break;
 991		case MIPI_SEQ_ELEM_I2C:
 992			if (index + 7 > total)
 993				return 0;
 994			len = *(data + index + 6) + 7;
 995			break;
 996		default:
 997			DRM_ERROR("Unknown operation byte\n");
 998			return 0;
 999		}
1000	}
1001
1002	return 0;
1003}
1004
1005static int goto_next_sequence_v3(const u8 *data, int index, int total)
1006{
1007	int seq_end;
1008	u16 len;
1009	u32 size_of_sequence;
1010
1011	/*
1012	 * Could skip sequence based on Size of Sequence alone, but also do some
1013	 * checking on the structure.
1014	 */
1015	if (total < 5) {
1016		DRM_ERROR("Too small sequence size\n");
1017		return 0;
1018	}
1019
1020	/* Skip Sequence Byte. */
1021	index++;
1022
1023	/*
1024	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1025	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1026	 * byte.
1027	 */
1028	size_of_sequence = *((const u32 *)(data + index));
1029	index += 4;
1030
1031	seq_end = index + size_of_sequence;
1032	if (seq_end > total) {
1033		DRM_ERROR("Invalid sequence size\n");
1034		return 0;
1035	}
1036
1037	for (; index < total; index += len) {
1038		u8 operation_byte = *(data + index);
1039		index++;
1040
1041		if (operation_byte == MIPI_SEQ_ELEM_END) {
1042			if (index != seq_end) {
1043				DRM_ERROR("Invalid element structure\n");
1044				return 0;
1045			}
1046			return index;
1047		}
1048
1049		len = *(data + index);
1050		index++;
1051
1052		/*
1053		 * FIXME: Would be nice to check elements like for v1/v2 in
1054		 * goto_next_sequence() above.
1055		 */
1056		switch (operation_byte) {
1057		case MIPI_SEQ_ELEM_SEND_PKT:
1058		case MIPI_SEQ_ELEM_DELAY:
1059		case MIPI_SEQ_ELEM_GPIO:
1060		case MIPI_SEQ_ELEM_I2C:
1061		case MIPI_SEQ_ELEM_SPI:
1062		case MIPI_SEQ_ELEM_PMIC:
1063			break;
1064		default:
1065			DRM_ERROR("Unknown operation byte %u\n",
1066				  operation_byte);
1067			break;
1068		}
1069	}
1070
1071	return 0;
1072}
1073
1074/*
1075 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1076 * skip all delay + gpio operands and stop at the first DSI packet op.
1077 */
1078static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1079{
1080	const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1081	int index, len;
1082
1083	if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1))
 
1084		return 0;
1085
1086	/* index = 1 to skip sequence byte */
1087	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1088		switch (data[index]) {
1089		case MIPI_SEQ_ELEM_SEND_PKT:
1090			return index == 1 ? 0 : index;
1091		case MIPI_SEQ_ELEM_DELAY:
1092			len = 5; /* 1 byte for operand + uint32 */
1093			break;
1094		case MIPI_SEQ_ELEM_GPIO:
1095			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1096			break;
1097		default:
1098			return 0;
1099		}
1100	}
1101
1102	return 0;
1103}
1104
1105/*
1106 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1107 * The deassert must be done before calling intel_dsi_device_ready, so for
1108 * these devices we split the init OTP sequence into a deassert sequence and
1109 * the actual init OTP part.
1110 */
1111static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1112{
1113	u8 *init_otp;
1114	int len;
1115
1116	/* Limit this to VLV for now. */
1117	if (!IS_VALLEYVIEW(dev_priv))
1118		return;
1119
1120	/* Limit this to v1 vid-mode sequences */
1121	if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1122	    dev_priv->vbt.dsi.seq_version != 1)
1123		return;
1124
1125	/* Only do this if there are otp and assert seqs and no deassert seq */
1126	if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1127	    !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1128	    dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1129		return;
1130
1131	/* The deassert-sequence ends at the first DSI packet */
1132	len = get_init_otp_deassert_fragment_len(dev_priv);
1133	if (!len)
1134		return;
1135
1136	DRM_DEBUG_KMS("Using init OTP fragment to deassert reset\n");
 
1137
1138	/* Copy the fragment, update seq byte and terminate it */
1139	init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1140	dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1141	if (!dev_priv->vbt.dsi.deassert_seq)
1142		return;
1143	dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1144	dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1145	/* Use the copy for deassert */
1146	dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1147		dev_priv->vbt.dsi.deassert_seq;
1148	/* Replace the last byte of the fragment with init OTP seq byte */
1149	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1150	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1151	dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1152}
1153
1154static void
1155parse_mipi_sequence(struct drm_i915_private *dev_priv,
1156		    const struct bdb_header *bdb)
1157{
1158	int panel_type = dev_priv->vbt.panel_type;
1159	const struct bdb_mipi_sequence *sequence;
1160	const u8 *seq_data;
1161	u32 seq_size;
1162	u8 *data;
1163	int index = 0;
1164
1165	/* Only our generic panel driver uses the sequence block. */
1166	if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1167		return;
1168
1169	sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1170	if (!sequence) {
1171		DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
 
1172		return;
1173	}
1174
1175	/* Fail gracefully for forward incompatible sequence block. */
1176	if (sequence->version >= 4) {
1177		DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
1178			  sequence->version);
 
1179		return;
1180	}
1181
1182	DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
 
1183
1184	seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1185	if (!seq_data)
1186		return;
1187
1188	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1189	if (!data)
1190		return;
1191
1192	/* Parse the sequences, store pointers to each sequence. */
1193	for (;;) {
1194		u8 seq_id = *(data + index);
1195		if (seq_id == MIPI_SEQ_END)
1196			break;
1197
1198		if (seq_id >= MIPI_SEQ_MAX) {
1199			DRM_ERROR("Unknown sequence %u\n", seq_id);
 
1200			goto err;
1201		}
1202
1203		/* Log about presence of sequences we won't run. */
1204		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1205			DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
 
1206
1207		dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1208
1209		if (sequence->version >= 3)
1210			index = goto_next_sequence_v3(data, index, seq_size);
1211		else
1212			index = goto_next_sequence(data, index, seq_size);
1213		if (!index) {
1214			DRM_ERROR("Invalid sequence %u\n", seq_id);
 
1215			goto err;
1216		}
1217	}
1218
1219	dev_priv->vbt.dsi.data = data;
1220	dev_priv->vbt.dsi.size = seq_size;
1221	dev_priv->vbt.dsi.seq_version = sequence->version;
1222
1223	fixup_mipi_sequences(dev_priv);
1224
1225	DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
1226	return;
1227
1228err:
1229	kfree(data);
1230	memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1231}
1232
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1233static u8 translate_iboost(u8 val)
1234{
1235	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1236
1237	if (val >= ARRAY_SIZE(mapping)) {
1238		DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1239		return 0;
1240	}
1241	return mapping[val];
1242}
1243
1244static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1245{
1246	const struct ddi_vbt_port_info *info;
1247	enum port port;
1248
1249	for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1250		info = &i915->vbt.ddi_port_info[port];
1251
1252		if (info->child && ddc_pin == info->alternate_ddc_pin)
1253			return port;
1254	}
1255
1256	return PORT_NONE;
1257}
1258
1259static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1260			     enum port port)
1261{
1262	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1263	enum port p;
1264
1265	if (!info->alternate_ddc_pin)
1266		return;
1267
1268	p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1269	if (p != PORT_NONE) {
1270		DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1271			      "disabling port %c DVI/HDMI support\n",
1272			      port_name(port), info->alternate_ddc_pin,
1273			      port_name(p), port_name(p));
 
1274
1275		/*
1276		 * If we have multiple ports supposedly sharing the
1277		 * pin, then dvi/hdmi couldn't exist on the shared
1278		 * port. Otherwise they share the same ddc bin and
1279		 * system couldn't communicate with them separately.
1280		 *
1281		 * Give inverse child device order the priority,
1282		 * last one wins. Yes, there are real machines
1283		 * (eg. Asrock B250M-HDV) where VBT has both
1284		 * port A and port E with the same AUX ch and
1285		 * we must pick port E :(
1286		 */
1287		info = &dev_priv->vbt.ddi_port_info[p];
1288
1289		info->supports_dvi = false;
1290		info->supports_hdmi = false;
1291		info->alternate_ddc_pin = 0;
1292	}
1293}
1294
1295static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1296{
1297	const struct ddi_vbt_port_info *info;
1298	enum port port;
1299
1300	for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1301		info = &i915->vbt.ddi_port_info[port];
1302
1303		if (info->child && aux_ch == info->alternate_aux_channel)
1304			return port;
1305	}
1306
1307	return PORT_NONE;
1308}
1309
1310static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1311			    enum port port)
1312{
1313	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1314	enum port p;
1315
1316	if (!info->alternate_aux_channel)
1317		return;
1318
1319	p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1320	if (p != PORT_NONE) {
1321		DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1322			      "disabling port %c DP support\n",
1323			      port_name(port), info->alternate_aux_channel,
1324			      port_name(p), port_name(p));
 
1325
1326		/*
1327		 * If we have multiple ports supposedlt sharing the
1328		 * aux channel, then DP couldn't exist on the shared
1329		 * port. Otherwise they share the same aux channel
1330		 * and system couldn't communicate with them separately.
1331		 *
1332		 * Give inverse child device order the priority,
1333		 * last one wins. Yes, there are real machines
1334		 * (eg. Asrock B250M-HDV) where VBT has both
1335		 * port A and port E with the same AUX ch and
1336		 * we must pick port E :(
1337		 */
1338		info = &dev_priv->vbt.ddi_port_info[p];
1339
1340		info->supports_dp = false;
1341		info->alternate_aux_channel = 0;
1342	}
1343}
1344
1345static const u8 cnp_ddc_pin_map[] = {
1346	[0] = 0, /* N/A */
1347	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1348	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1349	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1350	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1351};
1352
1353static const u8 icp_ddc_pin_map[] = {
1354	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1355	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1356	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1357	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1358	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1359	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1360	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1361	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1362	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1363};
1364
1365static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1366{
1367	const u8 *ddc_pin_map;
1368	int n_entries;
1369
1370	if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1371		ddc_pin_map = icp_ddc_pin_map;
1372		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1373	} else if (HAS_PCH_CNP(dev_priv)) {
1374		ddc_pin_map = cnp_ddc_pin_map;
1375		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1376	} else {
1377		/* Assuming direct map */
1378		return vbt_pin;
1379	}
1380
1381	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1382		return ddc_pin_map[vbt_pin];
1383
1384	DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1385		      vbt_pin);
 
1386	return 0;
1387}
1388
1389static enum port dvo_port_to_port(u8 dvo_port)
 
1390{
1391	/*
1392	 * Each DDI port can have more than one value on the "DVO Port" field,
1393	 * so look for all the possible values for each port.
1394	 */
1395	static const int dvo_ports[][3] = {
1396		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1397		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1398		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1399		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1400		[PORT_E] = { DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
1401		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1},
1402	};
1403	enum port port;
1404	int i;
1405
1406	for (port = PORT_A; port < ARRAY_SIZE(dvo_ports); port++) {
1407		for (i = 0; i < ARRAY_SIZE(dvo_ports[port]); i++) {
1408			if (dvo_ports[port][i] == -1)
1409				break;
1410
1411			if (dvo_port == dvo_ports[port][i])
1412				return port;
1413		}
1414	}
1415
1416	return PORT_NONE;
1417}
1418
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1419static void parse_ddi_port(struct drm_i915_private *dev_priv,
1420			   const struct child_device_config *child,
1421			   u8 bdb_version)
1422{
 
1423	struct ddi_vbt_port_info *info;
1424	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1425	enum port port;
1426
1427	port = dvo_port_to_port(child->dvo_port);
1428	if (port == PORT_NONE)
1429		return;
1430
1431	info = &dev_priv->vbt.ddi_port_info[port];
1432
1433	if (info->child) {
1434		DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
1435			      port_name(port));
 
1436		return;
1437	}
1438
1439	is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1440	is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1441	is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1442	is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1443	is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1444
1445	if (port == PORT_A && is_dvi) {
1446		DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1447			      is_hdmi ? "/HDMI" : "");
 
1448		is_dvi = false;
1449		is_hdmi = false;
1450	}
1451
1452	info->supports_dvi = is_dvi;
1453	info->supports_hdmi = is_hdmi;
1454	info->supports_dp = is_dp;
1455	info->supports_edp = is_edp;
1456
1457	if (bdb_version >= 195)
1458		info->supports_typec_usb = child->dp_usb_type_c;
1459
1460	if (bdb_version >= 209)
1461		info->supports_tbt = child->tbt;
1462
1463	DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d\n",
1464		      port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1465		      HAS_LSPCON(dev_priv) && child->lspcon,
1466		      info->supports_typec_usb, info->supports_tbt);
1467
1468	if (is_edp && is_dvi)
1469		DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1470			      port_name(port));
1471	if (is_crt && port != PORT_E)
1472		DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1473	if (is_crt && (is_dvi || is_dp))
1474		DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1475			      port_name(port));
1476	if (is_dvi && (port == PORT_A || port == PORT_E))
1477		DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
1478	if (!is_dvi && !is_dp && !is_crt)
1479		DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1480			      port_name(port));
1481	if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1482		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
1483
1484	if (is_dvi) {
1485		u8 ddc_pin;
1486
1487		ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1488		if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1489			info->alternate_ddc_pin = ddc_pin;
1490			sanitize_ddc_pin(dev_priv, port);
1491		} else {
1492			DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, "
1493				      "sticking to defaults\n",
1494				      port_name(port), ddc_pin);
 
1495		}
1496	}
1497
1498	if (is_dp) {
1499		info->alternate_aux_channel = child->aux_channel;
1500
1501		sanitize_aux_ch(dev_priv, port);
1502	}
1503
1504	if (bdb_version >= 158) {
1505		/* The VBT HDMI level shift values match the table we have. */
1506		u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1507		DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1508			      port_name(port),
1509			      hdmi_level_shift);
 
1510		info->hdmi_level_shift = hdmi_level_shift;
 
1511	}
1512
1513	if (bdb_version >= 204) {
1514		int max_tmds_clock;
1515
1516		switch (child->hdmi_max_data_rate) {
1517		default:
1518			MISSING_CASE(child->hdmi_max_data_rate);
1519			/* fall through */
1520		case HDMI_MAX_DATA_RATE_PLATFORM:
1521			max_tmds_clock = 0;
1522			break;
1523		case HDMI_MAX_DATA_RATE_297:
1524			max_tmds_clock = 297000;
1525			break;
1526		case HDMI_MAX_DATA_RATE_165:
1527			max_tmds_clock = 165000;
1528			break;
1529		}
1530
1531		if (max_tmds_clock)
1532			DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
1533				      port_name(port), max_tmds_clock);
 
1534		info->max_tmds_clock = max_tmds_clock;
1535	}
1536
1537	/* Parse the I_boost config for SKL and above */
1538	if (bdb_version >= 196 && child->iboost) {
1539		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1540		DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1541			      port_name(port), info->dp_boost_level);
 
1542		info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1543		DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1544			      port_name(port), info->hdmi_boost_level);
 
1545	}
1546
1547	/* DP max link rate for CNL+ */
1548	if (bdb_version >= 216) {
1549		switch (child->dp_max_link_rate) {
1550		default:
1551		case VBT_DP_MAX_LINK_RATE_HBR3:
1552			info->dp_max_link_rate = 810000;
1553			break;
1554		case VBT_DP_MAX_LINK_RATE_HBR2:
1555			info->dp_max_link_rate = 540000;
1556			break;
1557		case VBT_DP_MAX_LINK_RATE_HBR:
1558			info->dp_max_link_rate = 270000;
1559			break;
1560		case VBT_DP_MAX_LINK_RATE_LBR:
1561			info->dp_max_link_rate = 162000;
1562			break;
1563		}
1564		DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n",
1565			      port_name(port), info->dp_max_link_rate);
 
1566	}
1567
1568	info->child = child;
1569}
1570
1571static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1572{
1573	const struct child_device_config *child;
1574	int i;
1575
1576	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1577		return;
1578
1579	if (bdb_version < 155)
1580		return;
1581
1582	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1583		child = dev_priv->vbt.child_dev + i;
1584
1585		parse_ddi_port(dev_priv, child, bdb_version);
1586	}
1587}
1588
1589static void
1590parse_general_definitions(struct drm_i915_private *dev_priv,
1591			  const struct bdb_header *bdb)
1592{
1593	const struct bdb_general_definitions *defs;
 
1594	const struct child_device_config *child;
1595	int i, child_device_num, count;
1596	u8 expected_size;
1597	u16 block_size;
1598	int bus_pin;
1599
1600	defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1601	if (!defs) {
1602		DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
 
1603		return;
1604	}
1605
1606	block_size = get_blocksize(defs);
1607	if (block_size < sizeof(*defs)) {
1608		DRM_DEBUG_KMS("General definitions block too small (%u)\n",
1609			      block_size);
 
1610		return;
1611	}
1612
1613	bus_pin = defs->crt_ddc_gmbus_pin;
1614	DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
1615	if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1616		dev_priv->vbt.crt_ddc_pin = bus_pin;
1617
1618	if (bdb->version < 106) {
1619		expected_size = 22;
1620	} else if (bdb->version < 111) {
1621		expected_size = 27;
1622	} else if (bdb->version < 195) {
1623		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1624	} else if (bdb->version == 195) {
1625		expected_size = 37;
1626	} else if (bdb->version <= 215) {
1627		expected_size = 38;
1628	} else if (bdb->version <= 216) {
1629		expected_size = 39;
1630	} else {
1631		expected_size = sizeof(*child);
1632		BUILD_BUG_ON(sizeof(*child) < 39);
1633		DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1634				 bdb->version, expected_size);
 
1635	}
1636
1637	/* Flag an error for unexpected size, but continue anyway. */
1638	if (defs->child_dev_size != expected_size)
1639		DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1640			  defs->child_dev_size, expected_size, bdb->version);
 
1641
1642	/* The legacy sized child device config is the minimum we need. */
1643	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1644		DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1645			      defs->child_dev_size);
 
1646		return;
1647	}
1648
1649	/* get the number of child device */
1650	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1651	count = 0;
1652	/* get the number of child device that is present */
1653	for (i = 0; i < child_device_num; i++) {
1654		child = child_device_ptr(defs, i);
1655		if (!child->device_type)
1656			continue;
1657		count++;
1658	}
1659	if (!count) {
1660		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1661		return;
1662	}
1663	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
1664	if (!dev_priv->vbt.child_dev) {
1665		DRM_DEBUG_KMS("No memory space for child device\n");
1666		return;
1667	}
1668
1669	dev_priv->vbt.child_dev_num = count;
1670	count = 0;
1671	for (i = 0; i < child_device_num; i++) {
1672		child = child_device_ptr(defs, i);
1673		if (!child->device_type)
1674			continue;
1675
1676		DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n",
1677			      child->device_type);
 
 
 
 
 
1678
1679		/*
1680		 * Copy as much as we know (sizeof) and is available
1681		 * (child_dev_size) of the child device. Accessing the data must
1682		 * depend on VBT version.
1683		 */
1684		memcpy(dev_priv->vbt.child_dev + count, child,
1685		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
1686		count++;
 
1687	}
 
 
 
 
1688}
1689
1690/* Common defaults which may be overridden by VBT. */
1691static void
1692init_vbt_defaults(struct drm_i915_private *dev_priv)
1693{
1694	enum port port;
1695
1696	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1697
1698	/* Default to having backlight */
1699	dev_priv->vbt.backlight.present = true;
1700
1701	/* LFP panel data */
1702	dev_priv->vbt.lvds_dither = 1;
1703
1704	/* SDVO panel data */
1705	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1706
1707	/* general features */
1708	dev_priv->vbt.int_tv_support = 1;
1709	dev_priv->vbt.int_crt_support = 1;
1710
1711	/* driver features */
1712	dev_priv->vbt.int_lvds_support = 1;
1713
1714	/* Default to using SSC */
1715	dev_priv->vbt.lvds_use_ssc = 1;
1716	/*
1717	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1718	 * clock for LVDS.
1719	 */
1720	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1721			!HAS_PCH_SPLIT(dev_priv));
1722	DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1723
1724	for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1725		struct ddi_vbt_port_info *info =
1726			&dev_priv->vbt.ddi_port_info[port];
1727
1728		info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1729	}
1730}
1731
1732/* Defaults to initialize only if there is no VBT. */
1733static void
1734init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1735{
1736	enum port port;
1737
1738	for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1739		struct ddi_vbt_port_info *info =
1740			&dev_priv->vbt.ddi_port_info[port];
1741		enum phy phy = intel_port_to_phy(dev_priv, port);
1742
1743		/*
1744		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
1745		 * to detect it.
1746		 */
1747		if (intel_phy_is_tc(dev_priv, phy))
1748			continue;
1749
1750		info->supports_dvi = (port != PORT_A && port != PORT_E);
1751		info->supports_hdmi = info->supports_dvi;
1752		info->supports_dp = (port != PORT_E);
1753		info->supports_edp = (port == PORT_A);
1754	}
1755}
1756
1757static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1758{
1759	const void *_vbt = vbt;
1760
1761	return _vbt + vbt->bdb_offset;
1762}
1763
1764/**
1765 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1766 * @buf:	pointer to a buffer to validate
1767 * @size:	size of the buffer
1768 *
1769 * Returns true on valid VBT.
1770 */
1771bool intel_bios_is_valid_vbt(const void *buf, size_t size)
1772{
1773	const struct vbt_header *vbt = buf;
1774	const struct bdb_header *bdb;
1775
1776	if (!vbt)
1777		return false;
1778
1779	if (sizeof(struct vbt_header) > size) {
1780		DRM_DEBUG_DRIVER("VBT header incomplete\n");
1781		return false;
1782	}
1783
1784	if (memcmp(vbt->signature, "$VBT", 4)) {
1785		DRM_DEBUG_DRIVER("VBT invalid signature\n");
1786		return false;
1787	}
1788
 
 
 
 
 
 
 
1789	if (range_overflows_t(size_t,
1790			      vbt->bdb_offset,
1791			      sizeof(struct bdb_header),
1792			      size)) {
1793		DRM_DEBUG_DRIVER("BDB header incomplete\n");
1794		return false;
1795	}
1796
1797	bdb = get_bdb_header(vbt);
1798	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
1799		DRM_DEBUG_DRIVER("BDB incomplete\n");
1800		return false;
1801	}
1802
1803	return vbt;
1804}
1805
1806static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
1807{
1808	size_t i;
 
 
 
 
1809
1810	/* Scour memory looking for the VBT signature. */
1811	for (i = 0; i + 4 < size; i++) {
1812		void *vbt;
1813
1814		if (ioread32(bios + i) != *((const u32 *) "$VBT"))
 
 
1815			continue;
1816
1817		/*
1818		 * This is the one place where we explicitly discard the address
1819		 * space (__iomem) of the BIOS/VBT.
1820		 */
1821		vbt = (void __force *) bios + i;
1822		if (intel_bios_is_valid_vbt(vbt, size - i))
1823			return vbt;
1824
1825		break;
1826	}
1827
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1828	return NULL;
1829}
1830
1831/**
1832 * intel_bios_init - find VBT and initialize settings from the BIOS
1833 * @dev_priv: i915 device instance
1834 *
1835 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
1836 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
1837 * initialize some defaults if the VBT is not present at all.
1838 */
1839void intel_bios_init(struct drm_i915_private *dev_priv)
1840{
1841	struct pci_dev *pdev = dev_priv->drm.pdev;
1842	const struct vbt_header *vbt = dev_priv->opregion.vbt;
 
1843	const struct bdb_header *bdb;
1844	u8 __iomem *bios = NULL;
1845
1846	if (!HAS_DISPLAY(dev_priv)) {
1847		DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
 
 
 
1848		return;
1849	}
1850
1851	init_vbt_defaults(dev_priv);
1852
1853	/* If the OpRegion does not have VBT, look in PCI ROM. */
1854	if (!vbt) {
1855		size_t size;
1856
1857		bios = pci_map_rom(pdev, &size);
1858		if (!bios)
1859			goto out;
1860
1861		vbt = find_vbt(bios, size);
1862		if (!vbt)
1863			goto out;
1864
1865		DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
1866	}
1867
1868	bdb = get_bdb_header(vbt);
1869
1870	DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1871		      (int)sizeof(vbt->signature), vbt->signature, bdb->version);
 
1872
1873	/* Grab useful general definitions */
1874	parse_general_features(dev_priv, bdb);
1875	parse_general_definitions(dev_priv, bdb);
1876	parse_lfp_panel_data(dev_priv, bdb);
 
1877	parse_lfp_backlight(dev_priv, bdb);
1878	parse_sdvo_panel_data(dev_priv, bdb);
1879	parse_driver_features(dev_priv, bdb);
 
1880	parse_edp(dev_priv, bdb);
1881	parse_psr(dev_priv, bdb);
1882	parse_mipi_config(dev_priv, bdb);
1883	parse_mipi_sequence(dev_priv, bdb);
1884
 
 
 
1885	/* Further processing on pre-parsed data */
1886	parse_sdvo_device_mapping(dev_priv, bdb->version);
1887	parse_ddi_ports(dev_priv, bdb->version);
1888
1889out:
1890	if (!vbt) {
1891		DRM_INFO("Failed to find VBIOS tables (VBT)\n");
 
1892		init_vbt_missing_defaults(dev_priv);
1893	}
1894
1895	if (bios)
1896		pci_unmap_rom(pdev, bios);
1897}
1898
1899/**
1900 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
1901 * @dev_priv: i915 device instance
1902 */
1903void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
1904{
1905	kfree(dev_priv->vbt.child_dev);
1906	dev_priv->vbt.child_dev = NULL;
1907	dev_priv->vbt.child_dev_num = 0;
 
 
 
 
 
1908	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
1909	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1910	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
1911	dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
1912	kfree(dev_priv->vbt.dsi.data);
1913	dev_priv->vbt.dsi.data = NULL;
1914	kfree(dev_priv->vbt.dsi.pps);
1915	dev_priv->vbt.dsi.pps = NULL;
1916	kfree(dev_priv->vbt.dsi.config);
1917	dev_priv->vbt.dsi.config = NULL;
1918	kfree(dev_priv->vbt.dsi.deassert_seq);
1919	dev_priv->vbt.dsi.deassert_seq = NULL;
1920}
1921
1922/**
1923 * intel_bios_is_tv_present - is integrated TV present in VBT
1924 * @dev_priv:	i915 device instance
1925 *
1926 * Return true if TV is present. If no child devices were parsed from VBT,
1927 * assume TV is present.
1928 */
1929bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1930{
 
1931	const struct child_device_config *child;
1932	int i;
1933
1934	if (!dev_priv->vbt.int_tv_support)
1935		return false;
1936
1937	if (!dev_priv->vbt.child_dev_num)
1938		return true;
1939
1940	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1941		child = dev_priv->vbt.child_dev + i;
 
1942		/*
1943		 * If the device type is not TV, continue.
1944		 */
1945		switch (child->device_type) {
1946		case DEVICE_TYPE_INT_TV:
1947		case DEVICE_TYPE_TV:
1948		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1949			break;
1950		default:
1951			continue;
1952		}
1953		/* Only when the addin_offset is non-zero, it is regarded
1954		 * as present.
1955		 */
1956		if (child->addin_offset)
1957			return true;
1958	}
1959
1960	return false;
1961}
1962
1963/**
1964 * intel_bios_is_lvds_present - is LVDS present in VBT
1965 * @dev_priv:	i915 device instance
1966 * @i2c_pin:	i2c pin for LVDS if present
1967 *
1968 * Return true if LVDS is present. If no child devices were parsed from VBT,
1969 * assume LVDS is present.
1970 */
1971bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1972{
 
1973	const struct child_device_config *child;
1974	int i;
1975
1976	if (!dev_priv->vbt.child_dev_num)
1977		return true;
1978
1979	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1980		child = dev_priv->vbt.child_dev + i;
1981
1982		/* If the device type is not LFP, continue.
1983		 * We have to check both the new identifiers as well as the
1984		 * old for compatibility with some BIOSes.
1985		 */
1986		if (child->device_type != DEVICE_TYPE_INT_LFP &&
1987		    child->device_type != DEVICE_TYPE_LFP)
1988			continue;
1989
1990		if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1991			*i2c_pin = child->i2c_pin;
1992
1993		/* However, we cannot trust the BIOS writers to populate
1994		 * the VBT correctly.  Since LVDS requires additional
1995		 * information from AIM blocks, a non-zero addin offset is
1996		 * a good indicator that the LVDS is actually present.
1997		 */
1998		if (child->addin_offset)
1999			return true;
2000
2001		/* But even then some BIOS writers perform some black magic
2002		 * and instantiate the device without reference to any
2003		 * additional data.  Trust that if the VBT was written into
2004		 * the OpRegion then they have validated the LVDS's existence.
2005		 */
2006		if (dev_priv->opregion.vbt)
2007			return true;
2008	}
2009
2010	return false;
2011}
2012
2013/**
2014 * intel_bios_is_port_present - is the specified digital port present
2015 * @dev_priv:	i915 device instance
2016 * @port:	port to check
2017 *
2018 * Return true if the device in %port is present.
2019 */
2020bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2021{
 
2022	const struct child_device_config *child;
2023	static const struct {
2024		u16 dp, hdmi;
2025	} port_mapping[] = {
2026		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2027		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2028		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2029		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2030		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2031	};
2032	int i;
2033
2034	if (HAS_DDI(dev_priv)) {
2035		const struct ddi_vbt_port_info *port_info =
2036			&dev_priv->vbt.ddi_port_info[port];
2037
2038		return port_info->supports_dp ||
2039		       port_info->supports_dvi ||
2040		       port_info->supports_hdmi;
2041	}
2042
2043	/* FIXME maybe deal with port A as well? */
2044	if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
 
2045		return false;
2046
2047	if (!dev_priv->vbt.child_dev_num)
2048		return false;
2049
2050	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
2051		child = dev_priv->vbt.child_dev + i;
2052
2053		if ((child->dvo_port == port_mapping[port].dp ||
2054		     child->dvo_port == port_mapping[port].hdmi) &&
2055		    (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2056					   DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2057			return true;
2058	}
2059
2060	return false;
2061}
2062
2063/**
2064 * intel_bios_is_port_edp - is the device in given port eDP
2065 * @dev_priv:	i915 device instance
2066 * @port:	port to check
2067 *
2068 * Return true if the device in %port is eDP.
2069 */
2070bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2071{
 
2072	const struct child_device_config *child;
2073	static const short port_mapping[] = {
2074		[PORT_B] = DVO_PORT_DPB,
2075		[PORT_C] = DVO_PORT_DPC,
2076		[PORT_D] = DVO_PORT_DPD,
2077		[PORT_E] = DVO_PORT_DPE,
2078		[PORT_F] = DVO_PORT_DPF,
2079	};
2080	int i;
2081
2082	if (HAS_DDI(dev_priv))
2083		return dev_priv->vbt.ddi_port_info[port].supports_edp;
2084
2085	if (!dev_priv->vbt.child_dev_num)
2086		return false;
2087
2088	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
2089		child = dev_priv->vbt.child_dev + i;
2090
2091		if (child->dvo_port == port_mapping[port] &&
2092		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2093		    (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2094			return true;
2095	}
2096
2097	return false;
2098}
2099
2100static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2101				      enum port port)
2102{
2103	static const struct {
2104		u16 dp, hdmi;
2105	} port_mapping[] = {
2106		/*
2107		 * Buggy VBTs may declare DP ports as having
2108		 * HDMI type dvo_port :( So let's check both.
2109		 */
2110		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2111		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2112		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2113		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2114		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2115	};
2116
2117	if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2118		return false;
2119
2120	if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2121	    (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2122		return false;
2123
2124	if (child->dvo_port == port_mapping[port].dp)
2125		return true;
2126
2127	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2128	if (child->dvo_port == port_mapping[port].hdmi &&
2129	    child->aux_channel != 0)
2130		return true;
2131
2132	return false;
2133}
2134
2135bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2136				     enum port port)
2137{
2138	const struct child_device_config *child;
2139	int i;
2140
2141	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
2142		child = dev_priv->vbt.child_dev + i;
2143
2144		if (child_dev_is_dp_dual_mode(child, port))
 
2145			return true;
2146	}
2147
2148	return false;
2149}
2150
2151/**
2152 * intel_bios_is_dsi_present - is DSI present in VBT
2153 * @dev_priv:	i915 device instance
2154 * @port:	port for DSI if present
2155 *
2156 * Return true if DSI is present, and return the port in %port.
2157 */
2158bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2159			       enum port *port)
2160{
 
2161	const struct child_device_config *child;
2162	u8 dvo_port;
2163	int i;
2164
2165	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
2166		child = dev_priv->vbt.child_dev + i;
2167
2168		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2169			continue;
2170
2171		dvo_port = child->dvo_port;
2172
2173		if (dvo_port == DVO_PORT_MIPIA ||
2174		    (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2175		    (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2176			if (port)
2177				*port = dvo_port - DVO_PORT_MIPIA;
2178			return true;
2179		} else if (dvo_port == DVO_PORT_MIPIB ||
2180			   dvo_port == DVO_PORT_MIPIC ||
2181			   dvo_port == DVO_PORT_MIPID) {
2182			DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
2183				      port_name(dvo_port - DVO_PORT_MIPIA));
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2184		}
2185	}
2186
2187	return false;
2188}
2189
2190/**
2191 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2192 * @i915:	i915 device instance
2193 * @port:	port to check
2194 *
2195 * Return true if HPD should be inverted for %port.
2196 */
2197bool
2198intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2199				enum port port)
2200{
2201	const struct child_device_config *child =
2202		i915->vbt.ddi_port_info[port].child;
2203
2204	if (WARN_ON_ONCE(!IS_GEN9_LP(i915)))
2205		return false;
2206
2207	return child && child->hpd_invert;
2208}
2209
2210/**
2211 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2212 * @i915:	i915 device instance
2213 * @port:	port to check
2214 *
2215 * Return true if LSPCON is present on this port
2216 */
2217bool
2218intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2219			     enum port port)
2220{
2221	const struct child_device_config *child =
2222		i915->vbt.ddi_port_info[port].child;
2223
2224	return HAS_LSPCON(i915) && child && child->lspcon;
2225}
2226
2227enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2228				   enum port port)
2229{
2230	const struct ddi_vbt_port_info *info =
2231		&dev_priv->vbt.ddi_port_info[port];
2232	enum aux_ch aux_ch;
2233
2234	if (!info->alternate_aux_channel) {
2235		aux_ch = (enum aux_ch)port;
2236
2237		DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n",
2238			      aux_ch_name(aux_ch), port_name(port));
 
2239		return aux_ch;
2240	}
2241
2242	switch (info->alternate_aux_channel) {
2243	case DP_AUX_A:
2244		aux_ch = AUX_CH_A;
2245		break;
2246	case DP_AUX_B:
2247		aux_ch = AUX_CH_B;
2248		break;
2249	case DP_AUX_C:
2250		aux_ch = AUX_CH_C;
2251		break;
2252	case DP_AUX_D:
2253		aux_ch = AUX_CH_D;
2254		break;
2255	case DP_AUX_E:
2256		aux_ch = AUX_CH_E;
2257		break;
2258	case DP_AUX_F:
2259		aux_ch = AUX_CH_F;
2260		break;
 
 
 
2261	default:
2262		MISSING_CASE(info->alternate_aux_channel);
2263		aux_ch = AUX_CH_A;
2264		break;
2265	}
2266
2267	DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n",
2268		      aux_ch_name(aux_ch), port_name(port));
2269
2270	return aux_ch;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2271}
v5.9
   1/*
   2 * Copyright © 2006 Intel Corporation
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice (including the next
  12 * paragraph) shall be included in all copies or substantial portions of the
  13 * Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21 * SOFTWARE.
  22 *
  23 * Authors:
  24 *    Eric Anholt <eric@anholt.net>
  25 *
  26 */
  27
  28#include <drm/drm_dp_helper.h>
 
  29
  30#include "display/intel_display.h"
  31#include "display/intel_display_types.h"
  32#include "display/intel_gmbus.h"
  33
  34#include "i915_drv.h"
  35
  36#define _INTEL_BIOS_PRIVATE
  37#include "intel_vbt_defs.h"
  38
  39/**
  40 * DOC: Video BIOS Table (VBT)
  41 *
  42 * The Video BIOS Table, or VBT, provides platform and board specific
  43 * configuration information to the driver that is not discoverable or available
  44 * through other means. The configuration is mostly related to display
  45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
  46 * the PCI ROM.
  47 *
  48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
  49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
  50 * contain the actual configuration information. The VBT Header, and thus the
  51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
  52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
  53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
  54 * data. (Block 53, the MIPI Sequence Block is an exception.)
  55 *
  56 * The driver parses the VBT during load. The relevant information is stored in
  57 * driver private data for ease of use, and the actual VBT is not read after
  58 * that.
  59 */
  60
  61/* Wrapper for VBT child device config */
  62struct display_device_data {
  63	struct child_device_config child;
  64	struct dsc_compression_parameters_entry *dsc;
  65	struct list_head node;
  66};
  67
  68#define	SLAVE_ADDR1	0x70
  69#define	SLAVE_ADDR2	0x72
  70
  71/* Get BDB block size given a pointer to Block ID. */
  72static u32 _get_blocksize(const u8 *block_base)
  73{
  74	/* The MIPI Sequence Block v3+ has a separate size field. */
  75	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
  76		return *((const u32 *)(block_base + 4));
  77	else
  78		return *((const u16 *)(block_base + 1));
  79}
  80
  81/* Get BDB block size give a pointer to data after Block ID and Block Size. */
  82static u32 get_blocksize(const void *block_data)
  83{
  84	return _get_blocksize(block_data - 3);
  85}
  86
  87static const void *
  88find_section(const void *_bdb, enum bdb_block_id section_id)
  89{
  90	const struct bdb_header *bdb = _bdb;
  91	const u8 *base = _bdb;
  92	int index = 0;
  93	u32 total, current_size;
  94	enum bdb_block_id current_id;
  95
  96	/* skip to first section */
  97	index += bdb->header_size;
  98	total = bdb->bdb_size;
  99
 100	/* walk the sections looking for section_id */
 101	while (index + 3 < total) {
 102		current_id = *(base + index);
 103		current_size = _get_blocksize(base + index);
 104		index += 3;
 105
 106		if (index + current_size > total)
 107			return NULL;
 108
 109		if (current_id == section_id)
 110			return base + index;
 111
 112		index += current_size;
 113	}
 114
 115	return NULL;
 116}
 117
 118static void
 119fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
 120			const struct lvds_dvo_timing *dvo_timing)
 121{
 122	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
 123		dvo_timing->hactive_lo;
 124	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
 125		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
 126	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
 127		((dvo_timing->hsync_pulse_width_hi << 8) |
 128			dvo_timing->hsync_pulse_width_lo);
 129	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
 130		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
 131
 132	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
 133		dvo_timing->vactive_lo;
 134	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
 135		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
 136	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
 137		((dvo_timing->vsync_pulse_width_hi << 4) |
 138			dvo_timing->vsync_pulse_width_lo);
 139	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
 140		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
 141	panel_fixed_mode->clock = dvo_timing->clock * 10;
 142	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
 143
 144	if (dvo_timing->hsync_positive)
 145		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
 146	else
 147		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
 148
 149	if (dvo_timing->vsync_positive)
 150		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
 151	else
 152		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
 153
 154	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
 155		dvo_timing->himage_lo;
 156	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
 157		dvo_timing->vimage_lo;
 158
 159	/* Some VBTs have bogus h/vtotal values */
 160	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
 161		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
 162	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
 163		panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
 164
 165	drm_mode_set_name(panel_fixed_mode);
 166}
 167
 168static const struct lvds_dvo_timing *
 169get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
 170		    const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
 171		    int index)
 172{
 173	/*
 174	 * the size of fp_timing varies on the different platform.
 175	 * So calculate the DVO timing relative offset in LVDS data
 176	 * entry to get the DVO timing entry
 177	 */
 178
 179	int lfp_data_size =
 180		lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
 181		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
 182	int dvo_timing_offset =
 183		lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
 184		lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
 185	char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
 186
 187	return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
 188}
 189
 190/* get lvds_fp_timing entry
 191 * this function may return NULL if the corresponding entry is invalid
 192 */
 193static const struct lvds_fp_timing *
 194get_lvds_fp_timing(const struct bdb_header *bdb,
 195		   const struct bdb_lvds_lfp_data *data,
 196		   const struct bdb_lvds_lfp_data_ptrs *ptrs,
 197		   int index)
 198{
 199	size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
 200	u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
 201	size_t ofs;
 202
 203	if (index >= ARRAY_SIZE(ptrs->ptr))
 204		return NULL;
 205	ofs = ptrs->ptr[index].fp_timing_offset;
 206	if (ofs < data_ofs ||
 207	    ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
 208		return NULL;
 209	return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
 210}
 211
 212/* Parse general panel options */
 213static void
 214parse_panel_options(struct drm_i915_private *dev_priv,
 215		    const struct bdb_header *bdb)
 216{
 217	const struct bdb_lvds_options *lvds_options;
 
 
 
 
 
 218	int panel_type;
 219	int drrs_mode;
 220	int ret;
 221
 222	lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
 223	if (!lvds_options)
 224		return;
 225
 226	dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
 227
 228	ret = intel_opregion_get_panel_type(dev_priv);
 229	if (ret >= 0) {
 230		drm_WARN_ON(&dev_priv->drm, ret > 0xf);
 231		panel_type = ret;
 232		drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n",
 233			    panel_type);
 234	} else {
 235		if (lvds_options->panel_type > 0xf) {
 236			drm_dbg_kms(&dev_priv->drm,
 237				    "Invalid VBT panel type 0x%x\n",
 238				    lvds_options->panel_type);
 239			return;
 240		}
 241		panel_type = lvds_options->panel_type;
 242		drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n",
 243			    panel_type);
 244	}
 245
 246	dev_priv->vbt.panel_type = panel_type;
 247
 248	drrs_mode = (lvds_options->dps_panel_type_bits
 249				>> (panel_type * 2)) & MODE_MASK;
 250	/*
 251	 * VBT has static DRRS = 0 and seamless DRRS = 2.
 252	 * The below piece of code is required to adjust vbt.drrs_type
 253	 * to match the enum drrs_support_type.
 254	 */
 255	switch (drrs_mode) {
 256	case 0:
 257		dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
 258		drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n");
 259		break;
 260	case 2:
 261		dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
 262		drm_dbg_kms(&dev_priv->drm,
 263			    "DRRS supported mode is seamless\n");
 264		break;
 265	default:
 266		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
 267		drm_dbg_kms(&dev_priv->drm,
 268			    "DRRS not supported (VBT input)\n");
 269		break;
 270	}
 271}
 272
 273/* Try to find integrated panel timing data */
 274static void
 275parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
 276		    const struct bdb_header *bdb)
 277{
 278	const struct bdb_lvds_lfp_data *lvds_lfp_data;
 279	const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
 280	const struct lvds_dvo_timing *panel_dvo_timing;
 281	const struct lvds_fp_timing *fp_timing;
 282	struct drm_display_mode *panel_fixed_mode;
 283	int panel_type = dev_priv->vbt.panel_type;
 284
 285	lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
 286	if (!lvds_lfp_data)
 287		return;
 288
 289	lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
 290	if (!lvds_lfp_data_ptrs)
 291		return;
 292
 293	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
 294					       lvds_lfp_data_ptrs,
 295					       panel_type);
 296
 297	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
 298	if (!panel_fixed_mode)
 299		return;
 300
 301	fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
 302
 303	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
 304
 305	drm_dbg_kms(&dev_priv->drm,
 306		    "Found panel mode in BIOS VBT legacy lfp table:\n");
 307	drm_mode_debug_printmodeline(panel_fixed_mode);
 308
 309	fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
 310				       lvds_lfp_data_ptrs,
 311				       panel_type);
 312	if (fp_timing) {
 313		/* check the resolution, just to be sure */
 314		if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
 315		    fp_timing->y_res == panel_fixed_mode->vdisplay) {
 316			dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
 317			drm_dbg_kms(&dev_priv->drm,
 318				    "VBT initial LVDS value %x\n",
 319				    dev_priv->vbt.bios_lvds_val);
 320		}
 321	}
 322}
 323
 324static void
 325parse_generic_dtd(struct drm_i915_private *dev_priv,
 326		  const struct bdb_header *bdb)
 327{
 328	const struct bdb_generic_dtd *generic_dtd;
 329	const struct generic_dtd_entry *dtd;
 330	struct drm_display_mode *panel_fixed_mode;
 331	int num_dtd;
 332
 333	generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
 334	if (!generic_dtd)
 335		return;
 336
 337	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
 338		drm_err(&dev_priv->drm, "GDTD size %u is too small.\n",
 339			generic_dtd->gdtd_size);
 340		return;
 341	} else if (generic_dtd->gdtd_size !=
 342		   sizeof(struct generic_dtd_entry)) {
 343		drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n",
 344			generic_dtd->gdtd_size);
 345		/* DTD has unknown fields, but keep going */
 346	}
 347
 348	num_dtd = (get_blocksize(generic_dtd) -
 349		   sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
 350	if (dev_priv->vbt.panel_type >= num_dtd) {
 351		drm_err(&dev_priv->drm,
 352			"Panel type %d not found in table of %d DTD's\n",
 353			dev_priv->vbt.panel_type, num_dtd);
 354		return;
 355	}
 356
 357	dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
 358
 359	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
 360	if (!panel_fixed_mode)
 361		return;
 362
 363	panel_fixed_mode->hdisplay = dtd->hactive;
 364	panel_fixed_mode->hsync_start =
 365		panel_fixed_mode->hdisplay + dtd->hfront_porch;
 366	panel_fixed_mode->hsync_end =
 367		panel_fixed_mode->hsync_start + dtd->hsync;
 368	panel_fixed_mode->htotal =
 369		panel_fixed_mode->hdisplay + dtd->hblank;
 370
 371	panel_fixed_mode->vdisplay = dtd->vactive;
 372	panel_fixed_mode->vsync_start =
 373		panel_fixed_mode->vdisplay + dtd->vfront_porch;
 374	panel_fixed_mode->vsync_end =
 375		panel_fixed_mode->vsync_start + dtd->vsync;
 376	panel_fixed_mode->vtotal =
 377		panel_fixed_mode->vdisplay + dtd->vblank;
 378
 379	panel_fixed_mode->clock = dtd->pixel_clock;
 380	panel_fixed_mode->width_mm = dtd->width_mm;
 381	panel_fixed_mode->height_mm = dtd->height_mm;
 382
 383	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
 384	drm_mode_set_name(panel_fixed_mode);
 385
 386	if (dtd->hsync_positive_polarity)
 387		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
 388	else
 389		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
 390
 391	if (dtd->vsync_positive_polarity)
 392		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
 393	else
 394		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
 395
 396	drm_dbg_kms(&dev_priv->drm,
 397		    "Found panel mode in BIOS VBT generic dtd table:\n");
 398	drm_mode_debug_printmodeline(panel_fixed_mode);
 399
 400	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
 401}
 402
 403static void
 404parse_panel_dtd(struct drm_i915_private *dev_priv,
 405		const struct bdb_header *bdb)
 406{
 407	/*
 408	 * Older VBTs provided provided DTD information for internal displays
 409	 * through the "LFP panel DTD" block (42).  As of VBT revision 229,
 410	 * that block is now deprecated and DTD information should be provided
 411	 * via a newer "generic DTD" block (58).  Just to be safe, we'll
 412	 * try the new generic DTD block first on VBT >= 229, but still fall
 413	 * back to trying the old LFP block if that fails.
 414	 */
 415	if (bdb->version >= 229)
 416		parse_generic_dtd(dev_priv, bdb);
 417	if (!dev_priv->vbt.lfp_lvds_vbt_mode)
 418		parse_lfp_panel_dtd(dev_priv, bdb);
 419}
 420
 421static void
 422parse_lfp_backlight(struct drm_i915_private *dev_priv,
 423		    const struct bdb_header *bdb)
 424{
 425	const struct bdb_lfp_backlight_data *backlight_data;
 426	const struct lfp_backlight_data_entry *entry;
 427	int panel_type = dev_priv->vbt.panel_type;
 428
 429	backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
 430	if (!backlight_data)
 431		return;
 432
 433	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
 434		drm_dbg_kms(&dev_priv->drm,
 435			    "Unsupported backlight data entry size %u\n",
 436			    backlight_data->entry_size);
 437		return;
 438	}
 439
 440	entry = &backlight_data->data[panel_type];
 441
 442	dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
 443	if (!dev_priv->vbt.backlight.present) {
 444		drm_dbg_kms(&dev_priv->drm,
 445			    "PWM backlight not present in VBT (type %u)\n",
 446			    entry->type);
 447		return;
 448	}
 449
 450	dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
 451	if (bdb->version >= 191 &&
 452	    get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
 453		const struct lfp_backlight_control_method *method;
 454
 455		method = &backlight_data->backlight_control[panel_type];
 456		dev_priv->vbt.backlight.type = method->type;
 457		dev_priv->vbt.backlight.controller = method->controller;
 458	}
 459
 460	dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
 461	dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
 462	dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
 463	drm_dbg_kms(&dev_priv->drm,
 464		    "VBT backlight PWM modulation frequency %u Hz, "
 465		    "active %s, min brightness %u, level %u, controller %u\n",
 466		    dev_priv->vbt.backlight.pwm_freq_hz,
 467		    dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
 468		    dev_priv->vbt.backlight.min_brightness,
 469		    backlight_data->level[panel_type],
 470		    dev_priv->vbt.backlight.controller);
 471}
 472
 473/* Try to find sdvo panel data */
 474static void
 475parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
 476		      const struct bdb_header *bdb)
 477{
 478	const struct bdb_sdvo_panel_dtds *dtds;
 479	struct drm_display_mode *panel_fixed_mode;
 480	int index;
 481
 482	index = dev_priv->params.vbt_sdvo_panel_type;
 483	if (index == -2) {
 484		drm_dbg_kms(&dev_priv->drm,
 485			    "Ignore SDVO panel mode from BIOS VBT tables.\n");
 486		return;
 487	}
 488
 489	if (index == -1) {
 490		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
 491
 492		sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
 493		if (!sdvo_lvds_options)
 494			return;
 495
 496		index = sdvo_lvds_options->panel_type;
 497	}
 498
 499	dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
 500	if (!dtds)
 501		return;
 502
 503	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
 504	if (!panel_fixed_mode)
 505		return;
 506
 507	fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
 508
 509	dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
 510
 511	drm_dbg_kms(&dev_priv->drm,
 512		    "Found SDVO panel mode in BIOS VBT tables:\n");
 513	drm_mode_debug_printmodeline(panel_fixed_mode);
 514}
 515
 516static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
 517				    bool alternate)
 518{
 519	switch (INTEL_GEN(dev_priv)) {
 520	case 2:
 521		return alternate ? 66667 : 48000;
 522	case 3:
 523	case 4:
 524		return alternate ? 100000 : 96000;
 525	default:
 526		return alternate ? 100000 : 120000;
 527	}
 528}
 529
 530static void
 531parse_general_features(struct drm_i915_private *dev_priv,
 532		       const struct bdb_header *bdb)
 533{
 534	const struct bdb_general_features *general;
 535
 536	general = find_section(bdb, BDB_GENERAL_FEATURES);
 537	if (!general)
 538		return;
 539
 540	dev_priv->vbt.int_tv_support = general->int_tv_support;
 541	/* int_crt_support can't be trusted on earlier platforms */
 542	if (bdb->version >= 155 &&
 543	    (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
 544		dev_priv->vbt.int_crt_support = general->int_crt_support;
 545	dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
 546	dev_priv->vbt.lvds_ssc_freq =
 547		intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
 548	dev_priv->vbt.display_clock_mode = general->display_clock_mode;
 549	dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
 550	if (bdb->version >= 181) {
 551		dev_priv->vbt.orientation = general->rotate_180 ?
 552			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
 553			DRM_MODE_PANEL_ORIENTATION_NORMAL;
 554	} else {
 555		dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
 556	}
 557	drm_dbg_kms(&dev_priv->drm,
 558		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
 559		    dev_priv->vbt.int_tv_support,
 560		    dev_priv->vbt.int_crt_support,
 561		    dev_priv->vbt.lvds_use_ssc,
 562		    dev_priv->vbt.lvds_ssc_freq,
 563		    dev_priv->vbt.display_clock_mode,
 564		    dev_priv->vbt.fdi_rx_polarity_inverted);
 565}
 566
 567static const struct child_device_config *
 568child_device_ptr(const struct bdb_general_definitions *defs, int i)
 569{
 570	return (const void *) &defs->devices[i * defs->child_dev_size];
 571}
 572
 573static void
 574parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
 575{
 576	struct sdvo_device_mapping *mapping;
 577	const struct display_device_data *devdata;
 578	const struct child_device_config *child;
 579	int count = 0;
 580
 581	/*
 582	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
 583	 * accurate and doesn't have to be, as long as it's not too strict.
 584	 */
 585	if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
 586		drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n");
 587		return;
 588	}
 589
 590	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
 591		child = &devdata->child;
 592
 593		if (child->slave_addr != SLAVE_ADDR1 &&
 594		    child->slave_addr != SLAVE_ADDR2) {
 595			/*
 596			 * If the slave address is neither 0x70 nor 0x72,
 597			 * it is not a SDVO device. Skip it.
 598			 */
 599			continue;
 600		}
 601		if (child->dvo_port != DEVICE_PORT_DVOB &&
 602		    child->dvo_port != DEVICE_PORT_DVOC) {
 603			/* skip the incorrect SDVO port */
 604			drm_dbg_kms(&dev_priv->drm,
 605				    "Incorrect SDVO port. Skip it\n");
 606			continue;
 607		}
 608		drm_dbg_kms(&dev_priv->drm,
 609			    "the SDVO device with slave addr %2x is found on"
 610			    " %s port\n",
 611			    child->slave_addr,
 612			    (child->dvo_port == DEVICE_PORT_DVOB) ?
 613			    "SDVOB" : "SDVOC");
 614		mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
 615		if (!mapping->initialized) {
 616			mapping->dvo_port = child->dvo_port;
 617			mapping->slave_addr = child->slave_addr;
 618			mapping->dvo_wiring = child->dvo_wiring;
 619			mapping->ddc_pin = child->ddc_pin;
 620			mapping->i2c_pin = child->i2c_pin;
 621			mapping->initialized = 1;
 622			drm_dbg_kms(&dev_priv->drm,
 623				    "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
 624				    mapping->dvo_port, mapping->slave_addr,
 625				    mapping->dvo_wiring, mapping->ddc_pin,
 626				    mapping->i2c_pin);
 
 627		} else {
 628			drm_dbg_kms(&dev_priv->drm,
 629				    "Maybe one SDVO port is shared by "
 630				    "two SDVO device.\n");
 631		}
 632		if (child->slave2_addr) {
 633			/* Maybe this is a SDVO device with multiple inputs */
 634			/* And the mapping info is not added */
 635			drm_dbg_kms(&dev_priv->drm,
 636				    "there exists the slave2_addr. Maybe this"
 637				    " is a SDVO device with multiple inputs.\n");
 638		}
 639		count++;
 640	}
 641
 642	if (!count) {
 643		/* No SDVO device info is found */
 644		drm_dbg_kms(&dev_priv->drm,
 645			    "No SDVO device info is found in VBT\n");
 646	}
 647}
 648
 649static void
 650parse_driver_features(struct drm_i915_private *dev_priv,
 651		      const struct bdb_header *bdb)
 652{
 653	const struct bdb_driver_features *driver;
 654
 655	driver = find_section(bdb, BDB_DRIVER_FEATURES);
 656	if (!driver)
 657		return;
 658
 659	if (INTEL_GEN(dev_priv) >= 5) {
 660		/*
 661		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
 662		 * to mean "eDP". The VBT spec doesn't agree with that
 663		 * interpretation, but real world VBTs seem to.
 664		 */
 665		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
 666			dev_priv->vbt.int_lvds_support = 0;
 667	} else {
 668		/*
 669		 * FIXME it's not clear which BDB version has the LVDS config
 670		 * bits defined. Revision history in the VBT spec says:
 671		 * "0.92 | Add two definitions for VBT value of LVDS Active
 672		 *  Config (00b and 11b values defined) | 06/13/2005"
 673		 * but does not the specify the BDB version.
 674		 *
 675		 * So far version 134 (on i945gm) is the oldest VBT observed
 676		 * in the wild with the bits correctly populated. Version
 677		 * 108 (on i85x) does not have the bits correctly populated.
 678		 */
 679		if (bdb->version >= 134 &&
 680		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
 681		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
 682			dev_priv->vbt.int_lvds_support = 0;
 683	}
 684
 685	if (bdb->version < 228) {
 686		drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n",
 687			    driver->drrs_enabled);
 688		/*
 689		 * If DRRS is not supported, drrs_type has to be set to 0.
 690		 * This is because, VBT is configured in such a way that
 691		 * static DRRS is 0 and DRRS not supported is represented by
 692		 * driver->drrs_enabled=false
 693		 */
 694		if (!driver->drrs_enabled)
 695			dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
 696
 697		dev_priv->vbt.psr.enable = driver->psr_enabled;
 698	}
 699}
 700
 701static void
 702parse_power_conservation_features(struct drm_i915_private *dev_priv,
 703				  const struct bdb_header *bdb)
 704{
 705	const struct bdb_lfp_power *power;
 706	u8 panel_type = dev_priv->vbt.panel_type;
 707
 708	if (bdb->version < 228)
 709		return;
 710
 711	power = find_section(bdb, BDB_LFP_POWER);
 712	if (!power)
 713		return;
 714
 715	dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
 716
 717	/*
 718	 * If DRRS is not supported, drrs_type has to be set to 0.
 719	 * This is because, VBT is configured in such a way that
 720	 * static DRRS is 0 and DRRS not supported is represented by
 721	 * power->drrs & BIT(panel_type)=false
 722	 */
 723	if (!(power->drrs & BIT(panel_type)))
 724		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
 725
 726	if (bdb->version >= 232)
 727		dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type);
 728}
 729
 730static void
 731parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 732{
 733	const struct bdb_edp *edp;
 734	const struct edp_power_seq *edp_pps;
 735	const struct edp_fast_link_params *edp_link_params;
 736	int panel_type = dev_priv->vbt.panel_type;
 737
 738	edp = find_section(bdb, BDB_EDP);
 739	if (!edp)
 740		return;
 741
 742	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
 743	case EDP_18BPP:
 744		dev_priv->vbt.edp.bpp = 18;
 745		break;
 746	case EDP_24BPP:
 747		dev_priv->vbt.edp.bpp = 24;
 748		break;
 749	case EDP_30BPP:
 750		dev_priv->vbt.edp.bpp = 30;
 751		break;
 752	}
 753
 754	/* Get the eDP sequencing and link info */
 755	edp_pps = &edp->power_seqs[panel_type];
 756	edp_link_params = &edp->fast_link_params[panel_type];
 757
 758	dev_priv->vbt.edp.pps = *edp_pps;
 759
 760	switch (edp_link_params->rate) {
 761	case EDP_RATE_1_62:
 762		dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
 763		break;
 764	case EDP_RATE_2_7:
 765		dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
 766		break;
 767	default:
 768		drm_dbg_kms(&dev_priv->drm,
 769			    "VBT has unknown eDP link rate value %u\n",
 770			     edp_link_params->rate);
 771		break;
 772	}
 773
 774	switch (edp_link_params->lanes) {
 775	case EDP_LANE_1:
 776		dev_priv->vbt.edp.lanes = 1;
 777		break;
 778	case EDP_LANE_2:
 779		dev_priv->vbt.edp.lanes = 2;
 780		break;
 781	case EDP_LANE_4:
 782		dev_priv->vbt.edp.lanes = 4;
 783		break;
 784	default:
 785		drm_dbg_kms(&dev_priv->drm,
 786			    "VBT has unknown eDP lane count value %u\n",
 787			    edp_link_params->lanes);
 788		break;
 789	}
 790
 791	switch (edp_link_params->preemphasis) {
 792	case EDP_PREEMPHASIS_NONE:
 793		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
 794		break;
 795	case EDP_PREEMPHASIS_3_5dB:
 796		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
 797		break;
 798	case EDP_PREEMPHASIS_6dB:
 799		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
 800		break;
 801	case EDP_PREEMPHASIS_9_5dB:
 802		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
 803		break;
 804	default:
 805		drm_dbg_kms(&dev_priv->drm,
 806			    "VBT has unknown eDP pre-emphasis value %u\n",
 807			    edp_link_params->preemphasis);
 808		break;
 809	}
 810
 811	switch (edp_link_params->vswing) {
 812	case EDP_VSWING_0_4V:
 813		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
 814		break;
 815	case EDP_VSWING_0_6V:
 816		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
 817		break;
 818	case EDP_VSWING_0_8V:
 819		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
 820		break;
 821	case EDP_VSWING_1_2V:
 822		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
 823		break;
 824	default:
 825		drm_dbg_kms(&dev_priv->drm,
 826			    "VBT has unknown eDP voltage swing value %u\n",
 827			    edp_link_params->vswing);
 828		break;
 829	}
 830
 831	if (bdb->version >= 173) {
 832		u8 vswing;
 833
 834		/* Don't read from VBT if module parameter has valid value*/
 835		if (dev_priv->params.edp_vswing) {
 836			dev_priv->vbt.edp.low_vswing =
 837				dev_priv->params.edp_vswing == 1;
 838		} else {
 839			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
 840			dev_priv->vbt.edp.low_vswing = vswing == 0;
 841		}
 842	}
 843}
 844
 845static void
 846parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 847{
 848	const struct bdb_psr *psr;
 849	const struct psr_table *psr_table;
 850	int panel_type = dev_priv->vbt.panel_type;
 851
 852	psr = find_section(bdb, BDB_PSR);
 853	if (!psr) {
 854		drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n");
 855		return;
 856	}
 857
 858	psr_table = &psr->psr_table[panel_type];
 859
 860	dev_priv->vbt.psr.full_link = psr_table->full_link;
 861	dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
 862
 863	/* Allowed VBT values goes from 0 to 15 */
 864	dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
 865		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
 866
 867	switch (psr_table->lines_to_wait) {
 868	case 0:
 869		dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
 870		break;
 871	case 1:
 872		dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
 873		break;
 874	case 2:
 875		dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
 876		break;
 877	case 3:
 878		dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
 879		break;
 880	default:
 881		drm_dbg_kms(&dev_priv->drm,
 882			    "VBT has unknown PSR lines to wait %u\n",
 883			    psr_table->lines_to_wait);
 884		break;
 885	}
 886
 887	/*
 888	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
 889	 * Old decimal value is wake up time in multiples of 100 us.
 890	 */
 891	if (bdb->version >= 205 &&
 892	    (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
 893	     INTEL_GEN(dev_priv) >= 10)) {
 894		switch (psr_table->tp1_wakeup_time) {
 895		case 0:
 896			dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
 897			break;
 898		case 1:
 899			dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
 900			break;
 901		case 3:
 902			dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
 903			break;
 904		default:
 905			drm_dbg_kms(&dev_priv->drm,
 906				    "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
 907				    psr_table->tp1_wakeup_time);
 908			fallthrough;
 909		case 2:
 910			dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
 911			break;
 912		}
 913
 914		switch (psr_table->tp2_tp3_wakeup_time) {
 915		case 0:
 916			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
 917			break;
 918		case 1:
 919			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
 920			break;
 921		case 3:
 922			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
 923			break;
 924		default:
 925			drm_dbg_kms(&dev_priv->drm,
 926				    "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
 927				    psr_table->tp2_tp3_wakeup_time);
 928			fallthrough;
 929		case 2:
 930			dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
 931		break;
 932		}
 933	} else {
 934		dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
 935		dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
 936	}
 937
 938	if (bdb->version >= 226) {
 939		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
 940
 941		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
 942		switch (wakeup_time) {
 943		case 0:
 944			wakeup_time = 500;
 945			break;
 946		case 1:
 947			wakeup_time = 100;
 948			break;
 949		case 3:
 950			wakeup_time = 50;
 951			break;
 952		default:
 953		case 2:
 954			wakeup_time = 2500;
 955			break;
 956		}
 957		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
 958	} else {
 959		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
 960		dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
 961	}
 962}
 963
 964static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
 965				      u16 version, enum port port)
 966{
 967	if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
 968		dev_priv->vbt.dsi.bl_ports = BIT(port);
 969		if (dev_priv->vbt.dsi.config->cabc_supported)
 970			dev_priv->vbt.dsi.cabc_ports = BIT(port);
 971
 972		return;
 973	}
 974
 975	switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
 976	case DL_DCS_PORT_A:
 977		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
 978		break;
 979	case DL_DCS_PORT_C:
 980		dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
 981		break;
 982	default:
 983	case DL_DCS_PORT_A_AND_C:
 984		dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
 985		break;
 986	}
 987
 988	if (!dev_priv->vbt.dsi.config->cabc_supported)
 989		return;
 990
 991	switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
 992	case DL_DCS_PORT_A:
 993		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
 994		break;
 995	case DL_DCS_PORT_C:
 996		dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
 997		break;
 998	default:
 999	case DL_DCS_PORT_A_AND_C:
1000		dev_priv->vbt.dsi.cabc_ports =
1001					BIT(PORT_A) | BIT(PORT_C);
1002		break;
1003	}
1004}
1005
1006static void
1007parse_mipi_config(struct drm_i915_private *dev_priv,
1008		  const struct bdb_header *bdb)
1009{
1010	const struct bdb_mipi_config *start;
1011	const struct mipi_config *config;
1012	const struct mipi_pps_data *pps;
1013	int panel_type = dev_priv->vbt.panel_type;
1014	enum port port;
1015
1016	/* parse MIPI blocks only if LFP type is MIPI */
1017	if (!intel_bios_is_dsi_present(dev_priv, &port))
1018		return;
1019
1020	/* Initialize this to undefined indicating no generic MIPI support */
1021	dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1022
1023	/* Block #40 is already parsed and panel_fixed_mode is
1024	 * stored in dev_priv->lfp_lvds_vbt_mode
1025	 * resuse this when needed
1026	 */
1027
1028	/* Parse #52 for panel index used from panel_type already
1029	 * parsed
1030	 */
1031	start = find_section(bdb, BDB_MIPI_CONFIG);
1032	if (!start) {
1033		drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found");
1034		return;
1035	}
1036
1037	drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n",
1038		panel_type);
1039
1040	/*
1041	 * get hold of the correct configuration block and pps data as per
1042	 * the panel_type as index
1043	 */
1044	config = &start->config[panel_type];
1045	pps = &start->pps[panel_type];
1046
1047	/* store as of now full data. Trim when we realise all is not needed */
1048	dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1049	if (!dev_priv->vbt.dsi.config)
1050		return;
1051
1052	dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1053	if (!dev_priv->vbt.dsi.pps) {
1054		kfree(dev_priv->vbt.dsi.config);
1055		return;
1056	}
1057
1058	parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1059
1060	/* FIXME is the 90 vs. 270 correct? */
1061	switch (config->rotation) {
1062	case ENABLE_ROTATION_0:
1063		/*
1064		 * Most (all?) VBTs claim 0 degrees despite having
1065		 * an upside down panel, thus we do not trust this.
1066		 */
1067		dev_priv->vbt.dsi.orientation =
1068			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1069		break;
1070	case ENABLE_ROTATION_90:
1071		dev_priv->vbt.dsi.orientation =
1072			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1073		break;
1074	case ENABLE_ROTATION_180:
1075		dev_priv->vbt.dsi.orientation =
1076			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1077		break;
1078	case ENABLE_ROTATION_270:
1079		dev_priv->vbt.dsi.orientation =
1080			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1081		break;
1082	}
1083
1084	/* We have mandatory mipi config blocks. Initialize as generic panel */
1085	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1086}
1087
1088/* Find the sequence block and size for the given panel. */
1089static const u8 *
1090find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1091			  u16 panel_id, u32 *seq_size)
1092{
1093	u32 total = get_blocksize(sequence);
1094	const u8 *data = &sequence->data[0];
1095	u8 current_id;
1096	u32 current_size;
1097	int header_size = sequence->version >= 3 ? 5 : 3;
1098	int index = 0;
1099	int i;
1100
1101	/* skip new block size */
1102	if (sequence->version >= 3)
1103		data += 4;
1104
1105	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1106		if (index + header_size > total) {
1107			DRM_ERROR("Invalid sequence block (header)\n");
1108			return NULL;
1109		}
1110
1111		current_id = *(data + index);
1112		if (sequence->version >= 3)
1113			current_size = *((const u32 *)(data + index + 1));
1114		else
1115			current_size = *((const u16 *)(data + index + 1));
1116
1117		index += header_size;
1118
1119		if (index + current_size > total) {
1120			DRM_ERROR("Invalid sequence block\n");
1121			return NULL;
1122		}
1123
1124		if (current_id == panel_id) {
1125			*seq_size = current_size;
1126			return data + index;
1127		}
1128
1129		index += current_size;
1130	}
1131
1132	DRM_ERROR("Sequence block detected but no valid configuration\n");
1133
1134	return NULL;
1135}
1136
1137static int goto_next_sequence(const u8 *data, int index, int total)
1138{
1139	u16 len;
1140
1141	/* Skip Sequence Byte. */
1142	for (index = index + 1; index < total; index += len) {
1143		u8 operation_byte = *(data + index);
1144		index++;
1145
1146		switch (operation_byte) {
1147		case MIPI_SEQ_ELEM_END:
1148			return index;
1149		case MIPI_SEQ_ELEM_SEND_PKT:
1150			if (index + 4 > total)
1151				return 0;
1152
1153			len = *((const u16 *)(data + index + 2)) + 4;
1154			break;
1155		case MIPI_SEQ_ELEM_DELAY:
1156			len = 4;
1157			break;
1158		case MIPI_SEQ_ELEM_GPIO:
1159			len = 2;
1160			break;
1161		case MIPI_SEQ_ELEM_I2C:
1162			if (index + 7 > total)
1163				return 0;
1164			len = *(data + index + 6) + 7;
1165			break;
1166		default:
1167			DRM_ERROR("Unknown operation byte\n");
1168			return 0;
1169		}
1170	}
1171
1172	return 0;
1173}
1174
1175static int goto_next_sequence_v3(const u8 *data, int index, int total)
1176{
1177	int seq_end;
1178	u16 len;
1179	u32 size_of_sequence;
1180
1181	/*
1182	 * Could skip sequence based on Size of Sequence alone, but also do some
1183	 * checking on the structure.
1184	 */
1185	if (total < 5) {
1186		DRM_ERROR("Too small sequence size\n");
1187		return 0;
1188	}
1189
1190	/* Skip Sequence Byte. */
1191	index++;
1192
1193	/*
1194	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1195	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1196	 * byte.
1197	 */
1198	size_of_sequence = *((const u32 *)(data + index));
1199	index += 4;
1200
1201	seq_end = index + size_of_sequence;
1202	if (seq_end > total) {
1203		DRM_ERROR("Invalid sequence size\n");
1204		return 0;
1205	}
1206
1207	for (; index < total; index += len) {
1208		u8 operation_byte = *(data + index);
1209		index++;
1210
1211		if (operation_byte == MIPI_SEQ_ELEM_END) {
1212			if (index != seq_end) {
1213				DRM_ERROR("Invalid element structure\n");
1214				return 0;
1215			}
1216			return index;
1217		}
1218
1219		len = *(data + index);
1220		index++;
1221
1222		/*
1223		 * FIXME: Would be nice to check elements like for v1/v2 in
1224		 * goto_next_sequence() above.
1225		 */
1226		switch (operation_byte) {
1227		case MIPI_SEQ_ELEM_SEND_PKT:
1228		case MIPI_SEQ_ELEM_DELAY:
1229		case MIPI_SEQ_ELEM_GPIO:
1230		case MIPI_SEQ_ELEM_I2C:
1231		case MIPI_SEQ_ELEM_SPI:
1232		case MIPI_SEQ_ELEM_PMIC:
1233			break;
1234		default:
1235			DRM_ERROR("Unknown operation byte %u\n",
1236				  operation_byte);
1237			break;
1238		}
1239	}
1240
1241	return 0;
1242}
1243
1244/*
1245 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1246 * skip all delay + gpio operands and stop at the first DSI packet op.
1247 */
1248static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1249{
1250	const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1251	int index, len;
1252
1253	if (drm_WARN_ON(&dev_priv->drm,
1254			!data || dev_priv->vbt.dsi.seq_version != 1))
1255		return 0;
1256
1257	/* index = 1 to skip sequence byte */
1258	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1259		switch (data[index]) {
1260		case MIPI_SEQ_ELEM_SEND_PKT:
1261			return index == 1 ? 0 : index;
1262		case MIPI_SEQ_ELEM_DELAY:
1263			len = 5; /* 1 byte for operand + uint32 */
1264			break;
1265		case MIPI_SEQ_ELEM_GPIO:
1266			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1267			break;
1268		default:
1269			return 0;
1270		}
1271	}
1272
1273	return 0;
1274}
1275
1276/*
1277 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1278 * The deassert must be done before calling intel_dsi_device_ready, so for
1279 * these devices we split the init OTP sequence into a deassert sequence and
1280 * the actual init OTP part.
1281 */
1282static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1283{
1284	u8 *init_otp;
1285	int len;
1286
1287	/* Limit this to VLV for now. */
1288	if (!IS_VALLEYVIEW(dev_priv))
1289		return;
1290
1291	/* Limit this to v1 vid-mode sequences */
1292	if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1293	    dev_priv->vbt.dsi.seq_version != 1)
1294		return;
1295
1296	/* Only do this if there are otp and assert seqs and no deassert seq */
1297	if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1298	    !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1299	    dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1300		return;
1301
1302	/* The deassert-sequence ends at the first DSI packet */
1303	len = get_init_otp_deassert_fragment_len(dev_priv);
1304	if (!len)
1305		return;
1306
1307	drm_dbg_kms(&dev_priv->drm,
1308		    "Using init OTP fragment to deassert reset\n");
1309
1310	/* Copy the fragment, update seq byte and terminate it */
1311	init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1312	dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1313	if (!dev_priv->vbt.dsi.deassert_seq)
1314		return;
1315	dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1316	dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1317	/* Use the copy for deassert */
1318	dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1319		dev_priv->vbt.dsi.deassert_seq;
1320	/* Replace the last byte of the fragment with init OTP seq byte */
1321	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1322	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1323	dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1324}
1325
1326static void
1327parse_mipi_sequence(struct drm_i915_private *dev_priv,
1328		    const struct bdb_header *bdb)
1329{
1330	int panel_type = dev_priv->vbt.panel_type;
1331	const struct bdb_mipi_sequence *sequence;
1332	const u8 *seq_data;
1333	u32 seq_size;
1334	u8 *data;
1335	int index = 0;
1336
1337	/* Only our generic panel driver uses the sequence block. */
1338	if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1339		return;
1340
1341	sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1342	if (!sequence) {
1343		drm_dbg_kms(&dev_priv->drm,
1344			    "No MIPI Sequence found, parsing complete\n");
1345		return;
1346	}
1347
1348	/* Fail gracefully for forward incompatible sequence block. */
1349	if (sequence->version >= 4) {
1350		drm_err(&dev_priv->drm,
1351			"Unable to parse MIPI Sequence Block v%u\n",
1352			sequence->version);
1353		return;
1354	}
1355
1356	drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n",
1357		sequence->version);
1358
1359	seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1360	if (!seq_data)
1361		return;
1362
1363	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1364	if (!data)
1365		return;
1366
1367	/* Parse the sequences, store pointers to each sequence. */
1368	for (;;) {
1369		u8 seq_id = *(data + index);
1370		if (seq_id == MIPI_SEQ_END)
1371			break;
1372
1373		if (seq_id >= MIPI_SEQ_MAX) {
1374			drm_err(&dev_priv->drm, "Unknown sequence %u\n",
1375				seq_id);
1376			goto err;
1377		}
1378
1379		/* Log about presence of sequences we won't run. */
1380		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1381			drm_dbg_kms(&dev_priv->drm,
1382				    "Unsupported sequence %u\n", seq_id);
1383
1384		dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1385
1386		if (sequence->version >= 3)
1387			index = goto_next_sequence_v3(data, index, seq_size);
1388		else
1389			index = goto_next_sequence(data, index, seq_size);
1390		if (!index) {
1391			drm_err(&dev_priv->drm, "Invalid sequence %u\n",
1392				seq_id);
1393			goto err;
1394		}
1395	}
1396
1397	dev_priv->vbt.dsi.data = data;
1398	dev_priv->vbt.dsi.size = seq_size;
1399	dev_priv->vbt.dsi.seq_version = sequence->version;
1400
1401	fixup_mipi_sequences(dev_priv);
1402
1403	drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n");
1404	return;
1405
1406err:
1407	kfree(data);
1408	memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1409}
1410
1411static void
1412parse_compression_parameters(struct drm_i915_private *i915,
1413			     const struct bdb_header *bdb)
1414{
1415	const struct bdb_compression_parameters *params;
1416	struct display_device_data *devdata;
1417	const struct child_device_config *child;
1418	u16 block_size;
1419	int index;
1420
1421	if (bdb->version < 198)
1422		return;
1423
1424	params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1425	if (params) {
1426		/* Sanity checks */
1427		if (params->entry_size != sizeof(params->data[0])) {
1428			drm_dbg_kms(&i915->drm,
1429				    "VBT: unsupported compression param entry size\n");
1430			return;
1431		}
1432
1433		block_size = get_blocksize(params);
1434		if (block_size < sizeof(*params)) {
1435			drm_dbg_kms(&i915->drm,
1436				    "VBT: expected 16 compression param entries\n");
1437			return;
1438		}
1439	}
1440
1441	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1442		child = &devdata->child;
1443
1444		if (!child->compression_enable)
1445			continue;
1446
1447		if (!params) {
1448			drm_dbg_kms(&i915->drm,
1449				    "VBT: compression params not available\n");
1450			continue;
1451		}
1452
1453		if (child->compression_method_cps) {
1454			drm_dbg_kms(&i915->drm,
1455				    "VBT: CPS compression not supported\n");
1456			continue;
1457		}
1458
1459		index = child->compression_structure_index;
1460
1461		devdata->dsc = kmemdup(&params->data[index],
1462				       sizeof(*devdata->dsc), GFP_KERNEL);
1463	}
1464}
1465
1466static u8 translate_iboost(u8 val)
1467{
1468	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1469
1470	if (val >= ARRAY_SIZE(mapping)) {
1471		DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1472		return 0;
1473	}
1474	return mapping[val];
1475}
1476
1477static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1478{
1479	const struct ddi_vbt_port_info *info;
1480	enum port port;
1481
1482	for_each_port(port) {
1483		info = &i915->vbt.ddi_port_info[port];
1484
1485		if (info->child && ddc_pin == info->alternate_ddc_pin)
1486			return port;
1487	}
1488
1489	return PORT_NONE;
1490}
1491
1492static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1493			     enum port port)
1494{
1495	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1496	enum port p;
1497
1498	if (!info->alternate_ddc_pin)
1499		return;
1500
1501	p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1502	if (p != PORT_NONE) {
1503		drm_dbg_kms(&dev_priv->drm,
1504			    "port %c trying to use the same DDC pin (0x%x) as port %c, "
1505			    "disabling port %c DVI/HDMI support\n",
1506			    port_name(port), info->alternate_ddc_pin,
1507			    port_name(p), port_name(p));
1508
1509		/*
1510		 * If we have multiple ports supposedly sharing the
1511		 * pin, then dvi/hdmi couldn't exist on the shared
1512		 * port. Otherwise they share the same ddc bin and
1513		 * system couldn't communicate with them separately.
1514		 *
1515		 * Give inverse child device order the priority,
1516		 * last one wins. Yes, there are real machines
1517		 * (eg. Asrock B250M-HDV) where VBT has both
1518		 * port A and port E with the same AUX ch and
1519		 * we must pick port E :(
1520		 */
1521		info = &dev_priv->vbt.ddi_port_info[p];
1522
1523		info->supports_dvi = false;
1524		info->supports_hdmi = false;
1525		info->alternate_ddc_pin = 0;
1526	}
1527}
1528
1529static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1530{
1531	const struct ddi_vbt_port_info *info;
1532	enum port port;
1533
1534	for_each_port(port) {
1535		info = &i915->vbt.ddi_port_info[port];
1536
1537		if (info->child && aux_ch == info->alternate_aux_channel)
1538			return port;
1539	}
1540
1541	return PORT_NONE;
1542}
1543
1544static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1545			    enum port port)
1546{
1547	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1548	enum port p;
1549
1550	if (!info->alternate_aux_channel)
1551		return;
1552
1553	p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1554	if (p != PORT_NONE) {
1555		drm_dbg_kms(&dev_priv->drm,
1556			    "port %c trying to use the same AUX CH (0x%x) as port %c, "
1557			    "disabling port %c DP support\n",
1558			    port_name(port), info->alternate_aux_channel,
1559			    port_name(p), port_name(p));
1560
1561		/*
1562		 * If we have multiple ports supposedlt sharing the
1563		 * aux channel, then DP couldn't exist on the shared
1564		 * port. Otherwise they share the same aux channel
1565		 * and system couldn't communicate with them separately.
1566		 *
1567		 * Give inverse child device order the priority,
1568		 * last one wins. Yes, there are real machines
1569		 * (eg. Asrock B250M-HDV) where VBT has both
1570		 * port A and port E with the same AUX ch and
1571		 * we must pick port E :(
1572		 */
1573		info = &dev_priv->vbt.ddi_port_info[p];
1574
1575		info->supports_dp = false;
1576		info->alternate_aux_channel = 0;
1577	}
1578}
1579
1580static const u8 cnp_ddc_pin_map[] = {
1581	[0] = 0, /* N/A */
1582	[DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1583	[DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1584	[DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1585	[DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1586};
1587
1588static const u8 icp_ddc_pin_map[] = {
1589	[ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1590	[ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1591	[TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1592	[ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1593	[ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1594	[ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1595	[ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1596	[TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1597	[TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1598};
1599
1600static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1601{
1602	const u8 *ddc_pin_map;
1603	int n_entries;
1604
1605	if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1606		ddc_pin_map = icp_ddc_pin_map;
1607		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1608	} else if (HAS_PCH_CNP(dev_priv)) {
1609		ddc_pin_map = cnp_ddc_pin_map;
1610		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1611	} else {
1612		/* Assuming direct map */
1613		return vbt_pin;
1614	}
1615
1616	if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1617		return ddc_pin_map[vbt_pin];
1618
1619	drm_dbg_kms(&dev_priv->drm,
1620		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1621		    vbt_pin);
1622	return 0;
1623}
1624
1625static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1626				    const int port_mapping[][3], u8 dvo_port)
1627{
 
 
 
 
 
 
 
 
 
 
 
 
1628	enum port port;
1629	int i;
1630
1631	for (port = PORT_A; port < n_ports; port++) {
1632		for (i = 0; i < n_dvo; i++) {
1633			if (port_mapping[port][i] == -1)
1634				break;
1635
1636			if (dvo_port == port_mapping[port][i])
1637				return port;
1638		}
1639	}
1640
1641	return PORT_NONE;
1642}
1643
1644static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
1645				  u8 dvo_port)
1646{
1647	/*
1648	 * Each DDI port can have more than one value on the "DVO Port" field,
1649	 * so look for all the possible values for each port.
1650	 */
1651	static const int port_mapping[][3] = {
1652		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1653		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1654		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1655		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1656		[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1657		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1658		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1659	};
1660	/*
1661	 * Bspec lists the ports as A, B, C, D - however internally in our
1662	 * driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the
1663	 * registers in Display Engine match the right offsets. Apply the
1664	 * mapping here to translate from VBT to internal convention.
1665	 */
1666	static const int rkl_port_mapping[][3] = {
1667		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1668		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1669		[PORT_C] = { -1 },
1670		[PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1671		[PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1672	};
1673
1674	if (IS_ROCKETLAKE(dev_priv))
1675		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1676					  ARRAY_SIZE(rkl_port_mapping[0]),
1677					  rkl_port_mapping,
1678					  dvo_port);
1679	else
1680		return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1681					  ARRAY_SIZE(port_mapping[0]),
1682					  port_mapping,
1683					  dvo_port);
1684}
1685
1686static void parse_ddi_port(struct drm_i915_private *dev_priv,
1687			   struct display_device_data *devdata,
1688			   u8 bdb_version)
1689{
1690	const struct child_device_config *child = &devdata->child;
1691	struct ddi_vbt_port_info *info;
1692	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1693	enum port port;
1694
1695	port = dvo_port_to_port(dev_priv, child->dvo_port);
1696	if (port == PORT_NONE)
1697		return;
1698
1699	info = &dev_priv->vbt.ddi_port_info[port];
1700
1701	if (info->child) {
1702		drm_dbg_kms(&dev_priv->drm,
1703			    "More than one child device for port %c in VBT, using the first.\n",
1704			    port_name(port));
1705		return;
1706	}
1707
1708	is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1709	is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1710	is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1711	is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1712	is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1713
1714	if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1715		drm_dbg_kms(&dev_priv->drm,
1716			    "VBT claims port A supports DVI%s, ignoring\n",
1717			    is_hdmi ? "/HDMI" : "");
1718		is_dvi = false;
1719		is_hdmi = false;
1720	}
1721
1722	info->supports_dvi = is_dvi;
1723	info->supports_hdmi = is_hdmi;
1724	info->supports_dp = is_dp;
1725	info->supports_edp = is_edp;
1726
1727	if (bdb_version >= 195)
1728		info->supports_typec_usb = child->dp_usb_type_c;
1729
1730	if (bdb_version >= 209)
1731		info->supports_tbt = child->tbt;
1732
1733	drm_dbg_kms(&dev_priv->drm,
1734		    "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1735		    port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1736		    HAS_LSPCON(dev_priv) && child->lspcon,
1737		    info->supports_typec_usb, info->supports_tbt,
1738		    devdata->dsc != NULL);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1739
1740	if (is_dvi) {
1741		u8 ddc_pin;
1742
1743		ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1744		if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1745			info->alternate_ddc_pin = ddc_pin;
1746			sanitize_ddc_pin(dev_priv, port);
1747		} else {
1748			drm_dbg_kms(&dev_priv->drm,
1749				    "Port %c has invalid DDC pin %d, "
1750				    "sticking to defaults\n",
1751				    port_name(port), ddc_pin);
1752		}
1753	}
1754
1755	if (is_dp) {
1756		info->alternate_aux_channel = child->aux_channel;
1757
1758		sanitize_aux_ch(dev_priv, port);
1759	}
1760
1761	if (bdb_version >= 158) {
1762		/* The VBT HDMI level shift values match the table we have. */
1763		u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1764		drm_dbg_kms(&dev_priv->drm,
1765			    "VBT HDMI level shift for port %c: %d\n",
1766			    port_name(port),
1767			    hdmi_level_shift);
1768		info->hdmi_level_shift = hdmi_level_shift;
1769		info->hdmi_level_shift_set = true;
1770	}
1771
1772	if (bdb_version >= 204) {
1773		int max_tmds_clock;
1774
1775		switch (child->hdmi_max_data_rate) {
1776		default:
1777			MISSING_CASE(child->hdmi_max_data_rate);
1778			fallthrough;
1779		case HDMI_MAX_DATA_RATE_PLATFORM:
1780			max_tmds_clock = 0;
1781			break;
1782		case HDMI_MAX_DATA_RATE_297:
1783			max_tmds_clock = 297000;
1784			break;
1785		case HDMI_MAX_DATA_RATE_165:
1786			max_tmds_clock = 165000;
1787			break;
1788		}
1789
1790		if (max_tmds_clock)
1791			drm_dbg_kms(&dev_priv->drm,
1792				    "VBT HDMI max TMDS clock for port %c: %d kHz\n",
1793				    port_name(port), max_tmds_clock);
1794		info->max_tmds_clock = max_tmds_clock;
1795	}
1796
1797	/* Parse the I_boost config for SKL and above */
1798	if (bdb_version >= 196 && child->iboost) {
1799		info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1800		drm_dbg_kms(&dev_priv->drm,
1801			    "VBT (e)DP boost level for port %c: %d\n",
1802			    port_name(port), info->dp_boost_level);
1803		info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1804		drm_dbg_kms(&dev_priv->drm,
1805			    "VBT HDMI boost level for port %c: %d\n",
1806			    port_name(port), info->hdmi_boost_level);
1807	}
1808
1809	/* DP max link rate for CNL+ */
1810	if (bdb_version >= 216) {
1811		switch (child->dp_max_link_rate) {
1812		default:
1813		case VBT_DP_MAX_LINK_RATE_HBR3:
1814			info->dp_max_link_rate = 810000;
1815			break;
1816		case VBT_DP_MAX_LINK_RATE_HBR2:
1817			info->dp_max_link_rate = 540000;
1818			break;
1819		case VBT_DP_MAX_LINK_RATE_HBR:
1820			info->dp_max_link_rate = 270000;
1821			break;
1822		case VBT_DP_MAX_LINK_RATE_LBR:
1823			info->dp_max_link_rate = 162000;
1824			break;
1825		}
1826		drm_dbg_kms(&dev_priv->drm,
1827			    "VBT DP max link rate for port %c: %d\n",
1828			    port_name(port), info->dp_max_link_rate);
1829	}
1830
1831	info->child = child;
1832}
1833
1834static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1835{
1836	struct display_device_data *devdata;
 
1837
1838	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1839		return;
1840
1841	if (bdb_version < 155)
1842		return;
1843
1844	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1845		parse_ddi_port(dev_priv, devdata, bdb_version);
 
 
 
1846}
1847
1848static void
1849parse_general_definitions(struct drm_i915_private *dev_priv,
1850			  const struct bdb_header *bdb)
1851{
1852	const struct bdb_general_definitions *defs;
1853	struct display_device_data *devdata;
1854	const struct child_device_config *child;
1855	int i, child_device_num;
1856	u8 expected_size;
1857	u16 block_size;
1858	int bus_pin;
1859
1860	defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1861	if (!defs) {
1862		drm_dbg_kms(&dev_priv->drm,
1863			    "No general definition block is found, no devices defined.\n");
1864		return;
1865	}
1866
1867	block_size = get_blocksize(defs);
1868	if (block_size < sizeof(*defs)) {
1869		drm_dbg_kms(&dev_priv->drm,
1870			    "General definitions block too small (%u)\n",
1871			    block_size);
1872		return;
1873	}
1874
1875	bus_pin = defs->crt_ddc_gmbus_pin;
1876	drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1877	if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1878		dev_priv->vbt.crt_ddc_pin = bus_pin;
1879
1880	if (bdb->version < 106) {
1881		expected_size = 22;
1882	} else if (bdb->version < 111) {
1883		expected_size = 27;
1884	} else if (bdb->version < 195) {
1885		expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1886	} else if (bdb->version == 195) {
1887		expected_size = 37;
1888	} else if (bdb->version <= 215) {
1889		expected_size = 38;
1890	} else if (bdb->version <= 229) {
1891		expected_size = 39;
1892	} else {
1893		expected_size = sizeof(*child);
1894		BUILD_BUG_ON(sizeof(*child) < 39);
1895		drm_dbg(&dev_priv->drm,
1896			"Expected child device config size for VBT version %u not known; assuming %u\n",
1897			bdb->version, expected_size);
1898	}
1899
1900	/* Flag an error for unexpected size, but continue anyway. */
1901	if (defs->child_dev_size != expected_size)
1902		drm_err(&dev_priv->drm,
1903			"Unexpected child device config size %u (expected %u for VBT version %u)\n",
1904			defs->child_dev_size, expected_size, bdb->version);
1905
1906	/* The legacy sized child device config is the minimum we need. */
1907	if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1908		drm_dbg_kms(&dev_priv->drm,
1909			    "Child device config size %u is too small.\n",
1910			    defs->child_dev_size);
1911		return;
1912	}
1913
1914	/* get the number of child device */
1915	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1916
 
 
1917	for (i = 0; i < child_device_num; i++) {
1918		child = child_device_ptr(defs, i);
1919		if (!child->device_type)
1920			continue;
1921
1922		drm_dbg_kms(&dev_priv->drm,
1923			    "Found VBT child device with type 0x%x\n",
1924			    child->device_type);
1925
1926		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
1927		if (!devdata)
1928			break;
1929
1930		/*
1931		 * Copy as much as we know (sizeof) and is available
1932		 * (child_dev_size) of the child device config. Accessing the
1933		 * data must depend on VBT version.
1934		 */
1935		memcpy(&devdata->child, child,
1936		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
1937
1938		list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
1939	}
1940
1941	if (list_empty(&dev_priv->vbt.display_devices))
1942		drm_dbg_kms(&dev_priv->drm,
1943			    "no child dev is parsed from VBT\n");
1944}
1945
1946/* Common defaults which may be overridden by VBT. */
1947static void
1948init_vbt_defaults(struct drm_i915_private *dev_priv)
1949{
 
 
1950	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1951
1952	/* Default to having backlight */
1953	dev_priv->vbt.backlight.present = true;
1954
1955	/* LFP panel data */
1956	dev_priv->vbt.lvds_dither = 1;
1957
1958	/* SDVO panel data */
1959	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1960
1961	/* general features */
1962	dev_priv->vbt.int_tv_support = 1;
1963	dev_priv->vbt.int_crt_support = 1;
1964
1965	/* driver features */
1966	dev_priv->vbt.int_lvds_support = 1;
1967
1968	/* Default to using SSC */
1969	dev_priv->vbt.lvds_use_ssc = 1;
1970	/*
1971	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1972	 * clock for LVDS.
1973	 */
1974	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1975			!HAS_PCH_SPLIT(dev_priv));
1976	drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n",
1977		    dev_priv->vbt.lvds_ssc_freq);
 
 
 
 
 
 
1978}
1979
1980/* Defaults to initialize only if there is no VBT. */
1981static void
1982init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1983{
1984	enum port port;
1985
1986	for_each_port(port) {
1987		struct ddi_vbt_port_info *info =
1988			&dev_priv->vbt.ddi_port_info[port];
1989		enum phy phy = intel_port_to_phy(dev_priv, port);
1990
1991		/*
1992		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
1993		 * to detect it.
1994		 */
1995		if (intel_phy_is_tc(dev_priv, phy))
1996			continue;
1997
1998		info->supports_dvi = (port != PORT_A && port != PORT_E);
1999		info->supports_hdmi = info->supports_dvi;
2000		info->supports_dp = (port != PORT_E);
2001		info->supports_edp = (port == PORT_A);
2002	}
2003}
2004
2005static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2006{
2007	const void *_vbt = vbt;
2008
2009	return _vbt + vbt->bdb_offset;
2010}
2011
2012/**
2013 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2014 * @buf:	pointer to a buffer to validate
2015 * @size:	size of the buffer
2016 *
2017 * Returns true on valid VBT.
2018 */
2019bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2020{
2021	const struct vbt_header *vbt = buf;
2022	const struct bdb_header *bdb;
2023
2024	if (!vbt)
2025		return false;
2026
2027	if (sizeof(struct vbt_header) > size) {
2028		DRM_DEBUG_DRIVER("VBT header incomplete\n");
2029		return false;
2030	}
2031
2032	if (memcmp(vbt->signature, "$VBT", 4)) {
2033		DRM_DEBUG_DRIVER("VBT invalid signature\n");
2034		return false;
2035	}
2036
2037	if (vbt->vbt_size > size) {
2038		DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2039		return false;
2040	}
2041
2042	size = vbt->vbt_size;
2043
2044	if (range_overflows_t(size_t,
2045			      vbt->bdb_offset,
2046			      sizeof(struct bdb_header),
2047			      size)) {
2048		DRM_DEBUG_DRIVER("BDB header incomplete\n");
2049		return false;
2050	}
2051
2052	bdb = get_bdb_header(vbt);
2053	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2054		DRM_DEBUG_DRIVER("BDB incomplete\n");
2055		return false;
2056	}
2057
2058	return vbt;
2059}
2060
2061static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
2062{
2063	struct pci_dev *pdev = dev_priv->drm.pdev;
2064	void __iomem *p = NULL, *oprom;
2065	struct vbt_header *vbt;
2066	u16 vbt_size;
2067	size_t i, size;
2068
2069	oprom = pci_map_rom(pdev, &size);
2070	if (!oprom)
2071		return NULL;
2072
2073	/* Scour memory looking for the VBT signature. */
2074	for (i = 0; i + 4 < size; i += 4) {
2075		if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2076			continue;
2077
2078		p = oprom + i;
2079		size -= i;
 
 
 
 
 
 
2080		break;
2081	}
2082
2083	if (!p)
2084		goto err_unmap_oprom;
2085
2086	if (sizeof(struct vbt_header) > size) {
2087		drm_dbg(&dev_priv->drm, "VBT header incomplete\n");
2088		goto err_unmap_oprom;
2089	}
2090
2091	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2092	if (vbt_size > size) {
2093		drm_dbg(&dev_priv->drm,
2094			"VBT incomplete (vbt_size overflows)\n");
2095		goto err_unmap_oprom;
2096	}
2097
2098	/* The rest will be validated by intel_bios_is_valid_vbt() */
2099	vbt = kmalloc(vbt_size, GFP_KERNEL);
2100	if (!vbt)
2101		goto err_unmap_oprom;
2102
2103	memcpy_fromio(vbt, p, vbt_size);
2104
2105	if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2106		goto err_free_vbt;
2107
2108	pci_unmap_rom(pdev, oprom);
2109
2110	return vbt;
2111
2112err_free_vbt:
2113	kfree(vbt);
2114err_unmap_oprom:
2115	pci_unmap_rom(pdev, oprom);
2116
2117	return NULL;
2118}
2119
2120/**
2121 * intel_bios_init - find VBT and initialize settings from the BIOS
2122 * @dev_priv: i915 device instance
2123 *
2124 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2125 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2126 * initialize some defaults if the VBT is not present at all.
2127 */
2128void intel_bios_init(struct drm_i915_private *dev_priv)
2129{
 
2130	const struct vbt_header *vbt = dev_priv->opregion.vbt;
2131	struct vbt_header *oprom_vbt = NULL;
2132	const struct bdb_header *bdb;
 
2133
2134	INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2135
2136	if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
2137		drm_dbg_kms(&dev_priv->drm,
2138			    "Skipping VBT init due to disabled display.\n");
2139		return;
2140	}
2141
2142	init_vbt_defaults(dev_priv);
2143
2144	/* If the OpRegion does not have VBT, look in PCI ROM. */
2145	if (!vbt) {
2146		oprom_vbt = oprom_get_vbt(dev_priv);
2147		if (!oprom_vbt)
 
 
2148			goto out;
2149
2150		vbt = oprom_vbt;
 
 
2151
2152		drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n");
2153	}
2154
2155	bdb = get_bdb_header(vbt);
2156
2157	drm_dbg_kms(&dev_priv->drm,
2158		    "VBT signature \"%.*s\", BDB version %d\n",
2159		    (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2160
2161	/* Grab useful general definitions */
2162	parse_general_features(dev_priv, bdb);
2163	parse_general_definitions(dev_priv, bdb);
2164	parse_panel_options(dev_priv, bdb);
2165	parse_panel_dtd(dev_priv, bdb);
2166	parse_lfp_backlight(dev_priv, bdb);
2167	parse_sdvo_panel_data(dev_priv, bdb);
2168	parse_driver_features(dev_priv, bdb);
2169	parse_power_conservation_features(dev_priv, bdb);
2170	parse_edp(dev_priv, bdb);
2171	parse_psr(dev_priv, bdb);
2172	parse_mipi_config(dev_priv, bdb);
2173	parse_mipi_sequence(dev_priv, bdb);
2174
2175	/* Depends on child device list */
2176	parse_compression_parameters(dev_priv, bdb);
2177
2178	/* Further processing on pre-parsed data */
2179	parse_sdvo_device_mapping(dev_priv, bdb->version);
2180	parse_ddi_ports(dev_priv, bdb->version);
2181
2182out:
2183	if (!vbt) {
2184		drm_info(&dev_priv->drm,
2185			 "Failed to find VBIOS tables (VBT)\n");
2186		init_vbt_missing_defaults(dev_priv);
2187	}
2188
2189	kfree(oprom_vbt);
 
2190}
2191
2192/**
2193 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2194 * @dev_priv: i915 device instance
2195 */
2196void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2197{
2198	struct display_device_data *devdata, *n;
2199
2200	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2201		list_del(&devdata->node);
2202		kfree(devdata->dsc);
2203		kfree(devdata);
2204	}
2205
2206	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2207	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2208	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2209	dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2210	kfree(dev_priv->vbt.dsi.data);
2211	dev_priv->vbt.dsi.data = NULL;
2212	kfree(dev_priv->vbt.dsi.pps);
2213	dev_priv->vbt.dsi.pps = NULL;
2214	kfree(dev_priv->vbt.dsi.config);
2215	dev_priv->vbt.dsi.config = NULL;
2216	kfree(dev_priv->vbt.dsi.deassert_seq);
2217	dev_priv->vbt.dsi.deassert_seq = NULL;
2218}
2219
2220/**
2221 * intel_bios_is_tv_present - is integrated TV present in VBT
2222 * @dev_priv:	i915 device instance
2223 *
2224 * Return true if TV is present. If no child devices were parsed from VBT,
2225 * assume TV is present.
2226 */
2227bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2228{
2229	const struct display_device_data *devdata;
2230	const struct child_device_config *child;
 
2231
2232	if (!dev_priv->vbt.int_tv_support)
2233		return false;
2234
2235	if (list_empty(&dev_priv->vbt.display_devices))
2236		return true;
2237
2238	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2239		child = &devdata->child;
2240
2241		/*
2242		 * If the device type is not TV, continue.
2243		 */
2244		switch (child->device_type) {
2245		case DEVICE_TYPE_INT_TV:
2246		case DEVICE_TYPE_TV:
2247		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2248			break;
2249		default:
2250			continue;
2251		}
2252		/* Only when the addin_offset is non-zero, it is regarded
2253		 * as present.
2254		 */
2255		if (child->addin_offset)
2256			return true;
2257	}
2258
2259	return false;
2260}
2261
2262/**
2263 * intel_bios_is_lvds_present - is LVDS present in VBT
2264 * @dev_priv:	i915 device instance
2265 * @i2c_pin:	i2c pin for LVDS if present
2266 *
2267 * Return true if LVDS is present. If no child devices were parsed from VBT,
2268 * assume LVDS is present.
2269 */
2270bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2271{
2272	const struct display_device_data *devdata;
2273	const struct child_device_config *child;
 
2274
2275	if (list_empty(&dev_priv->vbt.display_devices))
2276		return true;
2277
2278	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2279		child = &devdata->child;
2280
2281		/* If the device type is not LFP, continue.
2282		 * We have to check both the new identifiers as well as the
2283		 * old for compatibility with some BIOSes.
2284		 */
2285		if (child->device_type != DEVICE_TYPE_INT_LFP &&
2286		    child->device_type != DEVICE_TYPE_LFP)
2287			continue;
2288
2289		if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2290			*i2c_pin = child->i2c_pin;
2291
2292		/* However, we cannot trust the BIOS writers to populate
2293		 * the VBT correctly.  Since LVDS requires additional
2294		 * information from AIM blocks, a non-zero addin offset is
2295		 * a good indicator that the LVDS is actually present.
2296		 */
2297		if (child->addin_offset)
2298			return true;
2299
2300		/* But even then some BIOS writers perform some black magic
2301		 * and instantiate the device without reference to any
2302		 * additional data.  Trust that if the VBT was written into
2303		 * the OpRegion then they have validated the LVDS's existence.
2304		 */
2305		if (dev_priv->opregion.vbt)
2306			return true;
2307	}
2308
2309	return false;
2310}
2311
2312/**
2313 * intel_bios_is_port_present - is the specified digital port present
2314 * @dev_priv:	i915 device instance
2315 * @port:	port to check
2316 *
2317 * Return true if the device in %port is present.
2318 */
2319bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2320{
2321	const struct display_device_data *devdata;
2322	const struct child_device_config *child;
2323	static const struct {
2324		u16 dp, hdmi;
2325	} port_mapping[] = {
2326		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2327		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2328		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2329		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2330		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2331	};
 
2332
2333	if (HAS_DDI(dev_priv)) {
2334		const struct ddi_vbt_port_info *port_info =
2335			&dev_priv->vbt.ddi_port_info[port];
2336
2337		return port_info->child;
 
 
2338	}
2339
2340	/* FIXME maybe deal with port A as well? */
2341	if (drm_WARN_ON(&dev_priv->drm,
2342			port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2343		return false;
2344
2345	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2346		child = &devdata->child;
 
 
 
2347
2348		if ((child->dvo_port == port_mapping[port].dp ||
2349		     child->dvo_port == port_mapping[port].hdmi) &&
2350		    (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2351					   DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2352			return true;
2353	}
2354
2355	return false;
2356}
2357
2358/**
2359 * intel_bios_is_port_edp - is the device in given port eDP
2360 * @dev_priv:	i915 device instance
2361 * @port:	port to check
2362 *
2363 * Return true if the device in %port is eDP.
2364 */
2365bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2366{
2367	const struct display_device_data *devdata;
2368	const struct child_device_config *child;
2369	static const short port_mapping[] = {
2370		[PORT_B] = DVO_PORT_DPB,
2371		[PORT_C] = DVO_PORT_DPC,
2372		[PORT_D] = DVO_PORT_DPD,
2373		[PORT_E] = DVO_PORT_DPE,
2374		[PORT_F] = DVO_PORT_DPF,
2375	};
 
2376
2377	if (HAS_DDI(dev_priv))
2378		return dev_priv->vbt.ddi_port_info[port].supports_edp;
2379
2380	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2381		child = &devdata->child;
 
 
 
2382
2383		if (child->dvo_port == port_mapping[port] &&
2384		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2385		    (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2386			return true;
2387	}
2388
2389	return false;
2390}
2391
2392static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2393				      enum port port)
2394{
2395	static const struct {
2396		u16 dp, hdmi;
2397	} port_mapping[] = {
2398		/*
2399		 * Buggy VBTs may declare DP ports as having
2400		 * HDMI type dvo_port :( So let's check both.
2401		 */
2402		[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2403		[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2404		[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2405		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2406		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2407	};
2408
2409	if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2410		return false;
2411
2412	if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2413	    (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2414		return false;
2415
2416	if (child->dvo_port == port_mapping[port].dp)
2417		return true;
2418
2419	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2420	if (child->dvo_port == port_mapping[port].hdmi &&
2421	    child->aux_channel != 0)
2422		return true;
2423
2424	return false;
2425}
2426
2427bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2428				     enum port port)
2429{
2430	const struct display_device_data *devdata;
 
 
 
 
2431
2432	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2433		if (child_dev_is_dp_dual_mode(&devdata->child, port))
2434			return true;
2435	}
2436
2437	return false;
2438}
2439
2440/**
2441 * intel_bios_is_dsi_present - is DSI present in VBT
2442 * @dev_priv:	i915 device instance
2443 * @port:	port for DSI if present
2444 *
2445 * Return true if DSI is present, and return the port in %port.
2446 */
2447bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2448			       enum port *port)
2449{
2450	const struct display_device_data *devdata;
2451	const struct child_device_config *child;
2452	u8 dvo_port;
 
2453
2454	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2455		child = &devdata->child;
2456
2457		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2458			continue;
2459
2460		dvo_port = child->dvo_port;
2461
2462		if (dvo_port == DVO_PORT_MIPIA ||
2463		    (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2464		    (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2465			if (port)
2466				*port = dvo_port - DVO_PORT_MIPIA;
2467			return true;
2468		} else if (dvo_port == DVO_PORT_MIPIB ||
2469			   dvo_port == DVO_PORT_MIPIC ||
2470			   dvo_port == DVO_PORT_MIPID) {
2471			drm_dbg_kms(&dev_priv->drm,
2472				    "VBT has unsupported DSI port %c\n",
2473				    port_name(dvo_port - DVO_PORT_MIPIA));
2474		}
2475	}
2476
2477	return false;
2478}
2479
2480static void fill_dsc(struct intel_crtc_state *crtc_state,
2481		     struct dsc_compression_parameters_entry *dsc,
2482		     int dsc_max_bpc)
2483{
2484	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2485	int bpc = 8;
2486
2487	vdsc_cfg->dsc_version_major = dsc->version_major;
2488	vdsc_cfg->dsc_version_minor = dsc->version_minor;
2489
2490	if (dsc->support_12bpc && dsc_max_bpc >= 12)
2491		bpc = 12;
2492	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2493		bpc = 10;
2494	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2495		bpc = 8;
2496	else
2497		DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2498			      dsc_max_bpc);
2499
2500	crtc_state->pipe_bpp = bpc * 3;
2501
2502	crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2503					     VBT_DSC_MAX_BPP(dsc->max_bpp));
2504
2505	/*
2506	 * FIXME: This is ugly, and slice count should take DSC engine
2507	 * throughput etc. into account.
2508	 *
2509	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2510	 */
2511	if (dsc->slices_per_line & BIT(2)) {
2512		crtc_state->dsc.slice_count = 4;
2513	} else if (dsc->slices_per_line & BIT(1)) {
2514		crtc_state->dsc.slice_count = 2;
2515	} else {
2516		/* FIXME */
2517		if (!(dsc->slices_per_line & BIT(0)))
2518			DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2519
2520		crtc_state->dsc.slice_count = 1;
2521	}
2522
2523	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2524	    crtc_state->dsc.slice_count != 0)
2525		DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2526			      crtc_state->hw.adjusted_mode.crtc_hdisplay,
2527			      crtc_state->dsc.slice_count);
2528
2529	/*
2530	 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the
2531	 * implementation specific physical rate buffer size. Currently we use
2532	 * the required rate buffer model size calculated in
2533	 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E.
2534	 *
2535	 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2536	 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC
2537	 * implementation should also use the DPCD (or perhaps VBT for eDP)
2538	 * provided value for the buffer size.
2539	 */
2540
2541	/* FIXME: DSI spec says bpc + 1 for this one */
2542	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2543
2544	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2545
2546	vdsc_cfg->slice_height = dsc->slice_height;
2547}
2548
2549/* FIXME: initially DSI specific */
2550bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2551			       struct intel_crtc_state *crtc_state,
2552			       int dsc_max_bpc)
2553{
2554	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2555	const struct display_device_data *devdata;
2556	const struct child_device_config *child;
2557
2558	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2559		child = &devdata->child;
2560
2561		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2562			continue;
2563
2564		if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2565			if (!devdata->dsc)
2566				return false;
2567
2568			if (crtc_state)
2569				fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2570
2571			return true;
2572		}
2573	}
2574
2575	return false;
2576}
2577
2578/**
2579 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2580 * @i915:	i915 device instance
2581 * @port:	port to check
2582 *
2583 * Return true if HPD should be inverted for %port.
2584 */
2585bool
2586intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2587				enum port port)
2588{
2589	const struct child_device_config *child =
2590		i915->vbt.ddi_port_info[port].child;
2591
2592	if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2593		return false;
2594
2595	return child && child->hpd_invert;
2596}
2597
2598/**
2599 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2600 * @i915:	i915 device instance
2601 * @port:	port to check
2602 *
2603 * Return true if LSPCON is present on this port
2604 */
2605bool
2606intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2607			     enum port port)
2608{
2609	const struct child_device_config *child =
2610		i915->vbt.ddi_port_info[port].child;
2611
2612	return HAS_LSPCON(i915) && child && child->lspcon;
2613}
2614
2615enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2616				   enum port port)
2617{
2618	const struct ddi_vbt_port_info *info =
2619		&dev_priv->vbt.ddi_port_info[port];
2620	enum aux_ch aux_ch;
2621
2622	if (!info->alternate_aux_channel) {
2623		aux_ch = (enum aux_ch)port;
2624
2625		drm_dbg_kms(&dev_priv->drm,
2626			    "using AUX %c for port %c (platform default)\n",
2627			    aux_ch_name(aux_ch), port_name(port));
2628		return aux_ch;
2629	}
2630
2631	switch (info->alternate_aux_channel) {
2632	case DP_AUX_A:
2633		aux_ch = AUX_CH_A;
2634		break;
2635	case DP_AUX_B:
2636		aux_ch = AUX_CH_B;
2637		break;
2638	case DP_AUX_C:
2639		aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_D : AUX_CH_C;
2640		break;
2641	case DP_AUX_D:
2642		aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_E : AUX_CH_D;
2643		break;
2644	case DP_AUX_E:
2645		aux_ch = AUX_CH_E;
2646		break;
2647	case DP_AUX_F:
2648		aux_ch = AUX_CH_F;
2649		break;
2650	case DP_AUX_G:
2651		aux_ch = AUX_CH_G;
2652		break;
2653	default:
2654		MISSING_CASE(info->alternate_aux_channel);
2655		aux_ch = AUX_CH_A;
2656		break;
2657	}
2658
2659	drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n",
2660		    aux_ch_name(aux_ch), port_name(port));
2661
2662	return aux_ch;
2663}
2664
2665int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2666{
2667	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2668
2669	return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2670}
2671
2672int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2673{
2674	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2675	const struct ddi_vbt_port_info *info =
2676		&i915->vbt.ddi_port_info[encoder->port];
2677
2678	return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2679}
2680
2681int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2682{
2683	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2684
2685	return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2686}
2687
2688int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2689{
2690	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2691
2692	return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2693}
2694
2695int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2696{
2697	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2698
2699	return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2700}
2701
2702int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2703{
2704	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2705
2706	return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2707}
2708
2709bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2710{
2711	return i915->vbt.ddi_port_info[port].supports_dvi;
2712}
2713
2714bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2715{
2716	return i915->vbt.ddi_port_info[port].supports_hdmi;
2717}
2718
2719bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2720{
2721	return i915->vbt.ddi_port_info[port].supports_dp;
2722}
2723
2724bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2725					enum port port)
2726{
2727	return i915->vbt.ddi_port_info[port].supports_typec_usb;
2728}
2729
2730bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2731{
2732	return i915->vbt.ddi_port_info[port].supports_tbt;
2733}