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1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *
6 * Copyright (C) 2000 - 2019, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
28#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
29#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
30#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
31#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
32#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
33#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
34#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
35#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
36#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
37#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
39#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
40#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
41#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
42#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
43#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
44#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
45#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
46
47/*
48 * All tables must be byte-packed to match the ACPI specification, since
49 * the tables are provided by the system BIOS.
50 */
51#pragma pack(1)
52
53/*
54 * Note: C bitfields are not used for this reason:
55 *
56 * "Bitfields are great and easy to read, but unfortunately the C language
57 * does not specify the layout of bitfields in memory, which means they are
58 * essentially useless for dealing with packed data in on-disk formats or
59 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
60 * this decision was a design error in C. Ritchie could have picked an order
61 * and stuck with it." Norman Ramsey.
62 * See http://stackoverflow.com/a/1053662/41661
63 */
64
65/*******************************************************************************
66 *
67 * IORT - IO Remapping Table
68 *
69 * Conforms to "IO Remapping Table System Software on ARM Platforms",
70 * Document number: ARM DEN 0049D, March 2018
71 *
72 ******************************************************************************/
73
74struct acpi_table_iort {
75 struct acpi_table_header header;
76 u32 node_count;
77 u32 node_offset;
78 u32 reserved;
79};
80
81/*
82 * IORT subtables
83 */
84struct acpi_iort_node {
85 u8 type;
86 u16 length;
87 u8 revision;
88 u32 reserved;
89 u32 mapping_count;
90 u32 mapping_offset;
91 char node_data[1];
92};
93
94/* Values for subtable Type above */
95
96enum acpi_iort_node_type {
97 ACPI_IORT_NODE_ITS_GROUP = 0x00,
98 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
99 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
100 ACPI_IORT_NODE_SMMU = 0x03,
101 ACPI_IORT_NODE_SMMU_V3 = 0x04,
102 ACPI_IORT_NODE_PMCG = 0x05
103};
104
105struct acpi_iort_id_mapping {
106 u32 input_base; /* Lowest value in input range */
107 u32 id_count; /* Number of IDs */
108 u32 output_base; /* Lowest value in output range */
109 u32 output_reference; /* A reference to the output node */
110 u32 flags;
111};
112
113/* Masks for Flags field above for IORT subtable */
114
115#define ACPI_IORT_ID_SINGLE_MAPPING (1)
116
117struct acpi_iort_memory_access {
118 u32 cache_coherency;
119 u8 hints;
120 u16 reserved;
121 u8 memory_flags;
122};
123
124/* Values for cache_coherency field above */
125
126#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
127#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
128
129/* Masks for Hints field above */
130
131#define ACPI_IORT_HT_TRANSIENT (1)
132#define ACPI_IORT_HT_WRITE (1<<1)
133#define ACPI_IORT_HT_READ (1<<2)
134#define ACPI_IORT_HT_OVERRIDE (1<<3)
135
136/* Masks for memory_flags field above */
137
138#define ACPI_IORT_MF_COHERENCY (1)
139#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
140
141/*
142 * IORT node specific subtables
143 */
144struct acpi_iort_its_group {
145 u32 its_count;
146 u32 identifiers[1]; /* GIC ITS identifier array */
147};
148
149struct acpi_iort_named_component {
150 u32 node_flags;
151 u64 memory_properties; /* Memory access properties */
152 u8 memory_address_limit; /* Memory address size limit */
153 char device_name[1]; /* Path of namespace object */
154};
155
156/* Masks for Flags field above */
157
158#define ACPI_IORT_NC_STALL_SUPPORTED (1)
159#define ACPI_IORT_NC_PASID_BITS (31<<1)
160
161struct acpi_iort_root_complex {
162 u64 memory_properties; /* Memory access properties */
163 u32 ats_attribute;
164 u32 pci_segment_number;
165 u8 memory_address_limit; /* Memory address size limit */
166 u8 reserved[3]; /* Reserved, must be zero */
167};
168
169/* Values for ats_attribute field above */
170
171#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
172#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
173
174struct acpi_iort_smmu {
175 u64 base_address; /* SMMU base address */
176 u64 span; /* Length of memory range */
177 u32 model;
178 u32 flags;
179 u32 global_interrupt_offset;
180 u32 context_interrupt_count;
181 u32 context_interrupt_offset;
182 u32 pmu_interrupt_count;
183 u32 pmu_interrupt_offset;
184 u64 interrupts[1]; /* Interrupt array */
185};
186
187/* Values for Model field above */
188
189#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
190#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
191#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
192#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
193#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
194#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
195
196/* Masks for Flags field above */
197
198#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
199#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
200
201/* Global interrupt format */
202
203struct acpi_iort_smmu_gsi {
204 u32 nsg_irpt;
205 u32 nsg_irpt_flags;
206 u32 nsg_cfg_irpt;
207 u32 nsg_cfg_irpt_flags;
208};
209
210struct acpi_iort_smmu_v3 {
211 u64 base_address; /* SMMUv3 base address */
212 u32 flags;
213 u32 reserved;
214 u64 vatos_address;
215 u32 model;
216 u32 event_gsiv;
217 u32 pri_gsiv;
218 u32 gerr_gsiv;
219 u32 sync_gsiv;
220 u32 pxm;
221 u32 id_mapping_index;
222};
223
224/* Values for Model field above */
225
226#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
227#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
228#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
229
230/* Masks for Flags field above */
231
232#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
233#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
234#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
235
236struct acpi_iort_pmcg {
237 u64 page0_base_address;
238 u32 overflow_gsiv;
239 u32 node_reference;
240 u64 page1_base_address;
241};
242
243/*******************************************************************************
244 *
245 * IVRS - I/O Virtualization Reporting Structure
246 * Version 1
247 *
248 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
249 * Revision 1.26, February 2009.
250 *
251 ******************************************************************************/
252
253struct acpi_table_ivrs {
254 struct acpi_table_header header; /* Common ACPI table header */
255 u32 info; /* Common virtualization info */
256 u64 reserved;
257};
258
259/* Values for Info field above */
260
261#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
262#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
263#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
264
265/* IVRS subtable header */
266
267struct acpi_ivrs_header {
268 u8 type; /* Subtable type */
269 u8 flags;
270 u16 length; /* Subtable length */
271 u16 device_id; /* ID of IOMMU */
272};
273
274/* Values for subtable Type above */
275
276enum acpi_ivrs_type {
277 ACPI_IVRS_TYPE_HARDWARE = 0x10,
278 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
279 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
280 ACPI_IVRS_TYPE_MEMORY3 = 0x22
281};
282
283/* Masks for Flags field above for IVHD subtable */
284
285#define ACPI_IVHD_TT_ENABLE (1)
286#define ACPI_IVHD_PASS_PW (1<<1)
287#define ACPI_IVHD_RES_PASS_PW (1<<2)
288#define ACPI_IVHD_ISOC (1<<3)
289#define ACPI_IVHD_IOTLB (1<<4)
290
291/* Masks for Flags field above for IVMD subtable */
292
293#define ACPI_IVMD_UNITY (1)
294#define ACPI_IVMD_READ (1<<1)
295#define ACPI_IVMD_WRITE (1<<2)
296#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
297
298/*
299 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
300 */
301
302/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
303
304struct acpi_ivrs_hardware {
305 struct acpi_ivrs_header header;
306 u16 capability_offset; /* Offset for IOMMU control fields */
307 u64 base_address; /* IOMMU control registers */
308 u16 pci_segment_group;
309 u16 info; /* MSI number and unit ID */
310 u32 reserved;
311};
312
313/* Masks for Info field above */
314
315#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
316#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
317
318/*
319 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
320 * Upper two bits of the Type field are the (encoded) length of the structure.
321 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
322 * are reserved for future use but not defined.
323 */
324struct acpi_ivrs_de_header {
325 u8 type;
326 u16 id;
327 u8 data_setting;
328};
329
330/* Length of device entry is in the top two bits of Type field above */
331
332#define ACPI_IVHD_ENTRY_LENGTH 0xC0
333
334/* Values for device entry Type field above */
335
336enum acpi_ivrs_device_entry_type {
337 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
338
339 ACPI_IVRS_TYPE_PAD4 = 0,
340 ACPI_IVRS_TYPE_ALL = 1,
341 ACPI_IVRS_TYPE_SELECT = 2,
342 ACPI_IVRS_TYPE_START = 3,
343 ACPI_IVRS_TYPE_END = 4,
344
345 /* 8-byte device entries */
346
347 ACPI_IVRS_TYPE_PAD8 = 64,
348 ACPI_IVRS_TYPE_NOT_USED = 65,
349 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
350 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
351 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
352 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
353 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */
354};
355
356/* Values for Data field above */
357
358#define ACPI_IVHD_INIT_PASS (1)
359#define ACPI_IVHD_EINT_PASS (1<<1)
360#define ACPI_IVHD_NMI_PASS (1<<2)
361#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
362#define ACPI_IVHD_LINT0_PASS (1<<6)
363#define ACPI_IVHD_LINT1_PASS (1<<7)
364
365/* Types 0-4: 4-byte device entry */
366
367struct acpi_ivrs_device4 {
368 struct acpi_ivrs_de_header header;
369};
370
371/* Types 66-67: 8-byte device entry */
372
373struct acpi_ivrs_device8a {
374 struct acpi_ivrs_de_header header;
375 u8 reserved1;
376 u16 used_id;
377 u8 reserved2;
378};
379
380/* Types 70-71: 8-byte device entry */
381
382struct acpi_ivrs_device8b {
383 struct acpi_ivrs_de_header header;
384 u32 extended_data;
385};
386
387/* Values for extended_data above */
388
389#define ACPI_IVHD_ATS_DISABLED (1<<31)
390
391/* Type 72: 8-byte device entry */
392
393struct acpi_ivrs_device8c {
394 struct acpi_ivrs_de_header header;
395 u8 handle;
396 u16 used_id;
397 u8 variety;
398};
399
400/* Values for Variety field above */
401
402#define ACPI_IVHD_IOAPIC 1
403#define ACPI_IVHD_HPET 2
404
405/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
406
407struct acpi_ivrs_memory {
408 struct acpi_ivrs_header header;
409 u16 aux_data;
410 u64 reserved;
411 u64 start_address;
412 u64 memory_length;
413};
414
415/*******************************************************************************
416 *
417 * LPIT - Low Power Idle Table
418 *
419 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
420 *
421 ******************************************************************************/
422
423struct acpi_table_lpit {
424 struct acpi_table_header header; /* Common ACPI table header */
425};
426
427/* LPIT subtable header */
428
429struct acpi_lpit_header {
430 u32 type; /* Subtable type */
431 u32 length; /* Subtable length */
432 u16 unique_id;
433 u16 reserved;
434 u32 flags;
435};
436
437/* Values for subtable Type above */
438
439enum acpi_lpit_type {
440 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
441 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
442};
443
444/* Masks for Flags field above */
445
446#define ACPI_LPIT_STATE_DISABLED (1)
447#define ACPI_LPIT_NO_COUNTER (1<<1)
448
449/*
450 * LPIT subtables, correspond to Type in struct acpi_lpit_header
451 */
452
453/* 0x00: Native C-state instruction based LPI structure */
454
455struct acpi_lpit_native {
456 struct acpi_lpit_header header;
457 struct acpi_generic_address entry_trigger;
458 u32 residency;
459 u32 latency;
460 struct acpi_generic_address residency_counter;
461 u64 counter_frequency;
462};
463
464/*******************************************************************************
465 *
466 * MADT - Multiple APIC Description Table
467 * Version 3
468 *
469 ******************************************************************************/
470
471struct acpi_table_madt {
472 struct acpi_table_header header; /* Common ACPI table header */
473 u32 address; /* Physical address of local APIC */
474 u32 flags;
475};
476
477/* Masks for Flags field above */
478
479#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
480
481/* Values for PCATCompat flag */
482
483#define ACPI_MADT_DUAL_PIC 1
484#define ACPI_MADT_MULTIPLE_APIC 0
485
486/* Values for MADT subtable type in struct acpi_subtable_header */
487
488enum acpi_madt_type {
489 ACPI_MADT_TYPE_LOCAL_APIC = 0,
490 ACPI_MADT_TYPE_IO_APIC = 1,
491 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
492 ACPI_MADT_TYPE_NMI_SOURCE = 3,
493 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
494 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
495 ACPI_MADT_TYPE_IO_SAPIC = 6,
496 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
497 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
498 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
499 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
500 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
501 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
502 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
503 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
504 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
505 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
506};
507
508/*
509 * MADT Subtables, correspond to Type in struct acpi_subtable_header
510 */
511
512/* 0: Processor Local APIC */
513
514struct acpi_madt_local_apic {
515 struct acpi_subtable_header header;
516 u8 processor_id; /* ACPI processor id */
517 u8 id; /* Processor's local APIC id */
518 u32 lapic_flags;
519};
520
521/* 1: IO APIC */
522
523struct acpi_madt_io_apic {
524 struct acpi_subtable_header header;
525 u8 id; /* I/O APIC ID */
526 u8 reserved; /* reserved - must be zero */
527 u32 address; /* APIC physical address */
528 u32 global_irq_base; /* Global system interrupt where INTI lines start */
529};
530
531/* 2: Interrupt Override */
532
533struct acpi_madt_interrupt_override {
534 struct acpi_subtable_header header;
535 u8 bus; /* 0 - ISA */
536 u8 source_irq; /* Interrupt source (IRQ) */
537 u32 global_irq; /* Global system interrupt */
538 u16 inti_flags;
539};
540
541/* 3: NMI Source */
542
543struct acpi_madt_nmi_source {
544 struct acpi_subtable_header header;
545 u16 inti_flags;
546 u32 global_irq; /* Global system interrupt */
547};
548
549/* 4: Local APIC NMI */
550
551struct acpi_madt_local_apic_nmi {
552 struct acpi_subtable_header header;
553 u8 processor_id; /* ACPI processor id */
554 u16 inti_flags;
555 u8 lint; /* LINTn to which NMI is connected */
556};
557
558/* 5: Address Override */
559
560struct acpi_madt_local_apic_override {
561 struct acpi_subtable_header header;
562 u16 reserved; /* Reserved, must be zero */
563 u64 address; /* APIC physical address */
564};
565
566/* 6: I/O Sapic */
567
568struct acpi_madt_io_sapic {
569 struct acpi_subtable_header header;
570 u8 id; /* I/O SAPIC ID */
571 u8 reserved; /* Reserved, must be zero */
572 u32 global_irq_base; /* Global interrupt for SAPIC start */
573 u64 address; /* SAPIC physical address */
574};
575
576/* 7: Local Sapic */
577
578struct acpi_madt_local_sapic {
579 struct acpi_subtable_header header;
580 u8 processor_id; /* ACPI processor id */
581 u8 id; /* SAPIC ID */
582 u8 eid; /* SAPIC EID */
583 u8 reserved[3]; /* Reserved, must be zero */
584 u32 lapic_flags;
585 u32 uid; /* Numeric UID - ACPI 3.0 */
586 char uid_string[1]; /* String UID - ACPI 3.0 */
587};
588
589/* 8: Platform Interrupt Source */
590
591struct acpi_madt_interrupt_source {
592 struct acpi_subtable_header header;
593 u16 inti_flags;
594 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
595 u8 id; /* Processor ID */
596 u8 eid; /* Processor EID */
597 u8 io_sapic_vector; /* Vector value for PMI interrupts */
598 u32 global_irq; /* Global system interrupt */
599 u32 flags; /* Interrupt Source Flags */
600};
601
602/* Masks for Flags field above */
603
604#define ACPI_MADT_CPEI_OVERRIDE (1)
605
606/* 9: Processor Local X2APIC (ACPI 4.0) */
607
608struct acpi_madt_local_x2apic {
609 struct acpi_subtable_header header;
610 u16 reserved; /* reserved - must be zero */
611 u32 local_apic_id; /* Processor x2APIC ID */
612 u32 lapic_flags;
613 u32 uid; /* ACPI processor UID */
614};
615
616/* 10: Local X2APIC NMI (ACPI 4.0) */
617
618struct acpi_madt_local_x2apic_nmi {
619 struct acpi_subtable_header header;
620 u16 inti_flags;
621 u32 uid; /* ACPI processor UID */
622 u8 lint; /* LINTn to which NMI is connected */
623 u8 reserved[3]; /* reserved - must be zero */
624};
625
626/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
627
628struct acpi_madt_generic_interrupt {
629 struct acpi_subtable_header header;
630 u16 reserved; /* reserved - must be zero */
631 u32 cpu_interface_number;
632 u32 uid;
633 u32 flags;
634 u32 parking_version;
635 u32 performance_interrupt;
636 u64 parked_address;
637 u64 base_address;
638 u64 gicv_base_address;
639 u64 gich_base_address;
640 u32 vgic_interrupt;
641 u64 gicr_base_address;
642 u64 arm_mpidr;
643 u8 efficiency_class;
644 u8 reserved2[1];
645 u16 spe_interrupt; /* ACPI 6.3 */
646};
647
648/* Masks for Flags field above */
649
650/* ACPI_MADT_ENABLED (1) Processor is usable if set */
651#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
652#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
653
654/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
655
656struct acpi_madt_generic_distributor {
657 struct acpi_subtable_header header;
658 u16 reserved; /* reserved - must be zero */
659 u32 gic_id;
660 u64 base_address;
661 u32 global_irq_base;
662 u8 version;
663 u8 reserved2[3]; /* reserved - must be zero */
664};
665
666/* Values for Version field above */
667
668enum acpi_madt_gic_version {
669 ACPI_MADT_GIC_VERSION_NONE = 0,
670 ACPI_MADT_GIC_VERSION_V1 = 1,
671 ACPI_MADT_GIC_VERSION_V2 = 2,
672 ACPI_MADT_GIC_VERSION_V3 = 3,
673 ACPI_MADT_GIC_VERSION_V4 = 4,
674 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
675};
676
677/* 13: Generic MSI Frame (ACPI 5.1) */
678
679struct acpi_madt_generic_msi_frame {
680 struct acpi_subtable_header header;
681 u16 reserved; /* reserved - must be zero */
682 u32 msi_frame_id;
683 u64 base_address;
684 u32 flags;
685 u16 spi_count;
686 u16 spi_base;
687};
688
689/* Masks for Flags field above */
690
691#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
692
693/* 14: Generic Redistributor (ACPI 5.1) */
694
695struct acpi_madt_generic_redistributor {
696 struct acpi_subtable_header header;
697 u16 reserved; /* reserved - must be zero */
698 u64 base_address;
699 u32 length;
700};
701
702/* 15: Generic Translator (ACPI 6.0) */
703
704struct acpi_madt_generic_translator {
705 struct acpi_subtable_header header;
706 u16 reserved; /* reserved - must be zero */
707 u32 translation_id;
708 u64 base_address;
709 u32 reserved2;
710};
711
712/*
713 * Common flags fields for MADT subtables
714 */
715
716/* MADT Local APIC flags */
717
718#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
719
720/* MADT MPS INTI flags (inti_flags) */
721
722#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
723#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
724
725/* Values for MPS INTI flags */
726
727#define ACPI_MADT_POLARITY_CONFORMS 0
728#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
729#define ACPI_MADT_POLARITY_RESERVED 2
730#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
731
732#define ACPI_MADT_TRIGGER_CONFORMS (0)
733#define ACPI_MADT_TRIGGER_EDGE (1<<2)
734#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
735#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
736
737/*******************************************************************************
738 *
739 * MCFG - PCI Memory Mapped Configuration table and subtable
740 * Version 1
741 *
742 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
743 *
744 ******************************************************************************/
745
746struct acpi_table_mcfg {
747 struct acpi_table_header header; /* Common ACPI table header */
748 u8 reserved[8];
749};
750
751/* Subtable */
752
753struct acpi_mcfg_allocation {
754 u64 address; /* Base address, processor-relative */
755 u16 pci_segment; /* PCI segment group number */
756 u8 start_bus_number; /* Starting PCI Bus number */
757 u8 end_bus_number; /* Final PCI Bus number */
758 u32 reserved;
759};
760
761/*******************************************************************************
762 *
763 * MCHI - Management Controller Host Interface Table
764 * Version 1
765 *
766 * Conforms to "Management Component Transport Protocol (MCTP) Host
767 * Interface Specification", Revision 1.0.0a, October 13, 2009
768 *
769 ******************************************************************************/
770
771struct acpi_table_mchi {
772 struct acpi_table_header header; /* Common ACPI table header */
773 u8 interface_type;
774 u8 protocol;
775 u64 protocol_data;
776 u8 interrupt_type;
777 u8 gpe;
778 u8 pci_device_flag;
779 u32 global_interrupt;
780 struct acpi_generic_address control_register;
781 u8 pci_segment;
782 u8 pci_bus;
783 u8 pci_device;
784 u8 pci_function;
785};
786
787/*******************************************************************************
788 *
789 * MPST - Memory Power State Table (ACPI 5.0)
790 * Version 1
791 *
792 ******************************************************************************/
793
794#define ACPI_MPST_CHANNEL_INFO \
795 u8 channel_id; \
796 u8 reserved1[3]; \
797 u16 power_node_count; \
798 u16 reserved2;
799
800/* Main table */
801
802struct acpi_table_mpst {
803 struct acpi_table_header header; /* Common ACPI table header */
804 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
805};
806
807/* Memory Platform Communication Channel Info */
808
809struct acpi_mpst_channel {
810 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
811};
812
813/* Memory Power Node Structure */
814
815struct acpi_mpst_power_node {
816 u8 flags;
817 u8 reserved1;
818 u16 node_id;
819 u32 length;
820 u64 range_address;
821 u64 range_length;
822 u32 num_power_states;
823 u32 num_physical_components;
824};
825
826/* Values for Flags field above */
827
828#define ACPI_MPST_ENABLED 1
829#define ACPI_MPST_POWER_MANAGED 2
830#define ACPI_MPST_HOT_PLUG_CAPABLE 4
831
832/* Memory Power State Structure (follows POWER_NODE above) */
833
834struct acpi_mpst_power_state {
835 u8 power_state;
836 u8 info_index;
837};
838
839/* Physical Component ID Structure (follows POWER_STATE above) */
840
841struct acpi_mpst_component {
842 u16 component_id;
843};
844
845/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
846
847struct acpi_mpst_data_hdr {
848 u16 characteristics_count;
849 u16 reserved;
850};
851
852struct acpi_mpst_power_data {
853 u8 structure_id;
854 u8 flags;
855 u16 reserved1;
856 u32 average_power;
857 u32 power_saving;
858 u64 exit_latency;
859 u64 reserved2;
860};
861
862/* Values for Flags field above */
863
864#define ACPI_MPST_PRESERVE 1
865#define ACPI_MPST_AUTOENTRY 2
866#define ACPI_MPST_AUTOEXIT 4
867
868/* Shared Memory Region (not part of an ACPI table) */
869
870struct acpi_mpst_shared {
871 u32 signature;
872 u16 pcc_command;
873 u16 pcc_status;
874 u32 command_register;
875 u32 status_register;
876 u32 power_state_id;
877 u32 power_node_id;
878 u64 energy_consumed;
879 u64 average_power;
880};
881
882/*******************************************************************************
883 *
884 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
885 * Version 1
886 *
887 ******************************************************************************/
888
889struct acpi_table_msct {
890 struct acpi_table_header header; /* Common ACPI table header */
891 u32 proximity_offset; /* Location of proximity info struct(s) */
892 u32 max_proximity_domains; /* Max number of proximity domains */
893 u32 max_clock_domains; /* Max number of clock domains */
894 u64 max_address; /* Max physical address in system */
895};
896
897/* subtable - Maximum Proximity Domain Information. Version 1 */
898
899struct acpi_msct_proximity {
900 u8 revision;
901 u8 length;
902 u32 range_start; /* Start of domain range */
903 u32 range_end; /* End of domain range */
904 u32 processor_capacity;
905 u64 memory_capacity; /* In bytes */
906};
907
908/*******************************************************************************
909 *
910 * MSDM - Microsoft Data Management table
911 *
912 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
913 * November 29, 2011. Copyright 2011 Microsoft
914 *
915 ******************************************************************************/
916
917/* Basic MSDM table is only the common ACPI header */
918
919struct acpi_table_msdm {
920 struct acpi_table_header header; /* Common ACPI table header */
921};
922
923/*******************************************************************************
924 *
925 * MTMR - MID Timer Table
926 * Version 1
927 *
928 * Conforms to "Simple Firmware Interface Specification",
929 * Draft 0.8.2, Oct 19, 2010
930 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
931 *
932 ******************************************************************************/
933
934struct acpi_table_mtmr {
935 struct acpi_table_header header; /* Common ACPI table header */
936};
937
938/* MTMR entry */
939
940struct acpi_mtmr_entry {
941 struct acpi_generic_address physical_address;
942 u32 frequency;
943 u32 irq;
944};
945
946/*******************************************************************************
947 *
948 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
949 * Version 1
950 *
951 ******************************************************************************/
952
953struct acpi_table_nfit {
954 struct acpi_table_header header; /* Common ACPI table header */
955 u32 reserved; /* Reserved, must be zero */
956};
957
958/* Subtable header for NFIT */
959
960struct acpi_nfit_header {
961 u16 type;
962 u16 length;
963};
964
965/* Values for subtable type in struct acpi_nfit_header */
966
967enum acpi_nfit_type {
968 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
969 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
970 ACPI_NFIT_TYPE_INTERLEAVE = 2,
971 ACPI_NFIT_TYPE_SMBIOS = 3,
972 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
973 ACPI_NFIT_TYPE_DATA_REGION = 5,
974 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
975 ACPI_NFIT_TYPE_CAPABILITIES = 7,
976 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
977};
978
979/*
980 * NFIT Subtables
981 */
982
983/* 0: System Physical Address Range Structure */
984
985struct acpi_nfit_system_address {
986 struct acpi_nfit_header header;
987 u16 range_index;
988 u16 flags;
989 u32 reserved; /* Reserved, must be zero */
990 u32 proximity_domain;
991 u8 range_guid[16];
992 u64 address;
993 u64 length;
994 u64 memory_mapping;
995};
996
997/* Flags */
998
999#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1000#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1001
1002/* Range Type GUIDs appear in the include/acuuid.h file */
1003
1004/* 1: Memory Device to System Address Range Map Structure */
1005
1006struct acpi_nfit_memory_map {
1007 struct acpi_nfit_header header;
1008 u32 device_handle;
1009 u16 physical_id;
1010 u16 region_id;
1011 u16 range_index;
1012 u16 region_index;
1013 u64 region_size;
1014 u64 region_offset;
1015 u64 address;
1016 u16 interleave_index;
1017 u16 interleave_ways;
1018 u16 flags;
1019 u16 reserved; /* Reserved, must be zero */
1020};
1021
1022/* Flags */
1023
1024#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1025#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1026#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1027#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1028#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1029#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1030#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1031
1032/* 2: Interleave Structure */
1033
1034struct acpi_nfit_interleave {
1035 struct acpi_nfit_header header;
1036 u16 interleave_index;
1037 u16 reserved; /* Reserved, must be zero */
1038 u32 line_count;
1039 u32 line_size;
1040 u32 line_offset[1]; /* Variable length */
1041};
1042
1043/* 3: SMBIOS Management Information Structure */
1044
1045struct acpi_nfit_smbios {
1046 struct acpi_nfit_header header;
1047 u32 reserved; /* Reserved, must be zero */
1048 u8 data[1]; /* Variable length */
1049};
1050
1051/* 4: NVDIMM Control Region Structure */
1052
1053struct acpi_nfit_control_region {
1054 struct acpi_nfit_header header;
1055 u16 region_index;
1056 u16 vendor_id;
1057 u16 device_id;
1058 u16 revision_id;
1059 u16 subsystem_vendor_id;
1060 u16 subsystem_device_id;
1061 u16 subsystem_revision_id;
1062 u8 valid_fields;
1063 u8 manufacturing_location;
1064 u16 manufacturing_date;
1065 u8 reserved[2]; /* Reserved, must be zero */
1066 u32 serial_number;
1067 u16 code;
1068 u16 windows;
1069 u64 window_size;
1070 u64 command_offset;
1071 u64 command_size;
1072 u64 status_offset;
1073 u64 status_size;
1074 u16 flags;
1075 u8 reserved1[6]; /* Reserved, must be zero */
1076};
1077
1078/* Flags */
1079
1080#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1081
1082/* valid_fields bits */
1083
1084#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1085
1086/* 5: NVDIMM Block Data Window Region Structure */
1087
1088struct acpi_nfit_data_region {
1089 struct acpi_nfit_header header;
1090 u16 region_index;
1091 u16 windows;
1092 u64 offset;
1093 u64 size;
1094 u64 capacity;
1095 u64 start_address;
1096};
1097
1098/* 6: Flush Hint Address Structure */
1099
1100struct acpi_nfit_flush_address {
1101 struct acpi_nfit_header header;
1102 u32 device_handle;
1103 u16 hint_count;
1104 u8 reserved[6]; /* Reserved, must be zero */
1105 u64 hint_address[1]; /* Variable length */
1106};
1107
1108/* 7: Platform Capabilities Structure */
1109
1110struct acpi_nfit_capabilities {
1111 struct acpi_nfit_header header;
1112 u8 highest_capability;
1113 u8 reserved[3]; /* Reserved, must be zero */
1114 u32 capabilities;
1115 u32 reserved2;
1116};
1117
1118/* Capabilities Flags */
1119
1120#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1121#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1122#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1123
1124/*
1125 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1126 */
1127struct nfit_device_handle {
1128 u32 handle;
1129};
1130
1131/* Device handle construction and extraction macros */
1132
1133#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1134#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1135#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1136#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1137#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1138
1139#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1140#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1141#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1142#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1143#define ACPI_NFIT_NODE_ID_OFFSET 16
1144
1145/* Macro to construct a NFIT/NVDIMM device handle */
1146
1147#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1148 ((dimm) | \
1149 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1150 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1151 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1152 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1153
1154/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1155
1156#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1157 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1158
1159#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1160 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1161
1162#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1163 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1164
1165#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1166 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1167
1168#define ACPI_NFIT_GET_NODE_ID(handle) \
1169 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1170
1171/*******************************************************************************
1172 *
1173 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1174 * Version 2 (ACPI 6.2)
1175 *
1176 ******************************************************************************/
1177
1178struct acpi_table_pcct {
1179 struct acpi_table_header header; /* Common ACPI table header */
1180 u32 flags;
1181 u64 reserved;
1182};
1183
1184/* Values for Flags field above */
1185
1186#define ACPI_PCCT_DOORBELL 1
1187
1188/* Values for subtable type in struct acpi_subtable_header */
1189
1190enum acpi_pcct_type {
1191 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1192 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1193 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1194 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1195 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1196 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
1197};
1198
1199/*
1200 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1201 */
1202
1203/* 0: Generic Communications Subspace */
1204
1205struct acpi_pcct_subspace {
1206 struct acpi_subtable_header header;
1207 u8 reserved[6];
1208 u64 base_address;
1209 u64 length;
1210 struct acpi_generic_address doorbell_register;
1211 u64 preserve_mask;
1212 u64 write_mask;
1213 u32 latency;
1214 u32 max_access_rate;
1215 u16 min_turnaround_time;
1216};
1217
1218/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1219
1220struct acpi_pcct_hw_reduced {
1221 struct acpi_subtable_header header;
1222 u32 platform_interrupt;
1223 u8 flags;
1224 u8 reserved;
1225 u64 base_address;
1226 u64 length;
1227 struct acpi_generic_address doorbell_register;
1228 u64 preserve_mask;
1229 u64 write_mask;
1230 u32 latency;
1231 u32 max_access_rate;
1232 u16 min_turnaround_time;
1233};
1234
1235/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1236
1237struct acpi_pcct_hw_reduced_type2 {
1238 struct acpi_subtable_header header;
1239 u32 platform_interrupt;
1240 u8 flags;
1241 u8 reserved;
1242 u64 base_address;
1243 u64 length;
1244 struct acpi_generic_address doorbell_register;
1245 u64 preserve_mask;
1246 u64 write_mask;
1247 u32 latency;
1248 u32 max_access_rate;
1249 u16 min_turnaround_time;
1250 struct acpi_generic_address platform_ack_register;
1251 u64 ack_preserve_mask;
1252 u64 ack_write_mask;
1253};
1254
1255/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1256
1257struct acpi_pcct_ext_pcc_master {
1258 struct acpi_subtable_header header;
1259 u32 platform_interrupt;
1260 u8 flags;
1261 u8 reserved1;
1262 u64 base_address;
1263 u32 length;
1264 struct acpi_generic_address doorbell_register;
1265 u64 preserve_mask;
1266 u64 write_mask;
1267 u32 latency;
1268 u32 max_access_rate;
1269 u32 min_turnaround_time;
1270 struct acpi_generic_address platform_ack_register;
1271 u64 ack_preserve_mask;
1272 u64 ack_set_mask;
1273 u64 reserved2;
1274 struct acpi_generic_address cmd_complete_register;
1275 u64 cmd_complete_mask;
1276 struct acpi_generic_address cmd_update_register;
1277 u64 cmd_update_preserve_mask;
1278 u64 cmd_update_set_mask;
1279 struct acpi_generic_address error_status_register;
1280 u64 error_status_mask;
1281};
1282
1283/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1284
1285struct acpi_pcct_ext_pcc_slave {
1286 struct acpi_subtable_header header;
1287 u32 platform_interrupt;
1288 u8 flags;
1289 u8 reserved1;
1290 u64 base_address;
1291 u32 length;
1292 struct acpi_generic_address doorbell_register;
1293 u64 preserve_mask;
1294 u64 write_mask;
1295 u32 latency;
1296 u32 max_access_rate;
1297 u32 min_turnaround_time;
1298 struct acpi_generic_address platform_ack_register;
1299 u64 ack_preserve_mask;
1300 u64 ack_set_mask;
1301 u64 reserved2;
1302 struct acpi_generic_address cmd_complete_register;
1303 u64 cmd_complete_mask;
1304 struct acpi_generic_address cmd_update_register;
1305 u64 cmd_update_preserve_mask;
1306 u64 cmd_update_set_mask;
1307 struct acpi_generic_address error_status_register;
1308 u64 error_status_mask;
1309};
1310
1311/* Values for doorbell flags above */
1312
1313#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1314#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1315
1316/*
1317 * PCC memory structures (not part of the ACPI table)
1318 */
1319
1320/* Shared Memory Region */
1321
1322struct acpi_pcct_shared_memory {
1323 u32 signature;
1324 u16 command;
1325 u16 status;
1326};
1327
1328/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1329
1330struct acpi_pcct_ext_pcc_shared_memory {
1331 u32 signature;
1332 u32 flags;
1333 u32 length;
1334 u32 command;
1335};
1336
1337/*******************************************************************************
1338 *
1339 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1340 * Version 0
1341 *
1342 ******************************************************************************/
1343
1344struct acpi_table_pdtt {
1345 struct acpi_table_header header; /* Common ACPI table header */
1346 u8 trigger_count;
1347 u8 reserved[3];
1348 u32 array_offset;
1349};
1350
1351/*
1352 * PDTT Communication Channel Identifier Structure.
1353 * The number of these structures is defined by trigger_count above,
1354 * starting at array_offset.
1355 */
1356struct acpi_pdtt_channel {
1357 u8 subchannel_id;
1358 u8 flags;
1359};
1360
1361/* Flags for above */
1362
1363#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1364#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1365#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1366
1367/*******************************************************************************
1368 *
1369 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1370 * Version 1
1371 *
1372 ******************************************************************************/
1373
1374struct acpi_table_pmtt {
1375 struct acpi_table_header header; /* Common ACPI table header */
1376 u32 reserved;
1377};
1378
1379/* Common header for PMTT subtables that follow main table */
1380
1381struct acpi_pmtt_header {
1382 u8 type;
1383 u8 reserved1;
1384 u16 length;
1385 u16 flags;
1386 u16 reserved2;
1387};
1388
1389/* Values for Type field above */
1390
1391#define ACPI_PMTT_TYPE_SOCKET 0
1392#define ACPI_PMTT_TYPE_CONTROLLER 1
1393#define ACPI_PMTT_TYPE_DIMM 2
1394#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1395
1396/* Values for Flags field above */
1397
1398#define ACPI_PMTT_TOP_LEVEL 0x0001
1399#define ACPI_PMTT_PHYSICAL 0x0002
1400#define ACPI_PMTT_MEMORY_TYPE 0x000C
1401
1402/*
1403 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1404 */
1405
1406/* 0: Socket Structure */
1407
1408struct acpi_pmtt_socket {
1409 struct acpi_pmtt_header header;
1410 u16 socket_id;
1411 u16 reserved;
1412};
1413
1414/* 1: Memory Controller subtable */
1415
1416struct acpi_pmtt_controller {
1417 struct acpi_pmtt_header header;
1418 u32 read_latency;
1419 u32 write_latency;
1420 u32 read_bandwidth;
1421 u32 write_bandwidth;
1422 u16 access_width;
1423 u16 alignment;
1424 u16 reserved;
1425 u16 domain_count;
1426};
1427
1428/* 1a: Proximity Domain substructure */
1429
1430struct acpi_pmtt_domain {
1431 u32 proximity_domain;
1432};
1433
1434/* 2: Physical Component Identifier (DIMM) */
1435
1436struct acpi_pmtt_physical_component {
1437 struct acpi_pmtt_header header;
1438 u16 component_id;
1439 u16 reserved;
1440 u32 memory_size;
1441 u32 bios_handle;
1442};
1443
1444/*******************************************************************************
1445 *
1446 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1447 * Version 1
1448 *
1449 ******************************************************************************/
1450
1451struct acpi_table_pptt {
1452 struct acpi_table_header header; /* Common ACPI table header */
1453};
1454
1455/* Values for Type field above */
1456
1457enum acpi_pptt_type {
1458 ACPI_PPTT_TYPE_PROCESSOR = 0,
1459 ACPI_PPTT_TYPE_CACHE = 1,
1460 ACPI_PPTT_TYPE_ID = 2,
1461 ACPI_PPTT_TYPE_RESERVED = 3
1462};
1463
1464/* 0: Processor Hierarchy Node Structure */
1465
1466struct acpi_pptt_processor {
1467 struct acpi_subtable_header header;
1468 u16 reserved;
1469 u32 flags;
1470 u32 parent;
1471 u32 acpi_processor_id;
1472 u32 number_of_priv_resources;
1473};
1474
1475/* Flags */
1476
1477#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1478#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1479#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1480#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1481#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
1482
1483/* 1: Cache Type Structure */
1484
1485struct acpi_pptt_cache {
1486 struct acpi_subtable_header header;
1487 u16 reserved;
1488 u32 flags;
1489 u32 next_level_of_cache;
1490 u32 size;
1491 u32 number_of_sets;
1492 u8 associativity;
1493 u8 attributes;
1494 u16 line_size;
1495};
1496
1497/* Flags */
1498
1499#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1500#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1501#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1502#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1503#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1504#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1505#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1506
1507/* Masks for Attributes */
1508
1509#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1510#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1511#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1512
1513/* Attributes describing cache */
1514#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1515#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1516#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1517#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1518
1519#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1520#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1521#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1522#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1523
1524#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1525#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1526
1527/* 2: ID Structure */
1528
1529struct acpi_pptt_id {
1530 struct acpi_subtable_header header;
1531 u16 reserved;
1532 u32 vendor_id;
1533 u64 level1_id;
1534 u64 level2_id;
1535 u16 major_rev;
1536 u16 minor_rev;
1537 u16 spin_rev;
1538};
1539
1540/*******************************************************************************
1541 *
1542 * RASF - RAS Feature Table (ACPI 5.0)
1543 * Version 1
1544 *
1545 ******************************************************************************/
1546
1547struct acpi_table_rasf {
1548 struct acpi_table_header header; /* Common ACPI table header */
1549 u8 channel_id[12];
1550};
1551
1552/* RASF Platform Communication Channel Shared Memory Region */
1553
1554struct acpi_rasf_shared_memory {
1555 u32 signature;
1556 u16 command;
1557 u16 status;
1558 u16 version;
1559 u8 capabilities[16];
1560 u8 set_capabilities[16];
1561 u16 num_parameter_blocks;
1562 u32 set_capabilities_status;
1563};
1564
1565/* RASF Parameter Block Structure Header */
1566
1567struct acpi_rasf_parameter_block {
1568 u16 type;
1569 u16 version;
1570 u16 length;
1571};
1572
1573/* RASF Parameter Block Structure for PATROL_SCRUB */
1574
1575struct acpi_rasf_patrol_scrub_parameter {
1576 struct acpi_rasf_parameter_block header;
1577 u16 patrol_scrub_command;
1578 u64 requested_address_range[2];
1579 u64 actual_address_range[2];
1580 u16 flags;
1581 u8 requested_speed;
1582};
1583
1584/* Masks for Flags and Speed fields above */
1585
1586#define ACPI_RASF_SCRUBBER_RUNNING 1
1587#define ACPI_RASF_SPEED (7<<1)
1588#define ACPI_RASF_SPEED_SLOW (0<<1)
1589#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1590#define ACPI_RASF_SPEED_FAST (7<<1)
1591
1592/* Channel Commands */
1593
1594enum acpi_rasf_commands {
1595 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1596};
1597
1598/* Platform RAS Capabilities */
1599
1600enum acpi_rasf_capabiliities {
1601 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1602 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1603};
1604
1605/* Patrol Scrub Commands */
1606
1607enum acpi_rasf_patrol_scrub_commands {
1608 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1609 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1610 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1611};
1612
1613/* Channel Command flags */
1614
1615#define ACPI_RASF_GENERATE_SCI (1<<15)
1616
1617/* Status values */
1618
1619enum acpi_rasf_status {
1620 ACPI_RASF_SUCCESS = 0,
1621 ACPI_RASF_NOT_VALID = 1,
1622 ACPI_RASF_NOT_SUPPORTED = 2,
1623 ACPI_RASF_BUSY = 3,
1624 ACPI_RASF_FAILED = 4,
1625 ACPI_RASF_ABORTED = 5,
1626 ACPI_RASF_INVALID_DATA = 6
1627};
1628
1629/* Status flags */
1630
1631#define ACPI_RASF_COMMAND_COMPLETE (1)
1632#define ACPI_RASF_SCI_DOORBELL (1<<1)
1633#define ACPI_RASF_ERROR (1<<2)
1634#define ACPI_RASF_STATUS (0x1F<<3)
1635
1636/*******************************************************************************
1637 *
1638 * SBST - Smart Battery Specification Table
1639 * Version 1
1640 *
1641 ******************************************************************************/
1642
1643struct acpi_table_sbst {
1644 struct acpi_table_header header; /* Common ACPI table header */
1645 u32 warning_level;
1646 u32 low_level;
1647 u32 critical_level;
1648};
1649
1650/*******************************************************************************
1651 *
1652 * SDEI - Software Delegated Exception Interface Descriptor Table
1653 *
1654 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1655 * May 8th, 2017. Copyright 2017 ARM Ltd.
1656 *
1657 ******************************************************************************/
1658
1659struct acpi_table_sdei {
1660 struct acpi_table_header header; /* Common ACPI table header */
1661};
1662
1663/*******************************************************************************
1664 *
1665 * SDEV - Secure Devices Table (ACPI 6.2)
1666 * Version 1
1667 *
1668 ******************************************************************************/
1669
1670struct acpi_table_sdev {
1671 struct acpi_table_header header; /* Common ACPI table header */
1672};
1673
1674struct acpi_sdev_header {
1675 u8 type;
1676 u8 flags;
1677 u16 length;
1678};
1679
1680/* Values for subtable type above */
1681
1682enum acpi_sdev_type {
1683 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1684 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1685 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1686};
1687
1688/* Values for flags above */
1689
1690#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
1691
1692/*
1693 * SDEV subtables
1694 */
1695
1696/* 0: Namespace Device Based Secure Device Structure */
1697
1698struct acpi_sdev_namespace {
1699 struct acpi_sdev_header header;
1700 u16 device_id_offset;
1701 u16 device_id_length;
1702 u16 vendor_data_offset;
1703 u16 vendor_data_length;
1704};
1705
1706/* 1: PCIe Endpoint Device Based Device Structure */
1707
1708struct acpi_sdev_pcie {
1709 struct acpi_sdev_header header;
1710 u16 segment;
1711 u16 start_bus;
1712 u16 path_offset;
1713 u16 path_length;
1714 u16 vendor_data_offset;
1715 u16 vendor_data_length;
1716};
1717
1718/* 1a: PCIe Endpoint path entry */
1719
1720struct acpi_sdev_pcie_path {
1721 u8 device;
1722 u8 function;
1723};
1724
1725/* Reset to default packing */
1726
1727#pragma pack()
1728
1729#endif /* __ACTBL2_H__ */
1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2/******************************************************************************
3 *
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *
6 * Copyright (C) 2000 - 2021, Intel Corp.
7 *
8 *****************************************************************************/
9
10#ifndef __ACTBL2_H__
11#define __ACTBL2_H__
12
13/*******************************************************************************
14 *
15 * Additional ACPI Tables (2)
16 *
17 * These tables are not consumed directly by the ACPICA subsystem, but are
18 * included here to support device drivers and the AML disassembler.
19 *
20 ******************************************************************************/
21
22/*
23 * Values for description table header signatures for tables defined in this
24 * file. Useful because they make it more difficult to inadvertently type in
25 * the wrong signature.
26 */
27#define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */
28#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
29#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
30#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
31#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
32#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
33#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
34#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
35#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
36#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
37#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
38#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
39#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
40#define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */
41#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
42#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
43#define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */
44#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
45#define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */
46#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
47#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
48#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
49#define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */
50#define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */
51
52/*
53 * All tables must be byte-packed to match the ACPI specification, since
54 * the tables are provided by the system BIOS.
55 */
56#pragma pack(1)
57
58/*
59 * Note: C bitfields are not used for this reason:
60 *
61 * "Bitfields are great and easy to read, but unfortunately the C language
62 * does not specify the layout of bitfields in memory, which means they are
63 * essentially useless for dealing with packed data in on-disk formats or
64 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
65 * this decision was a design error in C. Ritchie could have picked an order
66 * and stuck with it." Norman Ramsey.
67 * See http://stackoverflow.com/a/1053662/41661
68 */
69
70/*******************************************************************************
71 *
72 * BDAT - BIOS Data ACPI Table
73 *
74 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5
75 * Nov 2020
76 *
77 ******************************************************************************/
78
79struct acpi_table_bdat {
80 struct acpi_table_header header;
81 struct acpi_generic_address gas;
82};
83
84/*******************************************************************************
85 *
86 * IORT - IO Remapping Table
87 *
88 * Conforms to "IO Remapping Table System Software on ARM Platforms",
89 * Document number: ARM DEN 0049E.b, Feb 2021
90 *
91 ******************************************************************************/
92
93struct acpi_table_iort {
94 struct acpi_table_header header;
95 u32 node_count;
96 u32 node_offset;
97 u32 reserved;
98};
99
100/*
101 * IORT subtables
102 */
103struct acpi_iort_node {
104 u8 type;
105 u16 length;
106 u8 revision;
107 u32 identifier;
108 u32 mapping_count;
109 u32 mapping_offset;
110 char node_data[1];
111};
112
113/* Values for subtable Type above */
114
115enum acpi_iort_node_type {
116 ACPI_IORT_NODE_ITS_GROUP = 0x00,
117 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
118 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
119 ACPI_IORT_NODE_SMMU = 0x03,
120 ACPI_IORT_NODE_SMMU_V3 = 0x04,
121 ACPI_IORT_NODE_PMCG = 0x05,
122 ACPI_IORT_NODE_RMR = 0x06,
123};
124
125struct acpi_iort_id_mapping {
126 u32 input_base; /* Lowest value in input range */
127 u32 id_count; /* Number of IDs */
128 u32 output_base; /* Lowest value in output range */
129 u32 output_reference; /* A reference to the output node */
130 u32 flags;
131};
132
133/* Masks for Flags field above for IORT subtable */
134
135#define ACPI_IORT_ID_SINGLE_MAPPING (1)
136
137struct acpi_iort_memory_access {
138 u32 cache_coherency;
139 u8 hints;
140 u16 reserved;
141 u8 memory_flags;
142};
143
144/* Values for cache_coherency field above */
145
146#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
147#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
148
149/* Masks for Hints field above */
150
151#define ACPI_IORT_HT_TRANSIENT (1)
152#define ACPI_IORT_HT_WRITE (1<<1)
153#define ACPI_IORT_HT_READ (1<<2)
154#define ACPI_IORT_HT_OVERRIDE (1<<3)
155
156/* Masks for memory_flags field above */
157
158#define ACPI_IORT_MF_COHERENCY (1)
159#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
160
161/*
162 * IORT node specific subtables
163 */
164struct acpi_iort_its_group {
165 u32 its_count;
166 u32 identifiers[1]; /* GIC ITS identifier array */
167};
168
169struct acpi_iort_named_component {
170 u32 node_flags;
171 u64 memory_properties; /* Memory access properties */
172 u8 memory_address_limit; /* Memory address size limit */
173 char device_name[1]; /* Path of namespace object */
174};
175
176/* Masks for Flags field above */
177
178#define ACPI_IORT_NC_STALL_SUPPORTED (1)
179#define ACPI_IORT_NC_PASID_BITS (31<<1)
180
181struct acpi_iort_root_complex {
182 u64 memory_properties; /* Memory access properties */
183 u32 ats_attribute;
184 u32 pci_segment_number;
185 u8 memory_address_limit; /* Memory address size limit */
186 u8 reserved[3]; /* Reserved, must be zero */
187};
188
189/* Masks for ats_attribute field above */
190
191#define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */
192#define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */
193#define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */
194
195struct acpi_iort_smmu {
196 u64 base_address; /* SMMU base address */
197 u64 span; /* Length of memory range */
198 u32 model;
199 u32 flags;
200 u32 global_interrupt_offset;
201 u32 context_interrupt_count;
202 u32 context_interrupt_offset;
203 u32 pmu_interrupt_count;
204 u32 pmu_interrupt_offset;
205 u64 interrupts[1]; /* Interrupt array */
206};
207
208/* Values for Model field above */
209
210#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
211#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
212#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
213#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
214#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
215#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */
216
217/* Masks for Flags field above */
218
219#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
220#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
221
222/* Global interrupt format */
223
224struct acpi_iort_smmu_gsi {
225 u32 nsg_irpt;
226 u32 nsg_irpt_flags;
227 u32 nsg_cfg_irpt;
228 u32 nsg_cfg_irpt_flags;
229};
230
231struct acpi_iort_smmu_v3 {
232 u64 base_address; /* SMMUv3 base address */
233 u32 flags;
234 u32 reserved;
235 u64 vatos_address;
236 u32 model;
237 u32 event_gsiv;
238 u32 pri_gsiv;
239 u32 gerr_gsiv;
240 u32 sync_gsiv;
241 u32 pxm;
242 u32 id_mapping_index;
243};
244
245/* Values for Model field above */
246
247#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
248#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */
249#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
250
251/* Masks for Flags field above */
252
253#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
254#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
255#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
256
257struct acpi_iort_pmcg {
258 u64 page0_base_address;
259 u32 overflow_gsiv;
260 u32 node_reference;
261 u64 page1_base_address;
262};
263
264struct acpi_iort_rmr {
265 u32 flags;
266 u32 rmr_count;
267 u32 rmr_offset;
268};
269
270struct acpi_iort_rmr_desc {
271 u64 base_address;
272 u64 length;
273 u32 reserved;
274};
275
276/*******************************************************************************
277 *
278 * IVRS - I/O Virtualization Reporting Structure
279 * Version 1
280 *
281 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
282 * Revision 1.26, February 2009.
283 *
284 ******************************************************************************/
285
286struct acpi_table_ivrs {
287 struct acpi_table_header header; /* Common ACPI table header */
288 u32 info; /* Common virtualization info */
289 u64 reserved;
290};
291
292/* Values for Info field above */
293
294#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
295#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
296#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
297
298/* IVRS subtable header */
299
300struct acpi_ivrs_header {
301 u8 type; /* Subtable type */
302 u8 flags;
303 u16 length; /* Subtable length */
304 u16 device_id; /* ID of IOMMU */
305};
306
307/* Values for subtable Type above */
308
309enum acpi_ivrs_type {
310 ACPI_IVRS_TYPE_HARDWARE1 = 0x10,
311 ACPI_IVRS_TYPE_HARDWARE2 = 0x11,
312 ACPI_IVRS_TYPE_HARDWARE3 = 0x40,
313 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
314 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
315 ACPI_IVRS_TYPE_MEMORY3 = 0x22
316};
317
318/* Masks for Flags field above for IVHD subtable */
319
320#define ACPI_IVHD_TT_ENABLE (1)
321#define ACPI_IVHD_PASS_PW (1<<1)
322#define ACPI_IVHD_RES_PASS_PW (1<<2)
323#define ACPI_IVHD_ISOC (1<<3)
324#define ACPI_IVHD_IOTLB (1<<4)
325
326/* Masks for Flags field above for IVMD subtable */
327
328#define ACPI_IVMD_UNITY (1)
329#define ACPI_IVMD_READ (1<<1)
330#define ACPI_IVMD_WRITE (1<<2)
331#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
332
333/*
334 * IVRS subtables, correspond to Type in struct acpi_ivrs_header
335 */
336
337/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
338
339struct acpi_ivrs_hardware_10 {
340 struct acpi_ivrs_header header;
341 u16 capability_offset; /* Offset for IOMMU control fields */
342 u64 base_address; /* IOMMU control registers */
343 u16 pci_segment_group;
344 u16 info; /* MSI number and unit ID */
345 u32 feature_reporting;
346};
347
348/* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */
349
350struct acpi_ivrs_hardware_11 {
351 struct acpi_ivrs_header header;
352 u16 capability_offset; /* Offset for IOMMU control fields */
353 u64 base_address; /* IOMMU control registers */
354 u16 pci_segment_group;
355 u16 info; /* MSI number and unit ID */
356 u32 attributes;
357 u64 efr_register_image;
358 u64 reserved;
359};
360
361/* Masks for Info field above */
362
363#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
364#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */
365
366/*
367 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
368 * Upper two bits of the Type field are the (encoded) length of the structure.
369 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
370 * are reserved for future use but not defined.
371 */
372struct acpi_ivrs_de_header {
373 u8 type;
374 u16 id;
375 u8 data_setting;
376};
377
378/* Length of device entry is in the top two bits of Type field above */
379
380#define ACPI_IVHD_ENTRY_LENGTH 0xC0
381
382/* Values for device entry Type field above */
383
384enum acpi_ivrs_device_entry_type {
385 /* 4-byte device entries, all use struct acpi_ivrs_device4 */
386
387 ACPI_IVRS_TYPE_PAD4 = 0,
388 ACPI_IVRS_TYPE_ALL = 1,
389 ACPI_IVRS_TYPE_SELECT = 2,
390 ACPI_IVRS_TYPE_START = 3,
391 ACPI_IVRS_TYPE_END = 4,
392
393 /* 8-byte device entries */
394
395 ACPI_IVRS_TYPE_PAD8 = 64,
396 ACPI_IVRS_TYPE_NOT_USED = 65,
397 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */
398 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */
399 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
400 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */
401 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */
402
403 /* Variable-length device entries */
404
405 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */
406};
407
408/* Values for Data field above */
409
410#define ACPI_IVHD_INIT_PASS (1)
411#define ACPI_IVHD_EINT_PASS (1<<1)
412#define ACPI_IVHD_NMI_PASS (1<<2)
413#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
414#define ACPI_IVHD_LINT0_PASS (1<<6)
415#define ACPI_IVHD_LINT1_PASS (1<<7)
416
417/* Types 0-4: 4-byte device entry */
418
419struct acpi_ivrs_device4 {
420 struct acpi_ivrs_de_header header;
421};
422
423/* Types 66-67: 8-byte device entry */
424
425struct acpi_ivrs_device8a {
426 struct acpi_ivrs_de_header header;
427 u8 reserved1;
428 u16 used_id;
429 u8 reserved2;
430};
431
432/* Types 70-71: 8-byte device entry */
433
434struct acpi_ivrs_device8b {
435 struct acpi_ivrs_de_header header;
436 u32 extended_data;
437};
438
439/* Values for extended_data above */
440
441#define ACPI_IVHD_ATS_DISABLED (1<<31)
442
443/* Type 72: 8-byte device entry */
444
445struct acpi_ivrs_device8c {
446 struct acpi_ivrs_de_header header;
447 u8 handle;
448 u16 used_id;
449 u8 variety;
450};
451
452/* Values for Variety field above */
453
454#define ACPI_IVHD_IOAPIC 1
455#define ACPI_IVHD_HPET 2
456
457/* Type 240: variable-length device entry */
458
459struct acpi_ivrs_device_hid {
460 struct acpi_ivrs_de_header header;
461 u64 acpi_hid;
462 u64 acpi_cid;
463 u8 uid_type;
464 u8 uid_length;
465};
466
467/* Values for uid_type above */
468
469#define ACPI_IVRS_UID_NOT_PRESENT 0
470#define ACPI_IVRS_UID_IS_INTEGER 1
471#define ACPI_IVRS_UID_IS_STRING 2
472
473/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
474
475struct acpi_ivrs_memory {
476 struct acpi_ivrs_header header;
477 u16 aux_data;
478 u64 reserved;
479 u64 start_address;
480 u64 memory_length;
481};
482
483/*******************************************************************************
484 *
485 * LPIT - Low Power Idle Table
486 *
487 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
488 *
489 ******************************************************************************/
490
491struct acpi_table_lpit {
492 struct acpi_table_header header; /* Common ACPI table header */
493};
494
495/* LPIT subtable header */
496
497struct acpi_lpit_header {
498 u32 type; /* Subtable type */
499 u32 length; /* Subtable length */
500 u16 unique_id;
501 u16 reserved;
502 u32 flags;
503};
504
505/* Values for subtable Type above */
506
507enum acpi_lpit_type {
508 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
509 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
510};
511
512/* Masks for Flags field above */
513
514#define ACPI_LPIT_STATE_DISABLED (1)
515#define ACPI_LPIT_NO_COUNTER (1<<1)
516
517/*
518 * LPIT subtables, correspond to Type in struct acpi_lpit_header
519 */
520
521/* 0x00: Native C-state instruction based LPI structure */
522
523struct acpi_lpit_native {
524 struct acpi_lpit_header header;
525 struct acpi_generic_address entry_trigger;
526 u32 residency;
527 u32 latency;
528 struct acpi_generic_address residency_counter;
529 u64 counter_frequency;
530};
531
532/*******************************************************************************
533 *
534 * MADT - Multiple APIC Description Table
535 * Version 3
536 *
537 ******************************************************************************/
538
539struct acpi_table_madt {
540 struct acpi_table_header header; /* Common ACPI table header */
541 u32 address; /* Physical address of local APIC */
542 u32 flags;
543};
544
545/* Masks for Flags field above */
546
547#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
548
549/* Values for PCATCompat flag */
550
551#define ACPI_MADT_DUAL_PIC 1
552#define ACPI_MADT_MULTIPLE_APIC 0
553
554/* Values for MADT subtable type in struct acpi_subtable_header */
555
556enum acpi_madt_type {
557 ACPI_MADT_TYPE_LOCAL_APIC = 0,
558 ACPI_MADT_TYPE_IO_APIC = 1,
559 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
560 ACPI_MADT_TYPE_NMI_SOURCE = 3,
561 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
562 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
563 ACPI_MADT_TYPE_IO_SAPIC = 6,
564 ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
565 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
566 ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
567 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
568 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
569 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
570 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
571 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
572 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
573 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16,
574 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */
575};
576
577/*
578 * MADT Subtables, correspond to Type in struct acpi_subtable_header
579 */
580
581/* 0: Processor Local APIC */
582
583struct acpi_madt_local_apic {
584 struct acpi_subtable_header header;
585 u8 processor_id; /* ACPI processor id */
586 u8 id; /* Processor's local APIC id */
587 u32 lapic_flags;
588};
589
590/* 1: IO APIC */
591
592struct acpi_madt_io_apic {
593 struct acpi_subtable_header header;
594 u8 id; /* I/O APIC ID */
595 u8 reserved; /* reserved - must be zero */
596 u32 address; /* APIC physical address */
597 u32 global_irq_base; /* Global system interrupt where INTI lines start */
598};
599
600/* 2: Interrupt Override */
601
602struct acpi_madt_interrupt_override {
603 struct acpi_subtable_header header;
604 u8 bus; /* 0 - ISA */
605 u8 source_irq; /* Interrupt source (IRQ) */
606 u32 global_irq; /* Global system interrupt */
607 u16 inti_flags;
608};
609
610/* 3: NMI Source */
611
612struct acpi_madt_nmi_source {
613 struct acpi_subtable_header header;
614 u16 inti_flags;
615 u32 global_irq; /* Global system interrupt */
616};
617
618/* 4: Local APIC NMI */
619
620struct acpi_madt_local_apic_nmi {
621 struct acpi_subtable_header header;
622 u8 processor_id; /* ACPI processor id */
623 u16 inti_flags;
624 u8 lint; /* LINTn to which NMI is connected */
625};
626
627/* 5: Address Override */
628
629struct acpi_madt_local_apic_override {
630 struct acpi_subtable_header header;
631 u16 reserved; /* Reserved, must be zero */
632 u64 address; /* APIC physical address */
633};
634
635/* 6: I/O Sapic */
636
637struct acpi_madt_io_sapic {
638 struct acpi_subtable_header header;
639 u8 id; /* I/O SAPIC ID */
640 u8 reserved; /* Reserved, must be zero */
641 u32 global_irq_base; /* Global interrupt for SAPIC start */
642 u64 address; /* SAPIC physical address */
643};
644
645/* 7: Local Sapic */
646
647struct acpi_madt_local_sapic {
648 struct acpi_subtable_header header;
649 u8 processor_id; /* ACPI processor id */
650 u8 id; /* SAPIC ID */
651 u8 eid; /* SAPIC EID */
652 u8 reserved[3]; /* Reserved, must be zero */
653 u32 lapic_flags;
654 u32 uid; /* Numeric UID - ACPI 3.0 */
655 char uid_string[1]; /* String UID - ACPI 3.0 */
656};
657
658/* 8: Platform Interrupt Source */
659
660struct acpi_madt_interrupt_source {
661 struct acpi_subtable_header header;
662 u16 inti_flags;
663 u8 type; /* 1=PMI, 2=INIT, 3=corrected */
664 u8 id; /* Processor ID */
665 u8 eid; /* Processor EID */
666 u8 io_sapic_vector; /* Vector value for PMI interrupts */
667 u32 global_irq; /* Global system interrupt */
668 u32 flags; /* Interrupt Source Flags */
669};
670
671/* Masks for Flags field above */
672
673#define ACPI_MADT_CPEI_OVERRIDE (1)
674
675/* 9: Processor Local X2APIC (ACPI 4.0) */
676
677struct acpi_madt_local_x2apic {
678 struct acpi_subtable_header header;
679 u16 reserved; /* reserved - must be zero */
680 u32 local_apic_id; /* Processor x2APIC ID */
681 u32 lapic_flags;
682 u32 uid; /* ACPI processor UID */
683};
684
685/* 10: Local X2APIC NMI (ACPI 4.0) */
686
687struct acpi_madt_local_x2apic_nmi {
688 struct acpi_subtable_header header;
689 u16 inti_flags;
690 u32 uid; /* ACPI processor UID */
691 u8 lint; /* LINTn to which NMI is connected */
692 u8 reserved[3]; /* reserved - must be zero */
693};
694
695/* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */
696
697struct acpi_madt_generic_interrupt {
698 struct acpi_subtable_header header;
699 u16 reserved; /* reserved - must be zero */
700 u32 cpu_interface_number;
701 u32 uid;
702 u32 flags;
703 u32 parking_version;
704 u32 performance_interrupt;
705 u64 parked_address;
706 u64 base_address;
707 u64 gicv_base_address;
708 u64 gich_base_address;
709 u32 vgic_interrupt;
710 u64 gicr_base_address;
711 u64 arm_mpidr;
712 u8 efficiency_class;
713 u8 reserved2[1];
714 u16 spe_interrupt; /* ACPI 6.3 */
715};
716
717/* Masks for Flags field above */
718
719/* ACPI_MADT_ENABLED (1) Processor is usable if set */
720#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
721#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
722
723/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
724
725struct acpi_madt_generic_distributor {
726 struct acpi_subtable_header header;
727 u16 reserved; /* reserved - must be zero */
728 u32 gic_id;
729 u64 base_address;
730 u32 global_irq_base;
731 u8 version;
732 u8 reserved2[3]; /* reserved - must be zero */
733};
734
735/* Values for Version field above */
736
737enum acpi_madt_gic_version {
738 ACPI_MADT_GIC_VERSION_NONE = 0,
739 ACPI_MADT_GIC_VERSION_V1 = 1,
740 ACPI_MADT_GIC_VERSION_V2 = 2,
741 ACPI_MADT_GIC_VERSION_V3 = 3,
742 ACPI_MADT_GIC_VERSION_V4 = 4,
743 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
744};
745
746/* 13: Generic MSI Frame (ACPI 5.1) */
747
748struct acpi_madt_generic_msi_frame {
749 struct acpi_subtable_header header;
750 u16 reserved; /* reserved - must be zero */
751 u32 msi_frame_id;
752 u64 base_address;
753 u32 flags;
754 u16 spi_count;
755 u16 spi_base;
756};
757
758/* Masks for Flags field above */
759
760#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
761
762/* 14: Generic Redistributor (ACPI 5.1) */
763
764struct acpi_madt_generic_redistributor {
765 struct acpi_subtable_header header;
766 u16 reserved; /* reserved - must be zero */
767 u64 base_address;
768 u32 length;
769};
770
771/* 15: Generic Translator (ACPI 6.0) */
772
773struct acpi_madt_generic_translator {
774 struct acpi_subtable_header header;
775 u16 reserved; /* reserved - must be zero */
776 u32 translation_id;
777 u64 base_address;
778 u32 reserved2;
779};
780
781/* 16: Multiprocessor wakeup (ACPI 6.4) */
782
783struct acpi_madt_multiproc_wakeup {
784 struct acpi_subtable_header header;
785 u16 mailbox_version;
786 u32 reserved; /* reserved - must be zero */
787 u64 base_address;
788};
789
790#define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032
791#define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048
792
793struct acpi_madt_multiproc_wakeup_mailbox {
794 u16 command;
795 u16 reserved; /* reserved - must be zero */
796 u32 apic_id;
797 u64 wakeup_vector;
798 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */
799 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */
800};
801
802#define ACPI_MP_WAKE_COMMAND_WAKEUP 1
803
804/*
805 * Common flags fields for MADT subtables
806 */
807
808/* MADT Local APIC flags */
809
810#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
811
812/* MADT MPS INTI flags (inti_flags) */
813
814#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
815#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
816
817/* Values for MPS INTI flags */
818
819#define ACPI_MADT_POLARITY_CONFORMS 0
820#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
821#define ACPI_MADT_POLARITY_RESERVED 2
822#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
823
824#define ACPI_MADT_TRIGGER_CONFORMS (0)
825#define ACPI_MADT_TRIGGER_EDGE (1<<2)
826#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
827#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
828
829/*******************************************************************************
830 *
831 * MCFG - PCI Memory Mapped Configuration table and subtable
832 * Version 1
833 *
834 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
835 *
836 ******************************************************************************/
837
838struct acpi_table_mcfg {
839 struct acpi_table_header header; /* Common ACPI table header */
840 u8 reserved[8];
841};
842
843/* Subtable */
844
845struct acpi_mcfg_allocation {
846 u64 address; /* Base address, processor-relative */
847 u16 pci_segment; /* PCI segment group number */
848 u8 start_bus_number; /* Starting PCI Bus number */
849 u8 end_bus_number; /* Final PCI Bus number */
850 u32 reserved;
851};
852
853/*******************************************************************************
854 *
855 * MCHI - Management Controller Host Interface Table
856 * Version 1
857 *
858 * Conforms to "Management Component Transport Protocol (MCTP) Host
859 * Interface Specification", Revision 1.0.0a, October 13, 2009
860 *
861 ******************************************************************************/
862
863struct acpi_table_mchi {
864 struct acpi_table_header header; /* Common ACPI table header */
865 u8 interface_type;
866 u8 protocol;
867 u64 protocol_data;
868 u8 interrupt_type;
869 u8 gpe;
870 u8 pci_device_flag;
871 u32 global_interrupt;
872 struct acpi_generic_address control_register;
873 u8 pci_segment;
874 u8 pci_bus;
875 u8 pci_device;
876 u8 pci_function;
877};
878
879/*******************************************************************************
880 *
881 * MPST - Memory Power State Table (ACPI 5.0)
882 * Version 1
883 *
884 ******************************************************************************/
885
886#define ACPI_MPST_CHANNEL_INFO \
887 u8 channel_id; \
888 u8 reserved1[3]; \
889 u16 power_node_count; \
890 u16 reserved2;
891
892/* Main table */
893
894struct acpi_table_mpst {
895 struct acpi_table_header header; /* Common ACPI table header */
896 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
897};
898
899/* Memory Platform Communication Channel Info */
900
901struct acpi_mpst_channel {
902 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
903};
904
905/* Memory Power Node Structure */
906
907struct acpi_mpst_power_node {
908 u8 flags;
909 u8 reserved1;
910 u16 node_id;
911 u32 length;
912 u64 range_address;
913 u64 range_length;
914 u32 num_power_states;
915 u32 num_physical_components;
916};
917
918/* Values for Flags field above */
919
920#define ACPI_MPST_ENABLED 1
921#define ACPI_MPST_POWER_MANAGED 2
922#define ACPI_MPST_HOT_PLUG_CAPABLE 4
923
924/* Memory Power State Structure (follows POWER_NODE above) */
925
926struct acpi_mpst_power_state {
927 u8 power_state;
928 u8 info_index;
929};
930
931/* Physical Component ID Structure (follows POWER_STATE above) */
932
933struct acpi_mpst_component {
934 u16 component_id;
935};
936
937/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
938
939struct acpi_mpst_data_hdr {
940 u16 characteristics_count;
941 u16 reserved;
942};
943
944struct acpi_mpst_power_data {
945 u8 structure_id;
946 u8 flags;
947 u16 reserved1;
948 u32 average_power;
949 u32 power_saving;
950 u64 exit_latency;
951 u64 reserved2;
952};
953
954/* Values for Flags field above */
955
956#define ACPI_MPST_PRESERVE 1
957#define ACPI_MPST_AUTOENTRY 2
958#define ACPI_MPST_AUTOEXIT 4
959
960/* Shared Memory Region (not part of an ACPI table) */
961
962struct acpi_mpst_shared {
963 u32 signature;
964 u16 pcc_command;
965 u16 pcc_status;
966 u32 command_register;
967 u32 status_register;
968 u32 power_state_id;
969 u32 power_node_id;
970 u64 energy_consumed;
971 u64 average_power;
972};
973
974/*******************************************************************************
975 *
976 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
977 * Version 1
978 *
979 ******************************************************************************/
980
981struct acpi_table_msct {
982 struct acpi_table_header header; /* Common ACPI table header */
983 u32 proximity_offset; /* Location of proximity info struct(s) */
984 u32 max_proximity_domains; /* Max number of proximity domains */
985 u32 max_clock_domains; /* Max number of clock domains */
986 u64 max_address; /* Max physical address in system */
987};
988
989/* subtable - Maximum Proximity Domain Information. Version 1 */
990
991struct acpi_msct_proximity {
992 u8 revision;
993 u8 length;
994 u32 range_start; /* Start of domain range */
995 u32 range_end; /* End of domain range */
996 u32 processor_capacity;
997 u64 memory_capacity; /* In bytes */
998};
999
1000/*******************************************************************************
1001 *
1002 * MSDM - Microsoft Data Management table
1003 *
1004 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1005 * November 29, 2011. Copyright 2011 Microsoft
1006 *
1007 ******************************************************************************/
1008
1009/* Basic MSDM table is only the common ACPI header */
1010
1011struct acpi_table_msdm {
1012 struct acpi_table_header header; /* Common ACPI table header */
1013};
1014
1015/*******************************************************************************
1016 *
1017 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1018 * Version 1
1019 *
1020 ******************************************************************************/
1021
1022struct acpi_table_nfit {
1023 struct acpi_table_header header; /* Common ACPI table header */
1024 u32 reserved; /* Reserved, must be zero */
1025};
1026
1027/* Subtable header for NFIT */
1028
1029struct acpi_nfit_header {
1030 u16 type;
1031 u16 length;
1032};
1033
1034/* Values for subtable type in struct acpi_nfit_header */
1035
1036enum acpi_nfit_type {
1037 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
1038 ACPI_NFIT_TYPE_MEMORY_MAP = 1,
1039 ACPI_NFIT_TYPE_INTERLEAVE = 2,
1040 ACPI_NFIT_TYPE_SMBIOS = 3,
1041 ACPI_NFIT_TYPE_CONTROL_REGION = 4,
1042 ACPI_NFIT_TYPE_DATA_REGION = 5,
1043 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
1044 ACPI_NFIT_TYPE_CAPABILITIES = 7,
1045 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
1046};
1047
1048/*
1049 * NFIT Subtables
1050 */
1051
1052/* 0: System Physical Address Range Structure */
1053
1054struct acpi_nfit_system_address {
1055 struct acpi_nfit_header header;
1056 u16 range_index;
1057 u16 flags;
1058 u32 reserved; /* Reserved, must be zero */
1059 u32 proximity_domain;
1060 u8 range_guid[16];
1061 u64 address;
1062 u64 length;
1063 u64 memory_mapping;
1064 u64 location_cookie; /* ACPI 6.4 */
1065};
1066
1067/* Flags */
1068
1069#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1070#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1071#define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */
1072
1073/* Range Type GUIDs appear in the include/acuuid.h file */
1074
1075/* 1: Memory Device to System Address Range Map Structure */
1076
1077struct acpi_nfit_memory_map {
1078 struct acpi_nfit_header header;
1079 u32 device_handle;
1080 u16 physical_id;
1081 u16 region_id;
1082 u16 range_index;
1083 u16 region_index;
1084 u64 region_size;
1085 u64 region_offset;
1086 u64 address;
1087 u16 interleave_index;
1088 u16 interleave_ways;
1089 u16 flags;
1090 u16 reserved; /* Reserved, must be zero */
1091};
1092
1093/* Flags */
1094
1095#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1096#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1097#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1098#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1099#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1100#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1101#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1102
1103/* 2: Interleave Structure */
1104
1105struct acpi_nfit_interleave {
1106 struct acpi_nfit_header header;
1107 u16 interleave_index;
1108 u16 reserved; /* Reserved, must be zero */
1109 u32 line_count;
1110 u32 line_size;
1111 u32 line_offset[1]; /* Variable length */
1112};
1113
1114/* 3: SMBIOS Management Information Structure */
1115
1116struct acpi_nfit_smbios {
1117 struct acpi_nfit_header header;
1118 u32 reserved; /* Reserved, must be zero */
1119 u8 data[1]; /* Variable length */
1120};
1121
1122/* 4: NVDIMM Control Region Structure */
1123
1124struct acpi_nfit_control_region {
1125 struct acpi_nfit_header header;
1126 u16 region_index;
1127 u16 vendor_id;
1128 u16 device_id;
1129 u16 revision_id;
1130 u16 subsystem_vendor_id;
1131 u16 subsystem_device_id;
1132 u16 subsystem_revision_id;
1133 u8 valid_fields;
1134 u8 manufacturing_location;
1135 u16 manufacturing_date;
1136 u8 reserved[2]; /* Reserved, must be zero */
1137 u32 serial_number;
1138 u16 code;
1139 u16 windows;
1140 u64 window_size;
1141 u64 command_offset;
1142 u64 command_size;
1143 u64 status_offset;
1144 u64 status_size;
1145 u16 flags;
1146 u8 reserved1[6]; /* Reserved, must be zero */
1147};
1148
1149/* Flags */
1150
1151#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1152
1153/* valid_fields bits */
1154
1155#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1156
1157/* 5: NVDIMM Block Data Window Region Structure */
1158
1159struct acpi_nfit_data_region {
1160 struct acpi_nfit_header header;
1161 u16 region_index;
1162 u16 windows;
1163 u64 offset;
1164 u64 size;
1165 u64 capacity;
1166 u64 start_address;
1167};
1168
1169/* 6: Flush Hint Address Structure */
1170
1171struct acpi_nfit_flush_address {
1172 struct acpi_nfit_header header;
1173 u32 device_handle;
1174 u16 hint_count;
1175 u8 reserved[6]; /* Reserved, must be zero */
1176 u64 hint_address[1]; /* Variable length */
1177};
1178
1179/* 7: Platform Capabilities Structure */
1180
1181struct acpi_nfit_capabilities {
1182 struct acpi_nfit_header header;
1183 u8 highest_capability;
1184 u8 reserved[3]; /* Reserved, must be zero */
1185 u32 capabilities;
1186 u32 reserved2;
1187};
1188
1189/* Capabilities Flags */
1190
1191#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1192#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1193#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1194
1195/*
1196 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1197 */
1198struct nfit_device_handle {
1199 u32 handle;
1200};
1201
1202/* Device handle construction and extraction macros */
1203
1204#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1205#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1206#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1207#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1208#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1209
1210#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1211#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1212#define ACPI_NFIT_MEMORY_ID_OFFSET 8
1213#define ACPI_NFIT_SOCKET_ID_OFFSET 12
1214#define ACPI_NFIT_NODE_ID_OFFSET 16
1215
1216/* Macro to construct a NFIT/NVDIMM device handle */
1217
1218#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1219 ((dimm) | \
1220 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1221 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1222 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1223 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1224
1225/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1226
1227#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1228 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1229
1230#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1231 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1232
1233#define ACPI_NFIT_GET_MEMORY_ID(handle) \
1234 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1235
1236#define ACPI_NFIT_GET_SOCKET_ID(handle) \
1237 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1238
1239#define ACPI_NFIT_GET_NODE_ID(handle) \
1240 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1241
1242/*******************************************************************************
1243 *
1244 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1245 * Version 2 (ACPI 6.2)
1246 *
1247 ******************************************************************************/
1248
1249struct acpi_table_pcct {
1250 struct acpi_table_header header; /* Common ACPI table header */
1251 u32 flags;
1252 u64 reserved;
1253};
1254
1255/* Values for Flags field above */
1256
1257#define ACPI_PCCT_DOORBELL 1
1258
1259/* Values for subtable type in struct acpi_subtable_header */
1260
1261enum acpi_pcct_type {
1262 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1263 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1264 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
1265 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
1266 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
1267 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */
1268 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1269};
1270
1271/*
1272 * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1273 */
1274
1275/* 0: Generic Communications Subspace */
1276
1277struct acpi_pcct_subspace {
1278 struct acpi_subtable_header header;
1279 u8 reserved[6];
1280 u64 base_address;
1281 u64 length;
1282 struct acpi_generic_address doorbell_register;
1283 u64 preserve_mask;
1284 u64 write_mask;
1285 u32 latency;
1286 u32 max_access_rate;
1287 u16 min_turnaround_time;
1288};
1289
1290/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1291
1292struct acpi_pcct_hw_reduced {
1293 struct acpi_subtable_header header;
1294 u32 platform_interrupt;
1295 u8 flags;
1296 u8 reserved;
1297 u64 base_address;
1298 u64 length;
1299 struct acpi_generic_address doorbell_register;
1300 u64 preserve_mask;
1301 u64 write_mask;
1302 u32 latency;
1303 u32 max_access_rate;
1304 u16 min_turnaround_time;
1305};
1306
1307/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1308
1309struct acpi_pcct_hw_reduced_type2 {
1310 struct acpi_subtable_header header;
1311 u32 platform_interrupt;
1312 u8 flags;
1313 u8 reserved;
1314 u64 base_address;
1315 u64 length;
1316 struct acpi_generic_address doorbell_register;
1317 u64 preserve_mask;
1318 u64 write_mask;
1319 u32 latency;
1320 u32 max_access_rate;
1321 u16 min_turnaround_time;
1322 struct acpi_generic_address platform_ack_register;
1323 u64 ack_preserve_mask;
1324 u64 ack_write_mask;
1325};
1326
1327/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1328
1329struct acpi_pcct_ext_pcc_master {
1330 struct acpi_subtable_header header;
1331 u32 platform_interrupt;
1332 u8 flags;
1333 u8 reserved1;
1334 u64 base_address;
1335 u32 length;
1336 struct acpi_generic_address doorbell_register;
1337 u64 preserve_mask;
1338 u64 write_mask;
1339 u32 latency;
1340 u32 max_access_rate;
1341 u32 min_turnaround_time;
1342 struct acpi_generic_address platform_ack_register;
1343 u64 ack_preserve_mask;
1344 u64 ack_set_mask;
1345 u64 reserved2;
1346 struct acpi_generic_address cmd_complete_register;
1347 u64 cmd_complete_mask;
1348 struct acpi_generic_address cmd_update_register;
1349 u64 cmd_update_preserve_mask;
1350 u64 cmd_update_set_mask;
1351 struct acpi_generic_address error_status_register;
1352 u64 error_status_mask;
1353};
1354
1355/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1356
1357struct acpi_pcct_ext_pcc_slave {
1358 struct acpi_subtable_header header;
1359 u32 platform_interrupt;
1360 u8 flags;
1361 u8 reserved1;
1362 u64 base_address;
1363 u32 length;
1364 struct acpi_generic_address doorbell_register;
1365 u64 preserve_mask;
1366 u64 write_mask;
1367 u32 latency;
1368 u32 max_access_rate;
1369 u32 min_turnaround_time;
1370 struct acpi_generic_address platform_ack_register;
1371 u64 ack_preserve_mask;
1372 u64 ack_set_mask;
1373 u64 reserved2;
1374 struct acpi_generic_address cmd_complete_register;
1375 u64 cmd_complete_mask;
1376 struct acpi_generic_address cmd_update_register;
1377 u64 cmd_update_preserve_mask;
1378 u64 cmd_update_set_mask;
1379 struct acpi_generic_address error_status_register;
1380 u64 error_status_mask;
1381};
1382
1383/* 5: HW Registers based Communications Subspace */
1384
1385struct acpi_pcct_hw_reg {
1386 struct acpi_subtable_header header;
1387 u16 version;
1388 u64 base_address;
1389 u64 length;
1390 struct acpi_generic_address doorbell_register;
1391 u64 doorbell_preserve;
1392 u64 doorbell_write;
1393 struct acpi_generic_address cmd_complete_register;
1394 u64 cmd_complete_mask;
1395 struct acpi_generic_address error_status_register;
1396 u64 error_status_mask;
1397 u32 nominal_latency;
1398 u32 min_turnaround_time;
1399};
1400
1401/* Values for doorbell flags above */
1402
1403#define ACPI_PCCT_INTERRUPT_POLARITY (1)
1404#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1405
1406/*
1407 * PCC memory structures (not part of the ACPI table)
1408 */
1409
1410/* Shared Memory Region */
1411
1412struct acpi_pcct_shared_memory {
1413 u32 signature;
1414 u16 command;
1415 u16 status;
1416};
1417
1418/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1419
1420struct acpi_pcct_ext_pcc_shared_memory {
1421 u32 signature;
1422 u32 flags;
1423 u32 length;
1424 u32 command;
1425};
1426
1427/*******************************************************************************
1428 *
1429 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1430 * Version 0
1431 *
1432 ******************************************************************************/
1433
1434struct acpi_table_pdtt {
1435 struct acpi_table_header header; /* Common ACPI table header */
1436 u8 trigger_count;
1437 u8 reserved[3];
1438 u32 array_offset;
1439};
1440
1441/*
1442 * PDTT Communication Channel Identifier Structure.
1443 * The number of these structures is defined by trigger_count above,
1444 * starting at array_offset.
1445 */
1446struct acpi_pdtt_channel {
1447 u8 subchannel_id;
1448 u8 flags;
1449};
1450
1451/* Flags for above */
1452
1453#define ACPI_PDTT_RUNTIME_TRIGGER (1)
1454#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1455#define ACPI_PDTT_TRIGGER_ORDER (1<<2)
1456
1457/*******************************************************************************
1458 *
1459 * PHAT - Platform Health Assessment Table (ACPI 6.4)
1460 * Version 1
1461 *
1462 ******************************************************************************/
1463
1464struct acpi_table_phat {
1465 struct acpi_table_header header; /* Common ACPI table header */
1466};
1467
1468/* Common header for PHAT subtables that follow main table */
1469
1470struct acpi_phat_header {
1471 u16 type;
1472 u16 length;
1473 u8 revision;
1474};
1475
1476/* Values for Type field above */
1477
1478#define ACPI_PHAT_TYPE_FW_VERSION_DATA 0
1479#define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1
1480#define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */
1481
1482/*
1483 * PHAT subtables, correspond to Type in struct acpi_phat_header
1484 */
1485
1486/* 0: Firmware Version Data Record */
1487
1488struct acpi_phat_version_data {
1489 struct acpi_phat_header header;
1490 u8 reserved[3];
1491 u32 element_count;
1492};
1493
1494struct acpi_phat_version_element {
1495 u8 guid[16];
1496 u64 version_value;
1497 u32 producer_id;
1498};
1499
1500/* 1: Firmware Health Data Record */
1501
1502struct acpi_phat_health_data {
1503 struct acpi_phat_header header;
1504 u8 reserved[2];
1505 u8 health;
1506 u8 device_guid[16];
1507 u32 device_specific_offset; /* Zero if no Device-specific data */
1508};
1509
1510/* Values for Health field above */
1511
1512#define ACPI_PHAT_ERRORS_FOUND 0
1513#define ACPI_PHAT_NO_ERRORS 1
1514#define ACPI_PHAT_UNKNOWN_ERRORS 2
1515#define ACPI_PHAT_ADVISORY 3
1516
1517/*******************************************************************************
1518 *
1519 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1520 * Version 1
1521 *
1522 ******************************************************************************/
1523
1524struct acpi_table_pmtt {
1525 struct acpi_table_header header; /* Common ACPI table header */
1526 u32 memory_device_count;
1527 /*
1528 * Immediately followed by:
1529 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1530 */
1531};
1532
1533/* Common header for PMTT subtables that follow main table */
1534
1535struct acpi_pmtt_header {
1536 u8 type;
1537 u8 reserved1;
1538 u16 length;
1539 u16 flags;
1540 u16 reserved2;
1541 u32 memory_device_count; /* Zero means no memory device structs follow */
1542 /*
1543 * Immediately followed by:
1544 * u8 type_specific_data[]
1545 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1546 */
1547};
1548
1549/* Values for Type field above */
1550
1551#define ACPI_PMTT_TYPE_SOCKET 0
1552#define ACPI_PMTT_TYPE_CONTROLLER 1
1553#define ACPI_PMTT_TYPE_DIMM 2
1554#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */
1555#define ACPI_PMTT_TYPE_VENDOR 0xFF
1556
1557/* Values for Flags field above */
1558
1559#define ACPI_PMTT_TOP_LEVEL 0x0001
1560#define ACPI_PMTT_PHYSICAL 0x0002
1561#define ACPI_PMTT_MEMORY_TYPE 0x000C
1562
1563/*
1564 * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1565 */
1566
1567/* 0: Socket Structure */
1568
1569struct acpi_pmtt_socket {
1570 struct acpi_pmtt_header header;
1571 u16 socket_id;
1572 u16 reserved;
1573};
1574 /*
1575 * Immediately followed by:
1576 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1577 */
1578
1579/* 1: Memory Controller subtable */
1580
1581struct acpi_pmtt_controller {
1582 struct acpi_pmtt_header header;
1583 u16 controller_id;
1584 u16 reserved;
1585};
1586 /*
1587 * Immediately followed by:
1588 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1589 */
1590
1591/* 2: Physical Component Identifier (DIMM) */
1592
1593struct acpi_pmtt_physical_component {
1594 struct acpi_pmtt_header header;
1595 u32 bios_handle;
1596};
1597
1598/* 0xFF: Vendor Specific Data */
1599
1600struct acpi_pmtt_vendor_specific {
1601 struct acpi_pmtt_header header;
1602 u8 type_uuid[16];
1603 u8 specific[];
1604 /*
1605 * Immediately followed by:
1606 * u8 vendor_specific_data[];
1607 * MEMORY_DEVICE memory_device_struct[memory_device_count];
1608 */
1609};
1610
1611/*******************************************************************************
1612 *
1613 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1614 * Version 1
1615 *
1616 ******************************************************************************/
1617
1618struct acpi_table_pptt {
1619 struct acpi_table_header header; /* Common ACPI table header */
1620};
1621
1622/* Values for Type field above */
1623
1624enum acpi_pptt_type {
1625 ACPI_PPTT_TYPE_PROCESSOR = 0,
1626 ACPI_PPTT_TYPE_CACHE = 1,
1627 ACPI_PPTT_TYPE_ID = 2,
1628 ACPI_PPTT_TYPE_RESERVED = 3
1629};
1630
1631/* 0: Processor Hierarchy Node Structure */
1632
1633struct acpi_pptt_processor {
1634 struct acpi_subtable_header header;
1635 u16 reserved;
1636 u32 flags;
1637 u32 parent;
1638 u32 acpi_processor_id;
1639 u32 number_of_priv_resources;
1640};
1641
1642/* Flags */
1643
1644#define ACPI_PPTT_PHYSICAL_PACKAGE (1)
1645#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1)
1646#define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */
1647#define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */
1648#define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */
1649
1650/* 1: Cache Type Structure */
1651
1652struct acpi_pptt_cache {
1653 struct acpi_subtable_header header;
1654 u16 reserved;
1655 u32 flags;
1656 u32 next_level_of_cache;
1657 u32 size;
1658 u32 number_of_sets;
1659 u8 associativity;
1660 u8 attributes;
1661 u16 line_size;
1662};
1663
1664/* 1: Cache Type Structure for PPTT version 3 */
1665
1666struct acpi_pptt_cache_v1 {
1667 u32 cache_id;
1668};
1669
1670/* Flags */
1671
1672#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1673#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1674#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1675#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1676#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1677#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1678#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1679#define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */
1680
1681/* Masks for Attributes */
1682
1683#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1684#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1685#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1686
1687/* Attributes describing cache */
1688#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1689#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1690#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1691#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1692
1693#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1694#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1695#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1696#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1697
1698#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1699#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1700
1701/* 2: ID Structure */
1702
1703struct acpi_pptt_id {
1704 struct acpi_subtable_header header;
1705 u16 reserved;
1706 u32 vendor_id;
1707 u64 level1_id;
1708 u64 level2_id;
1709 u16 major_rev;
1710 u16 minor_rev;
1711 u16 spin_rev;
1712};
1713
1714/*******************************************************************************
1715 *
1716 * PRMT - Platform Runtime Mechanism Table
1717 * Version 1
1718 *
1719 ******************************************************************************/
1720
1721struct acpi_table_prmt {
1722 struct acpi_table_header header; /* Common ACPI table header */
1723};
1724
1725struct acpi_table_prmt_header {
1726 u8 platform_guid[16];
1727 u32 module_info_offset;
1728 u32 module_info_count;
1729};
1730
1731struct acpi_prmt_module_header {
1732 u16 revision;
1733 u16 length;
1734};
1735
1736struct acpi_prmt_module_info {
1737 u16 revision;
1738 u16 length;
1739 u8 module_guid[16];
1740 u16 major_rev;
1741 u16 minor_rev;
1742 u16 handler_info_count;
1743 u32 handler_info_offset;
1744 u64 mmio_list_pointer;
1745};
1746
1747struct acpi_prmt_handler_info {
1748 u16 revision;
1749 u16 length;
1750 u8 handler_guid[16];
1751 u64 handler_address;
1752 u64 static_data_buffer_address;
1753 u64 acpi_param_buffer_address;
1754};
1755
1756/*******************************************************************************
1757 *
1758 * RASF - RAS Feature Table (ACPI 5.0)
1759 * Version 1
1760 *
1761 ******************************************************************************/
1762
1763struct acpi_table_rasf {
1764 struct acpi_table_header header; /* Common ACPI table header */
1765 u8 channel_id[12];
1766};
1767
1768/* RASF Platform Communication Channel Shared Memory Region */
1769
1770struct acpi_rasf_shared_memory {
1771 u32 signature;
1772 u16 command;
1773 u16 status;
1774 u16 version;
1775 u8 capabilities[16];
1776 u8 set_capabilities[16];
1777 u16 num_parameter_blocks;
1778 u32 set_capabilities_status;
1779};
1780
1781/* RASF Parameter Block Structure Header */
1782
1783struct acpi_rasf_parameter_block {
1784 u16 type;
1785 u16 version;
1786 u16 length;
1787};
1788
1789/* RASF Parameter Block Structure for PATROL_SCRUB */
1790
1791struct acpi_rasf_patrol_scrub_parameter {
1792 struct acpi_rasf_parameter_block header;
1793 u16 patrol_scrub_command;
1794 u64 requested_address_range[2];
1795 u64 actual_address_range[2];
1796 u16 flags;
1797 u8 requested_speed;
1798};
1799
1800/* Masks for Flags and Speed fields above */
1801
1802#define ACPI_RASF_SCRUBBER_RUNNING 1
1803#define ACPI_RASF_SPEED (7<<1)
1804#define ACPI_RASF_SPEED_SLOW (0<<1)
1805#define ACPI_RASF_SPEED_MEDIUM (4<<1)
1806#define ACPI_RASF_SPEED_FAST (7<<1)
1807
1808/* Channel Commands */
1809
1810enum acpi_rasf_commands {
1811 ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1812};
1813
1814/* Platform RAS Capabilities */
1815
1816enum acpi_rasf_capabiliities {
1817 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1818 ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1819};
1820
1821/* Patrol Scrub Commands */
1822
1823enum acpi_rasf_patrol_scrub_commands {
1824 ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1825 ACPI_RASF_START_PATROL_SCRUBBER = 2,
1826 ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1827};
1828
1829/* Channel Command flags */
1830
1831#define ACPI_RASF_GENERATE_SCI (1<<15)
1832
1833/* Status values */
1834
1835enum acpi_rasf_status {
1836 ACPI_RASF_SUCCESS = 0,
1837 ACPI_RASF_NOT_VALID = 1,
1838 ACPI_RASF_NOT_SUPPORTED = 2,
1839 ACPI_RASF_BUSY = 3,
1840 ACPI_RASF_FAILED = 4,
1841 ACPI_RASF_ABORTED = 5,
1842 ACPI_RASF_INVALID_DATA = 6
1843};
1844
1845/* Status flags */
1846
1847#define ACPI_RASF_COMMAND_COMPLETE (1)
1848#define ACPI_RASF_SCI_DOORBELL (1<<1)
1849#define ACPI_RASF_ERROR (1<<2)
1850#define ACPI_RASF_STATUS (0x1F<<3)
1851
1852/*******************************************************************************
1853 *
1854 * RGRT - Regulatory Graphics Resource Table
1855 * Version 1
1856 *
1857 * Conforms to "ACPI RGRT" available at:
1858 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/
1859 *
1860 ******************************************************************************/
1861
1862struct acpi_table_rgrt {
1863 struct acpi_table_header header; /* Common ACPI table header */
1864 u16 version;
1865 u8 image_type;
1866 u8 reserved;
1867 u8 image[0];
1868};
1869
1870/* image_type values */
1871
1872enum acpi_rgrt_image_type {
1873 ACPI_RGRT_TYPE_RESERVED0 = 0,
1874 ACPI_RGRT_IMAGE_TYPE_PNG = 1,
1875 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1876};
1877
1878/*******************************************************************************
1879 *
1880 * SBST - Smart Battery Specification Table
1881 * Version 1
1882 *
1883 ******************************************************************************/
1884
1885struct acpi_table_sbst {
1886 struct acpi_table_header header; /* Common ACPI table header */
1887 u32 warning_level;
1888 u32 low_level;
1889 u32 critical_level;
1890};
1891
1892/*******************************************************************************
1893 *
1894 * SDEI - Software Delegated Exception Interface Descriptor Table
1895 *
1896 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1897 * May 8th, 2017. Copyright 2017 ARM Ltd.
1898 *
1899 ******************************************************************************/
1900
1901struct acpi_table_sdei {
1902 struct acpi_table_header header; /* Common ACPI table header */
1903};
1904
1905/*******************************************************************************
1906 *
1907 * SDEV - Secure Devices Table (ACPI 6.2)
1908 * Version 1
1909 *
1910 ******************************************************************************/
1911
1912struct acpi_table_sdev {
1913 struct acpi_table_header header; /* Common ACPI table header */
1914};
1915
1916struct acpi_sdev_header {
1917 u8 type;
1918 u8 flags;
1919 u16 length;
1920};
1921
1922/* Values for subtable type above */
1923
1924enum acpi_sdev_type {
1925 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1926 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1927 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1928};
1929
1930/* Values for flags above */
1931
1932#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
1933#define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1)
1934
1935/*
1936 * SDEV subtables
1937 */
1938
1939/* 0: Namespace Device Based Secure Device Structure */
1940
1941struct acpi_sdev_namespace {
1942 struct acpi_sdev_header header;
1943 u16 device_id_offset;
1944 u16 device_id_length;
1945 u16 vendor_data_offset;
1946 u16 vendor_data_length;
1947};
1948
1949struct acpi_sdev_secure_component {
1950 u16 secure_component_offset;
1951 u16 secure_component_length;
1952};
1953
1954/*
1955 * SDEV sub-subtables ("Components") for above
1956 */
1957struct acpi_sdev_component {
1958 struct acpi_sdev_header header;
1959};
1960
1961/* Values for sub-subtable type above */
1962
1963enum acpi_sac_type {
1964 ACPI_SDEV_TYPE_ID_COMPONENT = 0,
1965 ACPI_SDEV_TYPE_MEM_COMPONENT = 1
1966};
1967
1968struct acpi_sdev_id_component {
1969 struct acpi_sdev_header header;
1970 u16 hardware_id_offset;
1971 u16 hardware_id_length;
1972 u16 subsystem_id_offset;
1973 u16 subsystem_id_length;
1974 u16 hardware_revision;
1975 u8 hardware_rev_present;
1976 u8 class_code_present;
1977 u8 pci_base_class;
1978 u8 pci_sub_class;
1979 u8 pci_programming_xface;
1980};
1981
1982struct acpi_sdev_mem_component {
1983 struct acpi_sdev_header header;
1984 u32 reserved;
1985 u64 memory_base_address;
1986 u64 memory_length;
1987};
1988
1989/* 1: PCIe Endpoint Device Based Device Structure */
1990
1991struct acpi_sdev_pcie {
1992 struct acpi_sdev_header header;
1993 u16 segment;
1994 u16 start_bus;
1995 u16 path_offset;
1996 u16 path_length;
1997 u16 vendor_data_offset;
1998 u16 vendor_data_length;
1999};
2000
2001/* 1a: PCIe Endpoint path entry */
2002
2003struct acpi_sdev_pcie_path {
2004 u8 device;
2005 u8 function;
2006};
2007
2008/*******************************************************************************
2009 *
2010 * SVKL - Storage Volume Key Location Table (ACPI 6.4)
2011 * From: "Guest-Host-Communication Interface (GHCI) for Intel
2012 * Trust Domain Extensions (Intel TDX)".
2013 * Version 1
2014 *
2015 ******************************************************************************/
2016
2017struct acpi_table_svkl {
2018 struct acpi_table_header header; /* Common ACPI table header */
2019 u32 count;
2020};
2021
2022struct acpi_svkl_key {
2023 u16 type;
2024 u16 format;
2025 u32 size;
2026 u64 address;
2027};
2028
2029enum acpi_svkl_type {
2030 ACPI_SVKL_TYPE_MAIN_STORAGE = 0,
2031 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */
2032};
2033
2034enum acpi_svkl_format {
2035 ACPI_SVKL_FORMAT_RAW_BINARY = 0,
2036 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */
2037};
2038
2039/* Reset to default packing */
2040
2041#pragma pack()
2042
2043#endif /* __ACTBL2_H__ */