1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * SAMSUNG SMDK2416 board device tree source
 4 *
 5 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
 
 
 
 
 6 */
 7
 8/dts-v1/;
 9#include "s3c2416.dtsi"
10
11/ {
12	model = "SMDK2416";
13	compatible = "samsung,s3c2416";
14
15	memory@30000000 {
16		device_type = "memory";
17		reg =  <0x30000000 0x4000000>;
18	};
19
20	clocks {
21		compatible = "simple-bus";
22		#address-cells = <1>;
23		#size-cells = <0>;
24
25		xti: xti@0 {
26			compatible = "fixed-clock";
27			reg = <0>;
28			clock-frequency = <12000000>;
29			clock-output-names = "xti";
30			#clock-cells = <0>;
31		};
32	};
33};
34
35&rtc {
36	status = "okay";
37};
38
39&sdhci_0 {
40	pinctrl-names = "default";
41	pinctrl-0 = <&sd1_clk>, <&sd1_cmd>,
42			<&sd1_bus1>, <&sd1_bus4>;
43	bus-width = <4>;
44	broken-cd;
45	status = "okay";
46};
47
48&sdhci_1 {
49	pinctrl-names = "default";
50	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>,
51			<&sd0_bus1>, <&sd0_bus4>;
52	bus-width = <4>;
53	cd-gpios = <&gpf 1 0>;
54	cd-inverted;
55	status = "okay";
56};
57
58&uart_0 {
59	status = "okay";
60	pinctrl-names = "default";
61	pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
62};
63
64&uart_1 {
65	status = "okay";
66	pinctrl-names = "default";
67	pinctrl-0 = <&uart1_data>, <&uart1_fctl>;
68};
69
70&uart_2 {
71	status = "okay";
72	pinctrl-names = "default";
73	pinctrl-0 = <&uart2_data>;
74};
75
76&uart_3 {
77	status = "okay";
78	pinctrl-names = "default";
79	pinctrl-0 = <&uart3_data>;
80};
81
82&watchdog {
83	status = "okay";
84};

 
 1/*
 2 * SAMSUNG SMDK2416 board device tree source
 3 *
 4 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
 5 *
 6 * This program is free software; you can redistribute it and/or modify
 7 * it under the terms of the GNU General Public License version 2 as
 8 * published by the Free Software Foundation.
 9 */
10
11/dts-v1/;
12#include "s3c2416.dtsi"
13
14/ {
15	model = "SMDK2416";
16	compatible = "samsung,s3c2416";
17
18	memory {
 
19		reg =  <0x30000000 0x4000000>;
20	};
21
22	clocks {
23		compatible = "simple-bus";
24		#address-cells = <1>;
25		#size-cells = <1>;
26
27		xti: xti {
28			compatible = "fixed-clock";
 
29			clock-frequency = <12000000>;
30			clock-output-names = "xti";
31			#clock-cells = <0>;
32		};
33	};
34};
35
36&rtc {
37	status = "okay";
38};
39
40&sdhci_0 {
41	pinctrl-names = "default";
42	pinctrl-0 = <&sd1_clk>, <&sd1_cmd>,
43			<&sd1_bus1>, <&sd1_bus4>;
44	bus-width = <4>;
45	broken-cd;
46	status = "okay";
47};
48
49&sdhci_1 {
50	pinctrl-names = "default";
51	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>,
52			<&sd0_bus1>, <&sd0_bus4>;
53	bus-width = <4>;
54	cd-gpios = <&gpf 1 0>;
55	cd-inverted;
56	status = "okay";
57};
58
59&uart_0 {
60	status = "okay";
61	pinctrl-names = "default";
62	pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
63};
64
65&uart_1 {
66	status = "okay";
67	pinctrl-names = "default";
68	pinctrl-0 = <&uart1_data>, <&uart1_fctl>;
69};
70
71&uart_2 {
72	status = "okay";
73	pinctrl-names = "default";
74	pinctrl-0 = <&uart2_data>;
75};
76
77&uart_3 {
78	status = "okay";
79	pinctrl-names = "default";
80	pinctrl-0 = <&uart3_data>;
81};
82
83&watchdog {
84	status = "okay";
85};