1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * SAMSUNG SMDK2416 board device tree source
 4 *
 5 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
 6 */
 7
 8/dts-v1/;
 9#include "s3c2416.dtsi"
10
11/ {
12	model = "SMDK2416";
13	compatible = "samsung,s3c2416";
14
15	memory@30000000 {
16		device_type = "memory";
17		reg =  <0x30000000 0x4000000>;
18	};
19
20	clocks {
21		compatible = "simple-bus";
22		#address-cells = <1>;
23		#size-cells = <0>;
24
25		xti: xti@0 {
26			compatible = "fixed-clock";
27			reg = <0>;
28			clock-frequency = <12000000>;
29			clock-output-names = "xti";
30			#clock-cells = <0>;
31		};
32	};
33};
34
35&rtc {
36	status = "okay";
37};
38
39&sdhci_0 {
40	pinctrl-names = "default";
41	pinctrl-0 = <&sd1_clk>, <&sd1_cmd>,
42			<&sd1_bus1>, <&sd1_bus4>;
43	bus-width = <4>;
44	broken-cd;
45	status = "okay";
46};
47
48&sdhci_1 {
49	pinctrl-names = "default";
50	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>,
51			<&sd0_bus1>, <&sd0_bus4>;
52	bus-width = <4>;
53	cd-gpios = <&gpf 1 0>;
54	cd-inverted;
55	status = "okay";
56};
57
58&uart_0 {
59	status = "okay";
60	pinctrl-names = "default";
61	pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
62};
63
64&uart_1 {
65	status = "okay";
66	pinctrl-names = "default";
67	pinctrl-0 = <&uart1_data>, <&uart1_fctl>;
68};
69
70&uart_2 {
71	status = "okay";
72	pinctrl-names = "default";
73	pinctrl-0 = <&uart2_data>;
74};
75
76&uart_3 {
77	status = "okay";
78	pinctrl-names = "default";
79	pinctrl-0 = <&uart3_data>;
80};
81
82&watchdog {
83	status = "okay";
84};

 1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * SAMSUNG SMDK2416 board device tree source
 4 *
 5 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
 6 */
 7
 8/dts-v1/;
 9#include "s3c2416.dtsi"
10
11/ {
12	model = "SMDK2416";
13	compatible = "samsung,s3c2416";
14
15	memory {
 
16		reg =  <0x30000000 0x4000000>;
17	};
18
19	clocks {
20		compatible = "simple-bus";
21		#address-cells = <1>;
22		#size-cells = <1>;
23
24		xti: xti {
25			compatible = "fixed-clock";
 
26			clock-frequency = <12000000>;
27			clock-output-names = "xti";
28			#clock-cells = <0>;
29		};
30	};
31};
32
33&rtc {
34	status = "okay";
35};
36
37&sdhci_0 {
38	pinctrl-names = "default";
39	pinctrl-0 = <&sd1_clk>, <&sd1_cmd>,
40			<&sd1_bus1>, <&sd1_bus4>;
41	bus-width = <4>;
42	broken-cd;
43	status = "okay";
44};
45
46&sdhci_1 {
47	pinctrl-names = "default";
48	pinctrl-0 = <&sd0_clk>, <&sd0_cmd>,
49			<&sd0_bus1>, <&sd0_bus4>;
50	bus-width = <4>;
51	cd-gpios = <&gpf 1 0>;
52	cd-inverted;
53	status = "okay";
54};
55
56&uart_0 {
57	status = "okay";
58	pinctrl-names = "default";
59	pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
60};
61
62&uart_1 {
63	status = "okay";
64	pinctrl-names = "default";
65	pinctrl-0 = <&uart1_data>, <&uart1_fctl>;
66};
67
68&uart_2 {
69	status = "okay";
70	pinctrl-names = "default";
71	pinctrl-0 = <&uart2_data>;
72};
73
74&uart_3 {
75	status = "okay";
76	pinctrl-names = "default";
77	pinctrl-0 = <&uart3_data>;
78};
79
80&watchdog {
81	status = "okay";
82};