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1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/bus/ti-sysc.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/pinctrl/am33xx.h>
14#include <dt-bindings/clock/am3.h>
15
16/ {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
19 #address-cells = <1>;
20 #size-cells = <1>;
21 chosen { };
22
23 aliases {
24 i2c0 = &i2c0;
25 i2c1 = &i2c1;
26 i2c2 = &i2c2;
27 serial0 = &uart0;
28 serial1 = &uart1;
29 serial2 = &uart2;
30 serial3 = &uart3;
31 serial4 = &uart4;
32 serial5 = &uart5;
33 d-can0 = &dcan0;
34 d-can1 = &dcan1;
35 usb0 = &usb0;
36 usb1 = &usb1;
37 phy0 = &usb0_phy;
38 phy1 = &usb1_phy;
39 ethernet0 = &cpsw_emac0;
40 ethernet1 = &cpsw_emac1;
41 spi0 = &spi0;
42 spi1 = &spi1;
43 };
44
45 cpus {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cpu@0 {
49 compatible = "arm,cortex-a8";
50 device_type = "cpu";
51 reg = <0>;
52
53 operating-points-v2 = <&cpu0_opp_table>;
54
55 clocks = <&dpll_mpu_ck>;
56 clock-names = "cpu";
57
58 clock-latency = <300000>; /* From omap-cpufreq driver */
59 };
60 };
61
62 cpu0_opp_table: opp-table {
63 compatible = "operating-points-v2-ti-cpu";
64 syscon = <&scm_conf>;
65
66 /*
67 * The three following nodes are marked with opp-suspend
68 * because the can not be enabled simultaneously on a
69 * single SoC.
70 */
71 opp50-300000000 {
72 opp-hz = /bits/ 64 <300000000>;
73 opp-microvolt = <950000 931000 969000>;
74 opp-supported-hw = <0x06 0x0010>;
75 opp-suspend;
76 };
77
78 opp100-275000000 {
79 opp-hz = /bits/ 64 <275000000>;
80 opp-microvolt = <1100000 1078000 1122000>;
81 opp-supported-hw = <0x01 0x00FF>;
82 opp-suspend;
83 };
84
85 opp100-300000000 {
86 opp-hz = /bits/ 64 <300000000>;
87 opp-microvolt = <1100000 1078000 1122000>;
88 opp-supported-hw = <0x06 0x0020>;
89 opp-suspend;
90 };
91
92 opp100-500000000 {
93 opp-hz = /bits/ 64 <500000000>;
94 opp-microvolt = <1100000 1078000 1122000>;
95 opp-supported-hw = <0x01 0xFFFF>;
96 };
97
98 opp100-600000000 {
99 opp-hz = /bits/ 64 <600000000>;
100 opp-microvolt = <1100000 1078000 1122000>;
101 opp-supported-hw = <0x06 0x0040>;
102 };
103
104 opp120-600000000 {
105 opp-hz = /bits/ 64 <600000000>;
106 opp-microvolt = <1200000 1176000 1224000>;
107 opp-supported-hw = <0x01 0xFFFF>;
108 };
109
110 opp120-720000000 {
111 opp-hz = /bits/ 64 <720000000>;
112 opp-microvolt = <1200000 1176000 1224000>;
113 opp-supported-hw = <0x06 0x0080>;
114 };
115
116 oppturbo-720000000 {
117 opp-hz = /bits/ 64 <720000000>;
118 opp-microvolt = <1260000 1234800 1285200>;
119 opp-supported-hw = <0x01 0xFFFF>;
120 };
121
122 oppturbo-800000000 {
123 opp-hz = /bits/ 64 <800000000>;
124 opp-microvolt = <1260000 1234800 1285200>;
125 opp-supported-hw = <0x06 0x0100>;
126 };
127
128 oppnitro-1000000000 {
129 opp-hz = /bits/ 64 <1000000000>;
130 opp-microvolt = <1325000 1298500 1351500>;
131 opp-supported-hw = <0x04 0x0200>;
132 };
133 };
134
135 pmu@4b000000 {
136 compatible = "arm,cortex-a8-pmu";
137 interrupts = <3>;
138 reg = <0x4b000000 0x1000000>;
139 ti,hwmods = "debugss";
140 };
141
142 /*
143 * The soc node represents the soc top level view. It is used for IPs
144 * that are not memory mapped in the MPU view or for the MPU itself.
145 */
146 soc {
147 compatible = "ti,omap-infra";
148 mpu {
149 compatible = "ti,omap3-mpu";
150 ti,hwmods = "mpu";
151 pm-sram = <&pm_sram_code
152 &pm_sram_data>;
153 };
154 };
155
156 /*
157 * XXX: Use a flat representation of the AM33XX interconnect.
158 * The real AM33XX interconnect network is quite complex. Since
159 * it will not bring real advantage to represent that in DT
160 * for the moment, just use a fake OCP bus entry to represent
161 * the whole bus hierarchy.
162 */
163 ocp {
164 compatible = "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <1>;
167 ranges;
168 ti,hwmods = "l3_main";
169
170 l4_wkup: interconnect@44c00000 {
171 wkup_m3: wkup_m3@100000 {
172 compatible = "ti,am3352-wkup-m3";
173 reg = <0x100000 0x4000>,
174 <0x180000 0x2000>;
175 reg-names = "umem", "dmem";
176 ti,hwmods = "wkup_m3";
177 ti,pm-firmware = "am335x-pm-firmware.elf";
178 };
179 };
180 l4_per: interconnect@48000000 {
181 };
182 l4_fw: interconnect@47c00000 {
183 };
184 l4_fast: interconnect@4a000000 {
185 };
186 l4_mpuss: interconnect@4b140000 {
187 };
188
189 intc: interrupt-controller@48200000 {
190 compatible = "ti,am33xx-intc";
191 interrupt-controller;
192 #interrupt-cells = <1>;
193 reg = <0x48200000 0x1000>;
194 };
195
196 edma: edma@49000000 {
197 compatible = "ti,edma3-tpcc";
198 ti,hwmods = "tpcc";
199 reg = <0x49000000 0x10000>;
200 reg-names = "edma3_cc";
201 interrupts = <12 13 14>;
202 interrupt-names = "edma3_ccint", "edma3_mperr",
203 "edma3_ccerrint";
204 dma-requests = <64>;
205 #dma-cells = <2>;
206
207 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
208 <&edma_tptc2 0>;
209
210 ti,edma-memcpy-channels = <20 21>;
211 };
212
213 edma_tptc0: tptc@49800000 {
214 compatible = "ti,edma3-tptc";
215 ti,hwmods = "tptc0";
216 reg = <0x49800000 0x100000>;
217 interrupts = <112>;
218 interrupt-names = "edma3_tcerrint";
219 };
220
221 edma_tptc1: tptc@49900000 {
222 compatible = "ti,edma3-tptc";
223 ti,hwmods = "tptc1";
224 reg = <0x49900000 0x100000>;
225 interrupts = <113>;
226 interrupt-names = "edma3_tcerrint";
227 };
228
229 edma_tptc2: tptc@49a00000 {
230 compatible = "ti,edma3-tptc";
231 ti,hwmods = "tptc2";
232 reg = <0x49a00000 0x100000>;
233 interrupts = <114>;
234 interrupt-names = "edma3_tcerrint";
235 };
236
237 target-module@47810000 {
238 compatible = "ti,sysc-omap2", "ti,sysc";
239 ti,hwmods = "mmc3";
240 reg = <0x478102fc 0x4>,
241 <0x47810110 0x4>,
242 <0x47810114 0x4>;
243 reg-names = "rev", "sysc", "syss";
244 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
245 SYSC_OMAP2_ENAWAKEUP |
246 SYSC_OMAP2_SOFTRESET |
247 SYSC_OMAP2_AUTOIDLE)>;
248 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
249 <SYSC_IDLE_NO>,
250 <SYSC_IDLE_SMART>;
251 ti,syss-mask = <1>;
252 clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
253 clock-names = "fck";
254 #address-cells = <1>;
255 #size-cells = <1>;
256 ranges = <0x0 0x47810000 0x1000>;
257
258 mmc3: mmc@0 {
259 compatible = "ti,omap4-hsmmc";
260 ti,needs-special-reset;
261 interrupts = <29>;
262 reg = <0x0 0x1000>;
263 };
264 };
265
266 usb: usb@47400000 {
267 compatible = "ti,am33xx-usb";
268 reg = <0x47400000 0x1000>;
269 ranges;
270 #address-cells = <1>;
271 #size-cells = <1>;
272 ti,hwmods = "usb_otg_hs";
273 status = "disabled";
274
275 usb_ctrl_mod: control@44e10620 {
276 compatible = "ti,am335x-usb-ctrl-module";
277 reg = <0x44e10620 0x10
278 0x44e10648 0x4>;
279 reg-names = "phy_ctrl", "wakeup";
280 status = "disabled";
281 };
282
283 usb0_phy: usb-phy@47401300 {
284 compatible = "ti,am335x-usb-phy";
285 reg = <0x47401300 0x100>;
286 reg-names = "phy";
287 status = "disabled";
288 ti,ctrl_mod = <&usb_ctrl_mod>;
289 #phy-cells = <0>;
290 };
291
292 usb0: usb@47401000 {
293 compatible = "ti,musb-am33xx";
294 status = "disabled";
295 reg = <0x47401400 0x400
296 0x47401000 0x200>;
297 reg-names = "mc", "control";
298
299 interrupts = <18>;
300 interrupt-names = "mc";
301 dr_mode = "otg";
302 mentor,multipoint = <1>;
303 mentor,num-eps = <16>;
304 mentor,ram-bits = <12>;
305 mentor,power = <500>;
306 phys = <&usb0_phy>;
307
308 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
309 &cppi41dma 2 0 &cppi41dma 3 0
310 &cppi41dma 4 0 &cppi41dma 5 0
311 &cppi41dma 6 0 &cppi41dma 7 0
312 &cppi41dma 8 0 &cppi41dma 9 0
313 &cppi41dma 10 0 &cppi41dma 11 0
314 &cppi41dma 12 0 &cppi41dma 13 0
315 &cppi41dma 14 0 &cppi41dma 0 1
316 &cppi41dma 1 1 &cppi41dma 2 1
317 &cppi41dma 3 1 &cppi41dma 4 1
318 &cppi41dma 5 1 &cppi41dma 6 1
319 &cppi41dma 7 1 &cppi41dma 8 1
320 &cppi41dma 9 1 &cppi41dma 10 1
321 &cppi41dma 11 1 &cppi41dma 12 1
322 &cppi41dma 13 1 &cppi41dma 14 1>;
323 dma-names =
324 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
325 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
326 "rx14", "rx15",
327 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
328 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
329 "tx14", "tx15";
330 };
331
332 usb1_phy: usb-phy@47401b00 {
333 compatible = "ti,am335x-usb-phy";
334 reg = <0x47401b00 0x100>;
335 reg-names = "phy";
336 status = "disabled";
337 ti,ctrl_mod = <&usb_ctrl_mod>;
338 #phy-cells = <0>;
339 };
340
341 usb1: usb@47401800 {
342 compatible = "ti,musb-am33xx";
343 status = "disabled";
344 reg = <0x47401c00 0x400
345 0x47401800 0x200>;
346 reg-names = "mc", "control";
347 interrupts = <19>;
348 interrupt-names = "mc";
349 dr_mode = "otg";
350 mentor,multipoint = <1>;
351 mentor,num-eps = <16>;
352 mentor,ram-bits = <12>;
353 mentor,power = <500>;
354 phys = <&usb1_phy>;
355
356 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
357 &cppi41dma 17 0 &cppi41dma 18 0
358 &cppi41dma 19 0 &cppi41dma 20 0
359 &cppi41dma 21 0 &cppi41dma 22 0
360 &cppi41dma 23 0 &cppi41dma 24 0
361 &cppi41dma 25 0 &cppi41dma 26 0
362 &cppi41dma 27 0 &cppi41dma 28 0
363 &cppi41dma 29 0 &cppi41dma 15 1
364 &cppi41dma 16 1 &cppi41dma 17 1
365 &cppi41dma 18 1 &cppi41dma 19 1
366 &cppi41dma 20 1 &cppi41dma 21 1
367 &cppi41dma 22 1 &cppi41dma 23 1
368 &cppi41dma 24 1 &cppi41dma 25 1
369 &cppi41dma 26 1 &cppi41dma 27 1
370 &cppi41dma 28 1 &cppi41dma 29 1>;
371 dma-names =
372 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
373 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
374 "rx14", "rx15",
375 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
376 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
377 "tx14", "tx15";
378 };
379
380 cppi41dma: dma-controller@47402000 {
381 compatible = "ti,am3359-cppi41";
382 reg = <0x47400000 0x1000
383 0x47402000 0x1000
384 0x47403000 0x1000
385 0x47404000 0x4000>;
386 reg-names = "glue", "controller", "scheduler", "queuemgr";
387 interrupts = <17>;
388 interrupt-names = "glue";
389 #dma-cells = <2>;
390 #dma-channels = <30>;
391 #dma-requests = <256>;
392 status = "disabled";
393 };
394 };
395
396 ocmcram: ocmcram@40300000 {
397 compatible = "mmio-sram";
398 reg = <0x40300000 0x10000>; /* 64k */
399 ranges = <0x0 0x40300000 0x10000>;
400 #address-cells = <1>;
401 #size-cells = <1>;
402
403 pm_sram_code: pm-sram-code@0 {
404 compatible = "ti,sram";
405 reg = <0x0 0x1000>;
406 protect-exec;
407 };
408
409 pm_sram_data: pm-sram-data@1000 {
410 compatible = "ti,sram";
411 reg = <0x1000 0x1000>;
412 pool;
413 };
414 };
415
416 emif: emif@4c000000 {
417 compatible = "ti,emif-am3352";
418 reg = <0x4c000000 0x1000000>;
419 ti,hwmods = "emif";
420 interrupts = <101>;
421 sram = <&pm_sram_code
422 &pm_sram_data>;
423 ti,no-idle;
424 };
425
426 gpmc: gpmc@50000000 {
427 compatible = "ti,am3352-gpmc";
428 ti,hwmods = "gpmc";
429 ti,no-idle-on-init;
430 reg = <0x50000000 0x2000>;
431 interrupts = <100>;
432 dmas = <&edma 52 0>;
433 dma-names = "rxtx";
434 gpmc,num-cs = <7>;
435 gpmc,num-waitpins = <2>;
436 #address-cells = <2>;
437 #size-cells = <1>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
440 gpio-controller;
441 #gpio-cells = <2>;
442 status = "disabled";
443 };
444
445 sham: sham@53100000 {
446 compatible = "ti,omap4-sham";
447 ti,hwmods = "sham";
448 reg = <0x53100000 0x200>;
449 interrupts = <109>;
450 dmas = <&edma 36 0>;
451 dma-names = "rx";
452 };
453
454 aes: aes@53500000 {
455 compatible = "ti,omap4-aes";
456 ti,hwmods = "aes";
457 reg = <0x53500000 0xa0>;
458 interrupts = <103>;
459 dmas = <&edma 6 0>,
460 <&edma 5 0>;
461 dma-names = "tx", "rx";
462 };
463 };
464};
465
466#include "am33xx-l4.dtsi"
467#include "am33xx-clocks.dtsi"
1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/am33xx.h>
13
14#include "skeleton.dtsi"
15
16/ {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
38 };
39
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 cpu@0 {
44 compatible = "arm,cortex-a8";
45 device_type = "cpu";
46 reg = <0>;
47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
65 clock-latency = <300000>; /* From omap-cpufreq driver */
66 };
67 };
68
69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
74 /*
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
86 /*
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex. Since
89 * it will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
92 */
93 ocp {
94 compatible = "simple-bus";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges;
98 ti,hwmods = "l3_main";
99
100 l4_wkup: l4_wkup@44c00000 {
101 compatible = "ti,am3-l4-wkup", "simple-bus";
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges = <0 0x44c00000 0x280000>;
105
106 wkup_m3: wkup_m3@100000 {
107 compatible = "ti,am3352-wkup-m3";
108 reg = <0x100000 0x4000>,
109 <0x180000 0x2000>;
110 reg-names = "umem", "dmem";
111 ti,hwmods = "wkup_m3";
112 ti,pm-firmware = "am335x-pm-firmware.elf";
113 };
114
115 prcm: prcm@200000 {
116 compatible = "ti,am3-prcm";
117 reg = <0x200000 0x4000>;
118
119 prcm_clocks: clocks {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 };
123
124 prcm_clockdomains: clockdomains {
125 };
126 };
127
128 scm: scm@210000 {
129 compatible = "ti,am3-scm", "simple-bus";
130 reg = <0x210000 0x2000>;
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges = <0 0x210000 0x2000>;
134
135 am33xx_pinmux: pinmux@800 {
136 compatible = "pinctrl-single";
137 reg = <0x800 0x238>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x7f>;
142 };
143
144 scm_conf: scm_conf@0 {
145 compatible = "syscon";
146 reg = <0x0 0x800>;
147 #address-cells = <1>;
148 #size-cells = <1>;
149
150 scm_clocks: clocks {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 };
154 };
155
156 wkup_m3_ipc: wkup_m3_ipc@1324 {
157 compatible = "ti,am3352-wkup-m3-ipc";
158 reg = <0x1324 0x24>;
159 interrupts = <78>;
160 ti,rproc = <&wkup_m3>;
161 mboxes = <&mailbox &mbox_wkupm3>;
162 };
163
164 edma_xbar: dma-router@f90 {
165 compatible = "ti,am335x-edma-crossbar";
166 reg = <0xf90 0x40>;
167 #dma-cells = <3>;
168 dma-requests = <32>;
169 dma-masters = <&edma>;
170 };
171
172 scm_clockdomains: clockdomains {
173 };
174 };
175 };
176
177 intc: interrupt-controller@48200000 {
178 compatible = "ti,am33xx-intc";
179 interrupt-controller;
180 #interrupt-cells = <1>;
181 reg = <0x48200000 0x1000>;
182 };
183
184 edma: edma@49000000 {
185 compatible = "ti,edma3-tpcc";
186 ti,hwmods = "tpcc";
187 reg = <0x49000000 0x10000>;
188 reg-names = "edma3_cc";
189 interrupts = <12 13 14>;
190 interrupt-names = "edma3_ccint", "emda3_mperr",
191 "edma3_ccerrint";
192 dma-requests = <64>;
193 #dma-cells = <2>;
194
195 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
196 <&edma_tptc2 0>;
197
198 ti,edma-memcpy-channels = <20 21>;
199 };
200
201 edma_tptc0: tptc@49800000 {
202 compatible = "ti,edma3-tptc";
203 ti,hwmods = "tptc0";
204 reg = <0x49800000 0x100000>;
205 interrupts = <112>;
206 interrupt-names = "edma3_tcerrint";
207 };
208
209 edma_tptc1: tptc@49900000 {
210 compatible = "ti,edma3-tptc";
211 ti,hwmods = "tptc1";
212 reg = <0x49900000 0x100000>;
213 interrupts = <113>;
214 interrupt-names = "edma3_tcerrint";
215 };
216
217 edma_tptc2: tptc@49a00000 {
218 compatible = "ti,edma3-tptc";
219 ti,hwmods = "tptc2";
220 reg = <0x49a00000 0x100000>;
221 interrupts = <114>;
222 interrupt-names = "edma3_tcerrint";
223 };
224
225 gpio0: gpio@44e07000 {
226 compatible = "ti,omap4-gpio";
227 ti,hwmods = "gpio1";
228 gpio-controller;
229 #gpio-cells = <2>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
232 reg = <0x44e07000 0x1000>;
233 interrupts = <96>;
234 };
235
236 gpio1: gpio@4804c000 {
237 compatible = "ti,omap4-gpio";
238 ti,hwmods = "gpio2";
239 gpio-controller;
240 #gpio-cells = <2>;
241 interrupt-controller;
242 #interrupt-cells = <2>;
243 reg = <0x4804c000 0x1000>;
244 interrupts = <98>;
245 };
246
247 gpio2: gpio@481ac000 {
248 compatible = "ti,omap4-gpio";
249 ti,hwmods = "gpio3";
250 gpio-controller;
251 #gpio-cells = <2>;
252 interrupt-controller;
253 #interrupt-cells = <2>;
254 reg = <0x481ac000 0x1000>;
255 interrupts = <32>;
256 };
257
258 gpio3: gpio@481ae000 {
259 compatible = "ti,omap4-gpio";
260 ti,hwmods = "gpio4";
261 gpio-controller;
262 #gpio-cells = <2>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
265 reg = <0x481ae000 0x1000>;
266 interrupts = <62>;
267 };
268
269 uart0: serial@44e09000 {
270 compatible = "ti,am3352-uart", "ti,omap3-uart";
271 ti,hwmods = "uart1";
272 clock-frequency = <48000000>;
273 reg = <0x44e09000 0x2000>;
274 interrupts = <72>;
275 status = "disabled";
276 dmas = <&edma 26 0>, <&edma 27 0>;
277 dma-names = "tx", "rx";
278 };
279
280 uart1: serial@48022000 {
281 compatible = "ti,am3352-uart", "ti,omap3-uart";
282 ti,hwmods = "uart2";
283 clock-frequency = <48000000>;
284 reg = <0x48022000 0x2000>;
285 interrupts = <73>;
286 status = "disabled";
287 dmas = <&edma 28 0>, <&edma 29 0>;
288 dma-names = "tx", "rx";
289 };
290
291 uart2: serial@48024000 {
292 compatible = "ti,am3352-uart", "ti,omap3-uart";
293 ti,hwmods = "uart3";
294 clock-frequency = <48000000>;
295 reg = <0x48024000 0x2000>;
296 interrupts = <74>;
297 status = "disabled";
298 dmas = <&edma 30 0>, <&edma 31 0>;
299 dma-names = "tx", "rx";
300 };
301
302 uart3: serial@481a6000 {
303 compatible = "ti,am3352-uart", "ti,omap3-uart";
304 ti,hwmods = "uart4";
305 clock-frequency = <48000000>;
306 reg = <0x481a6000 0x2000>;
307 interrupts = <44>;
308 status = "disabled";
309 };
310
311 uart4: serial@481a8000 {
312 compatible = "ti,am3352-uart", "ti,omap3-uart";
313 ti,hwmods = "uart5";
314 clock-frequency = <48000000>;
315 reg = <0x481a8000 0x2000>;
316 interrupts = <45>;
317 status = "disabled";
318 };
319
320 uart5: serial@481aa000 {
321 compatible = "ti,am3352-uart", "ti,omap3-uart";
322 ti,hwmods = "uart6";
323 clock-frequency = <48000000>;
324 reg = <0x481aa000 0x2000>;
325 interrupts = <46>;
326 status = "disabled";
327 };
328
329 i2c0: i2c@44e0b000 {
330 compatible = "ti,omap4-i2c";
331 #address-cells = <1>;
332 #size-cells = <0>;
333 ti,hwmods = "i2c1";
334 reg = <0x44e0b000 0x1000>;
335 interrupts = <70>;
336 status = "disabled";
337 };
338
339 i2c1: i2c@4802a000 {
340 compatible = "ti,omap4-i2c";
341 #address-cells = <1>;
342 #size-cells = <0>;
343 ti,hwmods = "i2c2";
344 reg = <0x4802a000 0x1000>;
345 interrupts = <71>;
346 status = "disabled";
347 };
348
349 i2c2: i2c@4819c000 {
350 compatible = "ti,omap4-i2c";
351 #address-cells = <1>;
352 #size-cells = <0>;
353 ti,hwmods = "i2c3";
354 reg = <0x4819c000 0x1000>;
355 interrupts = <30>;
356 status = "disabled";
357 };
358
359 mmc1: mmc@48060000 {
360 compatible = "ti,omap4-hsmmc";
361 ti,hwmods = "mmc1";
362 ti,dual-volt;
363 ti,needs-special-reset;
364 ti,needs-special-hs-handling;
365 dmas = <&edma_xbar 24 0 0
366 &edma_xbar 25 0 0>;
367 dma-names = "tx", "rx";
368 interrupts = <64>;
369 interrupt-parent = <&intc>;
370 reg = <0x48060000 0x1000>;
371 status = "disabled";
372 };
373
374 mmc2: mmc@481d8000 {
375 compatible = "ti,omap4-hsmmc";
376 ti,hwmods = "mmc2";
377 ti,needs-special-reset;
378 dmas = <&edma 2 0
379 &edma 3 0>;
380 dma-names = "tx", "rx";
381 interrupts = <28>;
382 interrupt-parent = <&intc>;
383 reg = <0x481d8000 0x1000>;
384 status = "disabled";
385 };
386
387 mmc3: mmc@47810000 {
388 compatible = "ti,omap4-hsmmc";
389 ti,hwmods = "mmc3";
390 ti,needs-special-reset;
391 interrupts = <29>;
392 interrupt-parent = <&intc>;
393 reg = <0x47810000 0x1000>;
394 status = "disabled";
395 };
396
397 hwspinlock: spinlock@480ca000 {
398 compatible = "ti,omap4-hwspinlock";
399 reg = <0x480ca000 0x1000>;
400 ti,hwmods = "spinlock";
401 #hwlock-cells = <1>;
402 };
403
404 wdt2: wdt@44e35000 {
405 compatible = "ti,omap3-wdt";
406 ti,hwmods = "wd_timer2";
407 reg = <0x44e35000 0x1000>;
408 interrupts = <91>;
409 };
410
411 dcan0: can@481cc000 {
412 compatible = "ti,am3352-d_can";
413 ti,hwmods = "d_can0";
414 reg = <0x481cc000 0x2000>;
415 clocks = <&dcan0_fck>;
416 clock-names = "fck";
417 syscon-raminit = <&scm_conf 0x644 0>;
418 interrupts = <52>;
419 status = "disabled";
420 };
421
422 dcan1: can@481d0000 {
423 compatible = "ti,am3352-d_can";
424 ti,hwmods = "d_can1";
425 reg = <0x481d0000 0x2000>;
426 clocks = <&dcan1_fck>;
427 clock-names = "fck";
428 syscon-raminit = <&scm_conf 0x644 1>;
429 interrupts = <55>;
430 status = "disabled";
431 };
432
433 mailbox: mailbox@480C8000 {
434 compatible = "ti,omap4-mailbox";
435 reg = <0x480C8000 0x200>;
436 interrupts = <77>;
437 ti,hwmods = "mailbox";
438 #mbox-cells = <1>;
439 ti,mbox-num-users = <4>;
440 ti,mbox-num-fifos = <8>;
441 mbox_wkupm3: wkup_m3 {
442 ti,mbox-send-noirq;
443 ti,mbox-tx = <0 0 0>;
444 ti,mbox-rx = <0 0 3>;
445 };
446 };
447
448 timer1: timer@44e31000 {
449 compatible = "ti,am335x-timer-1ms";
450 reg = <0x44e31000 0x400>;
451 interrupts = <67>;
452 ti,hwmods = "timer1";
453 ti,timer-alwon;
454 };
455
456 timer2: timer@48040000 {
457 compatible = "ti,am335x-timer";
458 reg = <0x48040000 0x400>;
459 interrupts = <68>;
460 ti,hwmods = "timer2";
461 };
462
463 timer3: timer@48042000 {
464 compatible = "ti,am335x-timer";
465 reg = <0x48042000 0x400>;
466 interrupts = <69>;
467 ti,hwmods = "timer3";
468 };
469
470 timer4: timer@48044000 {
471 compatible = "ti,am335x-timer";
472 reg = <0x48044000 0x400>;
473 interrupts = <92>;
474 ti,hwmods = "timer4";
475 ti,timer-pwm;
476 };
477
478 timer5: timer@48046000 {
479 compatible = "ti,am335x-timer";
480 reg = <0x48046000 0x400>;
481 interrupts = <93>;
482 ti,hwmods = "timer5";
483 ti,timer-pwm;
484 };
485
486 timer6: timer@48048000 {
487 compatible = "ti,am335x-timer";
488 reg = <0x48048000 0x400>;
489 interrupts = <94>;
490 ti,hwmods = "timer6";
491 ti,timer-pwm;
492 };
493
494 timer7: timer@4804a000 {
495 compatible = "ti,am335x-timer";
496 reg = <0x4804a000 0x400>;
497 interrupts = <95>;
498 ti,hwmods = "timer7";
499 ti,timer-pwm;
500 };
501
502 rtc: rtc@44e3e000 {
503 compatible = "ti,am3352-rtc", "ti,da830-rtc";
504 reg = <0x44e3e000 0x1000>;
505 interrupts = <75
506 76>;
507 ti,hwmods = "rtc";
508 };
509
510 spi0: spi@48030000 {
511 compatible = "ti,omap4-mcspi";
512 #address-cells = <1>;
513 #size-cells = <0>;
514 reg = <0x48030000 0x400>;
515 interrupts = <65>;
516 ti,spi-num-cs = <2>;
517 ti,hwmods = "spi0";
518 dmas = <&edma 16 0
519 &edma 17 0
520 &edma 18 0
521 &edma 19 0>;
522 dma-names = "tx0", "rx0", "tx1", "rx1";
523 status = "disabled";
524 };
525
526 spi1: spi@481a0000 {
527 compatible = "ti,omap4-mcspi";
528 #address-cells = <1>;
529 #size-cells = <0>;
530 reg = <0x481a0000 0x400>;
531 interrupts = <125>;
532 ti,spi-num-cs = <2>;
533 ti,hwmods = "spi1";
534 dmas = <&edma 42 0
535 &edma 43 0
536 &edma 44 0
537 &edma 45 0>;
538 dma-names = "tx0", "rx0", "tx1", "rx1";
539 status = "disabled";
540 };
541
542 usb: usb@47400000 {
543 compatible = "ti,am33xx-usb";
544 reg = <0x47400000 0x1000>;
545 ranges;
546 #address-cells = <1>;
547 #size-cells = <1>;
548 ti,hwmods = "usb_otg_hs";
549 status = "disabled";
550
551 usb_ctrl_mod: control@44e10620 {
552 compatible = "ti,am335x-usb-ctrl-module";
553 reg = <0x44e10620 0x10
554 0x44e10648 0x4>;
555 reg-names = "phy_ctrl", "wakeup";
556 status = "disabled";
557 };
558
559 usb0_phy: usb-phy@47401300 {
560 compatible = "ti,am335x-usb-phy";
561 reg = <0x47401300 0x100>;
562 reg-names = "phy";
563 status = "disabled";
564 ti,ctrl_mod = <&usb_ctrl_mod>;
565 };
566
567 usb0: usb@47401000 {
568 compatible = "ti,musb-am33xx";
569 status = "disabled";
570 reg = <0x47401400 0x400
571 0x47401000 0x200>;
572 reg-names = "mc", "control";
573
574 interrupts = <18>;
575 interrupt-names = "mc";
576 dr_mode = "otg";
577 mentor,multipoint = <1>;
578 mentor,num-eps = <16>;
579 mentor,ram-bits = <12>;
580 mentor,power = <500>;
581 phys = <&usb0_phy>;
582
583 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
584 &cppi41dma 2 0 &cppi41dma 3 0
585 &cppi41dma 4 0 &cppi41dma 5 0
586 &cppi41dma 6 0 &cppi41dma 7 0
587 &cppi41dma 8 0 &cppi41dma 9 0
588 &cppi41dma 10 0 &cppi41dma 11 0
589 &cppi41dma 12 0 &cppi41dma 13 0
590 &cppi41dma 14 0 &cppi41dma 0 1
591 &cppi41dma 1 1 &cppi41dma 2 1
592 &cppi41dma 3 1 &cppi41dma 4 1
593 &cppi41dma 5 1 &cppi41dma 6 1
594 &cppi41dma 7 1 &cppi41dma 8 1
595 &cppi41dma 9 1 &cppi41dma 10 1
596 &cppi41dma 11 1 &cppi41dma 12 1
597 &cppi41dma 13 1 &cppi41dma 14 1>;
598 dma-names =
599 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
600 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
601 "rx14", "rx15",
602 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
603 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
604 "tx14", "tx15";
605 };
606
607 usb1_phy: usb-phy@47401b00 {
608 compatible = "ti,am335x-usb-phy";
609 reg = <0x47401b00 0x100>;
610 reg-names = "phy";
611 status = "disabled";
612 ti,ctrl_mod = <&usb_ctrl_mod>;
613 };
614
615 usb1: usb@47401800 {
616 compatible = "ti,musb-am33xx";
617 status = "disabled";
618 reg = <0x47401c00 0x400
619 0x47401800 0x200>;
620 reg-names = "mc", "control";
621 interrupts = <19>;
622 interrupt-names = "mc";
623 dr_mode = "otg";
624 mentor,multipoint = <1>;
625 mentor,num-eps = <16>;
626 mentor,ram-bits = <12>;
627 mentor,power = <500>;
628 phys = <&usb1_phy>;
629
630 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
631 &cppi41dma 17 0 &cppi41dma 18 0
632 &cppi41dma 19 0 &cppi41dma 20 0
633 &cppi41dma 21 0 &cppi41dma 22 0
634 &cppi41dma 23 0 &cppi41dma 24 0
635 &cppi41dma 25 0 &cppi41dma 26 0
636 &cppi41dma 27 0 &cppi41dma 28 0
637 &cppi41dma 29 0 &cppi41dma 15 1
638 &cppi41dma 16 1 &cppi41dma 17 1
639 &cppi41dma 18 1 &cppi41dma 19 1
640 &cppi41dma 20 1 &cppi41dma 21 1
641 &cppi41dma 22 1 &cppi41dma 23 1
642 &cppi41dma 24 1 &cppi41dma 25 1
643 &cppi41dma 26 1 &cppi41dma 27 1
644 &cppi41dma 28 1 &cppi41dma 29 1>;
645 dma-names =
646 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
647 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
648 "rx14", "rx15",
649 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
650 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
651 "tx14", "tx15";
652 };
653
654 cppi41dma: dma-controller@47402000 {
655 compatible = "ti,am3359-cppi41";
656 reg = <0x47400000 0x1000
657 0x47402000 0x1000
658 0x47403000 0x1000
659 0x47404000 0x4000>;
660 reg-names = "glue", "controller", "scheduler", "queuemgr";
661 interrupts = <17>;
662 interrupt-names = "glue";
663 #dma-cells = <2>;
664 #dma-channels = <30>;
665 #dma-requests = <256>;
666 status = "disabled";
667 };
668 };
669
670 epwmss0: epwmss@48300000 {
671 compatible = "ti,am33xx-pwmss";
672 reg = <0x48300000 0x10>;
673 ti,hwmods = "epwmss0";
674 #address-cells = <1>;
675 #size-cells = <1>;
676 status = "disabled";
677 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
678 0x48300180 0x48300180 0x80 /* EQEP */
679 0x48300200 0x48300200 0x80>; /* EHRPWM */
680
681 ecap0: ecap@48300100 {
682 compatible = "ti,am33xx-ecap";
683 #pwm-cells = <3>;
684 reg = <0x48300100 0x80>;
685 interrupts = <31>;
686 interrupt-names = "ecap0";
687 ti,hwmods = "ecap0";
688 status = "disabled";
689 };
690
691 ehrpwm0: ehrpwm@48300200 {
692 compatible = "ti,am33xx-ehrpwm";
693 #pwm-cells = <3>;
694 reg = <0x48300200 0x80>;
695 ti,hwmods = "ehrpwm0";
696 status = "disabled";
697 };
698 };
699
700 epwmss1: epwmss@48302000 {
701 compatible = "ti,am33xx-pwmss";
702 reg = <0x48302000 0x10>;
703 ti,hwmods = "epwmss1";
704 #address-cells = <1>;
705 #size-cells = <1>;
706 status = "disabled";
707 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
708 0x48302180 0x48302180 0x80 /* EQEP */
709 0x48302200 0x48302200 0x80>; /* EHRPWM */
710
711 ecap1: ecap@48302100 {
712 compatible = "ti,am33xx-ecap";
713 #pwm-cells = <3>;
714 reg = <0x48302100 0x80>;
715 interrupts = <47>;
716 interrupt-names = "ecap1";
717 ti,hwmods = "ecap1";
718 status = "disabled";
719 };
720
721 ehrpwm1: ehrpwm@48302200 {
722 compatible = "ti,am33xx-ehrpwm";
723 #pwm-cells = <3>;
724 reg = <0x48302200 0x80>;
725 ti,hwmods = "ehrpwm1";
726 status = "disabled";
727 };
728 };
729
730 epwmss2: epwmss@48304000 {
731 compatible = "ti,am33xx-pwmss";
732 reg = <0x48304000 0x10>;
733 ti,hwmods = "epwmss2";
734 #address-cells = <1>;
735 #size-cells = <1>;
736 status = "disabled";
737 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
738 0x48304180 0x48304180 0x80 /* EQEP */
739 0x48304200 0x48304200 0x80>; /* EHRPWM */
740
741 ecap2: ecap@48304100 {
742 compatible = "ti,am33xx-ecap";
743 #pwm-cells = <3>;
744 reg = <0x48304100 0x80>;
745 interrupts = <61>;
746 interrupt-names = "ecap2";
747 ti,hwmods = "ecap2";
748 status = "disabled";
749 };
750
751 ehrpwm2: ehrpwm@48304200 {
752 compatible = "ti,am33xx-ehrpwm";
753 #pwm-cells = <3>;
754 reg = <0x48304200 0x80>;
755 ti,hwmods = "ehrpwm2";
756 status = "disabled";
757 };
758 };
759
760 mac: ethernet@4a100000 {
761 compatible = "ti,am335x-cpsw","ti,cpsw";
762 ti,hwmods = "cpgmac0";
763 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
764 clock-names = "fck", "cpts";
765 cpdma_channels = <8>;
766 ale_entries = <1024>;
767 bd_ram_size = <0x2000>;
768 no_bd_ram = <0>;
769 rx_descs = <64>;
770 mac_control = <0x20>;
771 slaves = <2>;
772 active_slave = <0>;
773 cpts_clock_mult = <0x80000000>;
774 cpts_clock_shift = <29>;
775 reg = <0x4a100000 0x800
776 0x4a101200 0x100>;
777 #address-cells = <1>;
778 #size-cells = <1>;
779 interrupt-parent = <&intc>;
780 /*
781 * c0_rx_thresh_pend
782 * c0_rx_pend
783 * c0_tx_pend
784 * c0_misc_pend
785 */
786 interrupts = <40 41 42 43>;
787 ranges;
788 syscon = <&scm_conf>;
789 status = "disabled";
790
791 davinci_mdio: mdio@4a101000 {
792 compatible = "ti,davinci_mdio";
793 #address-cells = <1>;
794 #size-cells = <0>;
795 ti,hwmods = "davinci_mdio";
796 bus_freq = <1000000>;
797 reg = <0x4a101000 0x100>;
798 status = "disabled";
799 };
800
801 cpsw_emac0: slave@4a100200 {
802 /* Filled in by U-Boot */
803 mac-address = [ 00 00 00 00 00 00 ];
804 };
805
806 cpsw_emac1: slave@4a100300 {
807 /* Filled in by U-Boot */
808 mac-address = [ 00 00 00 00 00 00 ];
809 };
810
811 phy_sel: cpsw-phy-sel@44e10650 {
812 compatible = "ti,am3352-cpsw-phy-sel";
813 reg= <0x44e10650 0x4>;
814 reg-names = "gmii-sel";
815 };
816 };
817
818 ocmcram: ocmcram@40300000 {
819 compatible = "mmio-sram";
820 reg = <0x40300000 0x10000>; /* 64k */
821 };
822
823 elm: elm@48080000 {
824 compatible = "ti,am3352-elm";
825 reg = <0x48080000 0x2000>;
826 interrupts = <4>;
827 ti,hwmods = "elm";
828 status = "disabled";
829 };
830
831 lcdc: lcdc@4830e000 {
832 compatible = "ti,am33xx-tilcdc";
833 reg = <0x4830e000 0x1000>;
834 interrupt-parent = <&intc>;
835 interrupts = <36>;
836 ti,hwmods = "lcdc";
837 status = "disabled";
838 };
839
840 tscadc: tscadc@44e0d000 {
841 compatible = "ti,am3359-tscadc";
842 reg = <0x44e0d000 0x1000>;
843 interrupt-parent = <&intc>;
844 interrupts = <16>;
845 ti,hwmods = "adc_tsc";
846 status = "disabled";
847
848 tsc {
849 compatible = "ti,am3359-tsc";
850 };
851 am335x_adc: adc {
852 #io-channel-cells = <1>;
853 compatible = "ti,am3359-adc";
854 };
855 };
856
857 gpmc: gpmc@50000000 {
858 compatible = "ti,am3352-gpmc";
859 ti,hwmods = "gpmc";
860 ti,no-idle-on-init;
861 reg = <0x50000000 0x2000>;
862 interrupts = <100>;
863 dmas = <&edma 52 0>;
864 dma-names = "rxtx";
865 gpmc,num-cs = <7>;
866 gpmc,num-waitpins = <2>;
867 #address-cells = <2>;
868 #size-cells = <1>;
869 interrupt-controller;
870 #interrupt-cells = <2>;
871 status = "disabled";
872 };
873
874 sham: sham@53100000 {
875 compatible = "ti,omap4-sham";
876 ti,hwmods = "sham";
877 reg = <0x53100000 0x200>;
878 interrupts = <109>;
879 dmas = <&edma 36 0>;
880 dma-names = "rx";
881 };
882
883 aes: aes@53500000 {
884 compatible = "ti,omap4-aes";
885 ti,hwmods = "aes";
886 reg = <0x53500000 0xa0>;
887 interrupts = <103>;
888 dmas = <&edma 6 0>,
889 <&edma 5 0>;
890 dma-names = "tx", "rx";
891 };
892
893 mcasp0: mcasp@48038000 {
894 compatible = "ti,am33xx-mcasp-audio";
895 ti,hwmods = "mcasp0";
896 reg = <0x48038000 0x2000>,
897 <0x46000000 0x400000>;
898 reg-names = "mpu", "dat";
899 interrupts = <80>, <81>;
900 interrupt-names = "tx", "rx";
901 status = "disabled";
902 dmas = <&edma 8 2>,
903 <&edma 9 2>;
904 dma-names = "tx", "rx";
905 };
906
907 mcasp1: mcasp@4803C000 {
908 compatible = "ti,am33xx-mcasp-audio";
909 ti,hwmods = "mcasp1";
910 reg = <0x4803C000 0x2000>,
911 <0x46400000 0x400000>;
912 reg-names = "mpu", "dat";
913 interrupts = <82>, <83>;
914 interrupt-names = "tx", "rx";
915 status = "disabled";
916 dmas = <&edma 10 2>,
917 <&edma 11 2>;
918 dma-names = "tx", "rx";
919 };
920
921 rng: rng@48310000 {
922 compatible = "ti,omap4-rng";
923 ti,hwmods = "rng";
924 reg = <0x48310000 0x2000>;
925 interrupts = <111>;
926 };
927 };
928};
929
930/include/ "am33xx-clocks.dtsi"