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1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/bus/ti-sysc.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/pinctrl/am33xx.h>
14#include <dt-bindings/clock/am3.h>
15
16/ {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
19 #address-cells = <1>;
20 #size-cells = <1>;
21 chosen { };
22
23 aliases {
24 i2c0 = &i2c0;
25 i2c1 = &i2c1;
26 i2c2 = &i2c2;
27 serial0 = &uart0;
28 serial1 = &uart1;
29 serial2 = &uart2;
30 serial3 = &uart3;
31 serial4 = &uart4;
32 serial5 = &uart5;
33 d-can0 = &dcan0;
34 d-can1 = &dcan1;
35 usb0 = &usb0;
36 usb1 = &usb1;
37 phy0 = &usb0_phy;
38 phy1 = &usb1_phy;
39 ethernet0 = &cpsw_emac0;
40 ethernet1 = &cpsw_emac1;
41 spi0 = &spi0;
42 spi1 = &spi1;
43 };
44
45 cpus {
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cpu@0 {
49 compatible = "arm,cortex-a8";
50 device_type = "cpu";
51 reg = <0>;
52
53 operating-points-v2 = <&cpu0_opp_table>;
54
55 clocks = <&dpll_mpu_ck>;
56 clock-names = "cpu";
57
58 clock-latency = <300000>; /* From omap-cpufreq driver */
59 };
60 };
61
62 cpu0_opp_table: opp-table {
63 compatible = "operating-points-v2-ti-cpu";
64 syscon = <&scm_conf>;
65
66 /*
67 * The three following nodes are marked with opp-suspend
68 * because the can not be enabled simultaneously on a
69 * single SoC.
70 */
71 opp50-300000000 {
72 opp-hz = /bits/ 64 <300000000>;
73 opp-microvolt = <950000 931000 969000>;
74 opp-supported-hw = <0x06 0x0010>;
75 opp-suspend;
76 };
77
78 opp100-275000000 {
79 opp-hz = /bits/ 64 <275000000>;
80 opp-microvolt = <1100000 1078000 1122000>;
81 opp-supported-hw = <0x01 0x00FF>;
82 opp-suspend;
83 };
84
85 opp100-300000000 {
86 opp-hz = /bits/ 64 <300000000>;
87 opp-microvolt = <1100000 1078000 1122000>;
88 opp-supported-hw = <0x06 0x0020>;
89 opp-suspend;
90 };
91
92 opp100-500000000 {
93 opp-hz = /bits/ 64 <500000000>;
94 opp-microvolt = <1100000 1078000 1122000>;
95 opp-supported-hw = <0x01 0xFFFF>;
96 };
97
98 opp100-600000000 {
99 opp-hz = /bits/ 64 <600000000>;
100 opp-microvolt = <1100000 1078000 1122000>;
101 opp-supported-hw = <0x06 0x0040>;
102 };
103
104 opp120-600000000 {
105 opp-hz = /bits/ 64 <600000000>;
106 opp-microvolt = <1200000 1176000 1224000>;
107 opp-supported-hw = <0x01 0xFFFF>;
108 };
109
110 opp120-720000000 {
111 opp-hz = /bits/ 64 <720000000>;
112 opp-microvolt = <1200000 1176000 1224000>;
113 opp-supported-hw = <0x06 0x0080>;
114 };
115
116 oppturbo-720000000 {
117 opp-hz = /bits/ 64 <720000000>;
118 opp-microvolt = <1260000 1234800 1285200>;
119 opp-supported-hw = <0x01 0xFFFF>;
120 };
121
122 oppturbo-800000000 {
123 opp-hz = /bits/ 64 <800000000>;
124 opp-microvolt = <1260000 1234800 1285200>;
125 opp-supported-hw = <0x06 0x0100>;
126 };
127
128 oppnitro-1000000000 {
129 opp-hz = /bits/ 64 <1000000000>;
130 opp-microvolt = <1325000 1298500 1351500>;
131 opp-supported-hw = <0x04 0x0200>;
132 };
133 };
134
135 pmu@4b000000 {
136 compatible = "arm,cortex-a8-pmu";
137 interrupts = <3>;
138 reg = <0x4b000000 0x1000000>;
139 ti,hwmods = "debugss";
140 };
141
142 /*
143 * The soc node represents the soc top level view. It is used for IPs
144 * that are not memory mapped in the MPU view or for the MPU itself.
145 */
146 soc {
147 compatible = "ti,omap-infra";
148 mpu {
149 compatible = "ti,omap3-mpu";
150 ti,hwmods = "mpu";
151 pm-sram = <&pm_sram_code
152 &pm_sram_data>;
153 };
154 };
155
156 /*
157 * XXX: Use a flat representation of the AM33XX interconnect.
158 * The real AM33XX interconnect network is quite complex. Since
159 * it will not bring real advantage to represent that in DT
160 * for the moment, just use a fake OCP bus entry to represent
161 * the whole bus hierarchy.
162 */
163 ocp {
164 compatible = "simple-bus";
165 #address-cells = <1>;
166 #size-cells = <1>;
167 ranges;
168 ti,hwmods = "l3_main";
169
170 l4_wkup: interconnect@44c00000 {
171 wkup_m3: wkup_m3@100000 {
172 compatible = "ti,am3352-wkup-m3";
173 reg = <0x100000 0x4000>,
174 <0x180000 0x2000>;
175 reg-names = "umem", "dmem";
176 ti,hwmods = "wkup_m3";
177 ti,pm-firmware = "am335x-pm-firmware.elf";
178 };
179 };
180 l4_per: interconnect@48000000 {
181 };
182 l4_fw: interconnect@47c00000 {
183 };
184 l4_fast: interconnect@4a000000 {
185 };
186 l4_mpuss: interconnect@4b140000 {
187 };
188
189 intc: interrupt-controller@48200000 {
190 compatible = "ti,am33xx-intc";
191 interrupt-controller;
192 #interrupt-cells = <1>;
193 reg = <0x48200000 0x1000>;
194 };
195
196 edma: edma@49000000 {
197 compatible = "ti,edma3-tpcc";
198 ti,hwmods = "tpcc";
199 reg = <0x49000000 0x10000>;
200 reg-names = "edma3_cc";
201 interrupts = <12 13 14>;
202 interrupt-names = "edma3_ccint", "edma3_mperr",
203 "edma3_ccerrint";
204 dma-requests = <64>;
205 #dma-cells = <2>;
206
207 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
208 <&edma_tptc2 0>;
209
210 ti,edma-memcpy-channels = <20 21>;
211 };
212
213 edma_tptc0: tptc@49800000 {
214 compatible = "ti,edma3-tptc";
215 ti,hwmods = "tptc0";
216 reg = <0x49800000 0x100000>;
217 interrupts = <112>;
218 interrupt-names = "edma3_tcerrint";
219 };
220
221 edma_tptc1: tptc@49900000 {
222 compatible = "ti,edma3-tptc";
223 ti,hwmods = "tptc1";
224 reg = <0x49900000 0x100000>;
225 interrupts = <113>;
226 interrupt-names = "edma3_tcerrint";
227 };
228
229 edma_tptc2: tptc@49a00000 {
230 compatible = "ti,edma3-tptc";
231 ti,hwmods = "tptc2";
232 reg = <0x49a00000 0x100000>;
233 interrupts = <114>;
234 interrupt-names = "edma3_tcerrint";
235 };
236
237 target-module@47810000 {
238 compatible = "ti,sysc-omap2", "ti,sysc";
239 ti,hwmods = "mmc3";
240 reg = <0x478102fc 0x4>,
241 <0x47810110 0x4>,
242 <0x47810114 0x4>;
243 reg-names = "rev", "sysc", "syss";
244 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
245 SYSC_OMAP2_ENAWAKEUP |
246 SYSC_OMAP2_SOFTRESET |
247 SYSC_OMAP2_AUTOIDLE)>;
248 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
249 <SYSC_IDLE_NO>,
250 <SYSC_IDLE_SMART>;
251 ti,syss-mask = <1>;
252 clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
253 clock-names = "fck";
254 #address-cells = <1>;
255 #size-cells = <1>;
256 ranges = <0x0 0x47810000 0x1000>;
257
258 mmc3: mmc@0 {
259 compatible = "ti,omap4-hsmmc";
260 ti,needs-special-reset;
261 interrupts = <29>;
262 reg = <0x0 0x1000>;
263 };
264 };
265
266 usb: usb@47400000 {
267 compatible = "ti,am33xx-usb";
268 reg = <0x47400000 0x1000>;
269 ranges;
270 #address-cells = <1>;
271 #size-cells = <1>;
272 ti,hwmods = "usb_otg_hs";
273 status = "disabled";
274
275 usb_ctrl_mod: control@44e10620 {
276 compatible = "ti,am335x-usb-ctrl-module";
277 reg = <0x44e10620 0x10
278 0x44e10648 0x4>;
279 reg-names = "phy_ctrl", "wakeup";
280 status = "disabled";
281 };
282
283 usb0_phy: usb-phy@47401300 {
284 compatible = "ti,am335x-usb-phy";
285 reg = <0x47401300 0x100>;
286 reg-names = "phy";
287 status = "disabled";
288 ti,ctrl_mod = <&usb_ctrl_mod>;
289 #phy-cells = <0>;
290 };
291
292 usb0: usb@47401000 {
293 compatible = "ti,musb-am33xx";
294 status = "disabled";
295 reg = <0x47401400 0x400
296 0x47401000 0x200>;
297 reg-names = "mc", "control";
298
299 interrupts = <18>;
300 interrupt-names = "mc";
301 dr_mode = "otg";
302 mentor,multipoint = <1>;
303 mentor,num-eps = <16>;
304 mentor,ram-bits = <12>;
305 mentor,power = <500>;
306 phys = <&usb0_phy>;
307
308 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
309 &cppi41dma 2 0 &cppi41dma 3 0
310 &cppi41dma 4 0 &cppi41dma 5 0
311 &cppi41dma 6 0 &cppi41dma 7 0
312 &cppi41dma 8 0 &cppi41dma 9 0
313 &cppi41dma 10 0 &cppi41dma 11 0
314 &cppi41dma 12 0 &cppi41dma 13 0
315 &cppi41dma 14 0 &cppi41dma 0 1
316 &cppi41dma 1 1 &cppi41dma 2 1
317 &cppi41dma 3 1 &cppi41dma 4 1
318 &cppi41dma 5 1 &cppi41dma 6 1
319 &cppi41dma 7 1 &cppi41dma 8 1
320 &cppi41dma 9 1 &cppi41dma 10 1
321 &cppi41dma 11 1 &cppi41dma 12 1
322 &cppi41dma 13 1 &cppi41dma 14 1>;
323 dma-names =
324 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
325 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
326 "rx14", "rx15",
327 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
328 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
329 "tx14", "tx15";
330 };
331
332 usb1_phy: usb-phy@47401b00 {
333 compatible = "ti,am335x-usb-phy";
334 reg = <0x47401b00 0x100>;
335 reg-names = "phy";
336 status = "disabled";
337 ti,ctrl_mod = <&usb_ctrl_mod>;
338 #phy-cells = <0>;
339 };
340
341 usb1: usb@47401800 {
342 compatible = "ti,musb-am33xx";
343 status = "disabled";
344 reg = <0x47401c00 0x400
345 0x47401800 0x200>;
346 reg-names = "mc", "control";
347 interrupts = <19>;
348 interrupt-names = "mc";
349 dr_mode = "otg";
350 mentor,multipoint = <1>;
351 mentor,num-eps = <16>;
352 mentor,ram-bits = <12>;
353 mentor,power = <500>;
354 phys = <&usb1_phy>;
355
356 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
357 &cppi41dma 17 0 &cppi41dma 18 0
358 &cppi41dma 19 0 &cppi41dma 20 0
359 &cppi41dma 21 0 &cppi41dma 22 0
360 &cppi41dma 23 0 &cppi41dma 24 0
361 &cppi41dma 25 0 &cppi41dma 26 0
362 &cppi41dma 27 0 &cppi41dma 28 0
363 &cppi41dma 29 0 &cppi41dma 15 1
364 &cppi41dma 16 1 &cppi41dma 17 1
365 &cppi41dma 18 1 &cppi41dma 19 1
366 &cppi41dma 20 1 &cppi41dma 21 1
367 &cppi41dma 22 1 &cppi41dma 23 1
368 &cppi41dma 24 1 &cppi41dma 25 1
369 &cppi41dma 26 1 &cppi41dma 27 1
370 &cppi41dma 28 1 &cppi41dma 29 1>;
371 dma-names =
372 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
373 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
374 "rx14", "rx15",
375 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
376 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
377 "tx14", "tx15";
378 };
379
380 cppi41dma: dma-controller@47402000 {
381 compatible = "ti,am3359-cppi41";
382 reg = <0x47400000 0x1000
383 0x47402000 0x1000
384 0x47403000 0x1000
385 0x47404000 0x4000>;
386 reg-names = "glue", "controller", "scheduler", "queuemgr";
387 interrupts = <17>;
388 interrupt-names = "glue";
389 #dma-cells = <2>;
390 #dma-channels = <30>;
391 #dma-requests = <256>;
392 status = "disabled";
393 };
394 };
395
396 ocmcram: ocmcram@40300000 {
397 compatible = "mmio-sram";
398 reg = <0x40300000 0x10000>; /* 64k */
399 ranges = <0x0 0x40300000 0x10000>;
400 #address-cells = <1>;
401 #size-cells = <1>;
402
403 pm_sram_code: pm-sram-code@0 {
404 compatible = "ti,sram";
405 reg = <0x0 0x1000>;
406 protect-exec;
407 };
408
409 pm_sram_data: pm-sram-data@1000 {
410 compatible = "ti,sram";
411 reg = <0x1000 0x1000>;
412 pool;
413 };
414 };
415
416 emif: emif@4c000000 {
417 compatible = "ti,emif-am3352";
418 reg = <0x4c000000 0x1000000>;
419 ti,hwmods = "emif";
420 interrupts = <101>;
421 sram = <&pm_sram_code
422 &pm_sram_data>;
423 ti,no-idle;
424 };
425
426 gpmc: gpmc@50000000 {
427 compatible = "ti,am3352-gpmc";
428 ti,hwmods = "gpmc";
429 ti,no-idle-on-init;
430 reg = <0x50000000 0x2000>;
431 interrupts = <100>;
432 dmas = <&edma 52 0>;
433 dma-names = "rxtx";
434 gpmc,num-cs = <7>;
435 gpmc,num-waitpins = <2>;
436 #address-cells = <2>;
437 #size-cells = <1>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
440 gpio-controller;
441 #gpio-cells = <2>;
442 status = "disabled";
443 };
444
445 sham: sham@53100000 {
446 compatible = "ti,omap4-sham";
447 ti,hwmods = "sham";
448 reg = <0x53100000 0x200>;
449 interrupts = <109>;
450 dmas = <&edma 36 0>;
451 dma-names = "rx";
452 };
453
454 aes: aes@53500000 {
455 compatible = "ti,omap4-aes";
456 ti,hwmods = "aes";
457 reg = <0x53500000 0xa0>;
458 interrupts = <103>;
459 dmas = <&edma 6 0>,
460 <&edma 5 0>;
461 dma-names = "tx", "rx";
462 };
463 };
464};
465
466#include "am33xx-l4.dtsi"
467#include "am33xx-clocks.dtsi"
1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/pinctrl/am33xx.h>
13
14/ {
15 compatible = "ti,am33xx";
16 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 chosen { };
20
21 aliases {
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 serial0 = &uart0;
26 serial1 = &uart1;
27 serial2 = &uart2;
28 serial3 = &uart3;
29 serial4 = &uart4;
30 serial5 = &uart5;
31 d_can0 = &dcan0;
32 d_can1 = &dcan1;
33 usb0 = &usb0;
34 usb1 = &usb1;
35 phy0 = &usb0_phy;
36 phy1 = &usb1_phy;
37 ethernet0 = &cpsw_emac0;
38 ethernet1 = &cpsw_emac1;
39 };
40
41 cpus {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 cpu@0 {
45 compatible = "arm,cortex-a8";
46 device_type = "cpu";
47 reg = <0>;
48
49 /*
50 * To consider voltage drop between PMIC and SoC,
51 * tolerance value is reduced to 2% from 4% and
52 * voltage value is increased as a precaution.
53 */
54 operating-points = <
55 /* kHz uV */
56 720000 1285000
57 600000 1225000
58 500000 1125000
59 275000 1125000
60 >;
61 voltage-tolerance = <2>; /* 2 percentage */
62
63 clocks = <&dpll_mpu_ck>;
64 clock-names = "cpu";
65
66 clock-latency = <300000>; /* From omap-cpufreq driver */
67 };
68 };
69
70 pmu {
71 compatible = "arm,cortex-a8-pmu";
72 interrupts = <3>;
73 };
74
75 /*
76 * The soc node represents the soc top level view. It is used for IPs
77 * that are not memory mapped in the MPU view or for the MPU itself.
78 */
79 soc {
80 compatible = "ti,omap-infra";
81 mpu {
82 compatible = "ti,omap3-mpu";
83 ti,hwmods = "mpu";
84 };
85 };
86
87 /*
88 * XXX: Use a flat representation of the AM33XX interconnect.
89 * The real AM33XX interconnect network is quite complex. Since
90 * it will not bring real advantage to represent that in DT
91 * for the moment, just use a fake OCP bus entry to represent
92 * the whole bus hierarchy.
93 */
94 ocp {
95 compatible = "simple-bus";
96 #address-cells = <1>;
97 #size-cells = <1>;
98 ranges;
99 ti,hwmods = "l3_main";
100
101 l4_wkup: l4_wkup@44c00000 {
102 compatible = "ti,am3-l4-wkup", "simple-bus";
103 #address-cells = <1>;
104 #size-cells = <1>;
105 ranges = <0 0x44c00000 0x280000>;
106
107 wkup_m3: wkup_m3@100000 {
108 compatible = "ti,am3352-wkup-m3";
109 reg = <0x100000 0x4000>,
110 <0x180000 0x2000>;
111 reg-names = "umem", "dmem";
112 ti,hwmods = "wkup_m3";
113 ti,pm-firmware = "am335x-pm-firmware.elf";
114 };
115
116 prcm: prcm@200000 {
117 compatible = "ti,am3-prcm";
118 reg = <0x200000 0x4000>;
119
120 prcm_clocks: clocks {
121 #address-cells = <1>;
122 #size-cells = <0>;
123 };
124
125 prcm_clockdomains: clockdomains {
126 };
127 };
128
129 scm: scm@210000 {
130 compatible = "ti,am3-scm", "simple-bus";
131 reg = <0x210000 0x2000>;
132 #address-cells = <1>;
133 #size-cells = <1>;
134 #pinctrl-cells = <1>;
135 ranges = <0 0x210000 0x2000>;
136
137 am33xx_pinmux: pinmux@800 {
138 compatible = "pinctrl-single";
139 reg = <0x800 0x238>;
140 #address-cells = <1>;
141 #size-cells = <0>;
142 #pinctrl-cells = <1>;
143 pinctrl-single,register-width = <32>;
144 pinctrl-single,function-mask = <0x7f>;
145 };
146
147 scm_conf: scm_conf@0 {
148 compatible = "syscon";
149 reg = <0x0 0x800>;
150 #address-cells = <1>;
151 #size-cells = <1>;
152
153 scm_clocks: clocks {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 };
157 };
158
159 wkup_m3_ipc: wkup_m3_ipc@1324 {
160 compatible = "ti,am3352-wkup-m3-ipc";
161 reg = <0x1324 0x24>;
162 interrupts = <78>;
163 ti,rproc = <&wkup_m3>;
164 mboxes = <&mailbox &mbox_wkupm3>;
165 };
166
167 edma_xbar: dma-router@f90 {
168 compatible = "ti,am335x-edma-crossbar";
169 reg = <0xf90 0x40>;
170 #dma-cells = <3>;
171 dma-requests = <32>;
172 dma-masters = <&edma>;
173 };
174
175 scm_clockdomains: clockdomains {
176 };
177 };
178 };
179
180 intc: interrupt-controller@48200000 {
181 compatible = "ti,am33xx-intc";
182 interrupt-controller;
183 #interrupt-cells = <1>;
184 reg = <0x48200000 0x1000>;
185 };
186
187 edma: edma@49000000 {
188 compatible = "ti,edma3-tpcc";
189 ti,hwmods = "tpcc";
190 reg = <0x49000000 0x10000>;
191 reg-names = "edma3_cc";
192 interrupts = <12 13 14>;
193 interrupt-names = "edma3_ccint", "edma3_mperr",
194 "edma3_ccerrint";
195 dma-requests = <64>;
196 #dma-cells = <2>;
197
198 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
199 <&edma_tptc2 0>;
200
201 ti,edma-memcpy-channels = <20 21>;
202 };
203
204 edma_tptc0: tptc@49800000 {
205 compatible = "ti,edma3-tptc";
206 ti,hwmods = "tptc0";
207 reg = <0x49800000 0x100000>;
208 interrupts = <112>;
209 interrupt-names = "edma3_tcerrint";
210 };
211
212 edma_tptc1: tptc@49900000 {
213 compatible = "ti,edma3-tptc";
214 ti,hwmods = "tptc1";
215 reg = <0x49900000 0x100000>;
216 interrupts = <113>;
217 interrupt-names = "edma3_tcerrint";
218 };
219
220 edma_tptc2: tptc@49a00000 {
221 compatible = "ti,edma3-tptc";
222 ti,hwmods = "tptc2";
223 reg = <0x49a00000 0x100000>;
224 interrupts = <114>;
225 interrupt-names = "edma3_tcerrint";
226 };
227
228 gpio0: gpio@44e07000 {
229 compatible = "ti,omap4-gpio";
230 ti,hwmods = "gpio1";
231 gpio-controller;
232 #gpio-cells = <2>;
233 interrupt-controller;
234 #interrupt-cells = <2>;
235 reg = <0x44e07000 0x1000>;
236 interrupts = <96>;
237 };
238
239 gpio1: gpio@4804c000 {
240 compatible = "ti,omap4-gpio";
241 ti,hwmods = "gpio2";
242 gpio-controller;
243 #gpio-cells = <2>;
244 interrupt-controller;
245 #interrupt-cells = <2>;
246 reg = <0x4804c000 0x1000>;
247 interrupts = <98>;
248 };
249
250 gpio2: gpio@481ac000 {
251 compatible = "ti,omap4-gpio";
252 ti,hwmods = "gpio3";
253 gpio-controller;
254 #gpio-cells = <2>;
255 interrupt-controller;
256 #interrupt-cells = <2>;
257 reg = <0x481ac000 0x1000>;
258 interrupts = <32>;
259 };
260
261 gpio3: gpio@481ae000 {
262 compatible = "ti,omap4-gpio";
263 ti,hwmods = "gpio4";
264 gpio-controller;
265 #gpio-cells = <2>;
266 interrupt-controller;
267 #interrupt-cells = <2>;
268 reg = <0x481ae000 0x1000>;
269 interrupts = <62>;
270 };
271
272 uart0: serial@44e09000 {
273 compatible = "ti,am3352-uart", "ti,omap3-uart";
274 ti,hwmods = "uart1";
275 clock-frequency = <48000000>;
276 reg = <0x44e09000 0x2000>;
277 interrupts = <72>;
278 status = "disabled";
279 dmas = <&edma 26 0>, <&edma 27 0>;
280 dma-names = "tx", "rx";
281 };
282
283 uart1: serial@48022000 {
284 compatible = "ti,am3352-uart", "ti,omap3-uart";
285 ti,hwmods = "uart2";
286 clock-frequency = <48000000>;
287 reg = <0x48022000 0x2000>;
288 interrupts = <73>;
289 status = "disabled";
290 dmas = <&edma 28 0>, <&edma 29 0>;
291 dma-names = "tx", "rx";
292 };
293
294 uart2: serial@48024000 {
295 compatible = "ti,am3352-uart", "ti,omap3-uart";
296 ti,hwmods = "uart3";
297 clock-frequency = <48000000>;
298 reg = <0x48024000 0x2000>;
299 interrupts = <74>;
300 status = "disabled";
301 dmas = <&edma 30 0>, <&edma 31 0>;
302 dma-names = "tx", "rx";
303 };
304
305 uart3: serial@481a6000 {
306 compatible = "ti,am3352-uart", "ti,omap3-uart";
307 ti,hwmods = "uart4";
308 clock-frequency = <48000000>;
309 reg = <0x481a6000 0x2000>;
310 interrupts = <44>;
311 status = "disabled";
312 };
313
314 uart4: serial@481a8000 {
315 compatible = "ti,am3352-uart", "ti,omap3-uart";
316 ti,hwmods = "uart5";
317 clock-frequency = <48000000>;
318 reg = <0x481a8000 0x2000>;
319 interrupts = <45>;
320 status = "disabled";
321 };
322
323 uart5: serial@481aa000 {
324 compatible = "ti,am3352-uart", "ti,omap3-uart";
325 ti,hwmods = "uart6";
326 clock-frequency = <48000000>;
327 reg = <0x481aa000 0x2000>;
328 interrupts = <46>;
329 status = "disabled";
330 };
331
332 i2c0: i2c@44e0b000 {
333 compatible = "ti,omap4-i2c";
334 #address-cells = <1>;
335 #size-cells = <0>;
336 ti,hwmods = "i2c1";
337 reg = <0x44e0b000 0x1000>;
338 interrupts = <70>;
339 status = "disabled";
340 };
341
342 i2c1: i2c@4802a000 {
343 compatible = "ti,omap4-i2c";
344 #address-cells = <1>;
345 #size-cells = <0>;
346 ti,hwmods = "i2c2";
347 reg = <0x4802a000 0x1000>;
348 interrupts = <71>;
349 status = "disabled";
350 };
351
352 i2c2: i2c@4819c000 {
353 compatible = "ti,omap4-i2c";
354 #address-cells = <1>;
355 #size-cells = <0>;
356 ti,hwmods = "i2c3";
357 reg = <0x4819c000 0x1000>;
358 interrupts = <30>;
359 status = "disabled";
360 };
361
362 mmc1: mmc@48060000 {
363 compatible = "ti,omap4-hsmmc";
364 ti,hwmods = "mmc1";
365 ti,dual-volt;
366 ti,needs-special-reset;
367 ti,needs-special-hs-handling;
368 dmas = <&edma_xbar 24 0 0
369 &edma_xbar 25 0 0>;
370 dma-names = "tx", "rx";
371 interrupts = <64>;
372 interrupt-parent = <&intc>;
373 reg = <0x48060000 0x1000>;
374 status = "disabled";
375 };
376
377 mmc2: mmc@481d8000 {
378 compatible = "ti,omap4-hsmmc";
379 ti,hwmods = "mmc2";
380 ti,needs-special-reset;
381 dmas = <&edma 2 0
382 &edma 3 0>;
383 dma-names = "tx", "rx";
384 interrupts = <28>;
385 interrupt-parent = <&intc>;
386 reg = <0x481d8000 0x1000>;
387 status = "disabled";
388 };
389
390 mmc3: mmc@47810000 {
391 compatible = "ti,omap4-hsmmc";
392 ti,hwmods = "mmc3";
393 ti,needs-special-reset;
394 interrupts = <29>;
395 interrupt-parent = <&intc>;
396 reg = <0x47810000 0x1000>;
397 status = "disabled";
398 };
399
400 hwspinlock: spinlock@480ca000 {
401 compatible = "ti,omap4-hwspinlock";
402 reg = <0x480ca000 0x1000>;
403 ti,hwmods = "spinlock";
404 #hwlock-cells = <1>;
405 };
406
407 wdt2: wdt@44e35000 {
408 compatible = "ti,omap3-wdt";
409 ti,hwmods = "wd_timer2";
410 reg = <0x44e35000 0x1000>;
411 interrupts = <91>;
412 };
413
414 dcan0: can@481cc000 {
415 compatible = "ti,am3352-d_can";
416 ti,hwmods = "d_can0";
417 reg = <0x481cc000 0x2000>;
418 clocks = <&dcan0_fck>;
419 clock-names = "fck";
420 syscon-raminit = <&scm_conf 0x644 0>;
421 interrupts = <52>;
422 status = "disabled";
423 };
424
425 dcan1: can@481d0000 {
426 compatible = "ti,am3352-d_can";
427 ti,hwmods = "d_can1";
428 reg = <0x481d0000 0x2000>;
429 clocks = <&dcan1_fck>;
430 clock-names = "fck";
431 syscon-raminit = <&scm_conf 0x644 1>;
432 interrupts = <55>;
433 status = "disabled";
434 };
435
436 mailbox: mailbox@480C8000 {
437 compatible = "ti,omap4-mailbox";
438 reg = <0x480C8000 0x200>;
439 interrupts = <77>;
440 ti,hwmods = "mailbox";
441 #mbox-cells = <1>;
442 ti,mbox-num-users = <4>;
443 ti,mbox-num-fifos = <8>;
444 mbox_wkupm3: wkup_m3 {
445 ti,mbox-send-noirq;
446 ti,mbox-tx = <0 0 0>;
447 ti,mbox-rx = <0 0 3>;
448 };
449 };
450
451 timer1: timer@44e31000 {
452 compatible = "ti,am335x-timer-1ms";
453 reg = <0x44e31000 0x400>;
454 interrupts = <67>;
455 ti,hwmods = "timer1";
456 ti,timer-alwon;
457 };
458
459 timer2: timer@48040000 {
460 compatible = "ti,am335x-timer";
461 reg = <0x48040000 0x400>;
462 interrupts = <68>;
463 ti,hwmods = "timer2";
464 };
465
466 timer3: timer@48042000 {
467 compatible = "ti,am335x-timer";
468 reg = <0x48042000 0x400>;
469 interrupts = <69>;
470 ti,hwmods = "timer3";
471 };
472
473 timer4: timer@48044000 {
474 compatible = "ti,am335x-timer";
475 reg = <0x48044000 0x400>;
476 interrupts = <92>;
477 ti,hwmods = "timer4";
478 ti,timer-pwm;
479 };
480
481 timer5: timer@48046000 {
482 compatible = "ti,am335x-timer";
483 reg = <0x48046000 0x400>;
484 interrupts = <93>;
485 ti,hwmods = "timer5";
486 ti,timer-pwm;
487 };
488
489 timer6: timer@48048000 {
490 compatible = "ti,am335x-timer";
491 reg = <0x48048000 0x400>;
492 interrupts = <94>;
493 ti,hwmods = "timer6";
494 ti,timer-pwm;
495 };
496
497 timer7: timer@4804a000 {
498 compatible = "ti,am335x-timer";
499 reg = <0x4804a000 0x400>;
500 interrupts = <95>;
501 ti,hwmods = "timer7";
502 ti,timer-pwm;
503 };
504
505 rtc: rtc@44e3e000 {
506 compatible = "ti,am3352-rtc", "ti,da830-rtc";
507 reg = <0x44e3e000 0x1000>;
508 interrupts = <75
509 76>;
510 ti,hwmods = "rtc";
511 clocks = <&clkdiv32k_ick>;
512 clock-names = "int-clk";
513 };
514
515 spi0: spi@48030000 {
516 compatible = "ti,omap4-mcspi";
517 #address-cells = <1>;
518 #size-cells = <0>;
519 reg = <0x48030000 0x400>;
520 interrupts = <65>;
521 ti,spi-num-cs = <2>;
522 ti,hwmods = "spi0";
523 dmas = <&edma 16 0
524 &edma 17 0
525 &edma 18 0
526 &edma 19 0>;
527 dma-names = "tx0", "rx0", "tx1", "rx1";
528 status = "disabled";
529 };
530
531 spi1: spi@481a0000 {
532 compatible = "ti,omap4-mcspi";
533 #address-cells = <1>;
534 #size-cells = <0>;
535 reg = <0x481a0000 0x400>;
536 interrupts = <125>;
537 ti,spi-num-cs = <2>;
538 ti,hwmods = "spi1";
539 dmas = <&edma 42 0
540 &edma 43 0
541 &edma 44 0
542 &edma 45 0>;
543 dma-names = "tx0", "rx0", "tx1", "rx1";
544 status = "disabled";
545 };
546
547 usb: usb@47400000 {
548 compatible = "ti,am33xx-usb";
549 reg = <0x47400000 0x1000>;
550 ranges;
551 #address-cells = <1>;
552 #size-cells = <1>;
553 ti,hwmods = "usb_otg_hs";
554 status = "disabled";
555
556 usb_ctrl_mod: control@44e10620 {
557 compatible = "ti,am335x-usb-ctrl-module";
558 reg = <0x44e10620 0x10
559 0x44e10648 0x4>;
560 reg-names = "phy_ctrl", "wakeup";
561 status = "disabled";
562 };
563
564 usb0_phy: usb-phy@47401300 {
565 compatible = "ti,am335x-usb-phy";
566 reg = <0x47401300 0x100>;
567 reg-names = "phy";
568 status = "disabled";
569 ti,ctrl_mod = <&usb_ctrl_mod>;
570 };
571
572 usb0: usb@47401000 {
573 compatible = "ti,musb-am33xx";
574 status = "disabled";
575 reg = <0x47401400 0x400
576 0x47401000 0x200>;
577 reg-names = "mc", "control";
578
579 interrupts = <18>;
580 interrupt-names = "mc";
581 dr_mode = "otg";
582 mentor,multipoint = <1>;
583 mentor,num-eps = <16>;
584 mentor,ram-bits = <12>;
585 mentor,power = <500>;
586 phys = <&usb0_phy>;
587
588 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
589 &cppi41dma 2 0 &cppi41dma 3 0
590 &cppi41dma 4 0 &cppi41dma 5 0
591 &cppi41dma 6 0 &cppi41dma 7 0
592 &cppi41dma 8 0 &cppi41dma 9 0
593 &cppi41dma 10 0 &cppi41dma 11 0
594 &cppi41dma 12 0 &cppi41dma 13 0
595 &cppi41dma 14 0 &cppi41dma 0 1
596 &cppi41dma 1 1 &cppi41dma 2 1
597 &cppi41dma 3 1 &cppi41dma 4 1
598 &cppi41dma 5 1 &cppi41dma 6 1
599 &cppi41dma 7 1 &cppi41dma 8 1
600 &cppi41dma 9 1 &cppi41dma 10 1
601 &cppi41dma 11 1 &cppi41dma 12 1
602 &cppi41dma 13 1 &cppi41dma 14 1>;
603 dma-names =
604 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
605 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
606 "rx14", "rx15",
607 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
608 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
609 "tx14", "tx15";
610 };
611
612 usb1_phy: usb-phy@47401b00 {
613 compatible = "ti,am335x-usb-phy";
614 reg = <0x47401b00 0x100>;
615 reg-names = "phy";
616 status = "disabled";
617 ti,ctrl_mod = <&usb_ctrl_mod>;
618 };
619
620 usb1: usb@47401800 {
621 compatible = "ti,musb-am33xx";
622 status = "disabled";
623 reg = <0x47401c00 0x400
624 0x47401800 0x200>;
625 reg-names = "mc", "control";
626 interrupts = <19>;
627 interrupt-names = "mc";
628 dr_mode = "otg";
629 mentor,multipoint = <1>;
630 mentor,num-eps = <16>;
631 mentor,ram-bits = <12>;
632 mentor,power = <500>;
633 phys = <&usb1_phy>;
634
635 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
636 &cppi41dma 17 0 &cppi41dma 18 0
637 &cppi41dma 19 0 &cppi41dma 20 0
638 &cppi41dma 21 0 &cppi41dma 22 0
639 &cppi41dma 23 0 &cppi41dma 24 0
640 &cppi41dma 25 0 &cppi41dma 26 0
641 &cppi41dma 27 0 &cppi41dma 28 0
642 &cppi41dma 29 0 &cppi41dma 15 1
643 &cppi41dma 16 1 &cppi41dma 17 1
644 &cppi41dma 18 1 &cppi41dma 19 1
645 &cppi41dma 20 1 &cppi41dma 21 1
646 &cppi41dma 22 1 &cppi41dma 23 1
647 &cppi41dma 24 1 &cppi41dma 25 1
648 &cppi41dma 26 1 &cppi41dma 27 1
649 &cppi41dma 28 1 &cppi41dma 29 1>;
650 dma-names =
651 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
652 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
653 "rx14", "rx15",
654 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
655 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
656 "tx14", "tx15";
657 };
658
659 cppi41dma: dma-controller@47402000 {
660 compatible = "ti,am3359-cppi41";
661 reg = <0x47400000 0x1000
662 0x47402000 0x1000
663 0x47403000 0x1000
664 0x47404000 0x4000>;
665 reg-names = "glue", "controller", "scheduler", "queuemgr";
666 interrupts = <17>;
667 interrupt-names = "glue";
668 #dma-cells = <2>;
669 #dma-channels = <30>;
670 #dma-requests = <256>;
671 status = "disabled";
672 };
673 };
674
675 epwmss0: epwmss@48300000 {
676 compatible = "ti,am33xx-pwmss";
677 reg = <0x48300000 0x10>;
678 ti,hwmods = "epwmss0";
679 #address-cells = <1>;
680 #size-cells = <1>;
681 status = "disabled";
682 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
683 0x48300180 0x48300180 0x80 /* EQEP */
684 0x48300200 0x48300200 0x80>; /* EHRPWM */
685
686 ecap0: ecap@48300100 {
687 compatible = "ti,am3352-ecap",
688 "ti,am33xx-ecap";
689 #pwm-cells = <3>;
690 reg = <0x48300100 0x80>;
691 clocks = <&l4ls_gclk>;
692 clock-names = "fck";
693 interrupts = <31>;
694 interrupt-names = "ecap0";
695 status = "disabled";
696 };
697
698 ehrpwm0: pwm@48300200 {
699 compatible = "ti,am3352-ehrpwm",
700 "ti,am33xx-ehrpwm";
701 #pwm-cells = <3>;
702 reg = <0x48300200 0x80>;
703 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
704 clock-names = "tbclk", "fck";
705 status = "disabled";
706 };
707 };
708
709 epwmss1: epwmss@48302000 {
710 compatible = "ti,am33xx-pwmss";
711 reg = <0x48302000 0x10>;
712 ti,hwmods = "epwmss1";
713 #address-cells = <1>;
714 #size-cells = <1>;
715 status = "disabled";
716 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
717 0x48302180 0x48302180 0x80 /* EQEP */
718 0x48302200 0x48302200 0x80>; /* EHRPWM */
719
720 ecap1: ecap@48302100 {
721 compatible = "ti,am3352-ecap",
722 "ti,am33xx-ecap";
723 #pwm-cells = <3>;
724 reg = <0x48302100 0x80>;
725 clocks = <&l4ls_gclk>;
726 clock-names = "fck";
727 interrupts = <47>;
728 interrupt-names = "ecap1";
729 status = "disabled";
730 };
731
732 ehrpwm1: pwm@48302200 {
733 compatible = "ti,am3352-ehrpwm",
734 "ti,am33xx-ehrpwm";
735 #pwm-cells = <3>;
736 reg = <0x48302200 0x80>;
737 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
738 clock-names = "tbclk", "fck";
739 status = "disabled";
740 };
741 };
742
743 epwmss2: epwmss@48304000 {
744 compatible = "ti,am33xx-pwmss";
745 reg = <0x48304000 0x10>;
746 ti,hwmods = "epwmss2";
747 #address-cells = <1>;
748 #size-cells = <1>;
749 status = "disabled";
750 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
751 0x48304180 0x48304180 0x80 /* EQEP */
752 0x48304200 0x48304200 0x80>; /* EHRPWM */
753
754 ecap2: ecap@48304100 {
755 compatible = "ti,am3352-ecap",
756 "ti,am33xx-ecap";
757 #pwm-cells = <3>;
758 reg = <0x48304100 0x80>;
759 clocks = <&l4ls_gclk>;
760 clock-names = "fck";
761 interrupts = <61>;
762 interrupt-names = "ecap2";
763 status = "disabled";
764 };
765
766 ehrpwm2: pwm@48304200 {
767 compatible = "ti,am3352-ehrpwm",
768 "ti,am33xx-ehrpwm";
769 #pwm-cells = <3>;
770 reg = <0x48304200 0x80>;
771 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
772 clock-names = "tbclk", "fck";
773 status = "disabled";
774 };
775 };
776
777 mac: ethernet@4a100000 {
778 compatible = "ti,am335x-cpsw","ti,cpsw";
779 ti,hwmods = "cpgmac0";
780 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
781 clock-names = "fck", "cpts";
782 cpdma_channels = <8>;
783 ale_entries = <1024>;
784 bd_ram_size = <0x2000>;
785 no_bd_ram = <0>;
786 mac_control = <0x20>;
787 slaves = <2>;
788 active_slave = <0>;
789 cpts_clock_mult = <0x80000000>;
790 cpts_clock_shift = <29>;
791 reg = <0x4a100000 0x800
792 0x4a101200 0x100>;
793 #address-cells = <1>;
794 #size-cells = <1>;
795 interrupt-parent = <&intc>;
796 /*
797 * c0_rx_thresh_pend
798 * c0_rx_pend
799 * c0_tx_pend
800 * c0_misc_pend
801 */
802 interrupts = <40 41 42 43>;
803 ranges;
804 syscon = <&scm_conf>;
805 status = "disabled";
806
807 davinci_mdio: mdio@4a101000 {
808 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
809 #address-cells = <1>;
810 #size-cells = <0>;
811 ti,hwmods = "davinci_mdio";
812 bus_freq = <1000000>;
813 reg = <0x4a101000 0x100>;
814 status = "disabled";
815 };
816
817 cpsw_emac0: slave@4a100200 {
818 /* Filled in by U-Boot */
819 mac-address = [ 00 00 00 00 00 00 ];
820 };
821
822 cpsw_emac1: slave@4a100300 {
823 /* Filled in by U-Boot */
824 mac-address = [ 00 00 00 00 00 00 ];
825 };
826
827 phy_sel: cpsw-phy-sel@44e10650 {
828 compatible = "ti,am3352-cpsw-phy-sel";
829 reg= <0x44e10650 0x4>;
830 reg-names = "gmii-sel";
831 };
832 };
833
834 ocmcram: ocmcram@40300000 {
835 compatible = "mmio-sram";
836 reg = <0x40300000 0x10000>; /* 64k */
837 };
838
839 elm: elm@48080000 {
840 compatible = "ti,am3352-elm";
841 reg = <0x48080000 0x2000>;
842 interrupts = <4>;
843 ti,hwmods = "elm";
844 status = "disabled";
845 };
846
847 lcdc: lcdc@4830e000 {
848 compatible = "ti,am33xx-tilcdc";
849 reg = <0x4830e000 0x1000>;
850 interrupt-parent = <&intc>;
851 interrupts = <36>;
852 ti,hwmods = "lcdc";
853 status = "disabled";
854 };
855
856 tscadc: tscadc@44e0d000 {
857 compatible = "ti,am3359-tscadc";
858 reg = <0x44e0d000 0x1000>;
859 interrupt-parent = <&intc>;
860 interrupts = <16>;
861 ti,hwmods = "adc_tsc";
862 status = "disabled";
863 dmas = <&edma 53 0>, <&edma 57 0>;
864 dma-names = "fifo0", "fifo1";
865
866 tsc {
867 compatible = "ti,am3359-tsc";
868 };
869 am335x_adc: adc {
870 #io-channel-cells = <1>;
871 compatible = "ti,am3359-adc";
872 };
873 };
874
875 gpmc: gpmc@50000000 {
876 compatible = "ti,am3352-gpmc";
877 ti,hwmods = "gpmc";
878 ti,no-idle-on-init;
879 reg = <0x50000000 0x2000>;
880 interrupts = <100>;
881 dmas = <&edma 52 0>;
882 dma-names = "rxtx";
883 gpmc,num-cs = <7>;
884 gpmc,num-waitpins = <2>;
885 #address-cells = <2>;
886 #size-cells = <1>;
887 interrupt-controller;
888 #interrupt-cells = <2>;
889 gpio-controller;
890 #gpio-cells = <2>;
891 status = "disabled";
892 };
893
894 sham: sham@53100000 {
895 compatible = "ti,omap4-sham";
896 ti,hwmods = "sham";
897 reg = <0x53100000 0x200>;
898 interrupts = <109>;
899 dmas = <&edma 36 0>;
900 dma-names = "rx";
901 };
902
903 aes: aes@53500000 {
904 compatible = "ti,omap4-aes";
905 ti,hwmods = "aes";
906 reg = <0x53500000 0xa0>;
907 interrupts = <103>;
908 dmas = <&edma 6 0>,
909 <&edma 5 0>;
910 dma-names = "tx", "rx";
911 };
912
913 mcasp0: mcasp@48038000 {
914 compatible = "ti,am33xx-mcasp-audio";
915 ti,hwmods = "mcasp0";
916 reg = <0x48038000 0x2000>,
917 <0x46000000 0x400000>;
918 reg-names = "mpu", "dat";
919 interrupts = <80>, <81>;
920 interrupt-names = "tx", "rx";
921 status = "disabled";
922 dmas = <&edma 8 2>,
923 <&edma 9 2>;
924 dma-names = "tx", "rx";
925 };
926
927 mcasp1: mcasp@4803C000 {
928 compatible = "ti,am33xx-mcasp-audio";
929 ti,hwmods = "mcasp1";
930 reg = <0x4803C000 0x2000>,
931 <0x46400000 0x400000>;
932 reg-names = "mpu", "dat";
933 interrupts = <82>, <83>;
934 interrupt-names = "tx", "rx";
935 status = "disabled";
936 dmas = <&edma 10 2>,
937 <&edma 11 2>;
938 dma-names = "tx", "rx";
939 };
940
941 rng: rng@48310000 {
942 compatible = "ti,omap4-rng";
943 ti,hwmods = "rng";
944 reg = <0x48310000 0x2000>;
945 interrupts = <111>;
946 };
947 };
948};
949
950/include/ "am33xx-clocks.dtsi"