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1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig PM_DEVFREQ
3 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
4 select SRCU
5 select PM_OPP
6 help
7 A device may have a list of frequencies and voltages available.
8 devfreq, a generic DVFS framework can be registered for a device
9 in order to let the governor provided to devfreq choose an
10 operating frequency based on the device driver's policy.
11
12 Each device may have its own governor and policy. Devfreq can
13 reevaluate the device state periodically and/or based on the
14 notification to "nb", a notifier block, of devfreq.
15
16 Like some CPUs with CPUfreq, a device may have multiple clocks.
17 However, because the clock frequencies of a single device are
18 determined by the single device's state, an instance of devfreq
19 is attached to a single device and returns a "representative"
20 clock frequency of the device, which is also attached
21 to a device by 1-to-1. The device registering devfreq takes the
22 responsibility to "interpret" the representative frequency and
23 to set its every clock accordingly with the "target" callback
24 given to devfreq.
25
26 When OPP is used with the devfreq device, it is recommended to
27 register devfreq's nb to the OPP's notifier head. If OPP is
28 used with the devfreq device, you may use OPP helper
29 functions defined in devfreq.h.
30
31if PM_DEVFREQ
32
33comment "DEVFREQ Governors"
34
35config DEVFREQ_GOV_SIMPLE_ONDEMAND
36 tristate "Simple Ondemand"
37 help
38 Chooses frequency based on the recent load on the device. Works
39 similar as ONDEMAND governor of CPUFREQ does. A device with
40 Simple-Ondemand should be able to provide busy/total counter
41 values that imply the usage rate. A device may provide tuned
42 values to the governor with data field at devfreq_add_device().
43
44config DEVFREQ_GOV_PERFORMANCE
45 tristate "Performance"
46 help
47 Sets the frequency at the maximum available frequency.
48 This governor always returns UINT_MAX as frequency so that
49 the DEVFREQ framework returns the highest frequency available
50 at any time.
51
52config DEVFREQ_GOV_POWERSAVE
53 tristate "Powersave"
54 help
55 Sets the frequency at the minimum available frequency.
56 This governor always returns 0 as frequency so that
57 the DEVFREQ framework returns the lowest frequency available
58 at any time.
59
60config DEVFREQ_GOV_USERSPACE
61 tristate "Userspace"
62 help
63 Sets the frequency at the user specified one.
64 This governor returns the user configured frequency if there
65 has been an input to /sys/devices/.../power/devfreq_set_freq.
66 Otherwise, the governor does not change the frequency
67 given at the initialization.
68
69config DEVFREQ_GOV_PASSIVE
70 tristate "Passive"
71 help
72 Sets the frequency based on the frequency of its parent devfreq
73 device. This governor does not change the frequency by itself
74 through sysfs entries. The passive governor recommends that
75 devfreq device uses the OPP table to get the frequency/voltage.
76
77comment "DEVFREQ Drivers"
78
79config ARM_EXYNOS_BUS_DEVFREQ
80 tristate "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
81 depends on ARCH_EXYNOS || COMPILE_TEST
82 select DEVFREQ_GOV_SIMPLE_ONDEMAND
83 select DEVFREQ_GOV_PASSIVE
84 select DEVFREQ_EVENT_EXYNOS_PPMU
85 select PM_DEVFREQ_EVENT
86 select PM_OPP
87 help
88 This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
89 Memory bus has one more group of memory bus (e.g, MIF and INT block).
90 Each memory bus group could contain many memoby bus block. It reads
91 PPMU counters of memory controllers by using DEVFREQ-event device
92 and adjusts the operating frequencies and voltages with OPP support.
93 This does not yet operate with optimal voltages.
94
95config ARM_TEGRA_DEVFREQ
96 tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver"
97 depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \
98 ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \
99 ARCH_TEGRA_210_SOC || \
100 COMPILE_TEST
101 select PM_OPP
102 help
103 This adds the DEVFREQ driver for the Tegra family of SoCs.
104 It reads ACTMON counters of memory controllers and adjusts the
105 operating frequencies and voltages with OPP support.
106
107config ARM_TEGRA20_DEVFREQ
108 tristate "NVIDIA Tegra20 DEVFREQ Driver"
109 depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST
110 depends on COMMON_CLK
111 select DEVFREQ_GOV_SIMPLE_ONDEMAND
112 select PM_OPP
113 help
114 This adds the DEVFREQ driver for the Tegra20 family of SoCs.
115 It reads Memory Controller counters and adjusts the operating
116 frequencies and voltages with OPP support.
117
118config ARM_RK3399_DMC_DEVFREQ
119 tristate "ARM RK3399 DMC DEVFREQ Driver"
120 depends on ARCH_ROCKCHIP
121 select DEVFREQ_EVENT_ROCKCHIP_DFI
122 select DEVFREQ_GOV_SIMPLE_ONDEMAND
123 select PM_DEVFREQ_EVENT
124 select PM_OPP
125 help
126 This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
127 It sets the frequency for the memory controller and reads the usage counts
128 from hardware.
129
130source "drivers/devfreq/event/Kconfig"
131
132endif # PM_DEVFREQ
1menuconfig PM_DEVFREQ
2 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
3 select SRCU
4 help
5 A device may have a list of frequencies and voltages available.
6 devfreq, a generic DVFS framework can be registered for a device
7 in order to let the governor provided to devfreq choose an
8 operating frequency based on the device driver's policy.
9
10 Each device may have its own governor and policy. Devfreq can
11 reevaluate the device state periodically and/or based on the
12 notification to "nb", a notifier block, of devfreq.
13
14 Like some CPUs with CPUfreq, a device may have multiple clocks.
15 However, because the clock frequencies of a single device are
16 determined by the single device's state, an instance of devfreq
17 is attached to a single device and returns a "representative"
18 clock frequency of the device, which is also attached
19 to a device by 1-to-1. The device registering devfreq takes the
20 responsibility to "interpret" the representative frequency and
21 to set its every clock accordingly with the "target" callback
22 given to devfreq.
23
24 When OPP is used with the devfreq device, it is recommended to
25 register devfreq's nb to the OPP's notifier head. If OPP is
26 used with the devfreq device, you may use OPP helper
27 functions defined in devfreq.h.
28
29if PM_DEVFREQ
30
31comment "DEVFREQ Governors"
32
33config DEVFREQ_GOV_SIMPLE_ONDEMAND
34 tristate "Simple Ondemand"
35 help
36 Chooses frequency based on the recent load on the device. Works
37 similar as ONDEMAND governor of CPUFREQ does. A device with
38 Simple-Ondemand should be able to provide busy/total counter
39 values that imply the usage rate. A device may provide tuned
40 values to the governor with data field at devfreq_add_device().
41
42config DEVFREQ_GOV_PERFORMANCE
43 tristate "Performance"
44 help
45 Sets the frequency at the maximum available frequency.
46 This governor always returns UINT_MAX as frequency so that
47 the DEVFREQ framework returns the highest frequency available
48 at any time.
49
50config DEVFREQ_GOV_POWERSAVE
51 tristate "Powersave"
52 help
53 Sets the frequency at the minimum available frequency.
54 This governor always returns 0 as frequency so that
55 the DEVFREQ framework returns the lowest frequency available
56 at any time.
57
58config DEVFREQ_GOV_USERSPACE
59 tristate "Userspace"
60 help
61 Sets the frequency at the user specified one.
62 This governor returns the user configured frequency if there
63 has been an input to /sys/devices/.../power/devfreq_set_freq.
64 Otherwise, the governor does not change the frequency
65 given at the initialization.
66
67comment "DEVFREQ Drivers"
68
69config ARM_EXYNOS4_BUS_DEVFREQ
70 bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
71 depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
72 select DEVFREQ_GOV_SIMPLE_ONDEMAND
73 select PM_OPP
74 help
75 This adds the DEVFREQ driver for Exynos4210 memory bus (vdd_int)
76 and Exynos4212/4412 memory interface and bus (vdd_mif + vdd_int).
77 It reads PPMU counters of memory controllers and adjusts
78 the operating frequencies and voltages with OPP support.
79 This does not yet operate with optimal voltages.
80
81config ARM_EXYNOS5_BUS_DEVFREQ
82 tristate "ARM Exynos5250 Bus DEVFREQ Driver"
83 depends on SOC_EXYNOS5250
84 select DEVFREQ_GOV_SIMPLE_ONDEMAND
85 select PM_OPP
86 help
87 This adds the DEVFREQ driver for Exynos5250 bus interface (vdd_int).
88 It reads PPMU counters of memory controllers and adjusts the
89 operating frequencies and voltages with OPP support.
90
91config ARM_TEGRA_DEVFREQ
92 tristate "Tegra DEVFREQ Driver"
93 depends on ARCH_TEGRA_124_SOC
94 select DEVFREQ_GOV_SIMPLE_ONDEMAND
95 select PM_OPP
96 help
97 This adds the DEVFREQ driver for the Tegra family of SoCs.
98 It reads ACTMON counters of memory controllers and adjusts the
99 operating frequencies and voltages with OPP support.
100
101source "drivers/devfreq/event/Kconfig"
102
103endif # PM_DEVFREQ