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1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig PM_DEVFREQ
3 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
4 select SRCU
5 select PM_OPP
6 help
7 A device may have a list of frequencies and voltages available.
8 devfreq, a generic DVFS framework can be registered for a device
9 in order to let the governor provided to devfreq choose an
10 operating frequency based on the device driver's policy.
11
12 Each device may have its own governor and policy. Devfreq can
13 reevaluate the device state periodically and/or based on the
14 notification to "nb", a notifier block, of devfreq.
15
16 Like some CPUs with CPUfreq, a device may have multiple clocks.
17 However, because the clock frequencies of a single device are
18 determined by the single device's state, an instance of devfreq
19 is attached to a single device and returns a "representative"
20 clock frequency of the device, which is also attached
21 to a device by 1-to-1. The device registering devfreq takes the
22 responsibility to "interpret" the representative frequency and
23 to set its every clock accordingly with the "target" callback
24 given to devfreq.
25
26 When OPP is used with the devfreq device, it is recommended to
27 register devfreq's nb to the OPP's notifier head. If OPP is
28 used with the devfreq device, you may use OPP helper
29 functions defined in devfreq.h.
30
31if PM_DEVFREQ
32
33comment "DEVFREQ Governors"
34
35config DEVFREQ_GOV_SIMPLE_ONDEMAND
36 tristate "Simple Ondemand"
37 help
38 Chooses frequency based on the recent load on the device. Works
39 similar as ONDEMAND governor of CPUFREQ does. A device with
40 Simple-Ondemand should be able to provide busy/total counter
41 values that imply the usage rate. A device may provide tuned
42 values to the governor with data field at devfreq_add_device().
43
44config DEVFREQ_GOV_PERFORMANCE
45 tristate "Performance"
46 help
47 Sets the frequency at the maximum available frequency.
48 This governor always returns UINT_MAX as frequency so that
49 the DEVFREQ framework returns the highest frequency available
50 at any time.
51
52config DEVFREQ_GOV_POWERSAVE
53 tristate "Powersave"
54 help
55 Sets the frequency at the minimum available frequency.
56 This governor always returns 0 as frequency so that
57 the DEVFREQ framework returns the lowest frequency available
58 at any time.
59
60config DEVFREQ_GOV_USERSPACE
61 tristate "Userspace"
62 help
63 Sets the frequency at the user specified one.
64 This governor returns the user configured frequency if there
65 has been an input to /sys/devices/.../power/devfreq_set_freq.
66 Otherwise, the governor does not change the frequency
67 given at the initialization.
68
69config DEVFREQ_GOV_PASSIVE
70 tristate "Passive"
71 help
72 Sets the frequency based on the frequency of its parent devfreq
73 device. This governor does not change the frequency by itself
74 through sysfs entries. The passive governor recommends that
75 devfreq device uses the OPP table to get the frequency/voltage.
76
77comment "DEVFREQ Drivers"
78
79config ARM_EXYNOS_BUS_DEVFREQ
80 tristate "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
81 depends on ARCH_EXYNOS || COMPILE_TEST
82 select DEVFREQ_GOV_SIMPLE_ONDEMAND
83 select DEVFREQ_GOV_PASSIVE
84 select DEVFREQ_EVENT_EXYNOS_PPMU
85 select PM_DEVFREQ_EVENT
86 select PM_OPP
87 help
88 This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
89 Memory bus has one more group of memory bus (e.g, MIF and INT block).
90 Each memory bus group could contain many memoby bus block. It reads
91 PPMU counters of memory controllers by using DEVFREQ-event device
92 and adjusts the operating frequencies and voltages with OPP support.
93 This does not yet operate with optimal voltages.
94
95config ARM_TEGRA_DEVFREQ
96 tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver"
97 depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \
98 ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \
99 ARCH_TEGRA_210_SOC || \
100 COMPILE_TEST
101 select PM_OPP
102 help
103 This adds the DEVFREQ driver for the Tegra family of SoCs.
104 It reads ACTMON counters of memory controllers and adjusts the
105 operating frequencies and voltages with OPP support.
106
107config ARM_TEGRA20_DEVFREQ
108 tristate "NVIDIA Tegra20 DEVFREQ Driver"
109 depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST
110 depends on COMMON_CLK
111 select DEVFREQ_GOV_SIMPLE_ONDEMAND
112 select PM_OPP
113 help
114 This adds the DEVFREQ driver for the Tegra20 family of SoCs.
115 It reads Memory Controller counters and adjusts the operating
116 frequencies and voltages with OPP support.
117
118config ARM_RK3399_DMC_DEVFREQ
119 tristate "ARM RK3399 DMC DEVFREQ Driver"
120 depends on ARCH_ROCKCHIP
121 select DEVFREQ_EVENT_ROCKCHIP_DFI
122 select DEVFREQ_GOV_SIMPLE_ONDEMAND
123 select PM_DEVFREQ_EVENT
124 select PM_OPP
125 help
126 This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
127 It sets the frequency for the memory controller and reads the usage counts
128 from hardware.
129
130source "drivers/devfreq/event/Kconfig"
131
132endif # PM_DEVFREQ
1menuconfig PM_DEVFREQ
2 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
3 select SRCU
4 select PM_OPP
5 help
6 A device may have a list of frequencies and voltages available.
7 devfreq, a generic DVFS framework can be registered for a device
8 in order to let the governor provided to devfreq choose an
9 operating frequency based on the device driver's policy.
10
11 Each device may have its own governor and policy. Devfreq can
12 reevaluate the device state periodically and/or based on the
13 notification to "nb", a notifier block, of devfreq.
14
15 Like some CPUs with CPUfreq, a device may have multiple clocks.
16 However, because the clock frequencies of a single device are
17 determined by the single device's state, an instance of devfreq
18 is attached to a single device and returns a "representative"
19 clock frequency of the device, which is also attached
20 to a device by 1-to-1. The device registering devfreq takes the
21 responsibility to "interpret" the representative frequency and
22 to set its every clock accordingly with the "target" callback
23 given to devfreq.
24
25 When OPP is used with the devfreq device, it is recommended to
26 register devfreq's nb to the OPP's notifier head. If OPP is
27 used with the devfreq device, you may use OPP helper
28 functions defined in devfreq.h.
29
30if PM_DEVFREQ
31
32comment "DEVFREQ Governors"
33
34config DEVFREQ_GOV_SIMPLE_ONDEMAND
35 tristate "Simple Ondemand"
36 help
37 Chooses frequency based on the recent load on the device. Works
38 similar as ONDEMAND governor of CPUFREQ does. A device with
39 Simple-Ondemand should be able to provide busy/total counter
40 values that imply the usage rate. A device may provide tuned
41 values to the governor with data field at devfreq_add_device().
42
43config DEVFREQ_GOV_PERFORMANCE
44 tristate "Performance"
45 help
46 Sets the frequency at the maximum available frequency.
47 This governor always returns UINT_MAX as frequency so that
48 the DEVFREQ framework returns the highest frequency available
49 at any time.
50
51config DEVFREQ_GOV_POWERSAVE
52 tristate "Powersave"
53 help
54 Sets the frequency at the minimum available frequency.
55 This governor always returns 0 as frequency so that
56 the DEVFREQ framework returns the lowest frequency available
57 at any time.
58
59config DEVFREQ_GOV_USERSPACE
60 tristate "Userspace"
61 help
62 Sets the frequency at the user specified one.
63 This governor returns the user configured frequency if there
64 has been an input to /sys/devices/.../power/devfreq_set_freq.
65 Otherwise, the governor does not change the frequency
66 given at the initialization.
67
68config DEVFREQ_GOV_PASSIVE
69 tristate "Passive"
70 help
71 Sets the frequency based on the frequency of its parent devfreq
72 device. This governor does not change the frequency by itself
73 through sysfs entries. The passive governor recommends that
74 devfreq device uses the OPP table to get the frequency/voltage.
75
76comment "DEVFREQ Drivers"
77
78config ARM_EXYNOS_BUS_DEVFREQ
79 tristate "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
80 depends on ARCH_EXYNOS || COMPILE_TEST
81 select DEVFREQ_GOV_SIMPLE_ONDEMAND
82 select DEVFREQ_GOV_PASSIVE
83 select DEVFREQ_EVENT_EXYNOS_PPMU
84 select PM_DEVFREQ_EVENT
85 select PM_OPP
86 help
87 This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
88 Memory bus has one more group of memory bus (e.g, MIF and INT block).
89 Each memory bus group could contain many memoby bus block. It reads
90 PPMU counters of memory controllers by using DEVFREQ-event device
91 and adjusts the operating frequencies and voltages with OPP support.
92 This does not yet operate with optimal voltages.
93
94config ARM_TEGRA_DEVFREQ
95 tristate "Tegra DEVFREQ Driver"
96 depends on ARCH_TEGRA_124_SOC
97 select DEVFREQ_GOV_SIMPLE_ONDEMAND
98 select PM_OPP
99 help
100 This adds the DEVFREQ driver for the Tegra family of SoCs.
101 It reads ACTMON counters of memory controllers and adjusts the
102 operating frequencies and voltages with OPP support.
103
104config ARM_RK3399_DMC_DEVFREQ
105 tristate "ARM RK3399 DMC DEVFREQ Driver"
106 depends on ARCH_ROCKCHIP
107 select DEVFREQ_EVENT_ROCKCHIP_DFI
108 select DEVFREQ_GOV_SIMPLE_ONDEMAND
109 select PM_DEVFREQ_EVENT
110 select PM_OPP
111 help
112 This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
113 It sets the frequency for the memory controller and reads the usage counts
114 from hardware.
115
116source "drivers/devfreq/event/Kconfig"
117
118endif # PM_DEVFREQ