1/*
  2 * Copyright 2010 Red Hat Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Ben Skeggs
 23 */
 24
 25#include "drmP.h"
 26#include "nouveau_drv.h"
 27#include "nouveau_hw.h"
 28#include "nouveau_pm.h"
 29
 30int
 31nv04_pm_clocks_get(struct drm_device *dev, struct nouveau_pm_level *perflvl)
 32{
 33	int ret;
 34
 35	ret = nouveau_hw_get_clock(dev, PLL_CORE);
 36	if (ret < 0)
 37		return ret;
 38	perflvl->core = ret;
 39
 40	ret = nouveau_hw_get_clock(dev, PLL_MEMORY);
 41	if (ret < 0)
 42		return ret;
 43	perflvl->memory = ret;
 44
 45	return 0;
 46}
 47
 48struct nv04_pm_clock {
 49	struct pll_lims pll;
 50	struct nouveau_pll_vals calc;
 51};
 52
 53struct nv04_pm_state {
 54	struct nv04_pm_clock core;
 55	struct nv04_pm_clock memory;
 56};
 57
 58static int
 59calc_pll(struct drm_device *dev, u32 id, int khz, struct nv04_pm_clock *clk)
 60{
 61	int ret;
 62
 63	ret = get_pll_limits(dev, id, &clk->pll);
 64	if (ret)
 65		return ret;
 66
 67	ret = nouveau_calc_pll_mnp(dev, &clk->pll, khz, &clk->calc);
 68	if (!ret)
 69		return -EINVAL;
 70
 71	return 0;
 72}
 73
 74void *
 75nv04_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)
 76{
 77	struct nv04_pm_state *info;
 78	int ret;
 79
 80	info = kzalloc(sizeof(*info), GFP_KERNEL);
 81	if (!info)
 82		return ERR_PTR(-ENOMEM);
 83
 84	ret = calc_pll(dev, PLL_CORE, perflvl->core, &info->core);
 85	if (ret)
 86		goto error;
 87
 88	if (perflvl->memory) {
 89		ret = calc_pll(dev, PLL_MEMORY, perflvl->memory, &info->memory);
 90		if (ret)
 91			goto error;
 92	}
 93
 94	return info;
 95error:
 96	kfree(info);
 97	return ERR_PTR(ret);
 98}
 99
100static void
101prog_pll(struct drm_device *dev, struct nv04_pm_clock *clk)
102{
103	struct drm_nouveau_private *dev_priv = dev->dev_private;
104	u32 reg = clk->pll.reg;
105
106	/* thank the insane nouveau_hw_setpll() interface for this */
107	if (dev_priv->card_type >= NV_40)
108		reg += 4;
109
110	nouveau_hw_setpll(dev, reg, &clk->calc);
111}
112
113int
114nv04_pm_clocks_set(struct drm_device *dev, void *pre_state)
115{
116	struct drm_nouveau_private *dev_priv = dev->dev_private;
117	struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
118	struct nv04_pm_state *state = pre_state;
119
120	prog_pll(dev, &state->core);
121
122	if (state->memory.pll.reg) {
123		prog_pll(dev, &state->memory);
124		if (dev_priv->card_type < NV_30) {
125			if (dev_priv->card_type == NV_20)
126				nv_mask(dev, 0x1002c4, 0, 1 << 20);
127
128			/* Reset the DLLs */
129			nv_mask(dev, 0x1002c0, 0, 1 << 8);
130		}
131	}
132
133	ptimer->init(dev);
134
135	kfree(state);
136	return 0;
137}