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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Lager board
4 *
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded, Inc.
7 * Copyright (C) 2015-2016 Renesas Electronics Corporation
8 */
9
10/*
11 * SSI-AK4643
12 *
13 * SW1: 1: AK4643
14 * 2: CN22
15 * 3: ADV7511
16 *
17 * This command is required when Playback/Capture
18 *
19 * amixer set "LINEOUT Mixer DACL" on
20 * amixer set "DVC Out" 100%
21 * amixer set "DVC In" 100%
22 *
23 * You can use Mute
24 *
25 * amixer set "DVC Out Mute" on
26 * amixer set "DVC In Mute" on
27 *
28 * You can use Volume Ramp
29 *
30 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
31 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
32 * amixer set "DVC Out Ramp" on
33 * aplay xxx.wav &
34 * amixer set "DVC Out" 80% // Volume Down
35 * amixer set "DVC Out" 100% // Volume Up
36 */
37
38/dts-v1/;
39#include "r8a7790.dtsi"
40#include <dt-bindings/gpio/gpio.h>
41#include <dt-bindings/input/input.h>
42
43/ {
44 model = "Lager";
45 compatible = "renesas,lager", "renesas,r8a7790";
46
47 aliases {
48 serial0 = &scif0;
49 serial1 = &scifa1;
50 i2c8 = &gpioi2c1;
51 i2c9 = &gpioi2c2;
52 i2c10 = &i2cexio0;
53 i2c11 = &i2cexio1;
54 i2c12 = &i2chdmi;
55 i2c13 = &i2cpwr;
56 };
57
58 chosen {
59 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
60 stdout-path = "serial0:115200n8";
61 };
62
63 memory@40000000 {
64 device_type = "memory";
65 reg = <0 0x40000000 0 0x40000000>;
66 };
67
68 memory@140000000 {
69 device_type = "memory";
70 reg = <1 0x40000000 0 0xc0000000>;
71 };
72
73 lbsc {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 };
77
78 keyboard {
79 compatible = "gpio-keys";
80
81 one {
82 linux,code = <KEY_1>;
83 label = "SW2-1";
84 wakeup-source;
85 debounce-interval = <20>;
86 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
87 };
88 two {
89 linux,code = <KEY_2>;
90 label = "SW2-2";
91 wakeup-source;
92 debounce-interval = <20>;
93 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
94 };
95 three {
96 linux,code = <KEY_3>;
97 label = "SW2-3";
98 wakeup-source;
99 debounce-interval = <20>;
100 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
101 };
102 four {
103 linux,code = <KEY_4>;
104 label = "SW2-4";
105 wakeup-source;
106 debounce-interval = <20>;
107 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
108 };
109 };
110
111 leds {
112 compatible = "gpio-leds";
113 led6 {
114 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
115 };
116 led7 {
117 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
118 };
119 led8 {
120 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
121 };
122 };
123
124 fixedregulator3v3: regulator-3v3 {
125 compatible = "regulator-fixed";
126 regulator-name = "fixed-3.3V";
127 regulator-min-microvolt = <3300000>;
128 regulator-max-microvolt = <3300000>;
129 regulator-boot-on;
130 regulator-always-on;
131 };
132
133 vcc_sdhi0: regulator-vcc-sdhi0 {
134 compatible = "regulator-fixed";
135
136 regulator-name = "SDHI0 Vcc";
137 regulator-min-microvolt = <3300000>;
138 regulator-max-microvolt = <3300000>;
139
140 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
141 enable-active-high;
142 };
143
144 vccq_sdhi0: regulator-vccq-sdhi0 {
145 compatible = "regulator-gpio";
146
147 regulator-name = "SDHI0 VccQ";
148 regulator-min-microvolt = <1800000>;
149 regulator-max-microvolt = <3300000>;
150
151 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
152 gpios-states = <1>;
153 states = <3300000 1
154 1800000 0>;
155 };
156
157 vcc_sdhi2: regulator-vcc-sdhi2 {
158 compatible = "regulator-fixed";
159
160 regulator-name = "SDHI2 Vcc";
161 regulator-min-microvolt = <3300000>;
162 regulator-max-microvolt = <3300000>;
163
164 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
165 enable-active-high;
166 };
167
168 vccq_sdhi2: regulator-vccq-sdhi2 {
169 compatible = "regulator-gpio";
170
171 regulator-name = "SDHI2 VccQ";
172 regulator-min-microvolt = <1800000>;
173 regulator-max-microvolt = <3300000>;
174
175 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
176 gpios-states = <1>;
177 states = <3300000 1
178 1800000 0>;
179 };
180
181 audio_clock: audio_clock {
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
184 clock-frequency = <11289600>;
185 };
186
187 rsnd_ak4643: sound {
188 compatible = "simple-audio-card";
189
190 simple-audio-card,format = "left_j";
191 simple-audio-card,bitclock-master = <&sndcodec>;
192 simple-audio-card,frame-master = <&sndcodec>;
193
194 sndcpu: simple-audio-card,cpu {
195 sound-dai = <&rcar_sound>;
196 };
197
198 sndcodec: simple-audio-card,codec {
199 sound-dai = <&ak4643>;
200 clocks = <&audio_clock>;
201 };
202 };
203
204 vga-encoder {
205 compatible = "adi,adv7123";
206
207 ports {
208 #address-cells = <1>;
209 #size-cells = <0>;
210
211 port@0 {
212 reg = <0>;
213 adv7123_in: endpoint {
214 remote-endpoint = <&du_out_rgb>;
215 };
216 };
217 port@1 {
218 reg = <1>;
219 adv7123_out: endpoint {
220 remote-endpoint = <&vga_in>;
221 };
222 };
223 };
224 };
225
226 vga {
227 compatible = "vga-connector";
228
229 port {
230 vga_in: endpoint {
231 remote-endpoint = <&adv7123_out>;
232 };
233 };
234 };
235
236 hdmi-in {
237 compatible = "hdmi-connector";
238 type = "a";
239
240 port {
241 hdmi_con_in: endpoint {
242 remote-endpoint = <&adv7612_in>;
243 };
244 };
245 };
246
247 cec_clock: cec-clock {
248 compatible = "fixed-clock";
249 #clock-cells = <0>;
250 clock-frequency = <12000000>;
251 };
252
253 hdmi-out {
254 compatible = "hdmi-connector";
255 type = "a";
256
257 port {
258 hdmi_con_out: endpoint {
259 remote-endpoint = <&adv7511_out>;
260 };
261 };
262 };
263
264 x2_clk: x2-clock {
265 compatible = "fixed-clock";
266 #clock-cells = <0>;
267 clock-frequency = <148500000>;
268 };
269
270 x13_clk: x13-clock {
271 compatible = "fixed-clock";
272 #clock-cells = <0>;
273 clock-frequency = <148500000>;
274 };
275
276 gpioi2c1: i2c-8 {
277 #address-cells = <1>;
278 #size-cells = <0>;
279 compatible = "i2c-gpio";
280 status = "disabled";
281 scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
282 sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
283 i2c-gpio,delay-us = <5>;
284 };
285
286 gpioi2c2: i2c-9 {
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible = "i2c-gpio";
290 status = "disabled";
291 scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
292 sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
293 i2c-gpio,delay-us = <5>;
294 };
295
296 /*
297 * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only.
298 * We use the I2C demuxer, so the desired IP core can be selected at runtime
299 * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0).
300 * Note: For testing the I2C slave feature, it is convenient to connect this
301 * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and
302 * instantiate the slave device at runtime according to the documentation.
303 * You can then communicate with the slave via IIC3.
304 *
305 * IIC0/I2C0 does not appear to support fallback to GPIO.
306 */
307 i2cexio0: i2c-10 {
308 compatible = "i2c-demux-pinctrl";
309 i2c-parent = <&iic0>, <&i2c0>;
310 i2c-bus-name = "i2c-exio0";
311 #address-cells = <1>;
312 #size-cells = <0>;
313 };
314
315 /*
316 * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA).
317 * This is similar to the arangement described for i2cexio0 (above)
318 * with a fallback to GPIO also provided.
319 */
320 i2cexio1: i2c-11 {
321 compatible = "i2c-demux-pinctrl";
322 i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>;
323 i2c-bus-name = "i2c-exio1";
324 #address-cells = <1>;
325 #size-cells = <0>;
326 };
327
328 /*
329 * IIC2 and I2C2 may be switched using pinmux.
330 * A fallback to GPIO is also provided.
331 */
332 i2chdmi: i2c-12 {
333 compatible = "i2c-demux-pinctrl";
334 i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
335 i2c-bus-name = "i2c-hdmi";
336 #address-cells = <1>;
337 #size-cells = <0>;
338
339 ak4643: codec@12 {
340 compatible = "asahi-kasei,ak4643";
341 #sound-dai-cells = <0>;
342 reg = <0x12>;
343 };
344
345 composite-in@20 {
346 compatible = "adi,adv7180";
347 reg = <0x20>;
348 remote = <&vin1>;
349
350 port {
351 adv7180: endpoint {
352 bus-width = <8>;
353 remote-endpoint = <&vin1ep0>;
354 };
355 };
356 };
357
358 hdmi@39 {
359 compatible = "adi,adv7511w";
360 reg = <0x39>;
361 interrupt-parent = <&gpio1>;
362 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
363 clocks = <&cec_clock>;
364 clock-names = "cec";
365
366 adi,input-depth = <8>;
367 adi,input-colorspace = "rgb";
368 adi,input-clock = "1x";
369 adi,input-style = <1>;
370 adi,input-justification = "evenly";
371
372 ports {
373 #address-cells = <1>;
374 #size-cells = <0>;
375
376 port@0 {
377 reg = <0>;
378 adv7511_in: endpoint {
379 remote-endpoint = <&lvds0_out>;
380 };
381 };
382
383 port@1 {
384 reg = <1>;
385 adv7511_out: endpoint {
386 remote-endpoint = <&hdmi_con_out>;
387 };
388 };
389 };
390 };
391
392 hdmi-in@4c {
393 compatible = "adi,adv7612";
394 reg = <0x4c>;
395 interrupt-parent = <&gpio1>;
396 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
397 default-input = <0>;
398
399 ports {
400 #address-cells = <1>;
401 #size-cells = <0>;
402
403 port@0 {
404 reg = <0>;
405 adv7612_in: endpoint {
406 remote-endpoint = <&hdmi_con_in>;
407 };
408 };
409
410 port@2 {
411 reg = <2>;
412 adv7612_out: endpoint {
413 remote-endpoint = <&vin0ep2>;
414 };
415 };
416 };
417 };
418 };
419
420 /*
421 * IIC3 and I2C3 may be switched using pinmux.
422 * IIC3/I2C3 does not appear to support fallback to GPIO.
423 */
424 i2cpwr: i2c-13 {
425 compatible = "i2c-demux-pinctrl";
426 pinctrl-names = "default";
427 pinctrl-0 = <&pmic_irq_pins>;
428 i2c-parent = <&iic3>, <&i2c3>;
429 i2c-bus-name = "i2c-pwr";
430 #address-cells = <1>;
431 #size-cells = <0>;
432
433 pmic@58 {
434 compatible = "dlg,da9063";
435 reg = <0x58>;
436 interrupt-parent = <&irqc0>;
437 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
438 interrupt-controller;
439
440 rtc {
441 compatible = "dlg,da9063-rtc";
442 };
443
444 wdt {
445 compatible = "dlg,da9063-watchdog";
446 };
447 };
448
449 vdd_dvfs: regulator@68 {
450 compatible = "dlg,da9210";
451 reg = <0x68>;
452 interrupt-parent = <&irqc0>;
453 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
454
455 regulator-min-microvolt = <1000000>;
456 regulator-max-microvolt = <1000000>;
457 regulator-boot-on;
458 regulator-always-on;
459 };
460 };
461};
462
463&du {
464 pinctrl-0 = <&du_pins>;
465 pinctrl-names = "default";
466 status = "okay";
467
468 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
469 <&x13_clk>, <&x2_clk>;
470 clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1";
471
472 ports {
473 port@0 {
474 endpoint {
475 remote-endpoint = <&adv7123_in>;
476 };
477 };
478 };
479};
480
481&lvds0 {
482 status = "okay";
483
484 ports {
485 port@1 {
486 endpoint {
487 remote-endpoint = <&adv7511_in>;
488 };
489 };
490 };
491};
492
493&lvds1 {
494 ports {
495 port@1 {
496 lvds_connector: endpoint {
497 };
498 };
499 };
500};
501
502&extal_clk {
503 clock-frequency = <20000000>;
504};
505
506&pfc {
507 pinctrl-0 = <&scif_clk_pins>;
508 pinctrl-names = "default";
509
510 du_pins: du {
511 groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
512 function = "du";
513 };
514
515 scif0_pins: scif0 {
516 groups = "scif0_data";
517 function = "scif0";
518 };
519
520 scif_clk_pins: scif_clk {
521 groups = "scif_clk";
522 function = "scif_clk";
523 };
524
525 ether_pins: ether {
526 groups = "eth_link", "eth_mdio", "eth_rmii";
527 function = "eth";
528 };
529
530 phy1_pins: phy1 {
531 groups = "intc_irq0";
532 function = "intc";
533 };
534
535 scifa1_pins: scifa1 {
536 groups = "scifa1_data";
537 function = "scifa1";
538 };
539
540 sdhi0_pins: sd0 {
541 groups = "sdhi0_data4", "sdhi0_ctrl";
542 function = "sdhi0";
543 power-source = <3300>;
544 };
545
546 sdhi0_pins_uhs: sd0_uhs {
547 groups = "sdhi0_data4", "sdhi0_ctrl";
548 function = "sdhi0";
549 power-source = <1800>;
550 };
551
552 sdhi2_pins: sd2 {
553 groups = "sdhi2_data4", "sdhi2_ctrl";
554 function = "sdhi2";
555 power-source = <3300>;
556 };
557
558 sdhi2_pins_uhs: sd2_uhs {
559 groups = "sdhi2_data4", "sdhi2_ctrl";
560 function = "sdhi2";
561 power-source = <1800>;
562 };
563
564 mmc1_pins: mmc1 {
565 groups = "mmc1_data8", "mmc1_ctrl";
566 function = "mmc1";
567 };
568
569 qspi_pins: qspi {
570 groups = "qspi_ctrl", "qspi_data4";
571 function = "qspi";
572 };
573
574 msiof1_pins: msiof1 {
575 groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
576 "msiof1_tx";
577 function = "msiof1";
578 };
579
580 i2c0_pins: i2c0 {
581 groups = "i2c0";
582 function = "i2c0";
583 };
584
585 iic0_pins: iic0 {
586 groups = "iic0";
587 function = "iic0";
588 };
589
590 i2c1_pins: i2c1 {
591 groups = "i2c1";
592 function = "i2c1";
593 };
594
595 iic1_pins: iic1 {
596 groups = "iic1";
597 function = "iic1";
598 };
599
600 i2c2_pins: i2c2 {
601 groups = "i2c2";
602 function = "i2c2";
603 };
604
605 iic2_pins: iic2 {
606 groups = "iic2";
607 function = "iic2";
608 };
609
610 i2c3_pins: i2c3 {
611 groups = "i2c3";
612 function = "i2c3";
613 };
614
615 iic3_pins: iic3 {
616 groups = "iic3";
617 function = "iic3";
618 };
619
620 pmic_irq_pins: pmicirq {
621 groups = "intc_irq2";
622 function = "intc";
623 };
624
625 hsusb_pins: hsusb {
626 groups = "usb0_ovc_vbus";
627 function = "usb0";
628 };
629
630 usb0_pins: usb0 {
631 groups = "usb0";
632 function = "usb0";
633 };
634
635 usb1_pins: usb1 {
636 groups = "usb1";
637 function = "usb1";
638 };
639
640 usb2_pins: usb2 {
641 groups = "usb2";
642 function = "usb2";
643 };
644
645 vin0_pins: vin0 {
646 groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
647 function = "vin0";
648 };
649
650 vin1_pins: vin1 {
651 groups = "vin1_data8", "vin1_clk";
652 function = "vin1";
653 };
654
655 sound_pins: sound {
656 groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
657 function = "ssi";
658 };
659
660 sound_clk_pins: sound_clk {
661 groups = "audio_clk_a";
662 function = "audio_clk";
663 };
664};
665
666ðer {
667 pinctrl-0 = <ðer_pins &phy1_pins>;
668 pinctrl-names = "default";
669
670 phy-handle = <&phy1>;
671 renesas,ether-link-active-low;
672 status = "okay";
673
674 phy1: ethernet-phy@1 {
675 reg = <1>;
676 interrupt-parent = <&irqc0>;
677 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
678 micrel,led-mode = <1>;
679 };
680};
681
682&cmt0 {
683 status = "okay";
684};
685
686&mmcif1 {
687 pinctrl-0 = <&mmc1_pins>;
688 pinctrl-names = "default";
689
690 vmmc-supply = <&fixedregulator3v3>;
691 bus-width = <8>;
692 non-removable;
693 status = "okay";
694};
695
696&sata1 {
697 status = "okay";
698};
699
700&qspi {
701 pinctrl-0 = <&qspi_pins>;
702 pinctrl-names = "default";
703
704 status = "okay";
705
706 flash: flash@0 {
707 compatible = "spansion,s25fl512s", "jedec,spi-nor";
708 reg = <0>;
709 spi-max-frequency = <30000000>;
710 spi-tx-bus-width = <4>;
711 spi-rx-bus-width = <4>;
712 spi-cpha;
713 spi-cpol;
714 m25p,fast-read;
715
716 partitions {
717 compatible = "fixed-partitions";
718 #address-cells = <1>;
719 #size-cells = <1>;
720
721 partition@0 {
722 label = "loader";
723 reg = <0x00000000 0x00040000>;
724 read-only;
725 };
726 partition@40000 {
727 label = "user";
728 reg = <0x00040000 0x00400000>;
729 read-only;
730 };
731 partition@440000 {
732 label = "flash";
733 reg = <0x00440000 0x03bc0000>;
734 };
735 };
736 };
737};
738
739&scif0 {
740 pinctrl-0 = <&scif0_pins>;
741 pinctrl-names = "default";
742
743 status = "okay";
744};
745
746&scifa1 {
747 pinctrl-0 = <&scifa1_pins>;
748 pinctrl-names = "default";
749
750 status = "okay";
751};
752
753&scif_clk {
754 clock-frequency = <14745600>;
755};
756
757&msiof1 {
758 pinctrl-0 = <&msiof1_pins>;
759 pinctrl-names = "default";
760
761 status = "okay";
762
763 pmic: pmic@0 {
764 compatible = "renesas,r2a11302ft";
765 reg = <0>;
766 spi-max-frequency = <6000000>;
767 spi-cpol;
768 spi-cpha;
769 };
770};
771
772&sdhi0 {
773 pinctrl-0 = <&sdhi0_pins>;
774 pinctrl-1 = <&sdhi0_pins_uhs>;
775 pinctrl-names = "default", "state_uhs";
776
777 vmmc-supply = <&vcc_sdhi0>;
778 vqmmc-supply = <&vccq_sdhi0>;
779 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
780 sd-uhs-sdr50;
781 sd-uhs-sdr104;
782 status = "okay";
783};
784
785&sdhi2 {
786 pinctrl-0 = <&sdhi2_pins>;
787 pinctrl-1 = <&sdhi2_pins_uhs>;
788 pinctrl-names = "default", "state_uhs";
789
790 vmmc-supply = <&vcc_sdhi2>;
791 vqmmc-supply = <&vccq_sdhi2>;
792 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
793 sd-uhs-sdr50;
794 status = "okay";
795};
796
797&cpu0 {
798 cpu0-supply = <&vdd_dvfs>;
799};
800
801&i2c0 {
802 pinctrl-0 = <&i2c0_pins>;
803 pinctrl-names = "i2c-exio0";
804};
805
806&iic0 {
807 pinctrl-0 = <&iic0_pins>;
808 pinctrl-names = "i2c-exio0";
809};
810
811&i2c1 {
812 pinctrl-0 = <&i2c1_pins>;
813 pinctrl-names = "i2c-exio1";
814};
815
816&iic1 {
817 pinctrl-0 = <&iic1_pins>;
818 pinctrl-names = "i2c-exio1";
819};
820
821&i2c2 {
822 pinctrl-0 = <&i2c2_pins>;
823 pinctrl-names = "i2c-hdmi";
824
825 clock-frequency = <100000>;
826};
827
828&iic2 {
829 pinctrl-0 = <&iic2_pins>;
830 pinctrl-names = "i2c-hdmi";
831
832 clock-frequency = <100000>;
833};
834
835&i2c3 {
836 pinctrl-0 = <&i2c3_pins>;
837 pinctrl-names = "i2c-pwr";
838};
839
840&iic3 {
841 pinctrl-0 = <&iic3_pins>;
842 pinctrl-names = "i2c-pwr";
843};
844
845&pci0 {
846 status = "okay";
847 pinctrl-0 = <&usb0_pins>;
848 pinctrl-names = "default";
849};
850
851&pci1 {
852 status = "okay";
853 pinctrl-0 = <&usb1_pins>;
854 pinctrl-names = "default";
855};
856
857&xhci {
858 status = "okay";
859 pinctrl-0 = <&usb2_pins>;
860 pinctrl-names = "default";
861};
862
863&pci2 {
864 status = "okay";
865 pinctrl-0 = <&usb2_pins>;
866 pinctrl-names = "default";
867};
868
869&hsusb {
870 status = "okay";
871 pinctrl-0 = <&hsusb_pins>;
872 pinctrl-names = "default";
873 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
874};
875
876&usbphy {
877 status = "okay";
878};
879
880/* HDMI video input */
881&vin0 {
882 pinctrl-0 = <&vin0_pins>;
883 pinctrl-names = "default";
884
885 status = "okay";
886
887 port {
888 vin0ep2: endpoint {
889 remote-endpoint = <&adv7612_out>;
890 bus-width = <24>;
891 hsync-active = <0>;
892 vsync-active = <0>;
893 pclk-sample = <1>;
894 data-active = <1>;
895 };
896 };
897};
898
899/* composite video input */
900&vin1 {
901 pinctrl-0 = <&vin1_pins>;
902 pinctrl-names = "default";
903
904 status = "okay";
905
906 port {
907 vin1ep0: endpoint {
908 remote-endpoint = <&adv7180>;
909 bus-width = <8>;
910 };
911 };
912};
913
914&rcar_sound {
915 pinctrl-0 = <&sound_pins &sound_clk_pins>;
916 pinctrl-names = "default";
917
918 /* Single DAI */
919 #sound-dai-cells = <0>;
920
921 status = "okay";
922
923 rcar_sound,dai {
924 dai0 {
925 playback = <&ssi0 &src2 &dvc0>;
926 capture = <&ssi1 &src3 &dvc1>;
927 };
928 };
929};
930
931&rwdt {
932 timeout-sec = <60>;
933 status = "okay";
934};
935
936&ssi1 {
937 shared-pin;
938};
1/*
2 * Device Tree Source for the Lager board
3 *
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13#include "r8a7790.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15
16/ {
17 model = "Lager";
18 compatible = "renesas,lager", "renesas,r8a7790";
19
20 chosen {
21 bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
22 };
23
24 memory@40000000 {
25 device_type = "memory";
26 reg = <0 0x40000000 0 0x80000000>;
27 };
28
29 memory@180000000 {
30 device_type = "memory";
31 reg = <1 0x80000000 0 0x80000000>;
32 };
33
34 lbsc {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 };
38
39 leds {
40 compatible = "gpio-leds";
41 led6 {
42 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
43 };
44 led7 {
45 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
46 };
47 led8 {
48 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
49 };
50 };
51
52 fixedregulator3v3: fixedregulator@0 {
53 compatible = "regulator-fixed";
54 regulator-name = "fixed-3.3V";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
57 regulator-boot-on;
58 regulator-always-on;
59 };
60
61 vcc_sdhi0: regulator@1 {
62 compatible = "regulator-fixed";
63
64 regulator-name = "SDHI0 Vcc";
65 regulator-min-microvolt = <3300000>;
66 regulator-max-microvolt = <3300000>;
67
68 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
69 enable-active-high;
70 };
71
72 vccq_sdhi0: regulator@2 {
73 compatible = "regulator-gpio";
74
75 regulator-name = "SDHI0 VccQ";
76 regulator-min-microvolt = <1800000>;
77 regulator-max-microvolt = <3300000>;
78
79 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
80 gpios-states = <1>;
81 states = <3300000 1
82 1800000 0>;
83 };
84
85 vcc_sdhi2: regulator@3 {
86 compatible = "regulator-fixed";
87
88 regulator-name = "SDHI2 Vcc";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
91
92 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
93 enable-active-high;
94 };
95
96 vccq_sdhi2: regulator@4 {
97 compatible = "regulator-gpio";
98
99 regulator-name = "SDHI2 VccQ";
100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <3300000>;
102
103 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
104 gpios-states = <1>;
105 states = <3300000 1
106 1800000 0>;
107 };
108};
109
110&extal_clk {
111 clock-frequency = <20000000>;
112};
113
114&pfc {
115 pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
116 pinctrl-names = "default";
117
118 du_pins: du {
119 renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
120 renesas,function = "du";
121 };
122
123 scif0_pins: serial0 {
124 renesas,groups = "scif0_data";
125 renesas,function = "scif0";
126 };
127
128 ether_pins: ether {
129 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
130 renesas,function = "eth";
131 };
132
133 phy1_pins: phy1 {
134 renesas,groups = "intc_irq0";
135 renesas,function = "intc";
136 };
137
138 scif1_pins: serial1 {
139 renesas,groups = "scif1_data";
140 renesas,function = "scif1";
141 };
142
143 sdhi0_pins: sd0 {
144 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
145 renesas,function = "sdhi0";
146 };
147
148 sdhi2_pins: sd2 {
149 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
150 renesas,function = "sdhi2";
151 };
152
153 mmc1_pins: mmc1 {
154 renesas,groups = "mmc1_data8", "mmc1_ctrl";
155 renesas,function = "mmc1";
156 };
157
158 qspi_pins: spi {
159 renesas,groups = "qspi_ctrl", "qspi_data4";
160 renesas,function = "qspi";
161 };
162};
163
164ðer {
165 pinctrl-0 = <ðer_pins &phy1_pins>;
166 pinctrl-names = "default";
167
168 phy-handle = <&phy1>;
169 renesas,ether-link-active-low;
170 status = "ok";
171
172 phy1: ethernet-phy@1 {
173 reg = <1>;
174 interrupt-parent = <&irqc0>;
175 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
176 };
177};
178
179&mmcif1 {
180 pinctrl-0 = <&mmc1_pins>;
181 pinctrl-names = "default";
182
183 vmmc-supply = <&fixedregulator3v3>;
184 bus-width = <8>;
185 non-removable;
186 status = "okay";
187};
188
189&sata1 {
190 status = "okay";
191};
192
193&spi {
194 pinctrl-0 = <&qspi_pins>;
195 pinctrl-names = "default";
196
197 status = "okay";
198
199 flash: flash@0 {
200 #address-cells = <1>;
201 #size-cells = <1>;
202 compatible = "spansion,s25fl512s";
203 reg = <0>;
204 spi-max-frequency = <30000000>;
205 m25p,fast-read;
206
207 partition@0 {
208 label = "loader";
209 reg = <0x00000000 0x00040000>;
210 read-only;
211 };
212 partition@40000 {
213 label = "user";
214 reg = <0x00040000 0x00400000>;
215 read-only;
216 };
217 partition@440000 {
218 label = "flash";
219 reg = <0x00440000 0x03bc0000>;
220 };
221 };
222};
223
224&sdhi0 {
225 pinctrl-0 = <&sdhi0_pins>;
226 pinctrl-names = "default";
227
228 vmmc-supply = <&vcc_sdhi0>;
229 vqmmc-supply = <&vccq_sdhi0>;
230 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
231 status = "okay";
232};
233
234&sdhi2 {
235 pinctrl-0 = <&sdhi2_pins>;
236 pinctrl-names = "default";
237
238 vmmc-supply = <&vcc_sdhi2>;
239 vqmmc-supply = <&vccq_sdhi2>;
240 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
241 status = "okay";
242};