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1/*
2 * linux/drivers/gpio/gpio-mb86s7x.c
3 *
4 * Copyright (C) 2015 Fujitsu Semiconductor Limited
5 * Copyright (C) 2015 Linaro Ltd.
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/io.h>
18#include <linux/init.h>
19#include <linux/clk.h>
20#include <linux/module.h>
21#include <linux/err.h>
22#include <linux/errno.h>
23#include <linux/ioport.h>
24#include <linux/of_device.h>
25#include <linux/gpio/driver.h>
26#include <linux/platform_device.h>
27#include <linux/spinlock.h>
28#include <linux/slab.h>
29
30/*
31 * Only first 8bits of a register correspond to each pin,
32 * so there are 4 registers for 32 pins.
33 */
34#define PDR(x) (0x0 + x / 8 * 4)
35#define DDR(x) (0x10 + x / 8 * 4)
36#define PFR(x) (0x20 + x / 8 * 4)
37
38#define OFFSET(x) BIT((x) % 8)
39
40struct mb86s70_gpio_chip {
41 struct gpio_chip gc;
42 void __iomem *base;
43 struct clk *clk;
44 spinlock_t lock;
45};
46
47static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio)
48{
49 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
50 unsigned long flags;
51 u32 val;
52
53 spin_lock_irqsave(&gchip->lock, flags);
54
55 val = readl(gchip->base + PFR(gpio));
56 if (!(val & OFFSET(gpio))) {
57 spin_unlock_irqrestore(&gchip->lock, flags);
58 return -EINVAL;
59 }
60
61 val &= ~OFFSET(gpio);
62 writel(val, gchip->base + PFR(gpio));
63
64 spin_unlock_irqrestore(&gchip->lock, flags);
65
66 return 0;
67}
68
69static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio)
70{
71 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
72 unsigned long flags;
73 u32 val;
74
75 spin_lock_irqsave(&gchip->lock, flags);
76
77 val = readl(gchip->base + PFR(gpio));
78 val |= OFFSET(gpio);
79 writel(val, gchip->base + PFR(gpio));
80
81 spin_unlock_irqrestore(&gchip->lock, flags);
82}
83
84static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
85{
86 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
87 unsigned long flags;
88 unsigned char val;
89
90 spin_lock_irqsave(&gchip->lock, flags);
91
92 val = readl(gchip->base + DDR(gpio));
93 val &= ~OFFSET(gpio);
94 writel(val, gchip->base + DDR(gpio));
95
96 spin_unlock_irqrestore(&gchip->lock, flags);
97
98 return 0;
99}
100
101static int mb86s70_gpio_direction_output(struct gpio_chip *gc,
102 unsigned gpio, int value)
103{
104 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
105 unsigned long flags;
106 unsigned char val;
107
108 spin_lock_irqsave(&gchip->lock, flags);
109
110 val = readl(gchip->base + PDR(gpio));
111 if (value)
112 val |= OFFSET(gpio);
113 else
114 val &= ~OFFSET(gpio);
115 writel(val, gchip->base + PDR(gpio));
116
117 val = readl(gchip->base + DDR(gpio));
118 val |= OFFSET(gpio);
119 writel(val, gchip->base + DDR(gpio));
120
121 spin_unlock_irqrestore(&gchip->lock, flags);
122
123 return 0;
124}
125
126static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)
127{
128 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
129
130 return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
131}
132
133static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
134{
135 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
136 unsigned long flags;
137 unsigned char val;
138
139 spin_lock_irqsave(&gchip->lock, flags);
140
141 val = readl(gchip->base + PDR(gpio));
142 if (value)
143 val |= OFFSET(gpio);
144 else
145 val &= ~OFFSET(gpio);
146 writel(val, gchip->base + PDR(gpio));
147
148 spin_unlock_irqrestore(&gchip->lock, flags);
149}
150
151static int mb86s70_gpio_probe(struct platform_device *pdev)
152{
153 struct mb86s70_gpio_chip *gchip;
154 struct resource *res;
155 int ret;
156
157 gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL);
158 if (gchip == NULL)
159 return -ENOMEM;
160
161 platform_set_drvdata(pdev, gchip);
162
163 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
164 gchip->base = devm_ioremap_resource(&pdev->dev, res);
165 if (IS_ERR(gchip->base))
166 return PTR_ERR(gchip->base);
167
168 gchip->clk = devm_clk_get(&pdev->dev, NULL);
169 if (IS_ERR(gchip->clk))
170 return PTR_ERR(gchip->clk);
171
172 clk_prepare_enable(gchip->clk);
173
174 spin_lock_init(&gchip->lock);
175
176 gchip->gc.direction_output = mb86s70_gpio_direction_output;
177 gchip->gc.direction_input = mb86s70_gpio_direction_input;
178 gchip->gc.request = mb86s70_gpio_request;
179 gchip->gc.free = mb86s70_gpio_free;
180 gchip->gc.get = mb86s70_gpio_get;
181 gchip->gc.set = mb86s70_gpio_set;
182 gchip->gc.label = dev_name(&pdev->dev);
183 gchip->gc.ngpio = 32;
184 gchip->gc.owner = THIS_MODULE;
185 gchip->gc.parent = &pdev->dev;
186 gchip->gc.base = -1;
187
188 platform_set_drvdata(pdev, gchip);
189
190 ret = gpiochip_add_data(&gchip->gc, gchip);
191 if (ret) {
192 dev_err(&pdev->dev, "couldn't register gpio driver\n");
193 clk_disable_unprepare(gchip->clk);
194 }
195
196 return ret;
197}
198
199static int mb86s70_gpio_remove(struct platform_device *pdev)
200{
201 struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev);
202
203 gpiochip_remove(&gchip->gc);
204 clk_disable_unprepare(gchip->clk);
205
206 return 0;
207}
208
209static const struct of_device_id mb86s70_gpio_dt_ids[] = {
210 { .compatible = "fujitsu,mb86s70-gpio" },
211 { /* sentinel */ }
212};
213MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids);
214
215static struct platform_driver mb86s70_gpio_driver = {
216 .driver = {
217 .name = "mb86s70-gpio",
218 .of_match_table = mb86s70_gpio_dt_ids,
219 },
220 .probe = mb86s70_gpio_probe,
221 .remove = mb86s70_gpio_remove,
222};
223
224static int __init mb86s70_gpio_init(void)
225{
226 return platform_driver_register(&mb86s70_gpio_driver);
227}
228module_init(mb86s70_gpio_init);
229
230MODULE_DESCRIPTION("MB86S7x GPIO Driver");
231MODULE_ALIAS("platform:mb86s70-gpio");
232MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/drivers/gpio/gpio-mb86s7x.c
4 *
5 * Copyright (C) 2015 Fujitsu Semiconductor Limited
6 * Copyright (C) 2015 Linaro Ltd.
7 */
8
9#include <linux/acpi.h>
10#include <linux/io.h>
11#include <linux/init.h>
12#include <linux/clk.h>
13#include <linux/mod_devicetable.h>
14#include <linux/module.h>
15#include <linux/err.h>
16#include <linux/errno.h>
17#include <linux/ioport.h>
18#include <linux/gpio/driver.h>
19#include <linux/platform_device.h>
20#include <linux/spinlock.h>
21#include <linux/slab.h>
22
23#include "gpiolib-acpi.h"
24
25/*
26 * Only first 8bits of a register correspond to each pin,
27 * so there are 4 registers for 32 pins.
28 */
29#define PDR(x) (0x0 + x / 8 * 4)
30#define DDR(x) (0x10 + x / 8 * 4)
31#define PFR(x) (0x20 + x / 8 * 4)
32
33#define OFFSET(x) BIT((x) % 8)
34
35struct mb86s70_gpio_chip {
36 struct gpio_chip gc;
37 void __iomem *base;
38 struct clk *clk;
39 spinlock_t lock;
40};
41
42static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio)
43{
44 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
45 unsigned long flags;
46 u32 val;
47
48 spin_lock_irqsave(&gchip->lock, flags);
49
50 val = readl(gchip->base + PFR(gpio));
51 val &= ~OFFSET(gpio);
52 writel(val, gchip->base + PFR(gpio));
53
54 spin_unlock_irqrestore(&gchip->lock, flags);
55
56 return 0;
57}
58
59static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio)
60{
61 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
62 unsigned long flags;
63 u32 val;
64
65 spin_lock_irqsave(&gchip->lock, flags);
66
67 val = readl(gchip->base + PFR(gpio));
68 val |= OFFSET(gpio);
69 writel(val, gchip->base + PFR(gpio));
70
71 spin_unlock_irqrestore(&gchip->lock, flags);
72}
73
74static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
75{
76 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
77 unsigned long flags;
78 unsigned char val;
79
80 spin_lock_irqsave(&gchip->lock, flags);
81
82 val = readl(gchip->base + DDR(gpio));
83 val &= ~OFFSET(gpio);
84 writel(val, gchip->base + DDR(gpio));
85
86 spin_unlock_irqrestore(&gchip->lock, flags);
87
88 return 0;
89}
90
91static int mb86s70_gpio_direction_output(struct gpio_chip *gc,
92 unsigned gpio, int value)
93{
94 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
95 unsigned long flags;
96 unsigned char val;
97
98 spin_lock_irqsave(&gchip->lock, flags);
99
100 val = readl(gchip->base + PDR(gpio));
101 if (value)
102 val |= OFFSET(gpio);
103 else
104 val &= ~OFFSET(gpio);
105 writel(val, gchip->base + PDR(gpio));
106
107 val = readl(gchip->base + DDR(gpio));
108 val |= OFFSET(gpio);
109 writel(val, gchip->base + DDR(gpio));
110
111 spin_unlock_irqrestore(&gchip->lock, flags);
112
113 return 0;
114}
115
116static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)
117{
118 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
119
120 return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
121}
122
123static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
124{
125 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
126 unsigned long flags;
127 unsigned char val;
128
129 spin_lock_irqsave(&gchip->lock, flags);
130
131 val = readl(gchip->base + PDR(gpio));
132 if (value)
133 val |= OFFSET(gpio);
134 else
135 val &= ~OFFSET(gpio);
136 writel(val, gchip->base + PDR(gpio));
137
138 spin_unlock_irqrestore(&gchip->lock, flags);
139}
140
141static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
142{
143 int irq, index;
144
145 for (index = 0;; index++) {
146 irq = platform_get_irq(to_platform_device(gc->parent), index);
147 if (irq < 0)
148 return irq;
149 if (irq == 0)
150 break;
151 if (irq_get_irq_data(irq)->hwirq == offset)
152 return irq;
153 }
154 return -EINVAL;
155}
156
157static int mb86s70_gpio_probe(struct platform_device *pdev)
158{
159 struct mb86s70_gpio_chip *gchip;
160 int ret;
161
162 gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL);
163 if (gchip == NULL)
164 return -ENOMEM;
165
166 platform_set_drvdata(pdev, gchip);
167
168 gchip->base = devm_platform_ioremap_resource(pdev, 0);
169 if (IS_ERR(gchip->base))
170 return PTR_ERR(gchip->base);
171
172 gchip->clk = devm_clk_get_optional(&pdev->dev, NULL);
173 if (IS_ERR(gchip->clk))
174 return PTR_ERR(gchip->clk);
175
176 ret = clk_prepare_enable(gchip->clk);
177 if (ret)
178 return ret;
179
180 spin_lock_init(&gchip->lock);
181
182 gchip->gc.direction_output = mb86s70_gpio_direction_output;
183 gchip->gc.direction_input = mb86s70_gpio_direction_input;
184 gchip->gc.request = mb86s70_gpio_request;
185 gchip->gc.free = mb86s70_gpio_free;
186 gchip->gc.get = mb86s70_gpio_get;
187 gchip->gc.set = mb86s70_gpio_set;
188 gchip->gc.to_irq = mb86s70_gpio_to_irq;
189 gchip->gc.label = dev_name(&pdev->dev);
190 gchip->gc.ngpio = 32;
191 gchip->gc.owner = THIS_MODULE;
192 gchip->gc.parent = &pdev->dev;
193 gchip->gc.base = -1;
194
195 ret = gpiochip_add_data(&gchip->gc, gchip);
196 if (ret) {
197 dev_err(&pdev->dev, "couldn't register gpio driver\n");
198 clk_disable_unprepare(gchip->clk);
199 return ret;
200 }
201
202 acpi_gpiochip_request_interrupts(&gchip->gc);
203
204 return 0;
205}
206
207static void mb86s70_gpio_remove(struct platform_device *pdev)
208{
209 struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev);
210
211 acpi_gpiochip_free_interrupts(&gchip->gc);
212 gpiochip_remove(&gchip->gc);
213 clk_disable_unprepare(gchip->clk);
214}
215
216static const struct of_device_id mb86s70_gpio_dt_ids[] = {
217 { .compatible = "fujitsu,mb86s70-gpio" },
218 { /* sentinel */ }
219};
220MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids);
221
222#ifdef CONFIG_ACPI
223static const struct acpi_device_id mb86s70_gpio_acpi_ids[] = {
224 { "SCX0007" },
225 { /* sentinel */ }
226};
227MODULE_DEVICE_TABLE(acpi, mb86s70_gpio_acpi_ids);
228#endif
229
230static struct platform_driver mb86s70_gpio_driver = {
231 .driver = {
232 .name = "mb86s70-gpio",
233 .of_match_table = mb86s70_gpio_dt_ids,
234 .acpi_match_table = ACPI_PTR(mb86s70_gpio_acpi_ids),
235 },
236 .probe = mb86s70_gpio_probe,
237 .remove_new = mb86s70_gpio_remove,
238};
239module_platform_driver(mb86s70_gpio_driver);
240
241MODULE_DESCRIPTION("MB86S7x GPIO Driver");
242MODULE_ALIAS("platform:mb86s70-gpio");
243MODULE_LICENSE("GPL");