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1/*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#include <linux/debugfs.h>
25#include <linux/delay.h>
26#include <linux/gpio/consumer.h>
27#include <linux/iopoll.h>
28#include <linux/module.h>
29#include <linux/of_platform.h>
30#include <linux/platform_device.h>
31#include <linux/pm_runtime.h>
32#include <linux/regulator/consumer.h>
33
34#include <video/display_timing.h>
35#include <video/of_display_timing.h>
36#include <video/videomode.h>
37
38#include <drm/display/drm_dp_aux_bus.h>
39#include <drm/display/drm_dp_helper.h>
40#include <drm/drm_crtc.h>
41#include <drm/drm_device.h>
42#include <drm/drm_edid.h>
43#include <drm/drm_panel.h>
44
45/**
46 * struct panel_delay - Describes delays for a simple panel.
47 */
48struct panel_delay {
49 /**
50 * @hpd_reliable: Time for HPD to be reliable
51 *
52 * The time (in milliseconds) that it takes after powering the panel
53 * before the HPD signal is reliable. Ideally this is 0 but some panels,
54 * board designs, or bad pulldown configs can cause a glitch here.
55 *
56 * NOTE: on some old panel data this number appears to be much too big.
57 * Presumably some old panels simply didn't have HPD hooked up and put
58 * the hpd_absent here because this field predates the
59 * hpd_absent. While that works, it's non-ideal.
60 */
61 unsigned int hpd_reliable;
62
63 /**
64 * @hpd_absent: Time to wait if HPD isn't hooked up.
65 *
66 * Add this to the prepare delay if we know Hot Plug Detect isn't used.
67 *
68 * This is T3-max on eDP timing diagrams or the delay from power on
69 * until HPD is guaranteed to be asserted.
70 */
71 unsigned int hpd_absent;
72
73 /**
74 * @prepare_to_enable: Time between prepare and enable.
75 *
76 * The minimum time, in milliseconds, that needs to have passed
77 * between when prepare finished and enable may begin. If at
78 * enable time less time has passed since prepare finished,
79 * the driver waits for the remaining time.
80 *
81 * If a fixed enable delay is also specified, we'll start
82 * counting before delaying for the fixed delay.
83 *
84 * If a fixed prepare delay is also specified, we won't start
85 * counting until after the fixed delay. We can't overlap this
86 * fixed delay with the min time because the fixed delay
87 * doesn't happen at the end of the function if a HPD GPIO was
88 * specified.
89 *
90 * In other words:
91 * prepare()
92 * ...
93 * // do fixed prepare delay
94 * // wait for HPD GPIO if applicable
95 * // start counting for prepare_to_enable
96 *
97 * enable()
98 * // do fixed enable delay
99 * // enforce prepare_to_enable min time
100 *
101 * This is not specified in a standard way on eDP timing diagrams.
102 * It is effectively the time from HPD going high till you can
103 * turn on the backlight.
104 */
105 unsigned int prepare_to_enable;
106
107 /**
108 * @enable: Time for the panel to display a valid frame.
109 *
110 * The time (in milliseconds) that it takes for the panel to
111 * display the first valid frame after starting to receive
112 * video data.
113 *
114 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or
115 * the delay after link training finishes until we can turn the
116 * backlight on and see valid data.
117 */
118 unsigned int enable;
119
120 /**
121 * @disable: Time for the panel to turn the display off.
122 *
123 * The time (in milliseconds) that it takes for the panel to
124 * turn the display off (no content is visible).
125 *
126 * This is T9-min (delay from backlight off to end of valid video
127 * data) on eDP timing diagrams. It is not common to set.
128 */
129 unsigned int disable;
130
131 /**
132 * @unprepare: Time to power down completely.
133 *
134 * The time (in milliseconds) that it takes for the panel
135 * to power itself down completely.
136 *
137 * This time is used to prevent a future "prepare" from
138 * starting until at least this many milliseconds has passed.
139 * If at prepare time less time has passed since unprepare
140 * finished, the driver waits for the remaining time.
141 *
142 * This is T12-min on eDP timing diagrams.
143 */
144 unsigned int unprepare;
145};
146
147/**
148 * struct panel_desc - Describes a simple panel.
149 */
150struct panel_desc {
151 /**
152 * @modes: Pointer to array of fixed modes appropriate for this panel.
153 *
154 * If only one mode then this can just be the address of the mode.
155 * NOTE: cannot be used with "timings" and also if this is specified
156 * then you cannot override the mode in the device tree.
157 */
158 const struct drm_display_mode *modes;
159
160 /** @num_modes: Number of elements in modes array. */
161 unsigned int num_modes;
162
163 /**
164 * @timings: Pointer to array of display timings
165 *
166 * NOTE: cannot be used with "modes" and also these will be used to
167 * validate a device tree override if one is present.
168 */
169 const struct display_timing *timings;
170
171 /** @num_timings: Number of elements in timings array. */
172 unsigned int num_timings;
173
174 /** @bpc: Bits per color. */
175 unsigned int bpc;
176
177 /** @size: Structure containing the physical size of this panel. */
178 struct {
179 /**
180 * @size.width: Width (in mm) of the active display area.
181 */
182 unsigned int width;
183
184 /**
185 * @size.height: Height (in mm) of the active display area.
186 */
187 unsigned int height;
188 } size;
189
190 /** @delay: Structure containing various delay values for this panel. */
191 struct panel_delay delay;
192};
193
194/**
195 * struct edp_panel_entry - Maps panel ID to delay / panel name.
196 */
197struct edp_panel_entry {
198 /** @panel_id: 32-bit ID for panel, encoded with drm_edid_encode_panel_id(). */
199 u32 panel_id;
200
201 /** @delay: The power sequencing delays needed for this panel. */
202 const struct panel_delay *delay;
203
204 /** @name: Name of this panel (for printing to logs). */
205 const char *name;
206
207 /** @override_edid_mode: Override the mode obtained by edid. */
208 const struct drm_display_mode *override_edid_mode;
209};
210
211struct panel_edp {
212 struct drm_panel base;
213 bool enabled;
214 bool no_hpd;
215
216 bool prepared;
217
218 ktime_t prepared_time;
219 ktime_t unprepared_time;
220
221 const struct panel_desc *desc;
222
223 struct regulator *supply;
224 struct i2c_adapter *ddc;
225 struct drm_dp_aux *aux;
226
227 struct gpio_desc *enable_gpio;
228 struct gpio_desc *hpd_gpio;
229
230 const struct edp_panel_entry *detected_panel;
231
232 struct edid *edid;
233
234 struct drm_display_mode override_mode;
235
236 enum drm_panel_orientation orientation;
237};
238
239static inline struct panel_edp *to_panel_edp(struct drm_panel *panel)
240{
241 return container_of(panel, struct panel_edp, base);
242}
243
244static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel,
245 struct drm_connector *connector)
246{
247 struct drm_display_mode *mode;
248 unsigned int i, num = 0;
249
250 for (i = 0; i < panel->desc->num_timings; i++) {
251 const struct display_timing *dt = &panel->desc->timings[i];
252 struct videomode vm;
253
254 videomode_from_timing(dt, &vm);
255 mode = drm_mode_create(connector->dev);
256 if (!mode) {
257 dev_err(panel->base.dev, "failed to add mode %ux%u\n",
258 dt->hactive.typ, dt->vactive.typ);
259 continue;
260 }
261
262 drm_display_mode_from_videomode(&vm, mode);
263
264 mode->type |= DRM_MODE_TYPE_DRIVER;
265
266 if (panel->desc->num_timings == 1)
267 mode->type |= DRM_MODE_TYPE_PREFERRED;
268
269 drm_mode_probed_add(connector, mode);
270 num++;
271 }
272
273 return num;
274}
275
276static unsigned int panel_edp_get_display_modes(struct panel_edp *panel,
277 struct drm_connector *connector)
278{
279 struct drm_display_mode *mode;
280 unsigned int i, num = 0;
281
282 for (i = 0; i < panel->desc->num_modes; i++) {
283 const struct drm_display_mode *m = &panel->desc->modes[i];
284
285 mode = drm_mode_duplicate(connector->dev, m);
286 if (!mode) {
287 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
288 m->hdisplay, m->vdisplay,
289 drm_mode_vrefresh(m));
290 continue;
291 }
292
293 mode->type |= DRM_MODE_TYPE_DRIVER;
294
295 if (panel->desc->num_modes == 1)
296 mode->type |= DRM_MODE_TYPE_PREFERRED;
297
298 drm_mode_set_name(mode);
299
300 drm_mode_probed_add(connector, mode);
301 num++;
302 }
303
304 return num;
305}
306
307static int panel_edp_override_edid_mode(struct panel_edp *panel,
308 struct drm_connector *connector,
309 const struct drm_display_mode *override_mode)
310{
311 struct drm_display_mode *mode;
312
313 mode = drm_mode_duplicate(connector->dev, override_mode);
314 if (!mode) {
315 dev_err(panel->base.dev, "failed to add additional mode\n");
316 return 0;
317 }
318
319 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
320 drm_mode_set_name(mode);
321 drm_mode_probed_add(connector, mode);
322 return 1;
323}
324
325static int panel_edp_get_non_edid_modes(struct panel_edp *panel,
326 struct drm_connector *connector)
327{
328 struct drm_display_mode *mode;
329 bool has_override = panel->override_mode.type;
330 unsigned int num = 0;
331
332 if (!panel->desc)
333 return 0;
334
335 if (has_override) {
336 mode = drm_mode_duplicate(connector->dev,
337 &panel->override_mode);
338 if (mode) {
339 drm_mode_probed_add(connector, mode);
340 num = 1;
341 } else {
342 dev_err(panel->base.dev, "failed to add override mode\n");
343 }
344 }
345
346 /* Only add timings if override was not there or failed to validate */
347 if (num == 0 && panel->desc->num_timings)
348 num = panel_edp_get_timings_modes(panel, connector);
349
350 /*
351 * Only add fixed modes if timings/override added no mode.
352 *
353 * We should only ever have either the display timings specified
354 * or a fixed mode. Anything else is rather bogus.
355 */
356 WARN_ON(panel->desc->num_timings && panel->desc->num_modes);
357 if (num == 0)
358 num = panel_edp_get_display_modes(panel, connector);
359
360 connector->display_info.bpc = panel->desc->bpc;
361 connector->display_info.width_mm = panel->desc->size.width;
362 connector->display_info.height_mm = panel->desc->size.height;
363
364 return num;
365}
366
367static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms)
368{
369 ktime_t now_ktime, min_ktime;
370
371 if (!min_ms)
372 return;
373
374 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms));
375 now_ktime = ktime_get_boottime();
376
377 if (ktime_before(now_ktime, min_ktime))
378 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1);
379}
380
381static int panel_edp_disable(struct drm_panel *panel)
382{
383 struct panel_edp *p = to_panel_edp(panel);
384
385 if (!p->enabled)
386 return 0;
387
388 if (p->desc->delay.disable)
389 msleep(p->desc->delay.disable);
390
391 p->enabled = false;
392
393 return 0;
394}
395
396static int panel_edp_suspend(struct device *dev)
397{
398 struct panel_edp *p = dev_get_drvdata(dev);
399
400 gpiod_set_value_cansleep(p->enable_gpio, 0);
401 regulator_disable(p->supply);
402 p->unprepared_time = ktime_get_boottime();
403
404 return 0;
405}
406
407static int panel_edp_unprepare(struct drm_panel *panel)
408{
409 struct panel_edp *p = to_panel_edp(panel);
410 int ret;
411
412 /* Unpreparing when already unprepared is a no-op */
413 if (!p->prepared)
414 return 0;
415
416 pm_runtime_mark_last_busy(panel->dev);
417 ret = pm_runtime_put_autosuspend(panel->dev);
418 if (ret < 0)
419 return ret;
420 p->prepared = false;
421
422 return 0;
423}
424
425static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p)
426{
427 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
428 if (IS_ERR(p->hpd_gpio))
429 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio),
430 "failed to get 'hpd' GPIO\n");
431
432 return 0;
433}
434
435static bool panel_edp_can_read_hpd(struct panel_edp *p)
436{
437 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted));
438}
439
440static int panel_edp_prepare_once(struct panel_edp *p)
441{
442 struct device *dev = p->base.dev;
443 unsigned int delay;
444 int err;
445 int hpd_asserted;
446 unsigned long hpd_wait_us;
447
448 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare);
449
450 err = regulator_enable(p->supply);
451 if (err < 0) {
452 dev_err(dev, "failed to enable supply: %d\n", err);
453 return err;
454 }
455
456 gpiod_set_value_cansleep(p->enable_gpio, 1);
457
458 delay = p->desc->delay.hpd_reliable;
459 if (p->no_hpd)
460 delay = max(delay, p->desc->delay.hpd_absent);
461 if (delay)
462 msleep(delay);
463
464 if (panel_edp_can_read_hpd(p)) {
465 if (p->desc->delay.hpd_absent)
466 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL;
467 else
468 hpd_wait_us = 2000000;
469
470 if (p->hpd_gpio) {
471 err = readx_poll_timeout(gpiod_get_value_cansleep,
472 p->hpd_gpio, hpd_asserted,
473 hpd_asserted, 1000, hpd_wait_us);
474 if (hpd_asserted < 0)
475 err = hpd_asserted;
476 } else {
477 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us);
478 }
479
480 if (err) {
481 if (err != -ETIMEDOUT)
482 dev_err(dev,
483 "error waiting for hpd GPIO: %d\n", err);
484 goto error;
485 }
486 }
487
488 p->prepared_time = ktime_get_boottime();
489
490 return 0;
491
492error:
493 gpiod_set_value_cansleep(p->enable_gpio, 0);
494 regulator_disable(p->supply);
495 p->unprepared_time = ktime_get_boottime();
496
497 return err;
498}
499
500/*
501 * Some panels simply don't always come up and need to be power cycled to
502 * work properly. We'll allow for a handful of retries.
503 */
504#define MAX_PANEL_PREPARE_TRIES 5
505
506static int panel_edp_resume(struct device *dev)
507{
508 struct panel_edp *p = dev_get_drvdata(dev);
509 int ret;
510 int try;
511
512 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) {
513 ret = panel_edp_prepare_once(p);
514 if (ret != -ETIMEDOUT)
515 break;
516 }
517
518 if (ret == -ETIMEDOUT)
519 dev_err(dev, "Prepare timeout after %d tries\n", try);
520 else if (try)
521 dev_warn(dev, "Prepare needed %d retries\n", try);
522
523 return ret;
524}
525
526static int panel_edp_prepare(struct drm_panel *panel)
527{
528 struct panel_edp *p = to_panel_edp(panel);
529 int ret;
530
531 /* Preparing when already prepared is a no-op */
532 if (p->prepared)
533 return 0;
534
535 ret = pm_runtime_get_sync(panel->dev);
536 if (ret < 0) {
537 pm_runtime_put_autosuspend(panel->dev);
538 return ret;
539 }
540
541 p->prepared = true;
542
543 return 0;
544}
545
546static int panel_edp_enable(struct drm_panel *panel)
547{
548 struct panel_edp *p = to_panel_edp(panel);
549 unsigned int delay;
550
551 if (p->enabled)
552 return 0;
553
554 delay = p->desc->delay.enable;
555
556 /*
557 * If there is a "prepare_to_enable" delay then that's supposed to be
558 * the delay from HPD going high until we can turn the backlight on.
559 * However, we can only count this if HPD is readable by the panel
560 * driver.
561 *
562 * If we aren't handling the HPD pin ourselves then the best we
563 * can do is assume that HPD went high immediately before we were
564 * called (and link training took zero time). Note that "no-hpd"
565 * actually counts as handling HPD ourselves since we're doing the
566 * worst case delay (in prepare) ourselves.
567 *
568 * NOTE: if we ever end up in this "if" statement then we're
569 * guaranteed that the panel_edp_wait() call below will do no delay.
570 * It already handles that case, though, so we don't need any special
571 * code for it.
572 */
573 if (p->desc->delay.prepare_to_enable &&
574 !panel_edp_can_read_hpd(p) && !p->no_hpd)
575 delay = max(delay, p->desc->delay.prepare_to_enable);
576
577 if (delay)
578 msleep(delay);
579
580 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable);
581
582 p->enabled = true;
583
584 return 0;
585}
586
587static int panel_edp_get_modes(struct drm_panel *panel,
588 struct drm_connector *connector)
589{
590 struct panel_edp *p = to_panel_edp(panel);
591 int num = 0;
592 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes;
593 bool has_override_edid_mode = p->detected_panel &&
594 p->detected_panel != ERR_PTR(-EINVAL) &&
595 p->detected_panel->override_edid_mode;
596
597 /* probe EDID if a DDC bus is available */
598 if (p->ddc) {
599 pm_runtime_get_sync(panel->dev);
600
601 if (!p->edid)
602 p->edid = drm_get_edid(connector, p->ddc);
603 /*
604 * If both edid and hard-coded modes exists, skip edid modes to
605 * avoid multiple preferred modes.
606 */
607 if (p->edid && !has_hard_coded_modes) {
608 if (has_override_edid_mode) {
609 /*
610 * override_edid_mode is specified. Use
611 * override_edid_mode instead of from edid.
612 */
613 num += panel_edp_override_edid_mode(p, connector,
614 p->detected_panel->override_edid_mode);
615 } else {
616 num += drm_add_edid_modes(connector, p->edid);
617 }
618 }
619
620 pm_runtime_mark_last_busy(panel->dev);
621 pm_runtime_put_autosuspend(panel->dev);
622 }
623
624 if (has_hard_coded_modes)
625 num += panel_edp_get_non_edid_modes(p, connector);
626 else if (!num)
627 dev_warn(p->base.dev, "No display modes\n");
628
629 /*
630 * TODO: Remove once all drm drivers call
631 * drm_connector_set_orientation_from_panel()
632 */
633 drm_connector_set_panel_orientation(connector, p->orientation);
634
635 return num;
636}
637
638static int panel_edp_get_timings(struct drm_panel *panel,
639 unsigned int num_timings,
640 struct display_timing *timings)
641{
642 struct panel_edp *p = to_panel_edp(panel);
643 unsigned int i;
644
645 if (p->desc->num_timings < num_timings)
646 num_timings = p->desc->num_timings;
647
648 if (timings)
649 for (i = 0; i < num_timings; i++)
650 timings[i] = p->desc->timings[i];
651
652 return p->desc->num_timings;
653}
654
655static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel)
656{
657 struct panel_edp *p = to_panel_edp(panel);
658
659 return p->orientation;
660}
661
662static int detected_panel_show(struct seq_file *s, void *data)
663{
664 struct drm_panel *panel = s->private;
665 struct panel_edp *p = to_panel_edp(panel);
666
667 if (IS_ERR(p->detected_panel))
668 seq_puts(s, "UNKNOWN\n");
669 else if (!p->detected_panel)
670 seq_puts(s, "HARDCODED\n");
671 else
672 seq_printf(s, "%s\n", p->detected_panel->name);
673
674 return 0;
675}
676
677DEFINE_SHOW_ATTRIBUTE(detected_panel);
678
679static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root)
680{
681 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops);
682}
683
684static const struct drm_panel_funcs panel_edp_funcs = {
685 .disable = panel_edp_disable,
686 .unprepare = panel_edp_unprepare,
687 .prepare = panel_edp_prepare,
688 .enable = panel_edp_enable,
689 .get_modes = panel_edp_get_modes,
690 .get_orientation = panel_edp_get_orientation,
691 .get_timings = panel_edp_get_timings,
692 .debugfs_init = panel_edp_debugfs_init,
693};
694
695#define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \
696 (to_check->field.typ >= bounds->field.min && \
697 to_check->field.typ <= bounds->field.max)
698static void panel_edp_parse_panel_timing_node(struct device *dev,
699 struct panel_edp *panel,
700 const struct display_timing *ot)
701{
702 const struct panel_desc *desc = panel->desc;
703 struct videomode vm;
704 unsigned int i;
705
706 if (WARN_ON(desc->num_modes)) {
707 dev_err(dev, "Reject override mode: panel has a fixed mode\n");
708 return;
709 }
710 if (WARN_ON(!desc->num_timings)) {
711 dev_err(dev, "Reject override mode: no timings specified\n");
712 return;
713 }
714
715 for (i = 0; i < panel->desc->num_timings; i++) {
716 const struct display_timing *dt = &panel->desc->timings[i];
717
718 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) ||
719 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) ||
720 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) ||
721 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) ||
722 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) ||
723 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) ||
724 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) ||
725 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len))
726 continue;
727
728 if (ot->flags != dt->flags)
729 continue;
730
731 videomode_from_timing(ot, &vm);
732 drm_display_mode_from_videomode(&vm, &panel->override_mode);
733 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |
734 DRM_MODE_TYPE_PREFERRED;
735 break;
736 }
737
738 if (WARN_ON(!panel->override_mode.type))
739 dev_err(dev, "Reject override mode: No display_timing found\n");
740}
741
742static const struct edp_panel_entry *find_edp_panel(u32 panel_id);
743
744static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel)
745{
746 struct panel_desc *desc;
747 u32 panel_id;
748 char vend[4];
749 u16 product_id;
750 u32 reliable_ms = 0;
751 u32 absent_ms = 0;
752 int ret;
753
754 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
755 if (!desc)
756 return -ENOMEM;
757 panel->desc = desc;
758
759 /*
760 * Read the dts properties for the initial probe. These are used by
761 * the runtime resume code which will get called by the
762 * pm_runtime_get_sync() call below.
763 */
764 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms);
765 desc->delay.hpd_reliable = reliable_ms;
766 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms);
767 desc->delay.hpd_absent = absent_ms;
768
769 /* Power the panel on so we can read the EDID */
770 ret = pm_runtime_get_sync(dev);
771 if (ret < 0) {
772 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret);
773 goto exit;
774 }
775
776 panel_id = drm_edid_get_panel_id(panel->ddc);
777 if (!panel_id) {
778 dev_err(dev, "Couldn't identify panel via EDID\n");
779 ret = -EIO;
780 goto exit;
781 }
782 drm_edid_decode_panel_id(panel_id, vend, &product_id);
783
784 panel->detected_panel = find_edp_panel(panel_id);
785
786 /*
787 * We're using non-optimized timings and want it really obvious that
788 * someone needs to add an entry to the table, so we'll do a WARN_ON
789 * splat.
790 */
791 if (WARN_ON(!panel->detected_panel)) {
792 dev_warn(dev,
793 "Unknown panel %s %#06x, using conservative timings\n",
794 vend, product_id);
795
796 /*
797 * It's highly likely that the panel will work if we use very
798 * conservative timings, so let's do that. We already know that
799 * the HPD-related delays must have worked since we got this
800 * far, so we really just need the "unprepare" / "enable"
801 * delays. We don't need "prepare_to_enable" since that
802 * overlaps the "enable" delay anyway.
803 *
804 * Nearly all panels have a "unprepare" delay of 500 ms though
805 * there are a few with 1000. Let's stick 2000 in just to be
806 * super conservative.
807 *
808 * An "enable" delay of 80 ms seems the most common, but we'll
809 * throw in 200 ms to be safe.
810 */
811 desc->delay.unprepare = 2000;
812 desc->delay.enable = 200;
813
814 panel->detected_panel = ERR_PTR(-EINVAL);
815 } else {
816 dev_info(dev, "Detected %s %s (%#06x)\n",
817 vend, panel->detected_panel->name, product_id);
818
819 /* Update the delay; everything else comes from EDID */
820 desc->delay = *panel->detected_panel->delay;
821 }
822
823 ret = 0;
824exit:
825 pm_runtime_mark_last_busy(dev);
826 pm_runtime_put_autosuspend(dev);
827
828 return ret;
829}
830
831static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
832 struct drm_dp_aux *aux)
833{
834 struct panel_edp *panel;
835 struct display_timing dt;
836 struct device_node *ddc;
837 int err;
838
839 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
840 if (!panel)
841 return -ENOMEM;
842
843 panel->enabled = false;
844 panel->prepared_time = 0;
845 panel->desc = desc;
846 panel->aux = aux;
847
848 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
849 if (!panel->no_hpd) {
850 err = panel_edp_get_hpd_gpio(dev, panel);
851 if (err)
852 return err;
853 }
854
855 panel->supply = devm_regulator_get(dev, "power");
856 if (IS_ERR(panel->supply))
857 return PTR_ERR(panel->supply);
858
859 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
860 GPIOD_OUT_LOW);
861 if (IS_ERR(panel->enable_gpio))
862 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio),
863 "failed to request GPIO\n");
864
865 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
866 if (err) {
867 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
868 return err;
869 }
870
871 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
872 if (ddc) {
873 panel->ddc = of_find_i2c_adapter_by_node(ddc);
874 of_node_put(ddc);
875
876 if (!panel->ddc)
877 return -EPROBE_DEFER;
878 } else if (aux) {
879 panel->ddc = &aux->ddc;
880 }
881
882 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
883 panel_edp_parse_panel_timing_node(dev, panel, &dt);
884
885 dev_set_drvdata(dev, panel);
886
887 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP);
888
889 err = drm_panel_of_backlight(&panel->base);
890 if (err)
891 goto err_finished_ddc_init;
892
893 /*
894 * We use runtime PM for prepare / unprepare since those power the panel
895 * on and off and those can be very slow operations. This is important
896 * to optimize powering the panel on briefly to read the EDID before
897 * fully enabling the panel.
898 */
899 pm_runtime_enable(dev);
900 pm_runtime_set_autosuspend_delay(dev, 1000);
901 pm_runtime_use_autosuspend(dev);
902
903 if (of_device_is_compatible(dev->of_node, "edp-panel")) {
904 err = generic_edp_panel_probe(dev, panel);
905 if (err) {
906 dev_err_probe(dev, err,
907 "Couldn't detect panel nor find a fallback\n");
908 goto err_finished_pm_runtime;
909 }
910 /* generic_edp_panel_probe() replaces desc in the panel */
911 desc = panel->desc;
912 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) {
913 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc);
914 }
915
916 if (!panel->base.backlight && panel->aux) {
917 pm_runtime_get_sync(dev);
918 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux);
919 pm_runtime_mark_last_busy(dev);
920 pm_runtime_put_autosuspend(dev);
921 if (err)
922 goto err_finished_pm_runtime;
923 }
924
925 drm_panel_add(&panel->base);
926
927 return 0;
928
929err_finished_pm_runtime:
930 pm_runtime_dont_use_autosuspend(dev);
931 pm_runtime_disable(dev);
932err_finished_ddc_init:
933 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
934 put_device(&panel->ddc->dev);
935
936 return err;
937}
938
939static void panel_edp_remove(struct device *dev)
940{
941 struct panel_edp *panel = dev_get_drvdata(dev);
942
943 drm_panel_remove(&panel->base);
944 drm_panel_disable(&panel->base);
945 drm_panel_unprepare(&panel->base);
946
947 pm_runtime_dont_use_autosuspend(dev);
948 pm_runtime_disable(dev);
949 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
950 put_device(&panel->ddc->dev);
951
952 kfree(panel->edid);
953 panel->edid = NULL;
954}
955
956static void panel_edp_shutdown(struct device *dev)
957{
958 struct panel_edp *panel = dev_get_drvdata(dev);
959
960 drm_panel_disable(&panel->base);
961 drm_panel_unprepare(&panel->base);
962}
963
964static const struct display_timing auo_b101ean01_timing = {
965 .pixelclock = { 65300000, 72500000, 75000000 },
966 .hactive = { 1280, 1280, 1280 },
967 .hfront_porch = { 18, 119, 119 },
968 .hback_porch = { 21, 21, 21 },
969 .hsync_len = { 32, 32, 32 },
970 .vactive = { 800, 800, 800 },
971 .vfront_porch = { 4, 4, 4 },
972 .vback_porch = { 8, 8, 8 },
973 .vsync_len = { 18, 20, 20 },
974};
975
976static const struct panel_desc auo_b101ean01 = {
977 .timings = &auo_b101ean01_timing,
978 .num_timings = 1,
979 .bpc = 6,
980 .size = {
981 .width = 217,
982 .height = 136,
983 },
984};
985
986static const struct drm_display_mode auo_b116xa3_mode = {
987 .clock = 70589,
988 .hdisplay = 1366,
989 .hsync_start = 1366 + 40,
990 .hsync_end = 1366 + 40 + 40,
991 .htotal = 1366 + 40 + 40 + 32,
992 .vdisplay = 768,
993 .vsync_start = 768 + 10,
994 .vsync_end = 768 + 10 + 12,
995 .vtotal = 768 + 10 + 12 + 6,
996 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
997};
998
999static const struct drm_display_mode auo_b116xak01_mode = {
1000 .clock = 69300,
1001 .hdisplay = 1366,
1002 .hsync_start = 1366 + 48,
1003 .hsync_end = 1366 + 48 + 32,
1004 .htotal = 1366 + 48 + 32 + 10,
1005 .vdisplay = 768,
1006 .vsync_start = 768 + 4,
1007 .vsync_end = 768 + 4 + 6,
1008 .vtotal = 768 + 4 + 6 + 15,
1009 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1010};
1011
1012static const struct panel_desc auo_b116xak01 = {
1013 .modes = &auo_b116xak01_mode,
1014 .num_modes = 1,
1015 .bpc = 6,
1016 .size = {
1017 .width = 256,
1018 .height = 144,
1019 },
1020 .delay = {
1021 .hpd_absent = 200,
1022 .unprepare = 500,
1023 .enable = 50,
1024 },
1025};
1026
1027static const struct drm_display_mode auo_b133han05_mode = {
1028 .clock = 142600,
1029 .hdisplay = 1920,
1030 .hsync_start = 1920 + 58,
1031 .hsync_end = 1920 + 58 + 42,
1032 .htotal = 1920 + 58 + 42 + 60,
1033 .vdisplay = 1080,
1034 .vsync_start = 1080 + 3,
1035 .vsync_end = 1080 + 3 + 5,
1036 .vtotal = 1080 + 3 + 5 + 54,
1037};
1038
1039static const struct panel_desc auo_b133han05 = {
1040 .modes = &auo_b133han05_mode,
1041 .num_modes = 1,
1042 .bpc = 8,
1043 .size = {
1044 .width = 293,
1045 .height = 165,
1046 },
1047 .delay = {
1048 .hpd_reliable = 100,
1049 .enable = 20,
1050 .unprepare = 50,
1051 },
1052};
1053
1054static const struct drm_display_mode auo_b133htn01_mode = {
1055 .clock = 150660,
1056 .hdisplay = 1920,
1057 .hsync_start = 1920 + 172,
1058 .hsync_end = 1920 + 172 + 80,
1059 .htotal = 1920 + 172 + 80 + 60,
1060 .vdisplay = 1080,
1061 .vsync_start = 1080 + 25,
1062 .vsync_end = 1080 + 25 + 10,
1063 .vtotal = 1080 + 25 + 10 + 10,
1064};
1065
1066static const struct panel_desc auo_b133htn01 = {
1067 .modes = &auo_b133htn01_mode,
1068 .num_modes = 1,
1069 .bpc = 6,
1070 .size = {
1071 .width = 293,
1072 .height = 165,
1073 },
1074 .delay = {
1075 .hpd_reliable = 105,
1076 .enable = 20,
1077 .unprepare = 50,
1078 },
1079};
1080
1081static const struct drm_display_mode auo_b133xtn01_mode = {
1082 .clock = 69500,
1083 .hdisplay = 1366,
1084 .hsync_start = 1366 + 48,
1085 .hsync_end = 1366 + 48 + 32,
1086 .htotal = 1366 + 48 + 32 + 20,
1087 .vdisplay = 768,
1088 .vsync_start = 768 + 3,
1089 .vsync_end = 768 + 3 + 6,
1090 .vtotal = 768 + 3 + 6 + 13,
1091};
1092
1093static const struct panel_desc auo_b133xtn01 = {
1094 .modes = &auo_b133xtn01_mode,
1095 .num_modes = 1,
1096 .bpc = 6,
1097 .size = {
1098 .width = 293,
1099 .height = 165,
1100 },
1101};
1102
1103static const struct drm_display_mode auo_b140han06_mode = {
1104 .clock = 141000,
1105 .hdisplay = 1920,
1106 .hsync_start = 1920 + 16,
1107 .hsync_end = 1920 + 16 + 16,
1108 .htotal = 1920 + 16 + 16 + 152,
1109 .vdisplay = 1080,
1110 .vsync_start = 1080 + 3,
1111 .vsync_end = 1080 + 3 + 14,
1112 .vtotal = 1080 + 3 + 14 + 19,
1113};
1114
1115static const struct panel_desc auo_b140han06 = {
1116 .modes = &auo_b140han06_mode,
1117 .num_modes = 1,
1118 .bpc = 8,
1119 .size = {
1120 .width = 309,
1121 .height = 174,
1122 },
1123 .delay = {
1124 .hpd_reliable = 100,
1125 .enable = 20,
1126 .unprepare = 50,
1127 },
1128};
1129
1130static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
1131 {
1132 .clock = 71900,
1133 .hdisplay = 1280,
1134 .hsync_start = 1280 + 48,
1135 .hsync_end = 1280 + 48 + 32,
1136 .htotal = 1280 + 48 + 32 + 80,
1137 .vdisplay = 800,
1138 .vsync_start = 800 + 3,
1139 .vsync_end = 800 + 3 + 5,
1140 .vtotal = 800 + 3 + 5 + 24,
1141 },
1142 {
1143 .clock = 57500,
1144 .hdisplay = 1280,
1145 .hsync_start = 1280 + 48,
1146 .hsync_end = 1280 + 48 + 32,
1147 .htotal = 1280 + 48 + 32 + 80,
1148 .vdisplay = 800,
1149 .vsync_start = 800 + 3,
1150 .vsync_end = 800 + 3 + 5,
1151 .vtotal = 800 + 3 + 5 + 24,
1152 },
1153};
1154
1155static const struct panel_desc boe_nv101wxmn51 = {
1156 .modes = boe_nv101wxmn51_modes,
1157 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
1158 .bpc = 8,
1159 .size = {
1160 .width = 217,
1161 .height = 136,
1162 },
1163 .delay = {
1164 /* TODO: should be hpd-absent and no-hpd should be set? */
1165 .hpd_reliable = 210,
1166 .enable = 50,
1167 .unprepare = 160,
1168 },
1169};
1170
1171static const struct drm_display_mode boe_nv110wtm_n61_modes[] = {
1172 {
1173 .clock = 207800,
1174 .hdisplay = 2160,
1175 .hsync_start = 2160 + 48,
1176 .hsync_end = 2160 + 48 + 32,
1177 .htotal = 2160 + 48 + 32 + 100,
1178 .vdisplay = 1440,
1179 .vsync_start = 1440 + 3,
1180 .vsync_end = 1440 + 3 + 6,
1181 .vtotal = 1440 + 3 + 6 + 31,
1182 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1183 },
1184 {
1185 .clock = 138500,
1186 .hdisplay = 2160,
1187 .hsync_start = 2160 + 48,
1188 .hsync_end = 2160 + 48 + 32,
1189 .htotal = 2160 + 48 + 32 + 100,
1190 .vdisplay = 1440,
1191 .vsync_start = 1440 + 3,
1192 .vsync_end = 1440 + 3 + 6,
1193 .vtotal = 1440 + 3 + 6 + 31,
1194 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1195 },
1196};
1197
1198static const struct panel_desc boe_nv110wtm_n61 = {
1199 .modes = boe_nv110wtm_n61_modes,
1200 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes),
1201 .bpc = 8,
1202 .size = {
1203 .width = 233,
1204 .height = 155,
1205 },
1206 .delay = {
1207 .hpd_absent = 200,
1208 .prepare_to_enable = 80,
1209 .enable = 50,
1210 .unprepare = 500,
1211 },
1212};
1213
1214/* Also used for boe_nv133fhm_n62 */
1215static const struct drm_display_mode boe_nv133fhm_n61_modes = {
1216 .clock = 147840,
1217 .hdisplay = 1920,
1218 .hsync_start = 1920 + 48,
1219 .hsync_end = 1920 + 48 + 32,
1220 .htotal = 1920 + 48 + 32 + 200,
1221 .vdisplay = 1080,
1222 .vsync_start = 1080 + 3,
1223 .vsync_end = 1080 + 3 + 6,
1224 .vtotal = 1080 + 3 + 6 + 31,
1225 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1226};
1227
1228/* Also used for boe_nv133fhm_n62 */
1229static const struct panel_desc boe_nv133fhm_n61 = {
1230 .modes = &boe_nv133fhm_n61_modes,
1231 .num_modes = 1,
1232 .bpc = 6,
1233 .size = {
1234 .width = 294,
1235 .height = 165,
1236 },
1237 .delay = {
1238 /*
1239 * When power is first given to the panel there's a short
1240 * spike on the HPD line. It was explained that this spike
1241 * was until the TCON data download was complete. On
1242 * one system this was measured at 8 ms. We'll put 15 ms
1243 * in the prepare delay just to be safe. That means:
1244 * - If HPD isn't hooked up you still have 200 ms delay.
1245 * - If HPD is hooked up we won't try to look at it for the
1246 * first 15 ms.
1247 */
1248 .hpd_reliable = 15,
1249 .hpd_absent = 200,
1250
1251 .unprepare = 500,
1252 },
1253};
1254
1255static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
1256 {
1257 .clock = 148500,
1258 .hdisplay = 1920,
1259 .hsync_start = 1920 + 48,
1260 .hsync_end = 1920 + 48 + 32,
1261 .htotal = 2200,
1262 .vdisplay = 1080,
1263 .vsync_start = 1080 + 3,
1264 .vsync_end = 1080 + 3 + 5,
1265 .vtotal = 1125,
1266 },
1267};
1268
1269static const struct panel_desc boe_nv140fhmn49 = {
1270 .modes = boe_nv140fhmn49_modes,
1271 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),
1272 .bpc = 6,
1273 .size = {
1274 .width = 309,
1275 .height = 174,
1276 },
1277 .delay = {
1278 /* TODO: should be hpd-absent and no-hpd should be set? */
1279 .hpd_reliable = 210,
1280 .enable = 50,
1281 .unprepare = 160,
1282 },
1283};
1284
1285static const struct drm_display_mode innolux_n116bca_ea1_mode = {
1286 .clock = 76420,
1287 .hdisplay = 1366,
1288 .hsync_start = 1366 + 136,
1289 .hsync_end = 1366 + 136 + 30,
1290 .htotal = 1366 + 136 + 30 + 60,
1291 .vdisplay = 768,
1292 .vsync_start = 768 + 8,
1293 .vsync_end = 768 + 8 + 12,
1294 .vtotal = 768 + 8 + 12 + 12,
1295 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1296};
1297
1298static const struct panel_desc innolux_n116bca_ea1 = {
1299 .modes = &innolux_n116bca_ea1_mode,
1300 .num_modes = 1,
1301 .bpc = 6,
1302 .size = {
1303 .width = 256,
1304 .height = 144,
1305 },
1306 .delay = {
1307 .hpd_absent = 200,
1308 .enable = 80,
1309 .disable = 50,
1310 .unprepare = 500,
1311 },
1312};
1313
1314/*
1315 * Datasheet specifies that at 60 Hz refresh rate:
1316 * - total horizontal time: { 1506, 1592, 1716 }
1317 * - total vertical time: { 788, 800, 868 }
1318 *
1319 * ...but doesn't go into exactly how that should be split into a front
1320 * porch, back porch, or sync length. For now we'll leave a single setting
1321 * here which allows a bit of tweaking of the pixel clock at the expense of
1322 * refresh rate.
1323 */
1324static const struct display_timing innolux_n116bge_timing = {
1325 .pixelclock = { 72600000, 76420000, 80240000 },
1326 .hactive = { 1366, 1366, 1366 },
1327 .hfront_porch = { 136, 136, 136 },
1328 .hback_porch = { 60, 60, 60 },
1329 .hsync_len = { 30, 30, 30 },
1330 .vactive = { 768, 768, 768 },
1331 .vfront_porch = { 8, 8, 8 },
1332 .vback_porch = { 12, 12, 12 },
1333 .vsync_len = { 12, 12, 12 },
1334 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1335};
1336
1337static const struct panel_desc innolux_n116bge = {
1338 .timings = &innolux_n116bge_timing,
1339 .num_timings = 1,
1340 .bpc = 6,
1341 .size = {
1342 .width = 256,
1343 .height = 144,
1344 },
1345};
1346
1347static const struct drm_display_mode innolux_n125hce_gn1_mode = {
1348 .clock = 162000,
1349 .hdisplay = 1920,
1350 .hsync_start = 1920 + 40,
1351 .hsync_end = 1920 + 40 + 40,
1352 .htotal = 1920 + 40 + 40 + 80,
1353 .vdisplay = 1080,
1354 .vsync_start = 1080 + 4,
1355 .vsync_end = 1080 + 4 + 4,
1356 .vtotal = 1080 + 4 + 4 + 24,
1357};
1358
1359static const struct panel_desc innolux_n125hce_gn1 = {
1360 .modes = &innolux_n125hce_gn1_mode,
1361 .num_modes = 1,
1362 .bpc = 8,
1363 .size = {
1364 .width = 276,
1365 .height = 155,
1366 },
1367};
1368
1369static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
1370 .clock = 206016,
1371 .hdisplay = 2160,
1372 .hsync_start = 2160 + 48,
1373 .hsync_end = 2160 + 48 + 32,
1374 .htotal = 2160 + 48 + 32 + 80,
1375 .vdisplay = 1440,
1376 .vsync_start = 1440 + 3,
1377 .vsync_end = 1440 + 3 + 10,
1378 .vtotal = 1440 + 3 + 10 + 27,
1379 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1380};
1381
1382static const struct panel_desc innolux_p120zdg_bf1 = {
1383 .modes = &innolux_p120zdg_bf1_mode,
1384 .num_modes = 1,
1385 .bpc = 8,
1386 .size = {
1387 .width = 254,
1388 .height = 169,
1389 },
1390 .delay = {
1391 .hpd_absent = 200,
1392 .unprepare = 500,
1393 },
1394};
1395
1396static const struct drm_display_mode ivo_m133nwf4_r0_mode = {
1397 .clock = 138778,
1398 .hdisplay = 1920,
1399 .hsync_start = 1920 + 24,
1400 .hsync_end = 1920 + 24 + 48,
1401 .htotal = 1920 + 24 + 48 + 88,
1402 .vdisplay = 1080,
1403 .vsync_start = 1080 + 3,
1404 .vsync_end = 1080 + 3 + 12,
1405 .vtotal = 1080 + 3 + 12 + 17,
1406 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1407};
1408
1409static const struct panel_desc ivo_m133nwf4_r0 = {
1410 .modes = &ivo_m133nwf4_r0_mode,
1411 .num_modes = 1,
1412 .bpc = 8,
1413 .size = {
1414 .width = 294,
1415 .height = 165,
1416 },
1417 .delay = {
1418 .hpd_absent = 200,
1419 .unprepare = 500,
1420 },
1421};
1422
1423static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {
1424 .clock = 81000,
1425 .hdisplay = 1366,
1426 .hsync_start = 1366 + 40,
1427 .hsync_end = 1366 + 40 + 32,
1428 .htotal = 1366 + 40 + 32 + 62,
1429 .vdisplay = 768,
1430 .vsync_start = 768 + 5,
1431 .vsync_end = 768 + 5 + 5,
1432 .vtotal = 768 + 5 + 5 + 122,
1433 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1434};
1435
1436static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {
1437 .modes = &kingdisplay_kd116n21_30nv_a010_mode,
1438 .num_modes = 1,
1439 .bpc = 6,
1440 .size = {
1441 .width = 256,
1442 .height = 144,
1443 },
1444 .delay = {
1445 .hpd_absent = 200,
1446 },
1447};
1448
1449static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1450 .clock = 200000,
1451 .hdisplay = 1536,
1452 .hsync_start = 1536 + 12,
1453 .hsync_end = 1536 + 12 + 16,
1454 .htotal = 1536 + 12 + 16 + 48,
1455 .vdisplay = 2048,
1456 .vsync_start = 2048 + 8,
1457 .vsync_end = 2048 + 8 + 4,
1458 .vtotal = 2048 + 8 + 4 + 8,
1459 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1460};
1461
1462static const struct panel_desc lg_lp079qx1_sp0v = {
1463 .modes = &lg_lp079qx1_sp0v_mode,
1464 .num_modes = 1,
1465 .size = {
1466 .width = 129,
1467 .height = 171,
1468 },
1469};
1470
1471static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1472 .clock = 205210,
1473 .hdisplay = 2048,
1474 .hsync_start = 2048 + 150,
1475 .hsync_end = 2048 + 150 + 5,
1476 .htotal = 2048 + 150 + 5 + 5,
1477 .vdisplay = 1536,
1478 .vsync_start = 1536 + 3,
1479 .vsync_end = 1536 + 3 + 1,
1480 .vtotal = 1536 + 3 + 1 + 9,
1481};
1482
1483static const struct panel_desc lg_lp097qx1_spa1 = {
1484 .modes = &lg_lp097qx1_spa1_mode,
1485 .num_modes = 1,
1486 .size = {
1487 .width = 208,
1488 .height = 147,
1489 },
1490};
1491
1492static const struct drm_display_mode lg_lp120up1_mode = {
1493 .clock = 162300,
1494 .hdisplay = 1920,
1495 .hsync_start = 1920 + 40,
1496 .hsync_end = 1920 + 40 + 40,
1497 .htotal = 1920 + 40 + 40 + 80,
1498 .vdisplay = 1280,
1499 .vsync_start = 1280 + 4,
1500 .vsync_end = 1280 + 4 + 4,
1501 .vtotal = 1280 + 4 + 4 + 12,
1502};
1503
1504static const struct panel_desc lg_lp120up1 = {
1505 .modes = &lg_lp120up1_mode,
1506 .num_modes = 1,
1507 .bpc = 8,
1508 .size = {
1509 .width = 267,
1510 .height = 183,
1511 },
1512};
1513
1514static const struct drm_display_mode lg_lp129qe_mode = {
1515 .clock = 285250,
1516 .hdisplay = 2560,
1517 .hsync_start = 2560 + 48,
1518 .hsync_end = 2560 + 48 + 32,
1519 .htotal = 2560 + 48 + 32 + 80,
1520 .vdisplay = 1700,
1521 .vsync_start = 1700 + 3,
1522 .vsync_end = 1700 + 3 + 10,
1523 .vtotal = 1700 + 3 + 10 + 36,
1524};
1525
1526static const struct panel_desc lg_lp129qe = {
1527 .modes = &lg_lp129qe_mode,
1528 .num_modes = 1,
1529 .bpc = 8,
1530 .size = {
1531 .width = 272,
1532 .height = 181,
1533 },
1534};
1535
1536static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
1537 {
1538 .clock = 138500,
1539 .hdisplay = 1920,
1540 .hsync_start = 1920 + 48,
1541 .hsync_end = 1920 + 48 + 32,
1542 .htotal = 1920 + 48 + 32 + 80,
1543 .vdisplay = 1080,
1544 .vsync_start = 1080 + 3,
1545 .vsync_end = 1080 + 3 + 5,
1546 .vtotal = 1080 + 3 + 5 + 23,
1547 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1548 }, {
1549 .clock = 110920,
1550 .hdisplay = 1920,
1551 .hsync_start = 1920 + 48,
1552 .hsync_end = 1920 + 48 + 32,
1553 .htotal = 1920 + 48 + 32 + 80,
1554 .vdisplay = 1080,
1555 .vsync_start = 1080 + 3,
1556 .vsync_end = 1080 + 3 + 5,
1557 .vtotal = 1080 + 3 + 5 + 23,
1558 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1559 }
1560};
1561
1562static const struct panel_desc neweast_wjfh116008a = {
1563 .modes = neweast_wjfh116008a_modes,
1564 .num_modes = 2,
1565 .bpc = 6,
1566 .size = {
1567 .width = 260,
1568 .height = 150,
1569 },
1570 .delay = {
1571 .hpd_reliable = 110,
1572 .enable = 20,
1573 .unprepare = 500,
1574 },
1575};
1576
1577static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1578 .clock = 271560,
1579 .hdisplay = 2560,
1580 .hsync_start = 2560 + 48,
1581 .hsync_end = 2560 + 48 + 32,
1582 .htotal = 2560 + 48 + 32 + 80,
1583 .vdisplay = 1600,
1584 .vsync_start = 1600 + 2,
1585 .vsync_end = 1600 + 2 + 5,
1586 .vtotal = 1600 + 2 + 5 + 57,
1587};
1588
1589static const struct panel_desc samsung_lsn122dl01_c01 = {
1590 .modes = &samsung_lsn122dl01_c01_mode,
1591 .num_modes = 1,
1592 .size = {
1593 .width = 263,
1594 .height = 164,
1595 },
1596};
1597
1598static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1599 .clock = 76300,
1600 .hdisplay = 1366,
1601 .hsync_start = 1366 + 64,
1602 .hsync_end = 1366 + 64 + 48,
1603 .htotal = 1366 + 64 + 48 + 128,
1604 .vdisplay = 768,
1605 .vsync_start = 768 + 2,
1606 .vsync_end = 768 + 2 + 5,
1607 .vtotal = 768 + 2 + 5 + 17,
1608};
1609
1610static const struct panel_desc samsung_ltn140at29_301 = {
1611 .modes = &samsung_ltn140at29_301_mode,
1612 .num_modes = 1,
1613 .bpc = 6,
1614 .size = {
1615 .width = 320,
1616 .height = 187,
1617 },
1618};
1619
1620static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
1621 .clock = 168480,
1622 .hdisplay = 1920,
1623 .hsync_start = 1920 + 48,
1624 .hsync_end = 1920 + 48 + 32,
1625 .htotal = 1920 + 48 + 32 + 80,
1626 .vdisplay = 1280,
1627 .vsync_start = 1280 + 3,
1628 .vsync_end = 1280 + 3 + 10,
1629 .vtotal = 1280 + 3 + 10 + 57,
1630 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1631};
1632
1633static const struct panel_desc sharp_ld_d5116z01b = {
1634 .modes = &sharp_ld_d5116z01b_mode,
1635 .num_modes = 1,
1636 .bpc = 8,
1637 .size = {
1638 .width = 260,
1639 .height = 120,
1640 },
1641};
1642
1643static const struct display_timing sharp_lq123p1jx31_timing = {
1644 .pixelclock = { 252750000, 252750000, 266604720 },
1645 .hactive = { 2400, 2400, 2400 },
1646 .hfront_porch = { 48, 48, 48 },
1647 .hback_porch = { 80, 80, 84 },
1648 .hsync_len = { 32, 32, 32 },
1649 .vactive = { 1600, 1600, 1600 },
1650 .vfront_porch = { 3, 3, 3 },
1651 .vback_porch = { 33, 33, 120 },
1652 .vsync_len = { 10, 10, 10 },
1653 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1654};
1655
1656static const struct panel_desc sharp_lq123p1jx31 = {
1657 .timings = &sharp_lq123p1jx31_timing,
1658 .num_timings = 1,
1659 .bpc = 8,
1660 .size = {
1661 .width = 259,
1662 .height = 173,
1663 },
1664 .delay = {
1665 .hpd_reliable = 110,
1666 .enable = 50,
1667 .unprepare = 550,
1668 },
1669};
1670
1671static const struct drm_display_mode sharp_lq140m1jw46_mode[] = {
1672 {
1673 .clock = 346500,
1674 .hdisplay = 1920,
1675 .hsync_start = 1920 + 48,
1676 .hsync_end = 1920 + 48 + 32,
1677 .htotal = 1920 + 48 + 32 + 80,
1678 .vdisplay = 1080,
1679 .vsync_start = 1080 + 3,
1680 .vsync_end = 1080 + 3 + 5,
1681 .vtotal = 1080 + 3 + 5 + 69,
1682 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1683 }, {
1684 .clock = 144370,
1685 .hdisplay = 1920,
1686 .hsync_start = 1920 + 48,
1687 .hsync_end = 1920 + 48 + 32,
1688 .htotal = 1920 + 48 + 32 + 80,
1689 .vdisplay = 1080,
1690 .vsync_start = 1080 + 3,
1691 .vsync_end = 1080 + 3 + 5,
1692 .vtotal = 1080 + 3 + 5 + 69,
1693 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1694 },
1695};
1696
1697static const struct panel_desc sharp_lq140m1jw46 = {
1698 .modes = sharp_lq140m1jw46_mode,
1699 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode),
1700 .bpc = 8,
1701 .size = {
1702 .width = 309,
1703 .height = 174,
1704 },
1705 .delay = {
1706 .hpd_absent = 80,
1707 .enable = 50,
1708 .unprepare = 500,
1709 },
1710};
1711
1712static const struct drm_display_mode starry_kr122ea0sra_mode = {
1713 .clock = 147000,
1714 .hdisplay = 1920,
1715 .hsync_start = 1920 + 16,
1716 .hsync_end = 1920 + 16 + 16,
1717 .htotal = 1920 + 16 + 16 + 32,
1718 .vdisplay = 1200,
1719 .vsync_start = 1200 + 15,
1720 .vsync_end = 1200 + 15 + 2,
1721 .vtotal = 1200 + 15 + 2 + 18,
1722 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1723};
1724
1725static const struct panel_desc starry_kr122ea0sra = {
1726 .modes = &starry_kr122ea0sra_mode,
1727 .num_modes = 1,
1728 .size = {
1729 .width = 263,
1730 .height = 164,
1731 },
1732 .delay = {
1733 /* TODO: should be hpd-absent and no-hpd should be set? */
1734 .hpd_reliable = 10 + 200,
1735 .enable = 50,
1736 .unprepare = 10 + 500,
1737 },
1738};
1739
1740static const struct of_device_id platform_of_match[] = {
1741 {
1742 /* Must be first */
1743 .compatible = "edp-panel",
1744 }, {
1745 .compatible = "auo,b101ean01",
1746 .data = &auo_b101ean01,
1747 }, {
1748 .compatible = "auo,b116xa01",
1749 .data = &auo_b116xak01,
1750 }, {
1751 .compatible = "auo,b133han05",
1752 .data = &auo_b133han05,
1753 }, {
1754 .compatible = "auo,b133htn01",
1755 .data = &auo_b133htn01,
1756 }, {
1757 .compatible = "auo,b133xtn01",
1758 .data = &auo_b133xtn01,
1759 }, {
1760 .compatible = "auo,b140han06",
1761 .data = &auo_b140han06,
1762 }, {
1763 .compatible = "boe,nv101wxmn51",
1764 .data = &boe_nv101wxmn51,
1765 }, {
1766 .compatible = "boe,nv110wtm-n61",
1767 .data = &boe_nv110wtm_n61,
1768 }, {
1769 .compatible = "boe,nv133fhm-n61",
1770 .data = &boe_nv133fhm_n61,
1771 }, {
1772 .compatible = "boe,nv133fhm-n62",
1773 .data = &boe_nv133fhm_n61,
1774 }, {
1775 .compatible = "boe,nv140fhmn49",
1776 .data = &boe_nv140fhmn49,
1777 }, {
1778 .compatible = "innolux,n116bca-ea1",
1779 .data = &innolux_n116bca_ea1,
1780 }, {
1781 .compatible = "innolux,n116bge",
1782 .data = &innolux_n116bge,
1783 }, {
1784 .compatible = "innolux,n125hce-gn1",
1785 .data = &innolux_n125hce_gn1,
1786 }, {
1787 .compatible = "innolux,p120zdg-bf1",
1788 .data = &innolux_p120zdg_bf1,
1789 }, {
1790 .compatible = "ivo,m133nwf4-r0",
1791 .data = &ivo_m133nwf4_r0,
1792 }, {
1793 .compatible = "kingdisplay,kd116n21-30nv-a010",
1794 .data = &kingdisplay_kd116n21_30nv_a010,
1795 }, {
1796 .compatible = "lg,lp079qx1-sp0v",
1797 .data = &lg_lp079qx1_sp0v,
1798 }, {
1799 .compatible = "lg,lp097qx1-spa1",
1800 .data = &lg_lp097qx1_spa1,
1801 }, {
1802 .compatible = "lg,lp120up1",
1803 .data = &lg_lp120up1,
1804 }, {
1805 .compatible = "lg,lp129qe",
1806 .data = &lg_lp129qe,
1807 }, {
1808 .compatible = "neweast,wjfh116008a",
1809 .data = &neweast_wjfh116008a,
1810 }, {
1811 .compatible = "samsung,lsn122dl01-c01",
1812 .data = &samsung_lsn122dl01_c01,
1813 }, {
1814 .compatible = "samsung,ltn140at29-301",
1815 .data = &samsung_ltn140at29_301,
1816 }, {
1817 .compatible = "sharp,ld-d5116z01b",
1818 .data = &sharp_ld_d5116z01b,
1819 }, {
1820 .compatible = "sharp,lq123p1jx31",
1821 .data = &sharp_lq123p1jx31,
1822 }, {
1823 .compatible = "sharp,lq140m1jw46",
1824 .data = &sharp_lq140m1jw46,
1825 }, {
1826 .compatible = "starry,kr122ea0sra",
1827 .data = &starry_kr122ea0sra,
1828 }, {
1829 /* sentinel */
1830 }
1831};
1832MODULE_DEVICE_TABLE(of, platform_of_match);
1833
1834static const struct panel_delay delay_200_500_p2e80 = {
1835 .hpd_absent = 200,
1836 .unprepare = 500,
1837 .prepare_to_enable = 80,
1838};
1839
1840static const struct panel_delay delay_200_500_p2e100 = {
1841 .hpd_absent = 200,
1842 .unprepare = 500,
1843 .prepare_to_enable = 100,
1844};
1845
1846static const struct panel_delay delay_200_500_e50 = {
1847 .hpd_absent = 200,
1848 .unprepare = 500,
1849 .enable = 50,
1850};
1851
1852static const struct panel_delay delay_200_500_e80 = {
1853 .hpd_absent = 200,
1854 .unprepare = 500,
1855 .enable = 80,
1856};
1857
1858static const struct panel_delay delay_200_500_e80_d50 = {
1859 .hpd_absent = 200,
1860 .unprepare = 500,
1861 .enable = 80,
1862 .disable = 50,
1863};
1864
1865static const struct panel_delay delay_100_500_e200 = {
1866 .hpd_absent = 100,
1867 .unprepare = 500,
1868 .enable = 200,
1869};
1870
1871static const struct panel_delay delay_200_500_e200 = {
1872 .hpd_absent = 200,
1873 .unprepare = 500,
1874 .enable = 200,
1875};
1876
1877static const struct panel_delay delay_200_500_e200_d10 = {
1878 .hpd_absent = 200,
1879 .unprepare = 500,
1880 .enable = 200,
1881 .disable = 10,
1882};
1883
1884static const struct panel_delay delay_200_150_e200 = {
1885 .hpd_absent = 200,
1886 .unprepare = 150,
1887 .enable = 200,
1888};
1889
1890#define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \
1891{ \
1892 .name = _name, \
1893 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
1894 product_id), \
1895 .delay = _delay \
1896}
1897
1898#define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \
1899{ \
1900 .name = _name, \
1901 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
1902 product_id), \
1903 .delay = _delay, \
1904 .override_edid_mode = _mode \
1905}
1906
1907/*
1908 * This table is used to figure out power sequencing delays for panels that
1909 * are detected by EDID. Entries here may point to entries in the
1910 * platform_of_match table (if a panel is listed in both places).
1911 *
1912 * Sort first by vendor, then by product ID.
1913 */
1914static const struct edp_panel_entry edp_panels[] = {
1915 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"),
1916 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"),
1917 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"),
1918 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"),
1919 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"),
1920 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"),
1921 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"),
1922 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"),
1923 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"),
1924 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0",
1925 &auo_b116xa3_mode),
1926 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"),
1927 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1",
1928 &auo_b116xa3_mode),
1929 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"),
1930 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"),
1931 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),
1932 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"),
1933
1934 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"),
1935 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"),
1936 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"),
1937 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"),
1938 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"),
1939 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"),
1940 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"),
1941 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"),
1942 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"),
1943 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"),
1944 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"),
1945 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"),
1946 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"),
1947 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"),
1948 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"),
1949 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"),
1950 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"),
1951 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"),
1952 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"),
1953 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"),
1954 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"),
1955
1956 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"),
1957 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"),
1958 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"),
1959 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"),
1960 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"),
1961 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"),
1962 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"),
1963 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"),
1964 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"),
1965 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"),
1966 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"),
1967 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"),
1968 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"),
1969 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"),
1970 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"),
1971 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-EA4"),
1972 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"),
1973
1974 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"),
1975
1976 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"),
1977 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"),
1978 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"),
1979 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"),
1980 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"),
1981
1982 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"),
1983 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"),
1984
1985 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"),
1986
1987 EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA45AF01"),
1988
1989 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),
1990 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"),
1991 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),
1992
1993 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"),
1994
1995 { /* sentinal */ }
1996};
1997
1998static const struct edp_panel_entry *find_edp_panel(u32 panel_id)
1999{
2000 const struct edp_panel_entry *panel;
2001
2002 if (!panel_id)
2003 return NULL;
2004
2005 for (panel = edp_panels; panel->panel_id; panel++)
2006 if (panel->panel_id == panel_id)
2007 return panel;
2008
2009 return NULL;
2010}
2011
2012static int panel_edp_platform_probe(struct platform_device *pdev)
2013{
2014 const struct of_device_id *id;
2015
2016 /* Skip one since "edp-panel" is only supported on DP AUX bus */
2017 id = of_match_node(platform_of_match + 1, pdev->dev.of_node);
2018 if (!id)
2019 return -ENODEV;
2020
2021 return panel_edp_probe(&pdev->dev, id->data, NULL);
2022}
2023
2024static void panel_edp_platform_remove(struct platform_device *pdev)
2025{
2026 panel_edp_remove(&pdev->dev);
2027}
2028
2029static void panel_edp_platform_shutdown(struct platform_device *pdev)
2030{
2031 panel_edp_shutdown(&pdev->dev);
2032}
2033
2034static const struct dev_pm_ops panel_edp_pm_ops = {
2035 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL)
2036 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
2037 pm_runtime_force_resume)
2038};
2039
2040static struct platform_driver panel_edp_platform_driver = {
2041 .driver = {
2042 .name = "panel-edp",
2043 .of_match_table = platform_of_match,
2044 .pm = &panel_edp_pm_ops,
2045 },
2046 .probe = panel_edp_platform_probe,
2047 .remove_new = panel_edp_platform_remove,
2048 .shutdown = panel_edp_platform_shutdown,
2049};
2050
2051static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep)
2052{
2053 const struct of_device_id *id;
2054
2055 id = of_match_node(platform_of_match, aux_ep->dev.of_node);
2056 if (!id)
2057 return -ENODEV;
2058
2059 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux);
2060}
2061
2062static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep)
2063{
2064 panel_edp_remove(&aux_ep->dev);
2065}
2066
2067static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep)
2068{
2069 panel_edp_shutdown(&aux_ep->dev);
2070}
2071
2072static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = {
2073 .driver = {
2074 .name = "panel-simple-dp-aux",
2075 .of_match_table = platform_of_match, /* Same as platform one! */
2076 .pm = &panel_edp_pm_ops,
2077 },
2078 .probe = panel_edp_dp_aux_ep_probe,
2079 .remove = panel_edp_dp_aux_ep_remove,
2080 .shutdown = panel_edp_dp_aux_ep_shutdown,
2081};
2082
2083static int __init panel_edp_init(void)
2084{
2085 int err;
2086
2087 err = platform_driver_register(&panel_edp_platform_driver);
2088 if (err < 0)
2089 return err;
2090
2091 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver);
2092 if (err < 0)
2093 goto err_did_platform_register;
2094
2095 return 0;
2096
2097err_did_platform_register:
2098 platform_driver_unregister(&panel_edp_platform_driver);
2099
2100 return err;
2101}
2102module_init(panel_edp_init);
2103
2104static void __exit panel_edp_exit(void)
2105{
2106 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver);
2107 platform_driver_unregister(&panel_edp_platform_driver);
2108}
2109module_exit(panel_edp_exit);
2110
2111MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
2112MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels");
2113MODULE_LICENSE("GPL and additional rights");