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1/*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#include <linux/debugfs.h>
25#include <linux/delay.h>
26#include <linux/gpio/consumer.h>
27#include <linux/iopoll.h>
28#include <linux/module.h>
29#include <linux/of_platform.h>
30#include <linux/platform_device.h>
31#include <linux/pm_runtime.h>
32#include <linux/regulator/consumer.h>
33
34#include <video/display_timing.h>
35#include <video/of_display_timing.h>
36#include <video/videomode.h>
37
38#include <drm/display/drm_dp_aux_bus.h>
39#include <drm/display/drm_dp_helper.h>
40#include <drm/drm_crtc.h>
41#include <drm/drm_device.h>
42#include <drm/drm_edid.h>
43#include <drm/drm_panel.h>
44
45/**
46 * struct panel_delay - Describes delays for a simple panel.
47 */
48struct panel_delay {
49 /**
50 * @hpd_reliable: Time for HPD to be reliable
51 *
52 * The time (in milliseconds) that it takes after powering the panel
53 * before the HPD signal is reliable. Ideally this is 0 but some panels,
54 * board designs, or bad pulldown configs can cause a glitch here.
55 *
56 * NOTE: on some old panel data this number appears to be much too big.
57 * Presumably some old panels simply didn't have HPD hooked up and put
58 * the hpd_absent here because this field predates the
59 * hpd_absent. While that works, it's non-ideal.
60 */
61 unsigned int hpd_reliable;
62
63 /**
64 * @hpd_absent: Time to wait if HPD isn't hooked up.
65 *
66 * Add this to the prepare delay if we know Hot Plug Detect isn't used.
67 *
68 * This is T3-max on eDP timing diagrams or the delay from power on
69 * until HPD is guaranteed to be asserted.
70 */
71 unsigned int hpd_absent;
72
73 /**
74 * @prepare_to_enable: Time between prepare and enable.
75 *
76 * The minimum time, in milliseconds, that needs to have passed
77 * between when prepare finished and enable may begin. If at
78 * enable time less time has passed since prepare finished,
79 * the driver waits for the remaining time.
80 *
81 * If a fixed enable delay is also specified, we'll start
82 * counting before delaying for the fixed delay.
83 *
84 * If a fixed prepare delay is also specified, we won't start
85 * counting until after the fixed delay. We can't overlap this
86 * fixed delay with the min time because the fixed delay
87 * doesn't happen at the end of the function if a HPD GPIO was
88 * specified.
89 *
90 * In other words:
91 * prepare()
92 * ...
93 * // do fixed prepare delay
94 * // wait for HPD GPIO if applicable
95 * // start counting for prepare_to_enable
96 *
97 * enable()
98 * // do fixed enable delay
99 * // enforce prepare_to_enable min time
100 *
101 * This is not specified in a standard way on eDP timing diagrams.
102 * It is effectively the time from HPD going high till you can
103 * turn on the backlight.
104 */
105 unsigned int prepare_to_enable;
106
107 /**
108 * @enable: Time for the panel to display a valid frame.
109 *
110 * The time (in milliseconds) that it takes for the panel to
111 * display the first valid frame after starting to receive
112 * video data.
113 *
114 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or
115 * the delay after link training finishes until we can turn the
116 * backlight on and see valid data.
117 */
118 unsigned int enable;
119
120 /**
121 * @disable: Time for the panel to turn the display off.
122 *
123 * The time (in milliseconds) that it takes for the panel to
124 * turn the display off (no content is visible).
125 *
126 * This is T9-min (delay from backlight off to end of valid video
127 * data) on eDP timing diagrams. It is not common to set.
128 */
129 unsigned int disable;
130
131 /**
132 * @unprepare: Time to power down completely.
133 *
134 * The time (in milliseconds) that it takes for the panel
135 * to power itself down completely.
136 *
137 * This time is used to prevent a future "prepare" from
138 * starting until at least this many milliseconds has passed.
139 * If at prepare time less time has passed since unprepare
140 * finished, the driver waits for the remaining time.
141 *
142 * This is T12-min on eDP timing diagrams.
143 */
144 unsigned int unprepare;
145};
146
147/**
148 * struct panel_desc - Describes a simple panel.
149 */
150struct panel_desc {
151 /**
152 * @modes: Pointer to array of fixed modes appropriate for this panel.
153 *
154 * If only one mode then this can just be the address of the mode.
155 * NOTE: cannot be used with "timings" and also if this is specified
156 * then you cannot override the mode in the device tree.
157 */
158 const struct drm_display_mode *modes;
159
160 /** @num_modes: Number of elements in modes array. */
161 unsigned int num_modes;
162
163 /**
164 * @timings: Pointer to array of display timings
165 *
166 * NOTE: cannot be used with "modes" and also these will be used to
167 * validate a device tree override if one is present.
168 */
169 const struct display_timing *timings;
170
171 /** @num_timings: Number of elements in timings array. */
172 unsigned int num_timings;
173
174 /** @bpc: Bits per color. */
175 unsigned int bpc;
176
177 /** @size: Structure containing the physical size of this panel. */
178 struct {
179 /**
180 * @size.width: Width (in mm) of the active display area.
181 */
182 unsigned int width;
183
184 /**
185 * @size.height: Height (in mm) of the active display area.
186 */
187 unsigned int height;
188 } size;
189
190 /** @delay: Structure containing various delay values for this panel. */
191 struct panel_delay delay;
192};
193
194/**
195 * struct edp_panel_entry - Maps panel ID to delay / panel name.
196 */
197struct edp_panel_entry {
198 /** @panel_id: 32-bit ID for panel, encoded with drm_edid_encode_panel_id(). */
199 u32 panel_id;
200
201 /** @delay: The power sequencing delays needed for this panel. */
202 const struct panel_delay *delay;
203
204 /** @name: Name of this panel (for printing to logs). */
205 const char *name;
206};
207
208struct panel_edp {
209 struct drm_panel base;
210 bool enabled;
211 bool no_hpd;
212
213 bool prepared;
214
215 ktime_t prepared_time;
216 ktime_t unprepared_time;
217
218 const struct panel_desc *desc;
219
220 struct regulator *supply;
221 struct i2c_adapter *ddc;
222 struct drm_dp_aux *aux;
223
224 struct gpio_desc *enable_gpio;
225 struct gpio_desc *hpd_gpio;
226
227 const struct edp_panel_entry *detected_panel;
228
229 struct edid *edid;
230
231 struct drm_display_mode override_mode;
232
233 enum drm_panel_orientation orientation;
234};
235
236static inline struct panel_edp *to_panel_edp(struct drm_panel *panel)
237{
238 return container_of(panel, struct panel_edp, base);
239}
240
241static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel,
242 struct drm_connector *connector)
243{
244 struct drm_display_mode *mode;
245 unsigned int i, num = 0;
246
247 for (i = 0; i < panel->desc->num_timings; i++) {
248 const struct display_timing *dt = &panel->desc->timings[i];
249 struct videomode vm;
250
251 videomode_from_timing(dt, &vm);
252 mode = drm_mode_create(connector->dev);
253 if (!mode) {
254 dev_err(panel->base.dev, "failed to add mode %ux%u\n",
255 dt->hactive.typ, dt->vactive.typ);
256 continue;
257 }
258
259 drm_display_mode_from_videomode(&vm, mode);
260
261 mode->type |= DRM_MODE_TYPE_DRIVER;
262
263 if (panel->desc->num_timings == 1)
264 mode->type |= DRM_MODE_TYPE_PREFERRED;
265
266 drm_mode_probed_add(connector, mode);
267 num++;
268 }
269
270 return num;
271}
272
273static unsigned int panel_edp_get_display_modes(struct panel_edp *panel,
274 struct drm_connector *connector)
275{
276 struct drm_display_mode *mode;
277 unsigned int i, num = 0;
278
279 for (i = 0; i < panel->desc->num_modes; i++) {
280 const struct drm_display_mode *m = &panel->desc->modes[i];
281
282 mode = drm_mode_duplicate(connector->dev, m);
283 if (!mode) {
284 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
285 m->hdisplay, m->vdisplay,
286 drm_mode_vrefresh(m));
287 continue;
288 }
289
290 mode->type |= DRM_MODE_TYPE_DRIVER;
291
292 if (panel->desc->num_modes == 1)
293 mode->type |= DRM_MODE_TYPE_PREFERRED;
294
295 drm_mode_set_name(mode);
296
297 drm_mode_probed_add(connector, mode);
298 num++;
299 }
300
301 return num;
302}
303
304static int panel_edp_get_non_edid_modes(struct panel_edp *panel,
305 struct drm_connector *connector)
306{
307 struct drm_display_mode *mode;
308 bool has_override = panel->override_mode.type;
309 unsigned int num = 0;
310
311 if (!panel->desc)
312 return 0;
313
314 if (has_override) {
315 mode = drm_mode_duplicate(connector->dev,
316 &panel->override_mode);
317 if (mode) {
318 drm_mode_probed_add(connector, mode);
319 num = 1;
320 } else {
321 dev_err(panel->base.dev, "failed to add override mode\n");
322 }
323 }
324
325 /* Only add timings if override was not there or failed to validate */
326 if (num == 0 && panel->desc->num_timings)
327 num = panel_edp_get_timings_modes(panel, connector);
328
329 /*
330 * Only add fixed modes if timings/override added no mode.
331 *
332 * We should only ever have either the display timings specified
333 * or a fixed mode. Anything else is rather bogus.
334 */
335 WARN_ON(panel->desc->num_timings && panel->desc->num_modes);
336 if (num == 0)
337 num = panel_edp_get_display_modes(panel, connector);
338
339 connector->display_info.bpc = panel->desc->bpc;
340 connector->display_info.width_mm = panel->desc->size.width;
341 connector->display_info.height_mm = panel->desc->size.height;
342
343 return num;
344}
345
346static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms)
347{
348 ktime_t now_ktime, min_ktime;
349
350 if (!min_ms)
351 return;
352
353 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms));
354 now_ktime = ktime_get();
355
356 if (ktime_before(now_ktime, min_ktime))
357 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1);
358}
359
360static int panel_edp_disable(struct drm_panel *panel)
361{
362 struct panel_edp *p = to_panel_edp(panel);
363
364 if (!p->enabled)
365 return 0;
366
367 if (p->desc->delay.disable)
368 msleep(p->desc->delay.disable);
369
370 p->enabled = false;
371
372 return 0;
373}
374
375static int panel_edp_suspend(struct device *dev)
376{
377 struct panel_edp *p = dev_get_drvdata(dev);
378
379 gpiod_set_value_cansleep(p->enable_gpio, 0);
380 regulator_disable(p->supply);
381 p->unprepared_time = ktime_get();
382
383 return 0;
384}
385
386static int panel_edp_unprepare(struct drm_panel *panel)
387{
388 struct panel_edp *p = to_panel_edp(panel);
389 int ret;
390
391 /* Unpreparing when already unprepared is a no-op */
392 if (!p->prepared)
393 return 0;
394
395 pm_runtime_mark_last_busy(panel->dev);
396 ret = pm_runtime_put_autosuspend(panel->dev);
397 if (ret < 0)
398 return ret;
399 p->prepared = false;
400
401 return 0;
402}
403
404static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p)
405{
406 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
407 if (IS_ERR(p->hpd_gpio))
408 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio),
409 "failed to get 'hpd' GPIO\n");
410
411 return 0;
412}
413
414static bool panel_edp_can_read_hpd(struct panel_edp *p)
415{
416 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted));
417}
418
419static int panel_edp_prepare_once(struct panel_edp *p)
420{
421 struct device *dev = p->base.dev;
422 unsigned int delay;
423 int err;
424 int hpd_asserted;
425 unsigned long hpd_wait_us;
426
427 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare);
428
429 err = regulator_enable(p->supply);
430 if (err < 0) {
431 dev_err(dev, "failed to enable supply: %d\n", err);
432 return err;
433 }
434
435 gpiod_set_value_cansleep(p->enable_gpio, 1);
436
437 delay = p->desc->delay.hpd_reliable;
438 if (p->no_hpd)
439 delay = max(delay, p->desc->delay.hpd_absent);
440 if (delay)
441 msleep(delay);
442
443 if (panel_edp_can_read_hpd(p)) {
444 if (p->desc->delay.hpd_absent)
445 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL;
446 else
447 hpd_wait_us = 2000000;
448
449 if (p->hpd_gpio) {
450 err = readx_poll_timeout(gpiod_get_value_cansleep,
451 p->hpd_gpio, hpd_asserted,
452 hpd_asserted, 1000, hpd_wait_us);
453 if (hpd_asserted < 0)
454 err = hpd_asserted;
455 } else {
456 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us);
457 }
458
459 if (err) {
460 if (err != -ETIMEDOUT)
461 dev_err(dev,
462 "error waiting for hpd GPIO: %d\n", err);
463 goto error;
464 }
465 }
466
467 p->prepared_time = ktime_get();
468
469 return 0;
470
471error:
472 gpiod_set_value_cansleep(p->enable_gpio, 0);
473 regulator_disable(p->supply);
474 p->unprepared_time = ktime_get();
475
476 return err;
477}
478
479/*
480 * Some panels simply don't always come up and need to be power cycled to
481 * work properly. We'll allow for a handful of retries.
482 */
483#define MAX_PANEL_PREPARE_TRIES 5
484
485static int panel_edp_resume(struct device *dev)
486{
487 struct panel_edp *p = dev_get_drvdata(dev);
488 int ret;
489 int try;
490
491 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) {
492 ret = panel_edp_prepare_once(p);
493 if (ret != -ETIMEDOUT)
494 break;
495 }
496
497 if (ret == -ETIMEDOUT)
498 dev_err(dev, "Prepare timeout after %d tries\n", try);
499 else if (try)
500 dev_warn(dev, "Prepare needed %d retries\n", try);
501
502 return ret;
503}
504
505static int panel_edp_prepare(struct drm_panel *panel)
506{
507 struct panel_edp *p = to_panel_edp(panel);
508 int ret;
509
510 /* Preparing when already prepared is a no-op */
511 if (p->prepared)
512 return 0;
513
514 ret = pm_runtime_get_sync(panel->dev);
515 if (ret < 0) {
516 pm_runtime_put_autosuspend(panel->dev);
517 return ret;
518 }
519
520 p->prepared = true;
521
522 return 0;
523}
524
525static int panel_edp_enable(struct drm_panel *panel)
526{
527 struct panel_edp *p = to_panel_edp(panel);
528 unsigned int delay;
529
530 if (p->enabled)
531 return 0;
532
533 delay = p->desc->delay.enable;
534
535 /*
536 * If there is a "prepare_to_enable" delay then that's supposed to be
537 * the delay from HPD going high until we can turn the backlight on.
538 * However, we can only count this if HPD is readable by the panel
539 * driver.
540 *
541 * If we aren't handling the HPD pin ourselves then the best we
542 * can do is assume that HPD went high immediately before we were
543 * called (and link training took zero time). Note that "no-hpd"
544 * actually counts as handling HPD ourselves since we're doing the
545 * worst case delay (in prepare) ourselves.
546 *
547 * NOTE: if we ever end up in this "if" statement then we're
548 * guaranteed that the panel_edp_wait() call below will do no delay.
549 * It already handles that case, though, so we don't need any special
550 * code for it.
551 */
552 if (p->desc->delay.prepare_to_enable &&
553 !panel_edp_can_read_hpd(p) && !p->no_hpd)
554 delay = max(delay, p->desc->delay.prepare_to_enable);
555
556 if (delay)
557 msleep(delay);
558
559 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable);
560
561 p->enabled = true;
562
563 return 0;
564}
565
566static int panel_edp_get_modes(struct drm_panel *panel,
567 struct drm_connector *connector)
568{
569 struct panel_edp *p = to_panel_edp(panel);
570 int num = 0;
571
572 /* probe EDID if a DDC bus is available */
573 if (p->ddc) {
574 pm_runtime_get_sync(panel->dev);
575
576 if (!p->edid)
577 p->edid = drm_get_edid(connector, p->ddc);
578
579 if (p->edid)
580 num += drm_add_edid_modes(connector, p->edid);
581
582 pm_runtime_mark_last_busy(panel->dev);
583 pm_runtime_put_autosuspend(panel->dev);
584 }
585
586 /*
587 * Add hard-coded panel modes. Don't call this if there are no timings
588 * and no modes (the generic edp-panel case) because it will clobber
589 * the display_info that was already set by drm_add_edid_modes().
590 */
591 if (p->desc->num_timings || p->desc->num_modes)
592 num += panel_edp_get_non_edid_modes(p, connector);
593 else if (!num)
594 dev_warn(p->base.dev, "No display modes\n");
595
596 /*
597 * TODO: Remove once all drm drivers call
598 * drm_connector_set_orientation_from_panel()
599 */
600 drm_connector_set_panel_orientation(connector, p->orientation);
601
602 return num;
603}
604
605static int panel_edp_get_timings(struct drm_panel *panel,
606 unsigned int num_timings,
607 struct display_timing *timings)
608{
609 struct panel_edp *p = to_panel_edp(panel);
610 unsigned int i;
611
612 if (p->desc->num_timings < num_timings)
613 num_timings = p->desc->num_timings;
614
615 if (timings)
616 for (i = 0; i < num_timings; i++)
617 timings[i] = p->desc->timings[i];
618
619 return p->desc->num_timings;
620}
621
622static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel)
623{
624 struct panel_edp *p = to_panel_edp(panel);
625
626 return p->orientation;
627}
628
629static int detected_panel_show(struct seq_file *s, void *data)
630{
631 struct drm_panel *panel = s->private;
632 struct panel_edp *p = to_panel_edp(panel);
633
634 if (IS_ERR(p->detected_panel))
635 seq_puts(s, "UNKNOWN\n");
636 else if (!p->detected_panel)
637 seq_puts(s, "HARDCODED\n");
638 else
639 seq_printf(s, "%s\n", p->detected_panel->name);
640
641 return 0;
642}
643
644DEFINE_SHOW_ATTRIBUTE(detected_panel);
645
646static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root)
647{
648 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops);
649}
650
651static const struct drm_panel_funcs panel_edp_funcs = {
652 .disable = panel_edp_disable,
653 .unprepare = panel_edp_unprepare,
654 .prepare = panel_edp_prepare,
655 .enable = panel_edp_enable,
656 .get_modes = panel_edp_get_modes,
657 .get_orientation = panel_edp_get_orientation,
658 .get_timings = panel_edp_get_timings,
659 .debugfs_init = panel_edp_debugfs_init,
660};
661
662#define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \
663 (to_check->field.typ >= bounds->field.min && \
664 to_check->field.typ <= bounds->field.max)
665static void panel_edp_parse_panel_timing_node(struct device *dev,
666 struct panel_edp *panel,
667 const struct display_timing *ot)
668{
669 const struct panel_desc *desc = panel->desc;
670 struct videomode vm;
671 unsigned int i;
672
673 if (WARN_ON(desc->num_modes)) {
674 dev_err(dev, "Reject override mode: panel has a fixed mode\n");
675 return;
676 }
677 if (WARN_ON(!desc->num_timings)) {
678 dev_err(dev, "Reject override mode: no timings specified\n");
679 return;
680 }
681
682 for (i = 0; i < panel->desc->num_timings; i++) {
683 const struct display_timing *dt = &panel->desc->timings[i];
684
685 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) ||
686 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) ||
687 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) ||
688 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) ||
689 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) ||
690 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) ||
691 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) ||
692 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len))
693 continue;
694
695 if (ot->flags != dt->flags)
696 continue;
697
698 videomode_from_timing(ot, &vm);
699 drm_display_mode_from_videomode(&vm, &panel->override_mode);
700 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |
701 DRM_MODE_TYPE_PREFERRED;
702 break;
703 }
704
705 if (WARN_ON(!panel->override_mode.type))
706 dev_err(dev, "Reject override mode: No display_timing found\n");
707}
708
709static const struct edp_panel_entry *find_edp_panel(u32 panel_id);
710
711static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel)
712{
713 struct panel_desc *desc;
714 u32 panel_id;
715 char vend[4];
716 u16 product_id;
717 u32 reliable_ms = 0;
718 u32 absent_ms = 0;
719 int ret;
720
721 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
722 if (!desc)
723 return -ENOMEM;
724 panel->desc = desc;
725
726 /*
727 * Read the dts properties for the initial probe. These are used by
728 * the runtime resume code which will get called by the
729 * pm_runtime_get_sync() call below.
730 */
731 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms);
732 desc->delay.hpd_reliable = reliable_ms;
733 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms);
734 desc->delay.hpd_absent = absent_ms;
735
736 /* Power the panel on so we can read the EDID */
737 ret = pm_runtime_get_sync(dev);
738 if (ret < 0) {
739 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret);
740 goto exit;
741 }
742
743 panel_id = drm_edid_get_panel_id(panel->ddc);
744 if (!panel_id) {
745 dev_err(dev, "Couldn't identify panel via EDID\n");
746 ret = -EIO;
747 goto exit;
748 }
749 drm_edid_decode_panel_id(panel_id, vend, &product_id);
750
751 panel->detected_panel = find_edp_panel(panel_id);
752
753 /*
754 * We're using non-optimized timings and want it really obvious that
755 * someone needs to add an entry to the table, so we'll do a WARN_ON
756 * splat.
757 */
758 if (WARN_ON(!panel->detected_panel)) {
759 dev_warn(dev,
760 "Unknown panel %s %#06x, using conservative timings\n",
761 vend, product_id);
762
763 /*
764 * It's highly likely that the panel will work if we use very
765 * conservative timings, so let's do that. We already know that
766 * the HPD-related delays must have worked since we got this
767 * far, so we really just need the "unprepare" / "enable"
768 * delays. We don't need "prepare_to_enable" since that
769 * overlaps the "enable" delay anyway.
770 *
771 * Nearly all panels have a "unprepare" delay of 500 ms though
772 * there are a few with 1000. Let's stick 2000 in just to be
773 * super conservative.
774 *
775 * An "enable" delay of 80 ms seems the most common, but we'll
776 * throw in 200 ms to be safe.
777 */
778 desc->delay.unprepare = 2000;
779 desc->delay.enable = 200;
780
781 panel->detected_panel = ERR_PTR(-EINVAL);
782 } else {
783 dev_info(dev, "Detected %s %s (%#06x)\n",
784 vend, panel->detected_panel->name, product_id);
785
786 /* Update the delay; everything else comes from EDID */
787 desc->delay = *panel->detected_panel->delay;
788 }
789
790 ret = 0;
791exit:
792 pm_runtime_mark_last_busy(dev);
793 pm_runtime_put_autosuspend(dev);
794
795 return ret;
796}
797
798static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
799 struct drm_dp_aux *aux)
800{
801 struct panel_edp *panel;
802 struct display_timing dt;
803 struct device_node *ddc;
804 int err;
805
806 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
807 if (!panel)
808 return -ENOMEM;
809
810 panel->enabled = false;
811 panel->prepared_time = 0;
812 panel->desc = desc;
813 panel->aux = aux;
814
815 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
816 if (!panel->no_hpd) {
817 err = panel_edp_get_hpd_gpio(dev, panel);
818 if (err)
819 return err;
820 }
821
822 panel->supply = devm_regulator_get(dev, "power");
823 if (IS_ERR(panel->supply))
824 return PTR_ERR(panel->supply);
825
826 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
827 GPIOD_OUT_LOW);
828 if (IS_ERR(panel->enable_gpio))
829 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio),
830 "failed to request GPIO\n");
831
832 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
833 if (err) {
834 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
835 return err;
836 }
837
838 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
839 if (ddc) {
840 panel->ddc = of_find_i2c_adapter_by_node(ddc);
841 of_node_put(ddc);
842
843 if (!panel->ddc)
844 return -EPROBE_DEFER;
845 } else if (aux) {
846 panel->ddc = &aux->ddc;
847 }
848
849 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
850 panel_edp_parse_panel_timing_node(dev, panel, &dt);
851
852 dev_set_drvdata(dev, panel);
853
854 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP);
855
856 err = drm_panel_of_backlight(&panel->base);
857 if (err)
858 goto err_finished_ddc_init;
859
860 /*
861 * We use runtime PM for prepare / unprepare since those power the panel
862 * on and off and those can be very slow operations. This is important
863 * to optimize powering the panel on briefly to read the EDID before
864 * fully enabling the panel.
865 */
866 pm_runtime_enable(dev);
867 pm_runtime_set_autosuspend_delay(dev, 1000);
868 pm_runtime_use_autosuspend(dev);
869
870 if (of_device_is_compatible(dev->of_node, "edp-panel")) {
871 err = generic_edp_panel_probe(dev, panel);
872 if (err) {
873 dev_err_probe(dev, err,
874 "Couldn't detect panel nor find a fallback\n");
875 goto err_finished_pm_runtime;
876 }
877 /* generic_edp_panel_probe() replaces desc in the panel */
878 desc = panel->desc;
879 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) {
880 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc);
881 }
882
883 if (!panel->base.backlight && panel->aux) {
884 pm_runtime_get_sync(dev);
885 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux);
886 pm_runtime_mark_last_busy(dev);
887 pm_runtime_put_autosuspend(dev);
888 if (err)
889 goto err_finished_pm_runtime;
890 }
891
892 drm_panel_add(&panel->base);
893
894 return 0;
895
896err_finished_pm_runtime:
897 pm_runtime_dont_use_autosuspend(dev);
898 pm_runtime_disable(dev);
899err_finished_ddc_init:
900 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
901 put_device(&panel->ddc->dev);
902
903 return err;
904}
905
906static int panel_edp_remove(struct device *dev)
907{
908 struct panel_edp *panel = dev_get_drvdata(dev);
909
910 drm_panel_remove(&panel->base);
911 drm_panel_disable(&panel->base);
912 drm_panel_unprepare(&panel->base);
913
914 pm_runtime_dont_use_autosuspend(dev);
915 pm_runtime_disable(dev);
916 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
917 put_device(&panel->ddc->dev);
918
919 kfree(panel->edid);
920 panel->edid = NULL;
921
922 return 0;
923}
924
925static void panel_edp_shutdown(struct device *dev)
926{
927 struct panel_edp *panel = dev_get_drvdata(dev);
928
929 drm_panel_disable(&panel->base);
930 drm_panel_unprepare(&panel->base);
931}
932
933static const struct display_timing auo_b101ean01_timing = {
934 .pixelclock = { 65300000, 72500000, 75000000 },
935 .hactive = { 1280, 1280, 1280 },
936 .hfront_porch = { 18, 119, 119 },
937 .hback_porch = { 21, 21, 21 },
938 .hsync_len = { 32, 32, 32 },
939 .vactive = { 800, 800, 800 },
940 .vfront_porch = { 4, 4, 4 },
941 .vback_porch = { 8, 8, 8 },
942 .vsync_len = { 18, 20, 20 },
943};
944
945static const struct panel_desc auo_b101ean01 = {
946 .timings = &auo_b101ean01_timing,
947 .num_timings = 1,
948 .bpc = 6,
949 .size = {
950 .width = 217,
951 .height = 136,
952 },
953};
954
955static const struct drm_display_mode auo_b116xak01_mode = {
956 .clock = 69300,
957 .hdisplay = 1366,
958 .hsync_start = 1366 + 48,
959 .hsync_end = 1366 + 48 + 32,
960 .htotal = 1366 + 48 + 32 + 10,
961 .vdisplay = 768,
962 .vsync_start = 768 + 4,
963 .vsync_end = 768 + 4 + 6,
964 .vtotal = 768 + 4 + 6 + 15,
965 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
966};
967
968static const struct panel_desc auo_b116xak01 = {
969 .modes = &auo_b116xak01_mode,
970 .num_modes = 1,
971 .bpc = 6,
972 .size = {
973 .width = 256,
974 .height = 144,
975 },
976 .delay = {
977 .hpd_absent = 200,
978 },
979};
980
981static const struct drm_display_mode auo_b116xw03_mode = {
982 .clock = 70589,
983 .hdisplay = 1366,
984 .hsync_start = 1366 + 40,
985 .hsync_end = 1366 + 40 + 40,
986 .htotal = 1366 + 40 + 40 + 32,
987 .vdisplay = 768,
988 .vsync_start = 768 + 10,
989 .vsync_end = 768 + 10 + 12,
990 .vtotal = 768 + 10 + 12 + 6,
991 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
992};
993
994static const struct panel_desc auo_b116xw03 = {
995 .modes = &auo_b116xw03_mode,
996 .num_modes = 1,
997 .bpc = 6,
998 .size = {
999 .width = 256,
1000 .height = 144,
1001 },
1002 .delay = {
1003 .enable = 400,
1004 },
1005};
1006
1007static const struct drm_display_mode auo_b133han05_mode = {
1008 .clock = 142600,
1009 .hdisplay = 1920,
1010 .hsync_start = 1920 + 58,
1011 .hsync_end = 1920 + 58 + 42,
1012 .htotal = 1920 + 58 + 42 + 60,
1013 .vdisplay = 1080,
1014 .vsync_start = 1080 + 3,
1015 .vsync_end = 1080 + 3 + 5,
1016 .vtotal = 1080 + 3 + 5 + 54,
1017};
1018
1019static const struct panel_desc auo_b133han05 = {
1020 .modes = &auo_b133han05_mode,
1021 .num_modes = 1,
1022 .bpc = 8,
1023 .size = {
1024 .width = 293,
1025 .height = 165,
1026 },
1027 .delay = {
1028 .hpd_reliable = 100,
1029 .enable = 20,
1030 .unprepare = 50,
1031 },
1032};
1033
1034static const struct drm_display_mode auo_b133htn01_mode = {
1035 .clock = 150660,
1036 .hdisplay = 1920,
1037 .hsync_start = 1920 + 172,
1038 .hsync_end = 1920 + 172 + 80,
1039 .htotal = 1920 + 172 + 80 + 60,
1040 .vdisplay = 1080,
1041 .vsync_start = 1080 + 25,
1042 .vsync_end = 1080 + 25 + 10,
1043 .vtotal = 1080 + 25 + 10 + 10,
1044};
1045
1046static const struct panel_desc auo_b133htn01 = {
1047 .modes = &auo_b133htn01_mode,
1048 .num_modes = 1,
1049 .bpc = 6,
1050 .size = {
1051 .width = 293,
1052 .height = 165,
1053 },
1054 .delay = {
1055 .hpd_reliable = 105,
1056 .enable = 20,
1057 .unprepare = 50,
1058 },
1059};
1060
1061static const struct drm_display_mode auo_b133xtn01_mode = {
1062 .clock = 69500,
1063 .hdisplay = 1366,
1064 .hsync_start = 1366 + 48,
1065 .hsync_end = 1366 + 48 + 32,
1066 .htotal = 1366 + 48 + 32 + 20,
1067 .vdisplay = 768,
1068 .vsync_start = 768 + 3,
1069 .vsync_end = 768 + 3 + 6,
1070 .vtotal = 768 + 3 + 6 + 13,
1071};
1072
1073static const struct panel_desc auo_b133xtn01 = {
1074 .modes = &auo_b133xtn01_mode,
1075 .num_modes = 1,
1076 .bpc = 6,
1077 .size = {
1078 .width = 293,
1079 .height = 165,
1080 },
1081};
1082
1083static const struct drm_display_mode auo_b140han06_mode = {
1084 .clock = 141000,
1085 .hdisplay = 1920,
1086 .hsync_start = 1920 + 16,
1087 .hsync_end = 1920 + 16 + 16,
1088 .htotal = 1920 + 16 + 16 + 152,
1089 .vdisplay = 1080,
1090 .vsync_start = 1080 + 3,
1091 .vsync_end = 1080 + 3 + 14,
1092 .vtotal = 1080 + 3 + 14 + 19,
1093};
1094
1095static const struct panel_desc auo_b140han06 = {
1096 .modes = &auo_b140han06_mode,
1097 .num_modes = 1,
1098 .bpc = 8,
1099 .size = {
1100 .width = 309,
1101 .height = 174,
1102 },
1103 .delay = {
1104 .hpd_reliable = 100,
1105 .enable = 20,
1106 .unprepare = 50,
1107 },
1108};
1109
1110static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
1111 {
1112 .clock = 71900,
1113 .hdisplay = 1280,
1114 .hsync_start = 1280 + 48,
1115 .hsync_end = 1280 + 48 + 32,
1116 .htotal = 1280 + 48 + 32 + 80,
1117 .vdisplay = 800,
1118 .vsync_start = 800 + 3,
1119 .vsync_end = 800 + 3 + 5,
1120 .vtotal = 800 + 3 + 5 + 24,
1121 },
1122 {
1123 .clock = 57500,
1124 .hdisplay = 1280,
1125 .hsync_start = 1280 + 48,
1126 .hsync_end = 1280 + 48 + 32,
1127 .htotal = 1280 + 48 + 32 + 80,
1128 .vdisplay = 800,
1129 .vsync_start = 800 + 3,
1130 .vsync_end = 800 + 3 + 5,
1131 .vtotal = 800 + 3 + 5 + 24,
1132 },
1133};
1134
1135static const struct panel_desc boe_nv101wxmn51 = {
1136 .modes = boe_nv101wxmn51_modes,
1137 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
1138 .bpc = 8,
1139 .size = {
1140 .width = 217,
1141 .height = 136,
1142 },
1143 .delay = {
1144 /* TODO: should be hpd-absent and no-hpd should be set? */
1145 .hpd_reliable = 210,
1146 .enable = 50,
1147 .unprepare = 160,
1148 },
1149};
1150
1151static const struct drm_display_mode boe_nv110wtm_n61_modes[] = {
1152 {
1153 .clock = 207800,
1154 .hdisplay = 2160,
1155 .hsync_start = 2160 + 48,
1156 .hsync_end = 2160 + 48 + 32,
1157 .htotal = 2160 + 48 + 32 + 100,
1158 .vdisplay = 1440,
1159 .vsync_start = 1440 + 3,
1160 .vsync_end = 1440 + 3 + 6,
1161 .vtotal = 1440 + 3 + 6 + 31,
1162 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1163 },
1164 {
1165 .clock = 138500,
1166 .hdisplay = 2160,
1167 .hsync_start = 2160 + 48,
1168 .hsync_end = 2160 + 48 + 32,
1169 .htotal = 2160 + 48 + 32 + 100,
1170 .vdisplay = 1440,
1171 .vsync_start = 1440 + 3,
1172 .vsync_end = 1440 + 3 + 6,
1173 .vtotal = 1440 + 3 + 6 + 31,
1174 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1175 },
1176};
1177
1178static const struct panel_desc boe_nv110wtm_n61 = {
1179 .modes = boe_nv110wtm_n61_modes,
1180 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes),
1181 .bpc = 8,
1182 .size = {
1183 .width = 233,
1184 .height = 155,
1185 },
1186 .delay = {
1187 .hpd_absent = 200,
1188 .prepare_to_enable = 80,
1189 .enable = 50,
1190 .unprepare = 500,
1191 },
1192};
1193
1194/* Also used for boe_nv133fhm_n62 */
1195static const struct drm_display_mode boe_nv133fhm_n61_modes = {
1196 .clock = 147840,
1197 .hdisplay = 1920,
1198 .hsync_start = 1920 + 48,
1199 .hsync_end = 1920 + 48 + 32,
1200 .htotal = 1920 + 48 + 32 + 200,
1201 .vdisplay = 1080,
1202 .vsync_start = 1080 + 3,
1203 .vsync_end = 1080 + 3 + 6,
1204 .vtotal = 1080 + 3 + 6 + 31,
1205 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1206};
1207
1208/* Also used for boe_nv133fhm_n62 */
1209static const struct panel_desc boe_nv133fhm_n61 = {
1210 .modes = &boe_nv133fhm_n61_modes,
1211 .num_modes = 1,
1212 .bpc = 6,
1213 .size = {
1214 .width = 294,
1215 .height = 165,
1216 },
1217 .delay = {
1218 /*
1219 * When power is first given to the panel there's a short
1220 * spike on the HPD line. It was explained that this spike
1221 * was until the TCON data download was complete. On
1222 * one system this was measured at 8 ms. We'll put 15 ms
1223 * in the prepare delay just to be safe. That means:
1224 * - If HPD isn't hooked up you still have 200 ms delay.
1225 * - If HPD is hooked up we won't try to look at it for the
1226 * first 15 ms.
1227 */
1228 .hpd_reliable = 15,
1229 .hpd_absent = 200,
1230
1231 .unprepare = 500,
1232 },
1233};
1234
1235static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
1236 {
1237 .clock = 148500,
1238 .hdisplay = 1920,
1239 .hsync_start = 1920 + 48,
1240 .hsync_end = 1920 + 48 + 32,
1241 .htotal = 2200,
1242 .vdisplay = 1080,
1243 .vsync_start = 1080 + 3,
1244 .vsync_end = 1080 + 3 + 5,
1245 .vtotal = 1125,
1246 },
1247};
1248
1249static const struct panel_desc boe_nv140fhmn49 = {
1250 .modes = boe_nv140fhmn49_modes,
1251 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),
1252 .bpc = 6,
1253 .size = {
1254 .width = 309,
1255 .height = 174,
1256 },
1257 .delay = {
1258 /* TODO: should be hpd-absent and no-hpd should be set? */
1259 .hpd_reliable = 210,
1260 .enable = 50,
1261 .unprepare = 160,
1262 },
1263};
1264
1265static const struct drm_display_mode innolux_n116bca_ea1_mode = {
1266 .clock = 76420,
1267 .hdisplay = 1366,
1268 .hsync_start = 1366 + 136,
1269 .hsync_end = 1366 + 136 + 30,
1270 .htotal = 1366 + 136 + 30 + 60,
1271 .vdisplay = 768,
1272 .vsync_start = 768 + 8,
1273 .vsync_end = 768 + 8 + 12,
1274 .vtotal = 768 + 8 + 12 + 12,
1275 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1276};
1277
1278static const struct panel_desc innolux_n116bca_ea1 = {
1279 .modes = &innolux_n116bca_ea1_mode,
1280 .num_modes = 1,
1281 .bpc = 6,
1282 .size = {
1283 .width = 256,
1284 .height = 144,
1285 },
1286 .delay = {
1287 .hpd_absent = 200,
1288 .enable = 80,
1289 .disable = 50,
1290 .unprepare = 500,
1291 },
1292};
1293
1294/*
1295 * Datasheet specifies that at 60 Hz refresh rate:
1296 * - total horizontal time: { 1506, 1592, 1716 }
1297 * - total vertical time: { 788, 800, 868 }
1298 *
1299 * ...but doesn't go into exactly how that should be split into a front
1300 * porch, back porch, or sync length. For now we'll leave a single setting
1301 * here which allows a bit of tweaking of the pixel clock at the expense of
1302 * refresh rate.
1303 */
1304static const struct display_timing innolux_n116bge_timing = {
1305 .pixelclock = { 72600000, 76420000, 80240000 },
1306 .hactive = { 1366, 1366, 1366 },
1307 .hfront_porch = { 136, 136, 136 },
1308 .hback_porch = { 60, 60, 60 },
1309 .hsync_len = { 30, 30, 30 },
1310 .vactive = { 768, 768, 768 },
1311 .vfront_porch = { 8, 8, 8 },
1312 .vback_porch = { 12, 12, 12 },
1313 .vsync_len = { 12, 12, 12 },
1314 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1315};
1316
1317static const struct panel_desc innolux_n116bge = {
1318 .timings = &innolux_n116bge_timing,
1319 .num_timings = 1,
1320 .bpc = 6,
1321 .size = {
1322 .width = 256,
1323 .height = 144,
1324 },
1325};
1326
1327static const struct drm_display_mode innolux_n125hce_gn1_mode = {
1328 .clock = 162000,
1329 .hdisplay = 1920,
1330 .hsync_start = 1920 + 40,
1331 .hsync_end = 1920 + 40 + 40,
1332 .htotal = 1920 + 40 + 40 + 80,
1333 .vdisplay = 1080,
1334 .vsync_start = 1080 + 4,
1335 .vsync_end = 1080 + 4 + 4,
1336 .vtotal = 1080 + 4 + 4 + 24,
1337};
1338
1339static const struct panel_desc innolux_n125hce_gn1 = {
1340 .modes = &innolux_n125hce_gn1_mode,
1341 .num_modes = 1,
1342 .bpc = 8,
1343 .size = {
1344 .width = 276,
1345 .height = 155,
1346 },
1347};
1348
1349static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
1350 .clock = 206016,
1351 .hdisplay = 2160,
1352 .hsync_start = 2160 + 48,
1353 .hsync_end = 2160 + 48 + 32,
1354 .htotal = 2160 + 48 + 32 + 80,
1355 .vdisplay = 1440,
1356 .vsync_start = 1440 + 3,
1357 .vsync_end = 1440 + 3 + 10,
1358 .vtotal = 1440 + 3 + 10 + 27,
1359 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1360};
1361
1362static const struct panel_desc innolux_p120zdg_bf1 = {
1363 .modes = &innolux_p120zdg_bf1_mode,
1364 .num_modes = 1,
1365 .bpc = 8,
1366 .size = {
1367 .width = 254,
1368 .height = 169,
1369 },
1370 .delay = {
1371 .hpd_absent = 200,
1372 .unprepare = 500,
1373 },
1374};
1375
1376static const struct drm_display_mode ivo_m133nwf4_r0_mode = {
1377 .clock = 138778,
1378 .hdisplay = 1920,
1379 .hsync_start = 1920 + 24,
1380 .hsync_end = 1920 + 24 + 48,
1381 .htotal = 1920 + 24 + 48 + 88,
1382 .vdisplay = 1080,
1383 .vsync_start = 1080 + 3,
1384 .vsync_end = 1080 + 3 + 12,
1385 .vtotal = 1080 + 3 + 12 + 17,
1386 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1387};
1388
1389static const struct panel_desc ivo_m133nwf4_r0 = {
1390 .modes = &ivo_m133nwf4_r0_mode,
1391 .num_modes = 1,
1392 .bpc = 8,
1393 .size = {
1394 .width = 294,
1395 .height = 165,
1396 },
1397 .delay = {
1398 .hpd_absent = 200,
1399 .unprepare = 500,
1400 },
1401};
1402
1403static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {
1404 .clock = 81000,
1405 .hdisplay = 1366,
1406 .hsync_start = 1366 + 40,
1407 .hsync_end = 1366 + 40 + 32,
1408 .htotal = 1366 + 40 + 32 + 62,
1409 .vdisplay = 768,
1410 .vsync_start = 768 + 5,
1411 .vsync_end = 768 + 5 + 5,
1412 .vtotal = 768 + 5 + 5 + 122,
1413 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1414};
1415
1416static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {
1417 .modes = &kingdisplay_kd116n21_30nv_a010_mode,
1418 .num_modes = 1,
1419 .bpc = 6,
1420 .size = {
1421 .width = 256,
1422 .height = 144,
1423 },
1424 .delay = {
1425 .hpd_absent = 200,
1426 },
1427};
1428
1429static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1430 .clock = 200000,
1431 .hdisplay = 1536,
1432 .hsync_start = 1536 + 12,
1433 .hsync_end = 1536 + 12 + 16,
1434 .htotal = 1536 + 12 + 16 + 48,
1435 .vdisplay = 2048,
1436 .vsync_start = 2048 + 8,
1437 .vsync_end = 2048 + 8 + 4,
1438 .vtotal = 2048 + 8 + 4 + 8,
1439 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1440};
1441
1442static const struct panel_desc lg_lp079qx1_sp0v = {
1443 .modes = &lg_lp079qx1_sp0v_mode,
1444 .num_modes = 1,
1445 .size = {
1446 .width = 129,
1447 .height = 171,
1448 },
1449};
1450
1451static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1452 .clock = 205210,
1453 .hdisplay = 2048,
1454 .hsync_start = 2048 + 150,
1455 .hsync_end = 2048 + 150 + 5,
1456 .htotal = 2048 + 150 + 5 + 5,
1457 .vdisplay = 1536,
1458 .vsync_start = 1536 + 3,
1459 .vsync_end = 1536 + 3 + 1,
1460 .vtotal = 1536 + 3 + 1 + 9,
1461};
1462
1463static const struct panel_desc lg_lp097qx1_spa1 = {
1464 .modes = &lg_lp097qx1_spa1_mode,
1465 .num_modes = 1,
1466 .size = {
1467 .width = 208,
1468 .height = 147,
1469 },
1470};
1471
1472static const struct drm_display_mode lg_lp120up1_mode = {
1473 .clock = 162300,
1474 .hdisplay = 1920,
1475 .hsync_start = 1920 + 40,
1476 .hsync_end = 1920 + 40 + 40,
1477 .htotal = 1920 + 40 + 40 + 80,
1478 .vdisplay = 1280,
1479 .vsync_start = 1280 + 4,
1480 .vsync_end = 1280 + 4 + 4,
1481 .vtotal = 1280 + 4 + 4 + 12,
1482};
1483
1484static const struct panel_desc lg_lp120up1 = {
1485 .modes = &lg_lp120up1_mode,
1486 .num_modes = 1,
1487 .bpc = 8,
1488 .size = {
1489 .width = 267,
1490 .height = 183,
1491 },
1492};
1493
1494static const struct drm_display_mode lg_lp129qe_mode = {
1495 .clock = 285250,
1496 .hdisplay = 2560,
1497 .hsync_start = 2560 + 48,
1498 .hsync_end = 2560 + 48 + 32,
1499 .htotal = 2560 + 48 + 32 + 80,
1500 .vdisplay = 1700,
1501 .vsync_start = 1700 + 3,
1502 .vsync_end = 1700 + 3 + 10,
1503 .vtotal = 1700 + 3 + 10 + 36,
1504};
1505
1506static const struct panel_desc lg_lp129qe = {
1507 .modes = &lg_lp129qe_mode,
1508 .num_modes = 1,
1509 .bpc = 8,
1510 .size = {
1511 .width = 272,
1512 .height = 181,
1513 },
1514};
1515
1516static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
1517 {
1518 .clock = 138500,
1519 .hdisplay = 1920,
1520 .hsync_start = 1920 + 48,
1521 .hsync_end = 1920 + 48 + 32,
1522 .htotal = 1920 + 48 + 32 + 80,
1523 .vdisplay = 1080,
1524 .vsync_start = 1080 + 3,
1525 .vsync_end = 1080 + 3 + 5,
1526 .vtotal = 1080 + 3 + 5 + 23,
1527 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1528 }, {
1529 .clock = 110920,
1530 .hdisplay = 1920,
1531 .hsync_start = 1920 + 48,
1532 .hsync_end = 1920 + 48 + 32,
1533 .htotal = 1920 + 48 + 32 + 80,
1534 .vdisplay = 1080,
1535 .vsync_start = 1080 + 3,
1536 .vsync_end = 1080 + 3 + 5,
1537 .vtotal = 1080 + 3 + 5 + 23,
1538 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1539 }
1540};
1541
1542static const struct panel_desc neweast_wjfh116008a = {
1543 .modes = neweast_wjfh116008a_modes,
1544 .num_modes = 2,
1545 .bpc = 6,
1546 .size = {
1547 .width = 260,
1548 .height = 150,
1549 },
1550 .delay = {
1551 .hpd_reliable = 110,
1552 .enable = 20,
1553 .unprepare = 500,
1554 },
1555};
1556
1557static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1558 .clock = 271560,
1559 .hdisplay = 2560,
1560 .hsync_start = 2560 + 48,
1561 .hsync_end = 2560 + 48 + 32,
1562 .htotal = 2560 + 48 + 32 + 80,
1563 .vdisplay = 1600,
1564 .vsync_start = 1600 + 2,
1565 .vsync_end = 1600 + 2 + 5,
1566 .vtotal = 1600 + 2 + 5 + 57,
1567};
1568
1569static const struct panel_desc samsung_lsn122dl01_c01 = {
1570 .modes = &samsung_lsn122dl01_c01_mode,
1571 .num_modes = 1,
1572 .size = {
1573 .width = 263,
1574 .height = 164,
1575 },
1576};
1577
1578static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1579 .clock = 76300,
1580 .hdisplay = 1366,
1581 .hsync_start = 1366 + 64,
1582 .hsync_end = 1366 + 64 + 48,
1583 .htotal = 1366 + 64 + 48 + 128,
1584 .vdisplay = 768,
1585 .vsync_start = 768 + 2,
1586 .vsync_end = 768 + 2 + 5,
1587 .vtotal = 768 + 2 + 5 + 17,
1588};
1589
1590static const struct panel_desc samsung_ltn140at29_301 = {
1591 .modes = &samsung_ltn140at29_301_mode,
1592 .num_modes = 1,
1593 .bpc = 6,
1594 .size = {
1595 .width = 320,
1596 .height = 187,
1597 },
1598};
1599
1600static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
1601 .clock = 168480,
1602 .hdisplay = 1920,
1603 .hsync_start = 1920 + 48,
1604 .hsync_end = 1920 + 48 + 32,
1605 .htotal = 1920 + 48 + 32 + 80,
1606 .vdisplay = 1280,
1607 .vsync_start = 1280 + 3,
1608 .vsync_end = 1280 + 3 + 10,
1609 .vtotal = 1280 + 3 + 10 + 57,
1610 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1611};
1612
1613static const struct panel_desc sharp_ld_d5116z01b = {
1614 .modes = &sharp_ld_d5116z01b_mode,
1615 .num_modes = 1,
1616 .bpc = 8,
1617 .size = {
1618 .width = 260,
1619 .height = 120,
1620 },
1621};
1622
1623static const struct display_timing sharp_lq123p1jx31_timing = {
1624 .pixelclock = { 252750000, 252750000, 266604720 },
1625 .hactive = { 2400, 2400, 2400 },
1626 .hfront_porch = { 48, 48, 48 },
1627 .hback_porch = { 80, 80, 84 },
1628 .hsync_len = { 32, 32, 32 },
1629 .vactive = { 1600, 1600, 1600 },
1630 .vfront_porch = { 3, 3, 3 },
1631 .vback_porch = { 33, 33, 120 },
1632 .vsync_len = { 10, 10, 10 },
1633 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1634};
1635
1636static const struct panel_desc sharp_lq123p1jx31 = {
1637 .timings = &sharp_lq123p1jx31_timing,
1638 .num_timings = 1,
1639 .bpc = 8,
1640 .size = {
1641 .width = 259,
1642 .height = 173,
1643 },
1644 .delay = {
1645 .hpd_reliable = 110,
1646 .enable = 50,
1647 .unprepare = 550,
1648 },
1649};
1650
1651static const struct drm_display_mode sharp_lq140m1jw46_mode[] = {
1652 {
1653 .clock = 346500,
1654 .hdisplay = 1920,
1655 .hsync_start = 1920 + 48,
1656 .hsync_end = 1920 + 48 + 32,
1657 .htotal = 1920 + 48 + 32 + 80,
1658 .vdisplay = 1080,
1659 .vsync_start = 1080 + 3,
1660 .vsync_end = 1080 + 3 + 5,
1661 .vtotal = 1080 + 3 + 5 + 69,
1662 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1663 }, {
1664 .clock = 144370,
1665 .hdisplay = 1920,
1666 .hsync_start = 1920 + 48,
1667 .hsync_end = 1920 + 48 + 32,
1668 .htotal = 1920 + 48 + 32 + 80,
1669 .vdisplay = 1080,
1670 .vsync_start = 1080 + 3,
1671 .vsync_end = 1080 + 3 + 5,
1672 .vtotal = 1080 + 3 + 5 + 69,
1673 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1674 },
1675};
1676
1677static const struct panel_desc sharp_lq140m1jw46 = {
1678 .modes = sharp_lq140m1jw46_mode,
1679 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode),
1680 .bpc = 8,
1681 .size = {
1682 .width = 309,
1683 .height = 174,
1684 },
1685 .delay = {
1686 .hpd_absent = 80,
1687 .enable = 50,
1688 .unprepare = 500,
1689 },
1690};
1691
1692static const struct drm_display_mode starry_kr122ea0sra_mode = {
1693 .clock = 147000,
1694 .hdisplay = 1920,
1695 .hsync_start = 1920 + 16,
1696 .hsync_end = 1920 + 16 + 16,
1697 .htotal = 1920 + 16 + 16 + 32,
1698 .vdisplay = 1200,
1699 .vsync_start = 1200 + 15,
1700 .vsync_end = 1200 + 15 + 2,
1701 .vtotal = 1200 + 15 + 2 + 18,
1702 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1703};
1704
1705static const struct panel_desc starry_kr122ea0sra = {
1706 .modes = &starry_kr122ea0sra_mode,
1707 .num_modes = 1,
1708 .size = {
1709 .width = 263,
1710 .height = 164,
1711 },
1712 .delay = {
1713 /* TODO: should be hpd-absent and no-hpd should be set? */
1714 .hpd_reliable = 10 + 200,
1715 .enable = 50,
1716 .unprepare = 10 + 500,
1717 },
1718};
1719
1720static const struct of_device_id platform_of_match[] = {
1721 {
1722 /* Must be first */
1723 .compatible = "edp-panel",
1724 }, {
1725 .compatible = "auo,b101ean01",
1726 .data = &auo_b101ean01,
1727 }, {
1728 .compatible = "auo,b116xa01",
1729 .data = &auo_b116xak01,
1730 }, {
1731 .compatible = "auo,b116xw03",
1732 .data = &auo_b116xw03,
1733 }, {
1734 .compatible = "auo,b133han05",
1735 .data = &auo_b133han05,
1736 }, {
1737 .compatible = "auo,b133htn01",
1738 .data = &auo_b133htn01,
1739 }, {
1740 .compatible = "auo,b133xtn01",
1741 .data = &auo_b133xtn01,
1742 }, {
1743 .compatible = "auo,b140han06",
1744 .data = &auo_b140han06,
1745 }, {
1746 .compatible = "boe,nv101wxmn51",
1747 .data = &boe_nv101wxmn51,
1748 }, {
1749 .compatible = "boe,nv110wtm-n61",
1750 .data = &boe_nv110wtm_n61,
1751 }, {
1752 .compatible = "boe,nv133fhm-n61",
1753 .data = &boe_nv133fhm_n61,
1754 }, {
1755 .compatible = "boe,nv133fhm-n62",
1756 .data = &boe_nv133fhm_n61,
1757 }, {
1758 .compatible = "boe,nv140fhmn49",
1759 .data = &boe_nv140fhmn49,
1760 }, {
1761 .compatible = "innolux,n116bca-ea1",
1762 .data = &innolux_n116bca_ea1,
1763 }, {
1764 .compatible = "innolux,n116bge",
1765 .data = &innolux_n116bge,
1766 }, {
1767 .compatible = "innolux,n125hce-gn1",
1768 .data = &innolux_n125hce_gn1,
1769 }, {
1770 .compatible = "innolux,p120zdg-bf1",
1771 .data = &innolux_p120zdg_bf1,
1772 }, {
1773 .compatible = "ivo,m133nwf4-r0",
1774 .data = &ivo_m133nwf4_r0,
1775 }, {
1776 .compatible = "kingdisplay,kd116n21-30nv-a010",
1777 .data = &kingdisplay_kd116n21_30nv_a010,
1778 }, {
1779 .compatible = "lg,lp079qx1-sp0v",
1780 .data = &lg_lp079qx1_sp0v,
1781 }, {
1782 .compatible = "lg,lp097qx1-spa1",
1783 .data = &lg_lp097qx1_spa1,
1784 }, {
1785 .compatible = "lg,lp120up1",
1786 .data = &lg_lp120up1,
1787 }, {
1788 .compatible = "lg,lp129qe",
1789 .data = &lg_lp129qe,
1790 }, {
1791 .compatible = "neweast,wjfh116008a",
1792 .data = &neweast_wjfh116008a,
1793 }, {
1794 .compatible = "samsung,lsn122dl01-c01",
1795 .data = &samsung_lsn122dl01_c01,
1796 }, {
1797 .compatible = "samsung,ltn140at29-301",
1798 .data = &samsung_ltn140at29_301,
1799 }, {
1800 .compatible = "sharp,ld-d5116z01b",
1801 .data = &sharp_ld_d5116z01b,
1802 }, {
1803 .compatible = "sharp,lq123p1jx31",
1804 .data = &sharp_lq123p1jx31,
1805 }, {
1806 .compatible = "sharp,lq140m1jw46",
1807 .data = &sharp_lq140m1jw46,
1808 }, {
1809 .compatible = "starry,kr122ea0sra",
1810 .data = &starry_kr122ea0sra,
1811 }, {
1812 /* sentinel */
1813 }
1814};
1815MODULE_DEVICE_TABLE(of, platform_of_match);
1816
1817static const struct panel_delay delay_200_500_p2e80 = {
1818 .hpd_absent = 200,
1819 .unprepare = 500,
1820 .prepare_to_enable = 80,
1821};
1822
1823static const struct panel_delay delay_200_500_p2e100 = {
1824 .hpd_absent = 200,
1825 .unprepare = 500,
1826 .prepare_to_enable = 100,
1827};
1828
1829static const struct panel_delay delay_200_500_e50 = {
1830 .hpd_absent = 200,
1831 .unprepare = 500,
1832 .enable = 50,
1833};
1834
1835static const struct panel_delay delay_200_500_e80_d50 = {
1836 .hpd_absent = 200,
1837 .unprepare = 500,
1838 .enable = 80,
1839 .disable = 50,
1840};
1841
1842static const struct panel_delay delay_100_500_e200 = {
1843 .hpd_absent = 100,
1844 .unprepare = 500,
1845 .enable = 200,
1846};
1847
1848static const struct panel_delay delay_200_500_e200 = {
1849 .hpd_absent = 200,
1850 .unprepare = 500,
1851 .enable = 200,
1852};
1853
1854#define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \
1855{ \
1856 .name = _name, \
1857 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
1858 product_id), \
1859 .delay = _delay \
1860}
1861
1862/*
1863 * This table is used to figure out power sequencing delays for panels that
1864 * are detected by EDID. Entries here may point to entries in the
1865 * platform_of_match table (if a panel is listed in both places).
1866 *
1867 * Sort first by vendor, then by product ID.
1868 */
1869static const struct edp_panel_entry edp_panels[] = {
1870 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"),
1871 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"),
1872 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"),
1873 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01"),
1874 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"),
1875 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),
1876
1877 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"),
1878 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"),
1879 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"),
1880 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"),
1881 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"),
1882 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"),
1883 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"),
1884 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"),
1885
1886 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"),
1887 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"),
1888 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"),
1889 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"),
1890 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"),
1891 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"),
1892
1893 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"),
1894 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "M133NW4J-R3"),
1895
1896 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"),
1897 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"),
1898
1899 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),
1900 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"),
1901 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),
1902
1903 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"),
1904
1905 { /* sentinal */ }
1906};
1907
1908static const struct edp_panel_entry *find_edp_panel(u32 panel_id)
1909{
1910 const struct edp_panel_entry *panel;
1911
1912 if (!panel_id)
1913 return NULL;
1914
1915 for (panel = edp_panels; panel->panel_id; panel++)
1916 if (panel->panel_id == panel_id)
1917 return panel;
1918
1919 return NULL;
1920}
1921
1922static int panel_edp_platform_probe(struct platform_device *pdev)
1923{
1924 const struct of_device_id *id;
1925
1926 /* Skip one since "edp-panel" is only supported on DP AUX bus */
1927 id = of_match_node(platform_of_match + 1, pdev->dev.of_node);
1928 if (!id)
1929 return -ENODEV;
1930
1931 return panel_edp_probe(&pdev->dev, id->data, NULL);
1932}
1933
1934static int panel_edp_platform_remove(struct platform_device *pdev)
1935{
1936 return panel_edp_remove(&pdev->dev);
1937}
1938
1939static void panel_edp_platform_shutdown(struct platform_device *pdev)
1940{
1941 panel_edp_shutdown(&pdev->dev);
1942}
1943
1944static const struct dev_pm_ops panel_edp_pm_ops = {
1945 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL)
1946 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1947 pm_runtime_force_resume)
1948};
1949
1950static struct platform_driver panel_edp_platform_driver = {
1951 .driver = {
1952 .name = "panel-edp",
1953 .of_match_table = platform_of_match,
1954 .pm = &panel_edp_pm_ops,
1955 },
1956 .probe = panel_edp_platform_probe,
1957 .remove = panel_edp_platform_remove,
1958 .shutdown = panel_edp_platform_shutdown,
1959};
1960
1961static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep)
1962{
1963 const struct of_device_id *id;
1964
1965 id = of_match_node(platform_of_match, aux_ep->dev.of_node);
1966 if (!id)
1967 return -ENODEV;
1968
1969 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux);
1970}
1971
1972static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep)
1973{
1974 panel_edp_remove(&aux_ep->dev);
1975}
1976
1977static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep)
1978{
1979 panel_edp_shutdown(&aux_ep->dev);
1980}
1981
1982static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = {
1983 .driver = {
1984 .name = "panel-simple-dp-aux",
1985 .of_match_table = platform_of_match, /* Same as platform one! */
1986 .pm = &panel_edp_pm_ops,
1987 },
1988 .probe = panel_edp_dp_aux_ep_probe,
1989 .remove = panel_edp_dp_aux_ep_remove,
1990 .shutdown = panel_edp_dp_aux_ep_shutdown,
1991};
1992
1993static int __init panel_edp_init(void)
1994{
1995 int err;
1996
1997 err = platform_driver_register(&panel_edp_platform_driver);
1998 if (err < 0)
1999 return err;
2000
2001 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver);
2002 if (err < 0)
2003 goto err_did_platform_register;
2004
2005 return 0;
2006
2007err_did_platform_register:
2008 platform_driver_unregister(&panel_edp_platform_driver);
2009
2010 return err;
2011}
2012module_init(panel_edp_init);
2013
2014static void __exit panel_edp_exit(void)
2015{
2016 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver);
2017 platform_driver_unregister(&panel_edp_platform_driver);
2018}
2019module_exit(panel_edp_exit);
2020
2021MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
2022MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels");
2023MODULE_LICENSE("GPL and additional rights");