Loading...
1/*
2 * Copyright (c) 2015, Daniel Thompson
3 *
4 * This file is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This file is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/clk.h>
16#include <linux/delay.h>
17#include <linux/hw_random.h>
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/of_address.h>
22#include <linux/of_platform.h>
23#include <linux/pm_runtime.h>
24#include <linux/slab.h>
25
26#define RNG_CR 0x00
27#define RNG_CR_RNGEN BIT(2)
28
29#define RNG_SR 0x04
30#define RNG_SR_SEIS BIT(6)
31#define RNG_SR_CEIS BIT(5)
32#define RNG_SR_DRDY BIT(0)
33
34#define RNG_DR 0x08
35
36/*
37 * It takes 40 cycles @ 48MHz to generate each random number (e.g. <1us).
38 * At the time of writing STM32 parts max out at ~200MHz meaning a timeout
39 * of 500 leaves us a very comfortable margin for error. The loop to which
40 * the timeout applies takes at least 4 instructions per iteration so the
41 * timeout is enough to take us up to multi-GHz parts!
42 */
43#define RNG_TIMEOUT 500
44
45struct stm32_rng_private {
46 struct hwrng rng;
47 void __iomem *base;
48 struct clk *clk;
49};
50
51static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
52{
53 struct stm32_rng_private *priv =
54 container_of(rng, struct stm32_rng_private, rng);
55 u32 sr;
56 int retval = 0;
57
58 pm_runtime_get_sync((struct device *) priv->rng.priv);
59
60 while (max > sizeof(u32)) {
61 sr = readl_relaxed(priv->base + RNG_SR);
62 if (!sr && wait) {
63 unsigned int timeout = RNG_TIMEOUT;
64
65 do {
66 cpu_relax();
67 sr = readl_relaxed(priv->base + RNG_SR);
68 } while (!sr && --timeout);
69 }
70
71 /* If error detected or data not ready... */
72 if (sr != RNG_SR_DRDY)
73 break;
74
75 *(u32 *)data = readl_relaxed(priv->base + RNG_DR);
76
77 retval += sizeof(u32);
78 data += sizeof(u32);
79 max -= sizeof(u32);
80 }
81
82 if (WARN_ONCE(sr & (RNG_SR_SEIS | RNG_SR_CEIS),
83 "bad RNG status - %x\n", sr))
84 writel_relaxed(0, priv->base + RNG_SR);
85
86 pm_runtime_mark_last_busy((struct device *) priv->rng.priv);
87 pm_runtime_put_sync_autosuspend((struct device *) priv->rng.priv);
88
89 return retval || !wait ? retval : -EIO;
90}
91
92static int stm32_rng_init(struct hwrng *rng)
93{
94 struct stm32_rng_private *priv =
95 container_of(rng, struct stm32_rng_private, rng);
96 int err;
97
98 err = clk_prepare_enable(priv->clk);
99 if (err)
100 return err;
101
102 writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR);
103
104 /* clear error indicators */
105 writel_relaxed(0, priv->base + RNG_SR);
106
107 return 0;
108}
109
110static void stm32_rng_cleanup(struct hwrng *rng)
111{
112 struct stm32_rng_private *priv =
113 container_of(rng, struct stm32_rng_private, rng);
114
115 writel_relaxed(0, priv->base + RNG_CR);
116 clk_disable_unprepare(priv->clk);
117}
118
119static int stm32_rng_probe(struct platform_device *ofdev)
120{
121 struct device *dev = &ofdev->dev;
122 struct device_node *np = ofdev->dev.of_node;
123 struct stm32_rng_private *priv;
124 struct resource res;
125 int err;
126
127 priv = devm_kzalloc(dev, sizeof(struct stm32_rng_private), GFP_KERNEL);
128 if (!priv)
129 return -ENOMEM;
130
131 err = of_address_to_resource(np, 0, &res);
132 if (err)
133 return err;
134
135 priv->base = devm_ioremap_resource(dev, &res);
136 if (IS_ERR(priv->base))
137 return PTR_ERR(priv->base);
138
139 priv->clk = devm_clk_get(&ofdev->dev, NULL);
140 if (IS_ERR(priv->clk))
141 return PTR_ERR(priv->clk);
142
143 dev_set_drvdata(dev, priv);
144
145 priv->rng.name = dev_driver_string(dev),
146#ifndef CONFIG_PM
147 priv->rng.init = stm32_rng_init,
148 priv->rng.cleanup = stm32_rng_cleanup,
149#endif
150 priv->rng.read = stm32_rng_read,
151 priv->rng.priv = (unsigned long) dev;
152
153 pm_runtime_set_autosuspend_delay(dev, 100);
154 pm_runtime_use_autosuspend(dev);
155 pm_runtime_enable(dev);
156
157 return devm_hwrng_register(dev, &priv->rng);
158}
159
160#ifdef CONFIG_PM
161static int stm32_rng_runtime_suspend(struct device *dev)
162{
163 struct stm32_rng_private *priv = dev_get_drvdata(dev);
164
165 stm32_rng_cleanup(&priv->rng);
166
167 return 0;
168}
169
170static int stm32_rng_runtime_resume(struct device *dev)
171{
172 struct stm32_rng_private *priv = dev_get_drvdata(dev);
173
174 return stm32_rng_init(&priv->rng);
175}
176#endif
177
178static UNIVERSAL_DEV_PM_OPS(stm32_rng_pm_ops, stm32_rng_runtime_suspend,
179 stm32_rng_runtime_resume, NULL);
180
181static const struct of_device_id stm32_rng_match[] = {
182 {
183 .compatible = "st,stm32-rng",
184 },
185 {},
186};
187MODULE_DEVICE_TABLE(of, stm32_rng_match);
188
189static struct platform_driver stm32_rng_driver = {
190 .driver = {
191 .name = "stm32-rng",
192 .pm = &stm32_rng_pm_ops,
193 .of_match_table = stm32_rng_match,
194 },
195 .probe = stm32_rng_probe,
196};
197
198module_platform_driver(stm32_rng_driver);
199
200MODULE_LICENSE("GPL");
201MODULE_AUTHOR("Daniel Thompson <daniel.thompson@linaro.org>");
202MODULE_DESCRIPTION("STMicroelectronics STM32 RNG device driver");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (c) 2015, Daniel Thompson
4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/hw_random.h>
9#include <linux/io.h>
10#include <linux/iopoll.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/of_address.h>
14#include <linux/of_platform.h>
15#include <linux/pm_runtime.h>
16#include <linux/reset.h>
17#include <linux/slab.h>
18
19#define RNG_CR 0x00
20#define RNG_CR_RNGEN BIT(2)
21#define RNG_CR_CED BIT(5)
22
23#define RNG_SR 0x04
24#define RNG_SR_SEIS BIT(6)
25#define RNG_SR_CEIS BIT(5)
26#define RNG_SR_DRDY BIT(0)
27
28#define RNG_DR 0x08
29
30struct stm32_rng_private {
31 struct hwrng rng;
32 void __iomem *base;
33 struct clk *clk;
34 struct reset_control *rst;
35 bool ced;
36};
37
38static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
39{
40 struct stm32_rng_private *priv =
41 container_of(rng, struct stm32_rng_private, rng);
42 u32 sr;
43 int retval = 0;
44
45 pm_runtime_get_sync((struct device *) priv->rng.priv);
46
47 while (max >= sizeof(u32)) {
48 sr = readl_relaxed(priv->base + RNG_SR);
49 /* Manage timeout which is based on timer and take */
50 /* care of initial delay time when enabling rng */
51 if (!sr && wait) {
52 int err;
53
54 err = readl_relaxed_poll_timeout_atomic(priv->base
55 + RNG_SR,
56 sr, sr,
57 10, 50000);
58 if (err)
59 dev_err((struct device *)priv->rng.priv,
60 "%s: timeout %x!\n", __func__, sr);
61 }
62
63 /* If error detected or data not ready... */
64 if (sr != RNG_SR_DRDY) {
65 if (WARN_ONCE(sr & (RNG_SR_SEIS | RNG_SR_CEIS),
66 "bad RNG status - %x\n", sr))
67 writel_relaxed(0, priv->base + RNG_SR);
68 break;
69 }
70
71 *(u32 *)data = readl_relaxed(priv->base + RNG_DR);
72
73 retval += sizeof(u32);
74 data += sizeof(u32);
75 max -= sizeof(u32);
76 }
77
78 pm_runtime_mark_last_busy((struct device *) priv->rng.priv);
79 pm_runtime_put_sync_autosuspend((struct device *) priv->rng.priv);
80
81 return retval || !wait ? retval : -EIO;
82}
83
84static int stm32_rng_init(struct hwrng *rng)
85{
86 struct stm32_rng_private *priv =
87 container_of(rng, struct stm32_rng_private, rng);
88 int err;
89
90 err = clk_prepare_enable(priv->clk);
91 if (err)
92 return err;
93
94 if (priv->ced)
95 writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR);
96 else
97 writel_relaxed(RNG_CR_RNGEN | RNG_CR_CED,
98 priv->base + RNG_CR);
99
100 /* clear error indicators */
101 writel_relaxed(0, priv->base + RNG_SR);
102
103 return 0;
104}
105
106static void stm32_rng_cleanup(struct hwrng *rng)
107{
108 struct stm32_rng_private *priv =
109 container_of(rng, struct stm32_rng_private, rng);
110
111 writel_relaxed(0, priv->base + RNG_CR);
112 clk_disable_unprepare(priv->clk);
113}
114
115static int stm32_rng_probe(struct platform_device *ofdev)
116{
117 struct device *dev = &ofdev->dev;
118 struct device_node *np = ofdev->dev.of_node;
119 struct stm32_rng_private *priv;
120 struct resource res;
121 int err;
122
123 priv = devm_kzalloc(dev, sizeof(struct stm32_rng_private), GFP_KERNEL);
124 if (!priv)
125 return -ENOMEM;
126
127 err = of_address_to_resource(np, 0, &res);
128 if (err)
129 return err;
130
131 priv->base = devm_ioremap_resource(dev, &res);
132 if (IS_ERR(priv->base))
133 return PTR_ERR(priv->base);
134
135 priv->clk = devm_clk_get(&ofdev->dev, NULL);
136 if (IS_ERR(priv->clk))
137 return PTR_ERR(priv->clk);
138
139 priv->rst = devm_reset_control_get(&ofdev->dev, NULL);
140 if (!IS_ERR(priv->rst)) {
141 reset_control_assert(priv->rst);
142 udelay(2);
143 reset_control_deassert(priv->rst);
144 }
145
146 priv->ced = of_property_read_bool(np, "clock-error-detect");
147
148 dev_set_drvdata(dev, priv);
149
150 priv->rng.name = dev_driver_string(dev);
151#ifndef CONFIG_PM
152 priv->rng.init = stm32_rng_init;
153 priv->rng.cleanup = stm32_rng_cleanup;
154#endif
155 priv->rng.read = stm32_rng_read;
156 priv->rng.priv = (unsigned long) dev;
157 priv->rng.quality = 900;
158
159 pm_runtime_set_autosuspend_delay(dev, 100);
160 pm_runtime_use_autosuspend(dev);
161 pm_runtime_enable(dev);
162
163 return devm_hwrng_register(dev, &priv->rng);
164}
165
166static int stm32_rng_remove(struct platform_device *ofdev)
167{
168 pm_runtime_disable(&ofdev->dev);
169
170 return 0;
171}
172
173#ifdef CONFIG_PM
174static int stm32_rng_runtime_suspend(struct device *dev)
175{
176 struct stm32_rng_private *priv = dev_get_drvdata(dev);
177
178 stm32_rng_cleanup(&priv->rng);
179
180 return 0;
181}
182
183static int stm32_rng_runtime_resume(struct device *dev)
184{
185 struct stm32_rng_private *priv = dev_get_drvdata(dev);
186
187 return stm32_rng_init(&priv->rng);
188}
189#endif
190
191static const struct dev_pm_ops stm32_rng_pm_ops = {
192 SET_RUNTIME_PM_OPS(stm32_rng_runtime_suspend,
193 stm32_rng_runtime_resume, NULL)
194 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
195 pm_runtime_force_resume)
196};
197
198
199static const struct of_device_id stm32_rng_match[] = {
200 {
201 .compatible = "st,stm32-rng",
202 },
203 {},
204};
205MODULE_DEVICE_TABLE(of, stm32_rng_match);
206
207static struct platform_driver stm32_rng_driver = {
208 .driver = {
209 .name = "stm32-rng",
210 .pm = &stm32_rng_pm_ops,
211 .of_match_table = stm32_rng_match,
212 },
213 .probe = stm32_rng_probe,
214 .remove = stm32_rng_remove,
215};
216
217module_platform_driver(stm32_rng_driver);
218
219MODULE_LICENSE("GPL");
220MODULE_AUTHOR("Daniel Thompson <daniel.thompson@linaro.org>");
221MODULE_DESCRIPTION("STMicroelectronics STM32 RNG device driver");