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1/*
2 * Copyright (C) 2011 Google, Inc.
3 * Copyright (C) 2012 Intel, Inc.
4 * Copyright (C) 2013 Intel, Inc.
5 * Copyright (C) 2014 Linaro Limited
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18/* This source file contains the implementation of a special device driver
19 * that intends to provide a *very* fast communication channel between the
20 * guest system and the QEMU emulator.
21 *
22 * Usage from the guest is simply the following (error handling simplified):
23 *
24 * int fd = open("/dev/qemu_pipe",O_RDWR);
25 * .... write() or read() through the pipe.
26 *
27 * This driver doesn't deal with the exact protocol used during the session.
28 * It is intended to be as simple as something like:
29 *
30 * // do this _just_ after opening the fd to connect to a specific
31 * // emulator service.
32 * const char* msg = "<pipename>";
33 * if (write(fd, msg, strlen(msg)+1) < 0) {
34 * ... could not connect to <pipename> service
35 * close(fd);
36 * }
37 *
38 * // after this, simply read() and write() to communicate with the
39 * // service. Exact protocol details left as an exercise to the reader.
40 *
41 * This driver is very fast because it doesn't copy any data through
42 * intermediate buffers, since the emulator is capable of translating
43 * guest user addresses into host ones.
44 *
45 * Note that we must however ensure that each user page involved in the
46 * exchange is properly mapped during a transfer.
47 */
48
49#include <linux/module.h>
50#include <linux/interrupt.h>
51#include <linux/kernel.h>
52#include <linux/spinlock.h>
53#include <linux/miscdevice.h>
54#include <linux/platform_device.h>
55#include <linux/poll.h>
56#include <linux/sched.h>
57#include <linux/bitops.h>
58#include <linux/slab.h>
59#include <linux/io.h>
60#include <linux/goldfish.h>
61#include <linux/dma-mapping.h>
62#include <linux/mm.h>
63#include <linux/acpi.h>
64
65/*
66 * IMPORTANT: The following constants must match the ones used and defined
67 * in external/qemu/hw/goldfish_pipe.c in the Android source tree.
68 */
69
70/* pipe device registers */
71#define PIPE_REG_COMMAND 0x00 /* write: value = command */
72#define PIPE_REG_STATUS 0x04 /* read */
73#define PIPE_REG_CHANNEL 0x08 /* read/write: channel id */
74#define PIPE_REG_CHANNEL_HIGH 0x30 /* read/write: channel id */
75#define PIPE_REG_SIZE 0x0c /* read/write: buffer size */
76#define PIPE_REG_ADDRESS 0x10 /* write: physical address */
77#define PIPE_REG_ADDRESS_HIGH 0x34 /* write: physical address */
78#define PIPE_REG_WAKES 0x14 /* read: wake flags */
79#define PIPE_REG_PARAMS_ADDR_LOW 0x18 /* read/write: batch data address */
80#define PIPE_REG_PARAMS_ADDR_HIGH 0x1c /* read/write: batch data address */
81#define PIPE_REG_ACCESS_PARAMS 0x20 /* write: batch access */
82#define PIPE_REG_VERSION 0x24 /* read: device version */
83
84/* list of commands for PIPE_REG_COMMAND */
85#define CMD_OPEN 1 /* open new channel */
86#define CMD_CLOSE 2 /* close channel (from guest) */
87#define CMD_POLL 3 /* poll read/write status */
88
89/* List of bitflags returned in status of CMD_POLL command */
90#define PIPE_POLL_IN (1 << 0)
91#define PIPE_POLL_OUT (1 << 1)
92#define PIPE_POLL_HUP (1 << 2)
93
94/* The following commands are related to write operations */
95#define CMD_WRITE_BUFFER 4 /* send a user buffer to the emulator */
96#define CMD_WAKE_ON_WRITE 5 /* tell the emulator to wake us when writing
97 is possible */
98#define CMD_READ_BUFFER 6 /* receive a user buffer from the emulator */
99#define CMD_WAKE_ON_READ 7 /* tell the emulator to wake us when reading
100 * is possible */
101
102/* Possible status values used to signal errors - see goldfish_pipe_error_convert */
103#define PIPE_ERROR_INVAL -1
104#define PIPE_ERROR_AGAIN -2
105#define PIPE_ERROR_NOMEM -3
106#define PIPE_ERROR_IO -4
107
108/* Bit-flags used to signal events from the emulator */
109#define PIPE_WAKE_CLOSED (1 << 0) /* emulator closed pipe */
110#define PIPE_WAKE_READ (1 << 1) /* pipe can now be read from */
111#define PIPE_WAKE_WRITE (1 << 2) /* pipe can now be written to */
112
113struct access_params {
114 unsigned long channel;
115 u32 size;
116 unsigned long address;
117 u32 cmd;
118 u32 result;
119 /* reserved for future extension */
120 u32 flags;
121};
122
123/* The global driver data. Holds a reference to the i/o page used to
124 * communicate with the emulator, and a wake queue for blocked tasks
125 * waiting to be awoken.
126 */
127struct goldfish_pipe_dev {
128 spinlock_t lock;
129 unsigned char __iomem *base;
130 struct access_params *aps;
131 int irq;
132 u32 version;
133};
134
135static struct goldfish_pipe_dev pipe_dev[1];
136
137/* This data type models a given pipe instance */
138struct goldfish_pipe {
139 struct goldfish_pipe_dev *dev;
140 struct mutex lock;
141 unsigned long flags;
142 wait_queue_head_t wake_queue;
143};
144
145
146/* Bit flags for the 'flags' field */
147enum {
148 BIT_CLOSED_ON_HOST = 0, /* pipe closed by host */
149 BIT_WAKE_ON_WRITE = 1, /* want to be woken on writes */
150 BIT_WAKE_ON_READ = 2, /* want to be woken on reads */
151};
152
153
154static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd)
155{
156 unsigned long flags;
157 u32 status;
158 struct goldfish_pipe_dev *dev = pipe->dev;
159
160 spin_lock_irqsave(&dev->lock, flags);
161 gf_write_ptr(pipe, dev->base + PIPE_REG_CHANNEL,
162 dev->base + PIPE_REG_CHANNEL_HIGH);
163 writel(cmd, dev->base + PIPE_REG_COMMAND);
164 status = readl(dev->base + PIPE_REG_STATUS);
165 spin_unlock_irqrestore(&dev->lock, flags);
166 return status;
167}
168
169static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd)
170{
171 unsigned long flags;
172 struct goldfish_pipe_dev *dev = pipe->dev;
173
174 spin_lock_irqsave(&dev->lock, flags);
175 gf_write_ptr(pipe, dev->base + PIPE_REG_CHANNEL,
176 dev->base + PIPE_REG_CHANNEL_HIGH);
177 writel(cmd, dev->base + PIPE_REG_COMMAND);
178 spin_unlock_irqrestore(&dev->lock, flags);
179}
180
181/* This function converts an error code returned by the emulator through
182 * the PIPE_REG_STATUS i/o register into a valid negative errno value.
183 */
184static int goldfish_pipe_error_convert(int status)
185{
186 switch (status) {
187 case PIPE_ERROR_AGAIN:
188 return -EAGAIN;
189 case PIPE_ERROR_NOMEM:
190 return -ENOMEM;
191 case PIPE_ERROR_IO:
192 return -EIO;
193 default:
194 return -EINVAL;
195 }
196}
197
198/*
199 * Notice: QEMU will return 0 for un-known register access, indicating
200 * param_acess is supported or not
201 */
202static int valid_batchbuffer_addr(struct goldfish_pipe_dev *dev,
203 struct access_params *aps)
204{
205 u32 aph, apl;
206 u64 paddr;
207 aph = readl(dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
208 apl = readl(dev->base + PIPE_REG_PARAMS_ADDR_LOW);
209
210 paddr = ((u64)aph << 32) | apl;
211 if (paddr != (__pa(aps)))
212 return 0;
213 return 1;
214}
215
216/* 0 on success */
217static int setup_access_params_addr(struct platform_device *pdev,
218 struct goldfish_pipe_dev *dev)
219{
220 dma_addr_t dma_handle;
221 struct access_params *aps;
222
223 aps = dmam_alloc_coherent(&pdev->dev, sizeof(struct access_params),
224 &dma_handle, GFP_KERNEL);
225 if (!aps)
226 return -ENOMEM;
227
228 writel(upper_32_bits(dma_handle), dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
229 writel(lower_32_bits(dma_handle), dev->base + PIPE_REG_PARAMS_ADDR_LOW);
230
231 if (valid_batchbuffer_addr(dev, aps)) {
232 dev->aps = aps;
233 return 0;
234 } else
235 return -1;
236}
237
238/* A value that will not be set by qemu emulator */
239#define INITIAL_BATCH_RESULT (0xdeadbeaf)
240static int access_with_param(struct goldfish_pipe_dev *dev, const int cmd,
241 unsigned long address, unsigned long avail,
242 struct goldfish_pipe *pipe, int *status)
243{
244 struct access_params *aps = dev->aps;
245
246 if (aps == NULL)
247 return -1;
248
249 aps->result = INITIAL_BATCH_RESULT;
250 aps->channel = (unsigned long)pipe;
251 aps->size = avail;
252 aps->address = address;
253 aps->cmd = cmd;
254 writel(cmd, dev->base + PIPE_REG_ACCESS_PARAMS);
255 /*
256 * If the aps->result has not changed, that means
257 * that the batch command failed
258 */
259 if (aps->result == INITIAL_BATCH_RESULT)
260 return -1;
261 *status = aps->result;
262 return 0;
263}
264
265static ssize_t goldfish_pipe_read_write(struct file *filp, char __user *buffer,
266 size_t bufflen, int is_write)
267{
268 unsigned long irq_flags;
269 struct goldfish_pipe *pipe = filp->private_data;
270 struct goldfish_pipe_dev *dev = pipe->dev;
271 unsigned long address, address_end;
272 int count = 0, ret = -EINVAL;
273
274 /* If the emulator already closed the pipe, no need to go further */
275 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
276 return -EIO;
277
278 /* Null reads or writes succeeds */
279 if (unlikely(bufflen == 0))
280 return 0;
281
282 /* Check the buffer range for access */
283 if (!access_ok(is_write ? VERIFY_WRITE : VERIFY_READ,
284 buffer, bufflen))
285 return -EFAULT;
286
287 /* Serialize access to the pipe */
288 if (mutex_lock_interruptible(&pipe->lock))
289 return -ERESTARTSYS;
290
291 address = (unsigned long)(void *)buffer;
292 address_end = address + bufflen;
293
294 while (address < address_end) {
295 unsigned long page_end = (address & PAGE_MASK) + PAGE_SIZE;
296 unsigned long next = page_end < address_end ? page_end
297 : address_end;
298 unsigned long avail = next - address;
299 int status, wakeBit;
300 struct page *page;
301
302 /* Either vaddr or paddr depending on the device version */
303 unsigned long xaddr;
304
305 /*
306 * We grab the pages on a page-by-page basis in case user
307 * space gives us a potentially huge buffer but the read only
308 * returns a small amount, then there's no need to pin that
309 * much memory to the process.
310 */
311 down_read(¤t->mm->mmap_sem);
312 ret = get_user_pages(address, 1, !is_write, 0, &page, NULL);
313 up_read(¤t->mm->mmap_sem);
314 if (ret < 0)
315 break;
316
317 if (dev->version) {
318 /* Device version 1 or newer (qemu-android) expects the
319 * physical address.
320 */
321 xaddr = page_to_phys(page) | (address & ~PAGE_MASK);
322 } else {
323 /* Device version 0 (classic emulator) expects the
324 * virtual address.
325 */
326 xaddr = address;
327 }
328
329 /* Now, try to transfer the bytes in the current page */
330 spin_lock_irqsave(&dev->lock, irq_flags);
331 if (access_with_param(dev,
332 is_write ? CMD_WRITE_BUFFER : CMD_READ_BUFFER,
333 xaddr, avail, pipe, &status)) {
334 gf_write_ptr(pipe, dev->base + PIPE_REG_CHANNEL,
335 dev->base + PIPE_REG_CHANNEL_HIGH);
336 writel(avail, dev->base + PIPE_REG_SIZE);
337 gf_write_ptr((void *)xaddr,
338 dev->base + PIPE_REG_ADDRESS,
339 dev->base + PIPE_REG_ADDRESS_HIGH);
340 writel(is_write ? CMD_WRITE_BUFFER : CMD_READ_BUFFER,
341 dev->base + PIPE_REG_COMMAND);
342 status = readl(dev->base + PIPE_REG_STATUS);
343 }
344 spin_unlock_irqrestore(&dev->lock, irq_flags);
345
346 if (status > 0 && !is_write)
347 set_page_dirty(page);
348 put_page(page);
349
350 if (status > 0) { /* Correct transfer */
351 count += status;
352 address += status;
353 continue;
354 } else if (status == 0) { /* EOF */
355 ret = 0;
356 break;
357 } else if (status < 0 && count > 0) {
358 /*
359 * An error occurred and we already transferred
360 * something on one of the previous pages.
361 * Just return what we already copied and log this
362 * err.
363 *
364 * Note: This seems like an incorrect approach but
365 * cannot change it until we check if any user space
366 * ABI relies on this behavior.
367 */
368 if (status != PIPE_ERROR_AGAIN)
369 pr_info_ratelimited("goldfish_pipe: backend returned error %d on %s\n",
370 status, is_write ? "write" : "read");
371 ret = 0;
372 break;
373 }
374
375 /*
376 * If the error is not PIPE_ERROR_AGAIN, or if we are not in
377 * non-blocking mode, just return the error code.
378 */
379 if (status != PIPE_ERROR_AGAIN ||
380 (filp->f_flags & O_NONBLOCK) != 0) {
381 ret = goldfish_pipe_error_convert(status);
382 break;
383 }
384
385 /*
386 * The backend blocked the read/write, wait until the backend
387 * tells us it's ready to process more data.
388 */
389 wakeBit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
390 set_bit(wakeBit, &pipe->flags);
391
392 /* Tell the emulator we're going to wait for a wake event */
393 goldfish_cmd(pipe,
394 is_write ? CMD_WAKE_ON_WRITE : CMD_WAKE_ON_READ);
395
396 /* Unlock the pipe, then wait for the wake signal */
397 mutex_unlock(&pipe->lock);
398
399 while (test_bit(wakeBit, &pipe->flags)) {
400 if (wait_event_interruptible(
401 pipe->wake_queue,
402 !test_bit(wakeBit, &pipe->flags)))
403 return -ERESTARTSYS;
404
405 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
406 return -EIO;
407 }
408
409 /* Try to re-acquire the lock */
410 if (mutex_lock_interruptible(&pipe->lock))
411 return -ERESTARTSYS;
412 }
413 mutex_unlock(&pipe->lock);
414
415 if (ret < 0)
416 return ret;
417 else
418 return count;
419}
420
421static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
422 size_t bufflen, loff_t *ppos)
423{
424 return goldfish_pipe_read_write(filp, buffer, bufflen, 0);
425}
426
427static ssize_t goldfish_pipe_write(struct file *filp,
428 const char __user *buffer, size_t bufflen,
429 loff_t *ppos)
430{
431 return goldfish_pipe_read_write(filp, (char __user *)buffer,
432 bufflen, 1);
433}
434
435
436static unsigned int goldfish_pipe_poll(struct file *filp, poll_table *wait)
437{
438 struct goldfish_pipe *pipe = filp->private_data;
439 unsigned int mask = 0;
440 int status;
441
442 mutex_lock(&pipe->lock);
443
444 poll_wait(filp, &pipe->wake_queue, wait);
445
446 status = goldfish_cmd_status(pipe, CMD_POLL);
447
448 mutex_unlock(&pipe->lock);
449
450 if (status & PIPE_POLL_IN)
451 mask |= POLLIN | POLLRDNORM;
452
453 if (status & PIPE_POLL_OUT)
454 mask |= POLLOUT | POLLWRNORM;
455
456 if (status & PIPE_POLL_HUP)
457 mask |= POLLHUP;
458
459 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
460 mask |= POLLERR;
461
462 return mask;
463}
464
465static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
466{
467 struct goldfish_pipe_dev *dev = dev_id;
468 unsigned long irq_flags;
469 int count = 0;
470
471 /*
472 * We're going to read from the emulator a list of (channel,flags)
473 * pairs corresponding to the wake events that occurred on each
474 * blocked pipe (i.e. channel).
475 */
476 spin_lock_irqsave(&dev->lock, irq_flags);
477 for (;;) {
478 /* First read the channel, 0 means the end of the list */
479 struct goldfish_pipe *pipe;
480 unsigned long wakes;
481 unsigned long channel = 0;
482
483#ifdef CONFIG_64BIT
484 channel = (u64)readl(dev->base + PIPE_REG_CHANNEL_HIGH) << 32;
485
486 if (channel == 0)
487 break;
488#endif
489 channel |= readl(dev->base + PIPE_REG_CHANNEL);
490
491 if (channel == 0)
492 break;
493
494 /* Convert channel to struct pipe pointer + read wake flags */
495 wakes = readl(dev->base + PIPE_REG_WAKES);
496 pipe = (struct goldfish_pipe *)(ptrdiff_t)channel;
497
498 /* Did the emulator just closed a pipe? */
499 if (wakes & PIPE_WAKE_CLOSED) {
500 set_bit(BIT_CLOSED_ON_HOST, &pipe->flags);
501 wakes |= PIPE_WAKE_READ | PIPE_WAKE_WRITE;
502 }
503 if (wakes & PIPE_WAKE_READ)
504 clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
505 if (wakes & PIPE_WAKE_WRITE)
506 clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
507
508 wake_up_interruptible(&pipe->wake_queue);
509 count++;
510 }
511 spin_unlock_irqrestore(&dev->lock, irq_flags);
512
513 return (count == 0) ? IRQ_NONE : IRQ_HANDLED;
514}
515
516/**
517 * goldfish_pipe_open - open a channel to the AVD
518 * @inode: inode of device
519 * @file: file struct of opener
520 *
521 * Create a new pipe link between the emulator and the use application.
522 * Each new request produces a new pipe.
523 *
524 * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
525 * right now so this is fine. A move to 64bit will need this addressing
526 */
527static int goldfish_pipe_open(struct inode *inode, struct file *file)
528{
529 struct goldfish_pipe *pipe;
530 struct goldfish_pipe_dev *dev = pipe_dev;
531 int32_t status;
532
533 /* Allocate new pipe kernel object */
534 pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
535 if (pipe == NULL)
536 return -ENOMEM;
537
538 pipe->dev = dev;
539 mutex_init(&pipe->lock);
540 init_waitqueue_head(&pipe->wake_queue);
541
542 /*
543 * Now, tell the emulator we're opening a new pipe. We use the
544 * pipe object's address as the channel identifier for simplicity.
545 */
546
547 status = goldfish_cmd_status(pipe, CMD_OPEN);
548 if (status < 0) {
549 kfree(pipe);
550 return status;
551 }
552
553 /* All is done, save the pipe into the file's private data field */
554 file->private_data = pipe;
555 return 0;
556}
557
558static int goldfish_pipe_release(struct inode *inode, struct file *filp)
559{
560 struct goldfish_pipe *pipe = filp->private_data;
561
562 /* The guest is closing the channel, so tell the emulator right now */
563 goldfish_cmd(pipe, CMD_CLOSE);
564 kfree(pipe);
565 filp->private_data = NULL;
566 return 0;
567}
568
569static const struct file_operations goldfish_pipe_fops = {
570 .owner = THIS_MODULE,
571 .read = goldfish_pipe_read,
572 .write = goldfish_pipe_write,
573 .poll = goldfish_pipe_poll,
574 .open = goldfish_pipe_open,
575 .release = goldfish_pipe_release,
576};
577
578static struct miscdevice goldfish_pipe_device = {
579 .minor = MISC_DYNAMIC_MINOR,
580 .name = "goldfish_pipe",
581 .fops = &goldfish_pipe_fops,
582};
583
584static int goldfish_pipe_probe(struct platform_device *pdev)
585{
586 int err;
587 struct resource *r;
588 struct goldfish_pipe_dev *dev = pipe_dev;
589
590 /* not thread safe, but this should not happen */
591 WARN_ON(dev->base != NULL);
592
593 spin_lock_init(&dev->lock);
594
595 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
596 if (r == NULL || resource_size(r) < PAGE_SIZE) {
597 dev_err(&pdev->dev, "can't allocate i/o page\n");
598 return -EINVAL;
599 }
600 dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
601 if (dev->base == NULL) {
602 dev_err(&pdev->dev, "ioremap failed\n");
603 return -EINVAL;
604 }
605
606 r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
607 if (r == NULL) {
608 err = -EINVAL;
609 goto error;
610 }
611 dev->irq = r->start;
612
613 err = devm_request_irq(&pdev->dev, dev->irq, goldfish_pipe_interrupt,
614 IRQF_SHARED, "goldfish_pipe", dev);
615 if (err) {
616 dev_err(&pdev->dev, "unable to allocate IRQ\n");
617 goto error;
618 }
619
620 err = misc_register(&goldfish_pipe_device);
621 if (err) {
622 dev_err(&pdev->dev, "unable to register device\n");
623 goto error;
624 }
625 setup_access_params_addr(pdev, dev);
626
627 /* Although the pipe device in the classic Android emulator does not
628 * recognize the 'version' register, it won't treat this as an error
629 * either and will simply return 0, which is fine.
630 */
631 dev->version = readl(dev->base + PIPE_REG_VERSION);
632 return 0;
633
634error:
635 dev->base = NULL;
636 return err;
637}
638
639static int goldfish_pipe_remove(struct platform_device *pdev)
640{
641 struct goldfish_pipe_dev *dev = pipe_dev;
642 misc_deregister(&goldfish_pipe_device);
643 dev->base = NULL;
644 return 0;
645}
646
647static const struct acpi_device_id goldfish_pipe_acpi_match[] = {
648 { "GFSH0003", 0 },
649 { },
650};
651MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match);
652
653static const struct of_device_id goldfish_pipe_of_match[] = {
654 { .compatible = "google,android-pipe", },
655 {},
656};
657MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match);
658
659static struct platform_driver goldfish_pipe = {
660 .probe = goldfish_pipe_probe,
661 .remove = goldfish_pipe_remove,
662 .driver = {
663 .name = "goldfish_pipe",
664 .owner = THIS_MODULE,
665 .of_match_table = goldfish_pipe_of_match,
666 .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match),
667 }
668};
669
670module_platform_driver(goldfish_pipe);
671MODULE_AUTHOR("David Turner <digit@google.com>");
672MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 Intel, Inc.
4 * Copyright (C) 2013 Intel, Inc.
5 * Copyright (C) 2014 Linaro Limited
6 * Copyright (C) 2011-2016 Google, Inc.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19/* This source file contains the implementation of a special device driver
20 * that intends to provide a *very* fast communication channel between the
21 * guest system and the QEMU emulator.
22 *
23 * Usage from the guest is simply the following (error handling simplified):
24 *
25 * int fd = open("/dev/qemu_pipe",O_RDWR);
26 * .... write() or read() through the pipe.
27 *
28 * This driver doesn't deal with the exact protocol used during the session.
29 * It is intended to be as simple as something like:
30 *
31 * // do this _just_ after opening the fd to connect to a specific
32 * // emulator service.
33 * const char* msg = "<pipename>";
34 * if (write(fd, msg, strlen(msg)+1) < 0) {
35 * ... could not connect to <pipename> service
36 * close(fd);
37 * }
38 *
39 * // after this, simply read() and write() to communicate with the
40 * // service. Exact protocol details left as an exercise to the reader.
41 *
42 * This driver is very fast because it doesn't copy any data through
43 * intermediate buffers, since the emulator is capable of translating
44 * guest user addresses into host ones.
45 *
46 * Note that we must however ensure that each user page involved in the
47 * exchange is properly mapped during a transfer.
48 */
49
50#include <linux/module.h>
51#include <linux/mod_devicetable.h>
52#include <linux/interrupt.h>
53#include <linux/kernel.h>
54#include <linux/spinlock.h>
55#include <linux/miscdevice.h>
56#include <linux/platform_device.h>
57#include <linux/poll.h>
58#include <linux/sched.h>
59#include <linux/bitops.h>
60#include <linux/slab.h>
61#include <linux/io.h>
62#include <linux/dma-mapping.h>
63#include <linux/mm.h>
64#include <linux/acpi.h>
65#include <linux/bug.h>
66#include "goldfish_pipe_qemu.h"
67
68/*
69 * Update this when something changes in the driver's behavior so the host
70 * can benefit from knowing it
71 */
72enum {
73 PIPE_DRIVER_VERSION = 2,
74 PIPE_CURRENT_DEVICE_VERSION = 2
75};
76
77enum {
78 MAX_BUFFERS_PER_COMMAND = 336,
79 MAX_SIGNALLED_PIPES = 64,
80 INITIAL_PIPES_CAPACITY = 64
81};
82
83struct goldfish_pipe_dev;
84
85/* A per-pipe command structure, shared with the host */
86struct goldfish_pipe_command {
87 s32 cmd; /* PipeCmdCode, guest -> host */
88 s32 id; /* pipe id, guest -> host */
89 s32 status; /* command execution status, host -> guest */
90 s32 reserved; /* to pad to 64-bit boundary */
91 union {
92 /* Parameters for PIPE_CMD_{READ,WRITE} */
93 struct {
94 /* number of buffers, guest -> host */
95 u32 buffers_count;
96 /* number of consumed bytes, host -> guest */
97 s32 consumed_size;
98 /* buffer pointers, guest -> host */
99 u64 ptrs[MAX_BUFFERS_PER_COMMAND];
100 /* buffer sizes, guest -> host */
101 u32 sizes[MAX_BUFFERS_PER_COMMAND];
102 } rw_params;
103 };
104};
105
106/* A single signalled pipe information */
107struct signalled_pipe_buffer {
108 u32 id;
109 u32 flags;
110};
111
112/* Parameters for the PIPE_CMD_OPEN command */
113struct open_command_param {
114 u64 command_buffer_ptr;
115 u32 rw_params_max_count;
116};
117
118/* Device-level set of buffers shared with the host */
119struct goldfish_pipe_dev_buffers {
120 struct open_command_param open_command_params;
121 struct signalled_pipe_buffer
122 signalled_pipe_buffers[MAX_SIGNALLED_PIPES];
123};
124
125/* This data type models a given pipe instance */
126struct goldfish_pipe {
127 /* pipe ID - index into goldfish_pipe_dev::pipes array */
128 u32 id;
129
130 /* The wake flags pipe is waiting for
131 * Note: not protected with any lock, uses atomic operations
132 * and barriers to make it thread-safe.
133 */
134 unsigned long flags;
135
136 /* wake flags host have signalled,
137 * - protected by goldfish_pipe_dev::lock
138 */
139 unsigned long signalled_flags;
140
141 /* A pointer to command buffer */
142 struct goldfish_pipe_command *command_buffer;
143
144 /* doubly linked list of signalled pipes, protected by
145 * goldfish_pipe_dev::lock
146 */
147 struct goldfish_pipe *prev_signalled;
148 struct goldfish_pipe *next_signalled;
149
150 /*
151 * A pipe's own lock. Protects the following:
152 * - *command_buffer - makes sure a command can safely write its
153 * parameters to the host and read the results back.
154 */
155 struct mutex lock;
156
157 /* A wake queue for sleeping until host signals an event */
158 wait_queue_head_t wake_queue;
159
160 /* Pointer to the parent goldfish_pipe_dev instance */
161 struct goldfish_pipe_dev *dev;
162
163 /* A buffer of pages, too large to fit into a stack frame */
164 struct page *pages[MAX_BUFFERS_PER_COMMAND];
165};
166
167/* The global driver data. Holds a reference to the i/o page used to
168 * communicate with the emulator, and a wake queue for blocked tasks
169 * waiting to be awoken.
170 */
171struct goldfish_pipe_dev {
172 /* A magic number to check if this is an instance of this struct */
173 void *magic;
174
175 /*
176 * Global device spinlock. Protects the following members:
177 * - pipes, pipes_capacity
178 * - [*pipes, *pipes + pipes_capacity) - array data
179 * - first_signalled_pipe,
180 * goldfish_pipe::prev_signalled,
181 * goldfish_pipe::next_signalled,
182 * goldfish_pipe::signalled_flags - all singnalled-related fields,
183 * in all allocated pipes
184 * - open_command_params - PIPE_CMD_OPEN-related buffers
185 *
186 * It looks like a lot of different fields, but the trick is that
187 * the only operation that happens often is the signalled pipes array
188 * manipulation. That's why it's OK for now to keep the rest of the
189 * fields under the same lock. If we notice too much contention because
190 * of PIPE_CMD_OPEN, then we should add a separate lock there.
191 */
192 spinlock_t lock;
193
194 /*
195 * Array of the pipes of |pipes_capacity| elements,
196 * indexed by goldfish_pipe::id
197 */
198 struct goldfish_pipe **pipes;
199 u32 pipes_capacity;
200
201 /* Pointers to the buffers host uses for interaction with this driver */
202 struct goldfish_pipe_dev_buffers *buffers;
203
204 /* Head of a doubly linked list of signalled pipes */
205 struct goldfish_pipe *first_signalled_pipe;
206
207 /* ptr to platform device's device struct */
208 struct device *pdev_dev;
209
210 /* Some device-specific data */
211 int irq;
212 int version;
213 unsigned char __iomem *base;
214
215 /* an irq tasklet to run goldfish_interrupt_task */
216 struct tasklet_struct irq_tasklet;
217
218 struct miscdevice miscdev;
219};
220
221static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe,
222 enum PipeCmdCode cmd)
223{
224 pipe->command_buffer->cmd = cmd;
225 /* failure by default */
226 pipe->command_buffer->status = PIPE_ERROR_INVAL;
227 writel(pipe->id, pipe->dev->base + PIPE_REG_CMD);
228 return pipe->command_buffer->status;
229}
230
231static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd)
232{
233 int status;
234
235 if (mutex_lock_interruptible(&pipe->lock))
236 return PIPE_ERROR_IO;
237 status = goldfish_pipe_cmd_locked(pipe, cmd);
238 mutex_unlock(&pipe->lock);
239 return status;
240}
241
242/*
243 * This function converts an error code returned by the emulator through
244 * the PIPE_REG_STATUS i/o register into a valid negative errno value.
245 */
246static int goldfish_pipe_error_convert(int status)
247{
248 switch (status) {
249 case PIPE_ERROR_AGAIN:
250 return -EAGAIN;
251 case PIPE_ERROR_NOMEM:
252 return -ENOMEM;
253 case PIPE_ERROR_IO:
254 return -EIO;
255 default:
256 return -EINVAL;
257 }
258}
259
260static int goldfish_pin_pages(unsigned long first_page,
261 unsigned long last_page,
262 unsigned int last_page_size,
263 int is_write,
264 struct page *pages[MAX_BUFFERS_PER_COMMAND],
265 unsigned int *iter_last_page_size)
266{
267 int ret;
268 int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1;
269
270 if (requested_pages > MAX_BUFFERS_PER_COMMAND) {
271 requested_pages = MAX_BUFFERS_PER_COMMAND;
272 *iter_last_page_size = PAGE_SIZE;
273 } else {
274 *iter_last_page_size = last_page_size;
275 }
276
277 ret = pin_user_pages_fast(first_page, requested_pages,
278 !is_write ? FOLL_WRITE : 0,
279 pages);
280 if (ret <= 0)
281 return -EFAULT;
282 if (ret < requested_pages)
283 *iter_last_page_size = PAGE_SIZE;
284
285 return ret;
286}
287
288/* Populate the call parameters, merging adjacent pages together */
289static void populate_rw_params(struct page **pages,
290 int pages_count,
291 unsigned long address,
292 unsigned long address_end,
293 unsigned long first_page,
294 unsigned long last_page,
295 unsigned int iter_last_page_size,
296 int is_write,
297 struct goldfish_pipe_command *command)
298{
299 /*
300 * Process the first page separately - it's the only page that
301 * needs special handling for its start address.
302 */
303 unsigned long xaddr = page_to_phys(pages[0]);
304 unsigned long xaddr_prev = xaddr;
305 int buffer_idx = 0;
306 int i = 1;
307 int size_on_page = first_page == last_page
308 ? (int)(address_end - address)
309 : (PAGE_SIZE - (address & ~PAGE_MASK));
310 command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK));
311 command->rw_params.sizes[0] = size_on_page;
312 for (; i < pages_count; ++i) {
313 xaddr = page_to_phys(pages[i]);
314 size_on_page = (i == pages_count - 1) ?
315 iter_last_page_size : PAGE_SIZE;
316 if (xaddr == xaddr_prev + PAGE_SIZE) {
317 command->rw_params.sizes[buffer_idx] += size_on_page;
318 } else {
319 ++buffer_idx;
320 command->rw_params.ptrs[buffer_idx] = (u64)xaddr;
321 command->rw_params.sizes[buffer_idx] = size_on_page;
322 }
323 xaddr_prev = xaddr;
324 }
325 command->rw_params.buffers_count = buffer_idx + 1;
326}
327
328static int transfer_max_buffers(struct goldfish_pipe *pipe,
329 unsigned long address,
330 unsigned long address_end,
331 int is_write,
332 unsigned long last_page,
333 unsigned int last_page_size,
334 s32 *consumed_size,
335 int *status)
336{
337 unsigned long first_page = address & PAGE_MASK;
338 unsigned int iter_last_page_size;
339 int pages_count;
340
341 /* Serialize access to the pipe command buffers */
342 if (mutex_lock_interruptible(&pipe->lock))
343 return -ERESTARTSYS;
344
345 pages_count = goldfish_pin_pages(first_page, last_page,
346 last_page_size, is_write,
347 pipe->pages, &iter_last_page_size);
348 if (pages_count < 0) {
349 mutex_unlock(&pipe->lock);
350 return pages_count;
351 }
352
353 populate_rw_params(pipe->pages, pages_count, address, address_end,
354 first_page, last_page, iter_last_page_size, is_write,
355 pipe->command_buffer);
356
357 /* Transfer the data */
358 *status = goldfish_pipe_cmd_locked(pipe,
359 is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ);
360
361 *consumed_size = pipe->command_buffer->rw_params.consumed_size;
362
363 unpin_user_pages_dirty_lock(pipe->pages, pages_count,
364 !is_write && *consumed_size > 0);
365
366 mutex_unlock(&pipe->lock);
367 return 0;
368}
369
370static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write)
371{
372 u32 wake_bit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ;
373
374 set_bit(wake_bit, &pipe->flags);
375
376 /* Tell the emulator we're going to wait for a wake event */
377 goldfish_pipe_cmd(pipe,
378 is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ);
379
380 while (test_bit(wake_bit, &pipe->flags)) {
381 if (wait_event_interruptible(pipe->wake_queue,
382 !test_bit(wake_bit, &pipe->flags)))
383 return -ERESTARTSYS;
384
385 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
386 return -EIO;
387 }
388
389 return 0;
390}
391
392static ssize_t goldfish_pipe_read_write(struct file *filp,
393 char __user *buffer,
394 size_t bufflen,
395 int is_write)
396{
397 struct goldfish_pipe *pipe = filp->private_data;
398 int count = 0, ret = -EINVAL;
399 unsigned long address, address_end, last_page;
400 unsigned int last_page_size;
401
402 /* If the emulator already closed the pipe, no need to go further */
403 if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)))
404 return -EIO;
405 /* Null reads or writes succeeds */
406 if (unlikely(bufflen == 0))
407 return 0;
408 /* Check the buffer range for access */
409 if (unlikely(!access_ok(buffer, bufflen)))
410 return -EFAULT;
411
412 address = (unsigned long)buffer;
413 address_end = address + bufflen;
414 last_page = (address_end - 1) & PAGE_MASK;
415 last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1;
416
417 while (address < address_end) {
418 s32 consumed_size;
419 int status;
420
421 ret = transfer_max_buffers(pipe, address, address_end, is_write,
422 last_page, last_page_size,
423 &consumed_size, &status);
424 if (ret < 0)
425 break;
426
427 if (consumed_size > 0) {
428 /* No matter what's the status, we've transferred
429 * something.
430 */
431 count += consumed_size;
432 address += consumed_size;
433 }
434 if (status > 0)
435 continue;
436 if (status == 0) {
437 /* EOF */
438 ret = 0;
439 break;
440 }
441 if (count > 0) {
442 /*
443 * An error occurred, but we already transferred
444 * something on one of the previous iterations.
445 * Just return what we already copied and log this
446 * err.
447 */
448 if (status != PIPE_ERROR_AGAIN)
449 dev_err_ratelimited(pipe->dev->pdev_dev,
450 "backend error %d on %s\n",
451 status, is_write ? "write" : "read");
452 break;
453 }
454
455 /*
456 * If the error is not PIPE_ERROR_AGAIN, or if we are in
457 * non-blocking mode, just return the error code.
458 */
459 if (status != PIPE_ERROR_AGAIN ||
460 (filp->f_flags & O_NONBLOCK) != 0) {
461 ret = goldfish_pipe_error_convert(status);
462 break;
463 }
464
465 status = wait_for_host_signal(pipe, is_write);
466 if (status < 0)
467 return status;
468 }
469
470 if (count > 0)
471 return count;
472 return ret;
473}
474
475static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer,
476 size_t bufflen, loff_t *ppos)
477{
478 return goldfish_pipe_read_write(filp, buffer, bufflen,
479 /* is_write */ 0);
480}
481
482static ssize_t goldfish_pipe_write(struct file *filp,
483 const char __user *buffer, size_t bufflen,
484 loff_t *ppos)
485{
486 /* cast away the const */
487 char __user *no_const_buffer = (char __user *)buffer;
488
489 return goldfish_pipe_read_write(filp, no_const_buffer, bufflen,
490 /* is_write */ 1);
491}
492
493static __poll_t goldfish_pipe_poll(struct file *filp, poll_table *wait)
494{
495 struct goldfish_pipe *pipe = filp->private_data;
496 __poll_t mask = 0;
497 int status;
498
499 poll_wait(filp, &pipe->wake_queue, wait);
500
501 status = goldfish_pipe_cmd(pipe, PIPE_CMD_POLL);
502 if (status < 0)
503 return -ERESTARTSYS;
504
505 if (status & PIPE_POLL_IN)
506 mask |= EPOLLIN | EPOLLRDNORM;
507 if (status & PIPE_POLL_OUT)
508 mask |= EPOLLOUT | EPOLLWRNORM;
509 if (status & PIPE_POLL_HUP)
510 mask |= EPOLLHUP;
511 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))
512 mask |= EPOLLERR;
513
514 return mask;
515}
516
517static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev,
518 u32 id, u32 flags)
519{
520 struct goldfish_pipe *pipe;
521
522 if (WARN_ON(id >= dev->pipes_capacity))
523 return;
524
525 pipe = dev->pipes[id];
526 if (!pipe)
527 return;
528 pipe->signalled_flags |= flags;
529
530 if (pipe->prev_signalled || pipe->next_signalled ||
531 dev->first_signalled_pipe == pipe)
532 return; /* already in the list */
533 pipe->next_signalled = dev->first_signalled_pipe;
534 if (dev->first_signalled_pipe)
535 dev->first_signalled_pipe->prev_signalled = pipe;
536 dev->first_signalled_pipe = pipe;
537}
538
539static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev,
540 struct goldfish_pipe *pipe)
541{
542 if (pipe->prev_signalled)
543 pipe->prev_signalled->next_signalled = pipe->next_signalled;
544 if (pipe->next_signalled)
545 pipe->next_signalled->prev_signalled = pipe->prev_signalled;
546 if (pipe == dev->first_signalled_pipe)
547 dev->first_signalled_pipe = pipe->next_signalled;
548 pipe->prev_signalled = NULL;
549 pipe->next_signalled = NULL;
550}
551
552static struct goldfish_pipe *signalled_pipes_pop_front(
553 struct goldfish_pipe_dev *dev, int *wakes)
554{
555 struct goldfish_pipe *pipe;
556 unsigned long flags;
557
558 spin_lock_irqsave(&dev->lock, flags);
559
560 pipe = dev->first_signalled_pipe;
561 if (pipe) {
562 *wakes = pipe->signalled_flags;
563 pipe->signalled_flags = 0;
564 /*
565 * This is an optimized version of
566 * signalled_pipes_remove_locked()
567 * - We want to make it as fast as possible to
568 * wake the sleeping pipe operations faster.
569 */
570 dev->first_signalled_pipe = pipe->next_signalled;
571 if (dev->first_signalled_pipe)
572 dev->first_signalled_pipe->prev_signalled = NULL;
573 pipe->next_signalled = NULL;
574 }
575
576 spin_unlock_irqrestore(&dev->lock, flags);
577 return pipe;
578}
579
580static void goldfish_interrupt_task(unsigned long dev_addr)
581{
582 /* Iterate over the signalled pipes and wake them one by one */
583 struct goldfish_pipe_dev *dev = (struct goldfish_pipe_dev *)dev_addr;
584 struct goldfish_pipe *pipe;
585 int wakes;
586
587 while ((pipe = signalled_pipes_pop_front(dev, &wakes)) != NULL) {
588 if (wakes & PIPE_WAKE_CLOSED) {
589 pipe->flags = 1 << BIT_CLOSED_ON_HOST;
590 } else {
591 if (wakes & PIPE_WAKE_READ)
592 clear_bit(BIT_WAKE_ON_READ, &pipe->flags);
593 if (wakes & PIPE_WAKE_WRITE)
594 clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags);
595 }
596 /*
597 * wake_up_interruptible() implies a write barrier, so don't
598 * explicitly add another one here.
599 */
600 wake_up_interruptible(&pipe->wake_queue);
601 }
602}
603
604static void goldfish_pipe_device_deinit(struct platform_device *pdev,
605 struct goldfish_pipe_dev *dev);
606
607/*
608 * The general idea of the interrupt handling:
609 *
610 * 1. device raises an interrupt if there's at least one signalled pipe
611 * 2. IRQ handler reads the signalled pipes and their count from the device
612 * 3. device writes them into a shared buffer and returns the count
613 * it only resets the IRQ if it has returned all signalled pipes,
614 * otherwise it leaves it raised, so IRQ handler will be called
615 * again for the next chunk
616 * 4. IRQ handler adds all returned pipes to the device's signalled pipes list
617 * 5. IRQ handler launches a tasklet to process the signalled pipes from the
618 * list in a separate context
619 */
620static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
621{
622 u32 count;
623 u32 i;
624 unsigned long flags;
625 struct goldfish_pipe_dev *dev = dev_id;
626
627 if (dev->magic != &goldfish_pipe_device_deinit)
628 return IRQ_NONE;
629
630 /* Request the signalled pipes from the device */
631 spin_lock_irqsave(&dev->lock, flags);
632
633 count = readl(dev->base + PIPE_REG_GET_SIGNALLED);
634 if (count == 0) {
635 spin_unlock_irqrestore(&dev->lock, flags);
636 return IRQ_NONE;
637 }
638 if (count > MAX_SIGNALLED_PIPES)
639 count = MAX_SIGNALLED_PIPES;
640
641 for (i = 0; i < count; ++i)
642 signalled_pipes_add_locked(dev,
643 dev->buffers->signalled_pipe_buffers[i].id,
644 dev->buffers->signalled_pipe_buffers[i].flags);
645
646 spin_unlock_irqrestore(&dev->lock, flags);
647
648 tasklet_schedule(&dev->irq_tasklet);
649 return IRQ_HANDLED;
650}
651
652static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev)
653{
654 int id;
655
656 for (id = 0; id < dev->pipes_capacity; ++id)
657 if (!dev->pipes[id])
658 return id;
659
660 {
661 /* Reallocate the array.
662 * Since get_free_pipe_id_locked runs with interrupts disabled,
663 * we don't want to make calls that could lead to sleep.
664 */
665 u32 new_capacity = 2 * dev->pipes_capacity;
666 struct goldfish_pipe **pipes =
667 kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC);
668 if (!pipes)
669 return -ENOMEM;
670 memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity);
671 kfree(dev->pipes);
672 dev->pipes = pipes;
673 id = dev->pipes_capacity;
674 dev->pipes_capacity = new_capacity;
675 }
676 return id;
677}
678
679/* A helper function to get the instance of goldfish_pipe_dev from file */
680static struct goldfish_pipe_dev *to_goldfish_pipe_dev(struct file *file)
681{
682 struct miscdevice *miscdev = file->private_data;
683
684 return container_of(miscdev, struct goldfish_pipe_dev, miscdev);
685}
686
687/**
688 * goldfish_pipe_open - open a channel to the AVD
689 * @inode: inode of device
690 * @file: file struct of opener
691 *
692 * Create a new pipe link between the emulator and the use application.
693 * Each new request produces a new pipe.
694 *
695 * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit
696 * right now so this is fine. A move to 64bit will need this addressing
697 */
698static int goldfish_pipe_open(struct inode *inode, struct file *file)
699{
700 struct goldfish_pipe_dev *dev = to_goldfish_pipe_dev(file);
701 unsigned long flags;
702 int id;
703 int status;
704
705 /* Allocate new pipe kernel object */
706 struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL);
707
708 if (!pipe)
709 return -ENOMEM;
710
711 pipe->dev = dev;
712 mutex_init(&pipe->lock);
713 init_waitqueue_head(&pipe->wake_queue);
714
715 /*
716 * Command buffer needs to be allocated on its own page to make sure
717 * it is physically contiguous in host's address space.
718 */
719 BUILD_BUG_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE);
720 pipe->command_buffer =
721 (struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL);
722 if (!pipe->command_buffer) {
723 status = -ENOMEM;
724 goto err_pipe;
725 }
726
727 spin_lock_irqsave(&dev->lock, flags);
728
729 id = get_free_pipe_id_locked(dev);
730 if (id < 0) {
731 status = id;
732 goto err_id_locked;
733 }
734
735 dev->pipes[id] = pipe;
736 pipe->id = id;
737 pipe->command_buffer->id = id;
738
739 /* Now tell the emulator we're opening a new pipe. */
740 dev->buffers->open_command_params.rw_params_max_count =
741 MAX_BUFFERS_PER_COMMAND;
742 dev->buffers->open_command_params.command_buffer_ptr =
743 (u64)(unsigned long)__pa(pipe->command_buffer);
744 status = goldfish_pipe_cmd_locked(pipe, PIPE_CMD_OPEN);
745 spin_unlock_irqrestore(&dev->lock, flags);
746 if (status < 0)
747 goto err_cmd;
748 /* All is done, save the pipe into the file's private data field */
749 file->private_data = pipe;
750 return 0;
751
752err_cmd:
753 spin_lock_irqsave(&dev->lock, flags);
754 dev->pipes[id] = NULL;
755err_id_locked:
756 spin_unlock_irqrestore(&dev->lock, flags);
757 free_page((unsigned long)pipe->command_buffer);
758err_pipe:
759 kfree(pipe);
760 return status;
761}
762
763static int goldfish_pipe_release(struct inode *inode, struct file *filp)
764{
765 unsigned long flags;
766 struct goldfish_pipe *pipe = filp->private_data;
767 struct goldfish_pipe_dev *dev = pipe->dev;
768
769 /* The guest is closing the channel, so tell the emulator right now */
770 goldfish_pipe_cmd(pipe, PIPE_CMD_CLOSE);
771
772 spin_lock_irqsave(&dev->lock, flags);
773 dev->pipes[pipe->id] = NULL;
774 signalled_pipes_remove_locked(dev, pipe);
775 spin_unlock_irqrestore(&dev->lock, flags);
776
777 filp->private_data = NULL;
778 free_page((unsigned long)pipe->command_buffer);
779 kfree(pipe);
780 return 0;
781}
782
783static const struct file_operations goldfish_pipe_fops = {
784 .owner = THIS_MODULE,
785 .read = goldfish_pipe_read,
786 .write = goldfish_pipe_write,
787 .poll = goldfish_pipe_poll,
788 .open = goldfish_pipe_open,
789 .release = goldfish_pipe_release,
790};
791
792static void init_miscdevice(struct miscdevice *miscdev)
793{
794 memset(miscdev, 0, sizeof(*miscdev));
795
796 miscdev->minor = MISC_DYNAMIC_MINOR;
797 miscdev->name = "goldfish_pipe";
798 miscdev->fops = &goldfish_pipe_fops;
799}
800
801static void write_pa_addr(void *addr, void __iomem *portl, void __iomem *porth)
802{
803 const unsigned long paddr = __pa(addr);
804
805 writel(upper_32_bits(paddr), porth);
806 writel(lower_32_bits(paddr), portl);
807}
808
809static int goldfish_pipe_device_init(struct platform_device *pdev,
810 struct goldfish_pipe_dev *dev)
811{
812 int err;
813
814 tasklet_init(&dev->irq_tasklet, &goldfish_interrupt_task,
815 (unsigned long)dev);
816
817 err = devm_request_irq(&pdev->dev, dev->irq,
818 goldfish_pipe_interrupt,
819 IRQF_SHARED, "goldfish_pipe", dev);
820 if (err) {
821 dev_err(&pdev->dev, "unable to allocate IRQ for v2\n");
822 return err;
823 }
824
825 init_miscdevice(&dev->miscdev);
826 err = misc_register(&dev->miscdev);
827 if (err) {
828 dev_err(&pdev->dev, "unable to register v2 device\n");
829 return err;
830 }
831
832 dev->pdev_dev = &pdev->dev;
833 dev->first_signalled_pipe = NULL;
834 dev->pipes_capacity = INITIAL_PIPES_CAPACITY;
835 dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes),
836 GFP_KERNEL);
837 if (!dev->pipes) {
838 misc_deregister(&dev->miscdev);
839 return -ENOMEM;
840 }
841
842 /*
843 * We're going to pass two buffers, open_command_params and
844 * signalled_pipe_buffers, to the host. This means each of those buffers
845 * needs to be contained in a single physical page. The easiest choice
846 * is to just allocate a page and place the buffers in it.
847 */
848 BUILD_BUG_ON(sizeof(struct goldfish_pipe_dev_buffers) > PAGE_SIZE);
849 dev->buffers = (struct goldfish_pipe_dev_buffers *)
850 __get_free_page(GFP_KERNEL);
851 if (!dev->buffers) {
852 kfree(dev->pipes);
853 misc_deregister(&dev->miscdev);
854 return -ENOMEM;
855 }
856
857 /* Send the buffer addresses to the host */
858 write_pa_addr(&dev->buffers->signalled_pipe_buffers,
859 dev->base + PIPE_REG_SIGNAL_BUFFER,
860 dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH);
861
862 writel(MAX_SIGNALLED_PIPES,
863 dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT);
864
865 write_pa_addr(&dev->buffers->open_command_params,
866 dev->base + PIPE_REG_OPEN_BUFFER,
867 dev->base + PIPE_REG_OPEN_BUFFER_HIGH);
868
869 platform_set_drvdata(pdev, dev);
870 return 0;
871}
872
873static void goldfish_pipe_device_deinit(struct platform_device *pdev,
874 struct goldfish_pipe_dev *dev)
875{
876 misc_deregister(&dev->miscdev);
877 tasklet_kill(&dev->irq_tasklet);
878 kfree(dev->pipes);
879 free_page((unsigned long)dev->buffers);
880}
881
882static int goldfish_pipe_probe(struct platform_device *pdev)
883{
884 struct resource *r;
885 struct goldfish_pipe_dev *dev;
886
887 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
888 if (!dev)
889 return -ENOMEM;
890
891 dev->magic = &goldfish_pipe_device_deinit;
892 spin_lock_init(&dev->lock);
893
894 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
895 if (!r || resource_size(r) < PAGE_SIZE) {
896 dev_err(&pdev->dev, "can't allocate i/o page\n");
897 return -EINVAL;
898 }
899 dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
900 if (!dev->base) {
901 dev_err(&pdev->dev, "ioremap failed\n");
902 return -EINVAL;
903 }
904
905 r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
906 if (!r)
907 return -EINVAL;
908
909 dev->irq = r->start;
910
911 /*
912 * Exchange the versions with the host device
913 *
914 * Note: v1 driver used to not report its version, so we write it before
915 * reading device version back: this allows the host implementation to
916 * detect the old driver (if there was no version write before read).
917 */
918 writel(PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION);
919 dev->version = readl(dev->base + PIPE_REG_VERSION);
920 if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION))
921 return -EINVAL;
922
923 return goldfish_pipe_device_init(pdev, dev);
924}
925
926static int goldfish_pipe_remove(struct platform_device *pdev)
927{
928 struct goldfish_pipe_dev *dev = platform_get_drvdata(pdev);
929
930 goldfish_pipe_device_deinit(pdev, dev);
931 return 0;
932}
933
934static const struct acpi_device_id goldfish_pipe_acpi_match[] = {
935 { "GFSH0003", 0 },
936 { },
937};
938MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match);
939
940static const struct of_device_id goldfish_pipe_of_match[] = {
941 { .compatible = "google,android-pipe", },
942 {},
943};
944MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match);
945
946static struct platform_driver goldfish_pipe_driver = {
947 .probe = goldfish_pipe_probe,
948 .remove = goldfish_pipe_remove,
949 .driver = {
950 .name = "goldfish_pipe",
951 .of_match_table = goldfish_pipe_of_match,
952 .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match),
953 }
954};
955
956module_platform_driver(goldfish_pipe_driver);
957MODULE_AUTHOR("David Turner <digit@google.com>");
958MODULE_LICENSE("GPL v2");