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1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS :=
22EXTRA_CFLAGS :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS :=
25asflags-y :=
26ccflags-y :=
27cppflags-y :=
28ldflags-y :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48 ifneq ("$(save-cflags)","$(CFLAGS)")
49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
50 endif
51endif
52
53include scripts/Makefile.lib
54
55ifdef host-progs
56ifneq ($(hostprogs-y),$(host-progs))
57$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
58hostprogs-y += $(host-progs)
59endif
60endif
61
62# Do not include host rules unless needed
63ifneq ($(hostprogs-y)$(hostprogs-m),)
64include scripts/Makefile.host
65endif
66
67ifneq ($(KBUILD_SRC),)
68# Create output directory if not already present
69_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
70
71# Create directories for object files if directory does not exist
72# Needed when obj-y := dir/file.o syntax is used
73_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
74endif
75
76ifndef obj
77$(warning kbuild: Makefile.build is included improperly)
78endif
79
80# ===========================================================================
81
82ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
83lib-target := $(obj)/lib.a
84endif
85
86ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
87builtin-target := $(obj)/built-in.o
88endif
89
90modorder-target := $(obj)/modules.order
91
92# We keep a list of all modules in $(MODVERDIR)
93
94__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
95 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
96 $(subdir-ym) $(always)
97 @:
98
99# Linus' kernel sanity checking tool
100ifneq ($(KBUILD_CHECKSRC),0)
101 ifeq ($(KBUILD_CHECKSRC),2)
102 quiet_cmd_force_checksrc = CHECK $<
103 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
104 else
105 quiet_cmd_checksrc = CHECK $<
106 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
107 endif
108endif
109
110# Do section mismatch analysis for each module/built-in.o
111ifdef CONFIG_DEBUG_SECTION_MISMATCH
112 cmd_secanalysis = ; scripts/mod/modpost $@
113endif
114
115# Compile C sources (.c)
116# ---------------------------------------------------------------------------
117
118# Default is built-in, unless we know otherwise
119modkern_cflags = \
120 $(if $(part-of-module), \
121 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
122 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
123quiet_modtag := $(empty) $(empty)
124
125$(real-objs-m) : part-of-module := y
126$(real-objs-m:.o=.i) : part-of-module := y
127$(real-objs-m:.o=.s) : part-of-module := y
128$(real-objs-m:.o=.lst): part-of-module := y
129
130$(real-objs-m) : quiet_modtag := [M]
131$(real-objs-m:.o=.i) : quiet_modtag := [M]
132$(real-objs-m:.o=.s) : quiet_modtag := [M]
133$(real-objs-m:.o=.lst): quiet_modtag := [M]
134
135$(obj-m) : quiet_modtag := [M]
136
137# Default for not multi-part modules
138modname = $(basetarget)
139
140$(multi-objs-m) : modname = $(modname-multi)
141$(multi-objs-m:.o=.i) : modname = $(modname-multi)
142$(multi-objs-m:.o=.s) : modname = $(modname-multi)
143$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
144$(multi-objs-y) : modname = $(modname-multi)
145$(multi-objs-y:.o=.i) : modname = $(modname-multi)
146$(multi-objs-y:.o=.s) : modname = $(modname-multi)
147$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
148
149quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
150cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
151
152$(obj)/%.s: $(src)/%.c FORCE
153 $(call if_changed_dep,cc_s_c)
154
155quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
156cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
157
158$(obj)/%.i: $(src)/%.c FORCE
159 $(call if_changed_dep,cc_i_c)
160
161cmd_gensymtypes = \
162 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
163 $(GENKSYMS) $(if $(1), -T $(2)) \
164 $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
165 $(if $(KBUILD_PRESERVE),-p) \
166 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
167
168quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
169cmd_cc_symtypes_c = \
170 set -e; \
171 $(call cmd_gensymtypes,true,$@) >/dev/null; \
172 test -s $@ || rm -f $@
173
174$(obj)/%.symtypes : $(src)/%.c FORCE
175 $(call cmd,cc_symtypes_c)
176
177# C (.c) files
178# The C file is compiled and updated dependency information is generated.
179# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
180
181quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
182
183ifndef CONFIG_MODVERSIONS
184cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
185
186else
187# When module versioning is enabled the following steps are executed:
188# o compile a .tmp_<file>.o from <file>.c
189# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
190# not export symbols, we just rename .tmp_<file>.o to <file>.o and
191# are done.
192# o otherwise, we calculate symbol versions using the good old
193# genksyms on the preprocessed source and postprocess them in a way
194# that they are usable as a linker script
195# o generate <file>.o from .tmp_<file>.o using the linker to
196# replace the unresolved symbols __crc_exported_symbol with
197# the actual value of the checksum generated by genksyms
198
199cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
200cmd_modversions = \
201 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
202 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
203 > $(@D)/.tmp_$(@F:.o=.ver); \
204 \
205 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
206 -T $(@D)/.tmp_$(@F:.o=.ver); \
207 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
208 else \
209 mv -f $(@D)/.tmp_$(@F) $@; \
210 fi;
211endif
212
213ifdef CONFIG_FTRACE_MCOUNT_RECORD
214ifdef BUILD_C_RECORDMCOUNT
215ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
216 RECORDMCOUNT_FLAGS = -w
217endif
218# Due to recursion, we must skip empty.o.
219# The empty.o file is created in the make process in order to determine
220# the target endianness and word size. It is made before all other C
221# files, including recordmcount.
222sub_cmd_record_mcount = \
223 if [ $(@) != "scripts/mod/empty.o" ]; then \
224 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
225 fi;
226recordmcount_source := $(srctree)/scripts/recordmcount.c \
227 $(srctree)/scripts/recordmcount.h
228else
229sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
230 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
231 "$(if $(CONFIG_64BIT),64,32)" \
232 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
233 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
234 "$(if $(part-of-module),1,0)" "$(@)";
235recordmcount_source := $(srctree)/scripts/recordmcount.pl
236endif
237cmd_record_mcount = \
238 if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
239 "$(CC_FLAGS_FTRACE)" ]; then \
240 $(sub_cmd_record_mcount) \
241 fi;
242endif
243
244ifdef CONFIG_STACK_VALIDATION
245ifneq ($(SKIP_STACK_VALIDATION),1)
246
247__objtool_obj := $(objtree)/tools/objtool/objtool
248
249objtool_args = check
250ifndef CONFIG_FRAME_POINTER
251objtool_args += --no-fp
252endif
253
254# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
255# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
256# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
257cmd_objtool = $(if $(patsubst y%,, \
258 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
259 $(__objtool_obj) $(objtool_args) "$(@)";)
260objtool_obj = $(if $(patsubst y%,, \
261 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
262 $(__objtool_obj))
263
264endif # SKIP_STACK_VALIDATION
265endif # CONFIG_STACK_VALIDATION
266
267define rule_cc_o_c
268 $(call echo-cmd,checksrc) $(cmd_checksrc) \
269 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
270 $(cmd_modversions) \
271 $(cmd_objtool) \
272 $(call echo-cmd,record_mcount) \
273 $(cmd_record_mcount) \
274 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
275 $(dot-target).tmp; \
276 rm -f $(depfile); \
277 mv -f $(dot-target).tmp $(dot-target).cmd
278endef
279
280define rule_as_o_S
281 $(call echo-cmd,as_o_S) $(cmd_as_o_S); \
282 $(cmd_objtool) \
283 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,as_o_S)' > \
284 $(dot-target).tmp; \
285 rm -f $(depfile); \
286 mv -f $(dot-target).tmp $(dot-target).cmd
287endef
288
289# Built-in and composite module parts
290$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
291 $(call cmd,force_checksrc)
292 $(call if_changed_rule,cc_o_c)
293
294# Single-part modules are special since we need to mark them in $(MODVERDIR)
295
296$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
297 $(call cmd,force_checksrc)
298 $(call if_changed_rule,cc_o_c)
299 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
300
301quiet_cmd_cc_lst_c = MKLST $@
302 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
303 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
304 System.map $(OBJDUMP) > $@
305
306$(obj)/%.lst: $(src)/%.c FORCE
307 $(call if_changed_dep,cc_lst_c)
308
309# Compile assembler sources (.S)
310# ---------------------------------------------------------------------------
311
312modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
313
314$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
315$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
316
317quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
318cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
319
320$(obj)/%.s: $(src)/%.S FORCE
321 $(call if_changed_dep,as_s_S)
322
323quiet_cmd_as_o_S = AS $(quiet_modtag) $@
324cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
325
326$(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE
327 $(call if_changed_rule,as_o_S)
328
329targets += $(real-objs-y) $(real-objs-m) $(lib-y)
330targets += $(extra-y) $(MAKECMDGOALS) $(always)
331
332# Linker scripts preprocessor (.lds.S -> .lds)
333# ---------------------------------------------------------------------------
334quiet_cmd_cpp_lds_S = LDS $@
335 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
336 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
337
338$(obj)/%.lds: $(src)/%.lds.S FORCE
339 $(call if_changed_dep,cpp_lds_S)
340
341# ASN.1 grammar
342# ---------------------------------------------------------------------------
343quiet_cmd_asn1_compiler = ASN.1 $@
344 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
345 $(subst .h,.c,$@) $(subst .c,.h,$@)
346
347.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
348
349$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
350 $(call cmd,asn1_compiler)
351
352# Build the compiled-in targets
353# ---------------------------------------------------------------------------
354
355# To build objects in subdirs, we need to descend into the directories
356$(sort $(subdir-obj-y)): $(subdir-ym) ;
357
358#
359# Rule to compile a set of .o files into one .o file
360#
361ifdef builtin-target
362quiet_cmd_link_o_target = LD $@
363# If the list of objects to link is empty, just create an empty built-in.o
364cmd_link_o_target = $(if $(strip $(obj-y)),\
365 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
366 $(cmd_secanalysis),\
367 rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
368
369$(builtin-target): $(obj-y) FORCE
370 $(call if_changed,link_o_target)
371
372targets += $(builtin-target)
373endif # builtin-target
374
375#
376# Rule to create modules.order file
377#
378# Create commands to either record .ko file or cat modules.order from
379# a subdirectory
380modorder-cmds = \
381 $(foreach m, $(modorder), \
382 $(if $(filter %/modules.order, $m), \
383 cat $m;, echo kernel/$m;))
384
385$(modorder-target): $(subdir-ym) FORCE
386 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
387
388#
389# Rule to compile a set of .o files into one .a file
390#
391ifdef lib-target
392quiet_cmd_link_l_target = AR $@
393cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
394
395$(lib-target): $(lib-y) FORCE
396 $(call if_changed,link_l_target)
397
398targets += $(lib-target)
399endif
400
401#
402# Rule to link composite objects
403#
404# Composite objects are specified in kbuild makefile as follows:
405# <composite-object>-objs := <list of .o files>
406# or
407# <composite-object>-y := <list of .o files>
408# or
409# <composite-object>-m := <list of .o files>
410# The -m syntax only works if <composite object> is a module
411link_multi_deps = \
412$(filter $(addprefix $(obj)/, \
413$($(subst $(obj)/,,$(@:.o=-objs))) \
414$($(subst $(obj)/,,$(@:.o=-y))) \
415$($(subst $(obj)/,,$(@:.o=-m)))), $^)
416
417quiet_cmd_link_multi-y = LD $@
418cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
419
420quiet_cmd_link_multi-m = LD [M] $@
421cmd_link_multi-m = $(cmd_link_multi-y)
422
423$(multi-used-y): FORCE
424 $(call if_changed,link_multi-y)
425$(call multi_depend, $(multi-used-y), .o, -objs -y)
426
427$(multi-used-m): FORCE
428 $(call if_changed,link_multi-m)
429 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
430$(call multi_depend, $(multi-used-m), .o, -objs -y -m)
431
432targets += $(multi-used-y) $(multi-used-m)
433
434
435# Descending
436# ---------------------------------------------------------------------------
437
438PHONY += $(subdir-ym)
439$(subdir-ym):
440 $(Q)$(MAKE) $(build)=$@
441
442# Add FORCE to the prequisites of a target to force it to be always rebuilt.
443# ---------------------------------------------------------------------------
444
445PHONY += FORCE
446
447FORCE:
448
449# Read all saved command lines and dependencies for the $(targets) we
450# may be building above, using $(if_changed{,_dep}). As an
451# optimization, we don't need to read them if the target does not
452# exist, we will rebuild anyway in that case.
453
454targets := $(wildcard $(sort $(targets)))
455cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
456
457ifneq ($(cmd_files),)
458 include $(cmd_files)
459endif
460
461# Declare the contents of the .PHONY variable as phony. We keep that
462# information in a variable se we can use it in if_changed and friends.
463
464.PHONY: $(PHONY)
1# SPDX-License-Identifier: GPL-2.0
2# ==========================================================================
3# Building
4# ==========================================================================
5
6src := $(obj)
7
8PHONY := __build
9__build:
10
11# Init all relevant variables used in kbuild files so
12# 1) they have correct type
13# 2) they do not inherit any value from the environment
14obj-y :=
15obj-m :=
16lib-y :=
17lib-m :=
18always :=
19targets :=
20subdir-y :=
21subdir-m :=
22EXTRA_AFLAGS :=
23EXTRA_CFLAGS :=
24EXTRA_CPPFLAGS :=
25EXTRA_LDFLAGS :=
26asflags-y :=
27ccflags-y :=
28cppflags-y :=
29ldflags-y :=
30
31subdir-asflags-y :=
32subdir-ccflags-y :=
33
34# Read auto.conf if it exists, otherwise ignore
35-include include/config/auto.conf
36
37include scripts/Kbuild.include
38
39# The filename Kbuild has precedence over Makefile
40kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
41kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
42include $(kbuild-file)
43
44include scripts/Makefile.lib
45
46# Do not include host rules unless needed
47ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
48include scripts/Makefile.host
49endif
50
51ifndef obj
52$(warning kbuild: Makefile.build is included improperly)
53endif
54
55ifeq ($(need-modorder),)
56ifneq ($(obj-m),)
57$(warning $(patsubst %.o,'%.ko',$(obj-m)) will not be built even though obj-m is specified.)
58$(warning You cannot use subdir-y/m to visit a module Makefile. Use obj-y/m instead.)
59endif
60endif
61
62# ===========================================================================
63
64ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
65lib-target := $(obj)/lib.a
66real-obj-y += $(obj)/lib-ksyms.o
67endif
68
69ifneq ($(strip $(real-obj-y) $(need-builtin)),)
70builtin-target := $(obj)/built-in.a
71endif
72
73ifeq ($(CONFIG_MODULES)$(need-modorder),y1)
74modorder-target := $(obj)/modules.order
75endif
76
77mod-targets := $(patsubst %.o, %.mod, $(obj-m))
78
79# Linus' kernel sanity checking tool
80ifeq ($(KBUILD_CHECKSRC),1)
81 quiet_cmd_checksrc = CHECK $<
82 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $<
83else ifeq ($(KBUILD_CHECKSRC),2)
84 quiet_cmd_force_checksrc = CHECK $<
85 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $<
86endif
87
88ifneq ($(KBUILD_EXTRA_WARN),)
89 cmd_checkdoc = $(srctree)/scripts/kernel-doc -none $<
90endif
91
92# Compile C sources (.c)
93# ---------------------------------------------------------------------------
94
95quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
96 cmd_cc_s_c = $(CC) $(filter-out $(DEBUG_CFLAGS), $(c_flags)) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
97
98$(obj)/%.s: $(src)/%.c FORCE
99 $(call if_changed_dep,cc_s_c)
100
101quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@
102cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $<
103
104$(obj)/%.i: $(src)/%.c FORCE
105 $(call if_changed_dep,cpp_i_c)
106
107# These mirror gensymtypes_S and co below, keep them in synch.
108cmd_gensymtypes_c = \
109 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
110 scripts/genksyms/genksyms $(if $(1), -T $(2)) \
111 $(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS)) \
112 $(if $(KBUILD_PRESERVE),-p) \
113 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
114
115quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
116cmd_cc_symtypes_c = \
117 $(call cmd_gensymtypes_c,true,$@) >/dev/null; \
118 test -s $@ || rm -f $@
119
120$(obj)/%.symtypes : $(src)/%.c FORCE
121 $(call cmd,cc_symtypes_c)
122
123# LLVM assembly
124# Generate .ll files from .c
125quiet_cmd_cc_ll_c = CC $(quiet_modtag) $@
126 cmd_cc_ll_c = $(CC) $(c_flags) -emit-llvm -S -o $@ $<
127
128$(obj)/%.ll: $(src)/%.c FORCE
129 $(call if_changed_dep,cc_ll_c)
130
131# C (.c) files
132# The C file is compiled and updated dependency information is generated.
133# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
134
135quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
136 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
137
138ifdef CONFIG_MODVERSIONS
139# When module versioning is enabled the following steps are executed:
140# o compile a <file>.o from <file>.c
141# o if <file>.o doesn't contain a __ksymtab version, i.e. does
142# not export symbols, it's done.
143# o otherwise, we calculate symbol versions using the good old
144# genksyms on the preprocessed source and postprocess them in a way
145# that they are usable as a linker script
146# o generate .tmp_<file>.o from <file>.o using the linker to
147# replace the unresolved symbols __crc_exported_symbol with
148# the actual value of the checksum generated by genksyms
149# o remove .tmp_<file>.o to <file>.o
150
151cmd_modversions_c = \
152 if $(OBJDUMP) -h $@ | grep -q __ksymtab; then \
153 $(call cmd_gensymtypes_c,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
154 > $(@D)/.tmp_$(@F:.o=.ver); \
155 \
156 $(LD) $(KBUILD_LDFLAGS) -r -o $(@D)/.tmp_$(@F) $@ \
157 -T $(@D)/.tmp_$(@F:.o=.ver); \
158 mv -f $(@D)/.tmp_$(@F) $@; \
159 rm -f $(@D)/.tmp_$(@F:.o=.ver); \
160 fi
161endif
162
163ifdef CONFIG_FTRACE_MCOUNT_RECORD
164ifndef CC_USING_RECORD_MCOUNT
165# compiler will not generate __mcount_loc use recordmcount or recordmcount.pl
166ifdef BUILD_C_RECORDMCOUNT
167ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
168 RECORDMCOUNT_FLAGS = -w
169endif
170# Due to recursion, we must skip empty.o.
171# The empty.o file is created in the make process in order to determine
172# the target endianness and word size. It is made before all other C
173# files, including recordmcount.
174sub_cmd_record_mcount = \
175 if [ $(@) != "scripts/mod/empty.o" ]; then \
176 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
177 fi;
178recordmcount_source := $(srctree)/scripts/recordmcount.c \
179 $(srctree)/scripts/recordmcount.h
180else
181sub_cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
182 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
183 "$(if $(CONFIG_64BIT),64,32)" \
184 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
185 "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
186 "$(if $(part-of-module),1,0)" "$(@)";
187recordmcount_source := $(srctree)/scripts/recordmcount.pl
188endif # BUILD_C_RECORDMCOUNT
189cmd_record_mcount = $(if $(findstring $(strip $(CC_FLAGS_FTRACE)),$(_c_flags)), \
190 $(sub_cmd_record_mcount))
191endif # CC_USING_RECORD_MCOUNT
192endif # CONFIG_FTRACE_MCOUNT_RECORD
193
194ifdef CONFIG_STACK_VALIDATION
195ifneq ($(SKIP_STACK_VALIDATION),1)
196
197__objtool_obj := $(objtree)/tools/objtool/objtool
198
199objtool_args = $(if $(CONFIG_UNWINDER_ORC),orc generate,check)
200
201objtool_args += $(if $(part-of-module), --module,)
202
203ifndef CONFIG_FRAME_POINTER
204objtool_args += --no-fp
205endif
206ifdef CONFIG_GCOV_KERNEL
207objtool_args += --no-unreachable
208endif
209ifdef CONFIG_RETPOLINE
210 objtool_args += --retpoline
211endif
212ifdef CONFIG_X86_SMAP
213 objtool_args += --uaccess
214endif
215
216# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
217# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
218# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
219cmd_objtool = $(if $(patsubst y%,, \
220 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
221 $(__objtool_obj) $(objtool_args) $@)
222objtool_obj = $(if $(patsubst y%,, \
223 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
224 $(__objtool_obj))
225
226endif # SKIP_STACK_VALIDATION
227endif # CONFIG_STACK_VALIDATION
228
229# Rebuild all objects when objtool changes, or is enabled/disabled.
230objtool_dep = $(objtool_obj) \
231 $(wildcard include/config/orc/unwinder.h \
232 include/config/stack/validation.h)
233
234ifdef CONFIG_TRIM_UNUSED_KSYMS
235cmd_gen_ksymdeps = \
236 $(CONFIG_SHELL) $(srctree)/scripts/gen_ksymdeps.sh $@ >> $(dot-target).cmd
237endif
238
239define rule_cc_o_c
240 $(call cmd,checksrc)
241 $(call cmd_and_fixdep,cc_o_c)
242 $(call cmd,gen_ksymdeps)
243 $(call cmd,checkdoc)
244 $(call cmd,objtool)
245 $(call cmd,modversions_c)
246 $(call cmd,record_mcount)
247endef
248
249define rule_as_o_S
250 $(call cmd_and_fixdep,as_o_S)
251 $(call cmd,gen_ksymdeps)
252 $(call cmd,objtool)
253 $(call cmd,modversions_S)
254endef
255
256# List module undefined symbols (or empty line if not enabled)
257ifdef CONFIG_TRIM_UNUSED_KSYMS
258cmd_undef_syms = $(NM) $< | sed -n 's/^ *U //p' | xargs echo
259else
260cmd_undef_syms = echo
261endif
262
263# Built-in and composite module parts
264$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_dep) FORCE
265 $(call cmd,force_checksrc)
266 $(call if_changed_rule,cc_o_c)
267
268cmd_mod = { \
269 echo $(if $($*-objs)$($*-y)$($*-m), $(addprefix $(obj)/, $($*-objs) $($*-y) $($*-m)), $(@:.mod=.o)); \
270 $(cmd_undef_syms); \
271 } > $@
272
273$(obj)/%.mod: $(obj)/%.o FORCE
274 $(call if_changed,mod)
275
276targets += $(mod-targets)
277
278quiet_cmd_cc_lst_c = MKLST $@
279 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
280 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
281 System.map $(OBJDUMP) > $@
282
283$(obj)/%.lst: $(src)/%.c FORCE
284 $(call if_changed_dep,cc_lst_c)
285
286# header test (header-test-y, header-test-m target)
287# ---------------------------------------------------------------------------
288
289quiet_cmd_cc_s_h = CC $@
290 cmd_cc_s_h = $(CC) $(c_flags) -S -o $@ -x c /dev/null -include $<
291
292$(obj)/%.h.s: $(src)/%.h FORCE
293 $(call if_changed_dep,cc_s_h)
294
295# Compile assembler sources (.S)
296# ---------------------------------------------------------------------------
297
298# .S file exports must have their C prototypes defined in asm/asm-prototypes.h
299# or a file that it includes, in order to get versioned symbols. We build a
300# dummy C file that includes asm-prototypes and the EXPORT_SYMBOL lines from
301# the .S file (with trailing ';'), and run genksyms on that, to extract vers.
302#
303# This is convoluted. The .S file must first be preprocessed to run guards and
304# expand names, then the resulting exports must be constructed into plain
305# EXPORT_SYMBOL(symbol); to build our dummy C file, and that gets preprocessed
306# to make the genksyms input.
307#
308# These mirror gensymtypes_c and co above, keep them in synch.
309cmd_gensymtypes_S = \
310 { echo "\#include <linux/kernel.h>" ; \
311 echo "\#include <asm/asm-prototypes.h>" ; \
312 $(CPP) $(a_flags) $< | \
313 grep "\<___EXPORT_SYMBOL\>" | \
314 sed 's/.*___EXPORT_SYMBOL[[:space:]]*\([a-zA-Z0-9_]*\)[[:space:]]*,.*/EXPORT_SYMBOL(\1);/' ; } | \
315 $(CPP) -D__GENKSYMS__ $(c_flags) -xc - | \
316 scripts/genksyms/genksyms $(if $(1), -T $(2)) \
317 $(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS)) \
318 $(if $(KBUILD_PRESERVE),-p) \
319 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
320
321quiet_cmd_cc_symtypes_S = SYM $(quiet_modtag) $@
322cmd_cc_symtypes_S = \
323 $(call cmd_gensymtypes_S,true,$@) >/dev/null; \
324 test -s $@ || rm -f $@
325
326$(obj)/%.symtypes : $(src)/%.S FORCE
327 $(call cmd,cc_symtypes_S)
328
329
330quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
331cmd_cpp_s_S = $(CPP) $(a_flags) -o $@ $<
332
333$(obj)/%.s: $(src)/%.S FORCE
334 $(call if_changed_dep,cpp_s_S)
335
336quiet_cmd_as_o_S = AS $(quiet_modtag) $@
337 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
338
339ifdef CONFIG_ASM_MODVERSIONS
340
341# versioning matches the C process described above, with difference that
342# we parse asm-prototypes.h C header to get function definitions.
343
344cmd_modversions_S = \
345 if $(OBJDUMP) -h $@ | grep -q __ksymtab; then \
346 $(call cmd_gensymtypes_S,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
347 > $(@D)/.tmp_$(@F:.o=.ver); \
348 \
349 $(LD) $(KBUILD_LDFLAGS) -r -o $(@D)/.tmp_$(@F) $@ \
350 -T $(@D)/.tmp_$(@F:.o=.ver); \
351 mv -f $(@D)/.tmp_$(@F) $@; \
352 rm -f $(@D)/.tmp_$(@F:.o=.ver); \
353 fi
354endif
355
356$(obj)/%.o: $(src)/%.S $(objtool_dep) FORCE
357 $(call if_changed_rule,as_o_S)
358
359targets += $(filter-out $(subdir-obj-y), $(real-obj-y)) $(real-obj-m) $(lib-y)
360targets += $(extra-y) $(MAKECMDGOALS) $(always)
361
362# Linker scripts preprocessor (.lds.S -> .lds)
363# ---------------------------------------------------------------------------
364quiet_cmd_cpp_lds_S = LDS $@
365 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
366 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
367
368$(obj)/%.lds: $(src)/%.lds.S FORCE
369 $(call if_changed_dep,cpp_lds_S)
370
371# ASN.1 grammar
372# ---------------------------------------------------------------------------
373quiet_cmd_asn1_compiler = ASN.1 $(basename $@).[ch]
374 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
375 $(basename $@).c $(basename $@).h
376
377$(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
378 $(call cmd,asn1_compiler)
379
380# Build the compiled-in targets
381# ---------------------------------------------------------------------------
382
383# To build objects in subdirs, we need to descend into the directories
384$(sort $(subdir-obj-y)): $(subdir-ym) ;
385
386#
387# Rule to compile a set of .o files into one .a file (without symbol table)
388#
389ifdef builtin-target
390
391quiet_cmd_ar_builtin = AR $@
392 cmd_ar_builtin = rm -f $@; $(AR) cDPrST $@ $(real-prereqs)
393
394$(builtin-target): $(real-obj-y) FORCE
395 $(call if_changed,ar_builtin)
396
397targets += $(builtin-target)
398endif # builtin-target
399
400#
401# Rule to create modules.order file
402#
403# Create commands to either record .ko file or cat modules.order from
404# a subdirectory
405$(modorder-target): $(subdir-ym) FORCE
406 $(Q){ $(foreach m, $(modorder), \
407 $(if $(filter %/modules.order, $m), cat $m, echo $m);) :; } \
408 | $(AWK) '!x[$$0]++' - > $@
409
410#
411# Rule to compile a set of .o files into one .a file (with symbol table)
412#
413ifdef lib-target
414
415$(lib-target): $(lib-y) FORCE
416 $(call if_changed,ar)
417
418targets += $(lib-target)
419
420dummy-object = $(obj)/.lib_exports.o
421ksyms-lds = $(dot-target).lds
422
423quiet_cmd_export_list = EXPORTS $@
424cmd_export_list = $(OBJDUMP) -h $< | \
425 sed -ne '/___ksymtab/s/.*+\([^ ]*\).*/EXTERN(\1)/p' >$(ksyms-lds);\
426 rm -f $(dummy-object);\
427 echo | $(CC) $(a_flags) -c -o $(dummy-object) -x assembler -;\
428 $(LD) $(ld_flags) -r -o $@ -T $(ksyms-lds) $(dummy-object);\
429 rm $(dummy-object) $(ksyms-lds)
430
431$(obj)/lib-ksyms.o: $(lib-target) FORCE
432 $(call if_changed,export_list)
433
434targets += $(obj)/lib-ksyms.o
435
436endif
437
438# NOTE:
439# Do not replace $(filter %.o,^) with $(real-prereqs). When a single object
440# module is turned into a multi object module, $^ will contain header file
441# dependencies recorded in the .*.cmd file.
442quiet_cmd_link_multi-m = LD [M] $@
443 cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ $(filter %.o,$^)
444
445$(multi-used-m): FORCE
446 $(call if_changed,link_multi-m)
447$(call multi_depend, $(multi-used-m), .o, -objs -y -m)
448
449targets += $(multi-used-m)
450targets := $(filter-out $(PHONY), $(targets))
451
452# Add intermediate targets:
453# When building objects with specific suffix patterns, add intermediate
454# targets that the final targets are derived from.
455intermediate_targets = $(foreach sfx, $(2), \
456 $(patsubst %$(strip $(1)),%$(sfx), \
457 $(filter %$(strip $(1)), $(targets))))
458# %.asn1.o <- %.asn1.[ch] <- %.asn1
459# %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
460# %.lex.o <- %.lex.c <- %.l
461# %.tab.o <- %.tab.[ch] <- %.y
462targets += $(call intermediate_targets, .asn1.o, .asn1.c .asn1.h) \
463 $(call intermediate_targets, .dtb.o, .dtb.S .dtb) \
464 $(call intermediate_targets, .lex.o, .lex.c) \
465 $(call intermediate_targets, .tab.o, .tab.c .tab.h)
466
467# Build
468# ---------------------------------------------------------------------------
469
470ifdef single-build
471
472curdir-single := $(sort $(foreach x, $(KBUILD_SINGLE_TARGETS), \
473 $(if $(filter $(x) $(basename $(x)).o, $(targets)), $(x))))
474
475# Handle single targets without any rule: show "Nothing to be done for ..." or
476# "No rule to make target ..." depending on whether the target exists.
477unknown-single := $(filter-out $(addsuffix /%, $(subdir-ym)), \
478 $(filter $(obj)/%, \
479 $(filter-out $(curdir-single), \
480 $(KBUILD_SINGLE_TARGETS))))
481
482__build: $(curdir-single) $(subdir-ym)
483ifneq ($(unknown-single),)
484 $(Q)$(MAKE) -f /dev/null $(unknown-single)
485endif
486 @:
487
488ifeq ($(curdir-single),)
489# Nothing to do in this directory. Do not include any .*.cmd file for speed-up
490targets :=
491else
492targets += $(curdir-single)
493endif
494
495else
496
497__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
498 $(if $(KBUILD_MODULES),$(obj-m) $(mod-targets) $(modorder-target)) \
499 $(subdir-ym) $(always)
500 @:
501
502endif
503
504# Descending
505# ---------------------------------------------------------------------------
506
507PHONY += $(subdir-ym)
508$(subdir-ym):
509 $(Q)$(MAKE) $(build)=$@ \
510 $(if $(filter $@/, $(KBUILD_SINGLE_TARGETS)),single-build=) \
511 need-builtin=$(if $(filter $@/built-in.a, $(subdir-obj-y)),1) \
512 need-modorder=$(if $(need-modorder),$(if $(filter $@/modules.order, $(modorder)),1))
513
514# Add FORCE to the prequisites of a target to force it to be always rebuilt.
515# ---------------------------------------------------------------------------
516
517PHONY += FORCE
518
519FORCE:
520
521# Read all saved command lines and dependencies for the $(targets) we
522# may be building above, using $(if_changed{,_dep}). As an
523# optimization, we don't need to read them if the target does not
524# exist, we will rebuild anyway in that case.
525
526existing-targets := $(wildcard $(sort $(targets)))
527
528-include $(foreach f,$(existing-targets),$(dir $(f)).$(notdir $(f)).cmd)
529
530ifdef building_out_of_srctree
531# Create directories for object files if they do not exist
532obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
533# If targets exist, their directories apparently exist. Skip mkdir.
534existing-dirs := $(sort $(patsubst %/,%, $(dir $(existing-targets))))
535obj-dirs := $(strip $(filter-out $(existing-dirs), $(obj-dirs)))
536ifneq ($(obj-dirs),)
537$(shell mkdir -p $(obj-dirs))
538endif
539endif
540
541.PHONY: $(PHONY)