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1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS :=
22EXTRA_CFLAGS :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS :=
25asflags-y :=
26ccflags-y :=
27cppflags-y :=
28ldflags-y :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48 ifneq ("$(save-cflags)","$(CFLAGS)")
49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
50 endif
51endif
52
53include scripts/Makefile.lib
54
55ifdef host-progs
56ifneq ($(hostprogs-y),$(host-progs))
57$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
58hostprogs-y += $(host-progs)
59endif
60endif
61
62# Do not include host rules unless needed
63ifneq ($(hostprogs-y)$(hostprogs-m),)
64include scripts/Makefile.host
65endif
66
67ifneq ($(KBUILD_SRC),)
68# Create output directory if not already present
69_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
70
71# Create directories for object files if directory does not exist
72# Needed when obj-y := dir/file.o syntax is used
73_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
74endif
75
76ifndef obj
77$(warning kbuild: Makefile.build is included improperly)
78endif
79
80# ===========================================================================
81
82ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
83lib-target := $(obj)/lib.a
84endif
85
86ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
87builtin-target := $(obj)/built-in.o
88endif
89
90modorder-target := $(obj)/modules.order
91
92# We keep a list of all modules in $(MODVERDIR)
93
94__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
95 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
96 $(subdir-ym) $(always)
97 @:
98
99# Linus' kernel sanity checking tool
100ifneq ($(KBUILD_CHECKSRC),0)
101 ifeq ($(KBUILD_CHECKSRC),2)
102 quiet_cmd_force_checksrc = CHECK $<
103 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
104 else
105 quiet_cmd_checksrc = CHECK $<
106 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
107 endif
108endif
109
110# Do section mismatch analysis for each module/built-in.o
111ifdef CONFIG_DEBUG_SECTION_MISMATCH
112 cmd_secanalysis = ; scripts/mod/modpost $@
113endif
114
115# Compile C sources (.c)
116# ---------------------------------------------------------------------------
117
118# Default is built-in, unless we know otherwise
119modkern_cflags = \
120 $(if $(part-of-module), \
121 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
122 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
123quiet_modtag := $(empty) $(empty)
124
125$(real-objs-m) : part-of-module := y
126$(real-objs-m:.o=.i) : part-of-module := y
127$(real-objs-m:.o=.s) : part-of-module := y
128$(real-objs-m:.o=.lst): part-of-module := y
129
130$(real-objs-m) : quiet_modtag := [M]
131$(real-objs-m:.o=.i) : quiet_modtag := [M]
132$(real-objs-m:.o=.s) : quiet_modtag := [M]
133$(real-objs-m:.o=.lst): quiet_modtag := [M]
134
135$(obj-m) : quiet_modtag := [M]
136
137# Default for not multi-part modules
138modname = $(basetarget)
139
140$(multi-objs-m) : modname = $(modname-multi)
141$(multi-objs-m:.o=.i) : modname = $(modname-multi)
142$(multi-objs-m:.o=.s) : modname = $(modname-multi)
143$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
144$(multi-objs-y) : modname = $(modname-multi)
145$(multi-objs-y:.o=.i) : modname = $(modname-multi)
146$(multi-objs-y:.o=.s) : modname = $(modname-multi)
147$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
148
149quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
150cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
151
152$(obj)/%.s: $(src)/%.c FORCE
153 $(call if_changed_dep,cc_s_c)
154
155quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
156cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
157
158$(obj)/%.i: $(src)/%.c FORCE
159 $(call if_changed_dep,cc_i_c)
160
161cmd_gensymtypes = \
162 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
163 $(GENKSYMS) $(if $(1), -T $(2)) \
164 $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
165 $(if $(KBUILD_PRESERVE),-p) \
166 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
167
168quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
169cmd_cc_symtypes_c = \
170 set -e; \
171 $(call cmd_gensymtypes,true,$@) >/dev/null; \
172 test -s $@ || rm -f $@
173
174$(obj)/%.symtypes : $(src)/%.c FORCE
175 $(call cmd,cc_symtypes_c)
176
177# C (.c) files
178# The C file is compiled and updated dependency information is generated.
179# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
180
181quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
182
183ifndef CONFIG_MODVERSIONS
184cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
185
186else
187# When module versioning is enabled the following steps are executed:
188# o compile a .tmp_<file>.o from <file>.c
189# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
190# not export symbols, we just rename .tmp_<file>.o to <file>.o and
191# are done.
192# o otherwise, we calculate symbol versions using the good old
193# genksyms on the preprocessed source and postprocess them in a way
194# that they are usable as a linker script
195# o generate <file>.o from .tmp_<file>.o using the linker to
196# replace the unresolved symbols __crc_exported_symbol with
197# the actual value of the checksum generated by genksyms
198
199cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
200cmd_modversions = \
201 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
202 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
203 > $(@D)/.tmp_$(@F:.o=.ver); \
204 \
205 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
206 -T $(@D)/.tmp_$(@F:.o=.ver); \
207 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
208 else \
209 mv -f $(@D)/.tmp_$(@F) $@; \
210 fi;
211endif
212
213ifdef CONFIG_FTRACE_MCOUNT_RECORD
214ifdef BUILD_C_RECORDMCOUNT
215ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
216 RECORDMCOUNT_FLAGS = -w
217endif
218# Due to recursion, we must skip empty.o.
219# The empty.o file is created in the make process in order to determine
220# the target endianness and word size. It is made before all other C
221# files, including recordmcount.
222sub_cmd_record_mcount = \
223 if [ $(@) != "scripts/mod/empty.o" ]; then \
224 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
225 fi;
226recordmcount_source := $(srctree)/scripts/recordmcount.c \
227 $(srctree)/scripts/recordmcount.h
228else
229sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
230 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
231 "$(if $(CONFIG_64BIT),64,32)" \
232 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
233 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
234 "$(if $(part-of-module),1,0)" "$(@)";
235recordmcount_source := $(srctree)/scripts/recordmcount.pl
236endif
237cmd_record_mcount = \
238 if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
239 "$(CC_FLAGS_FTRACE)" ]; then \
240 $(sub_cmd_record_mcount) \
241 fi;
242endif
243
244ifdef CONFIG_STACK_VALIDATION
245ifneq ($(SKIP_STACK_VALIDATION),1)
246
247__objtool_obj := $(objtree)/tools/objtool/objtool
248
249objtool_args = check
250ifndef CONFIG_FRAME_POINTER
251objtool_args += --no-fp
252endif
253
254# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
255# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
256# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
257cmd_objtool = $(if $(patsubst y%,, \
258 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
259 $(__objtool_obj) $(objtool_args) "$(@)";)
260objtool_obj = $(if $(patsubst y%,, \
261 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
262 $(__objtool_obj))
263
264endif # SKIP_STACK_VALIDATION
265endif # CONFIG_STACK_VALIDATION
266
267define rule_cc_o_c
268 $(call echo-cmd,checksrc) $(cmd_checksrc) \
269 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
270 $(cmd_modversions) \
271 $(cmd_objtool) \
272 $(call echo-cmd,record_mcount) \
273 $(cmd_record_mcount) \
274 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
275 $(dot-target).tmp; \
276 rm -f $(depfile); \
277 mv -f $(dot-target).tmp $(dot-target).cmd
278endef
279
280define rule_as_o_S
281 $(call echo-cmd,as_o_S) $(cmd_as_o_S); \
282 $(cmd_objtool) \
283 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,as_o_S)' > \
284 $(dot-target).tmp; \
285 rm -f $(depfile); \
286 mv -f $(dot-target).tmp $(dot-target).cmd
287endef
288
289# Built-in and composite module parts
290$(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
291 $(call cmd,force_checksrc)
292 $(call if_changed_rule,cc_o_c)
293
294# Single-part modules are special since we need to mark them in $(MODVERDIR)
295
296$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) $(objtool_obj) FORCE
297 $(call cmd,force_checksrc)
298 $(call if_changed_rule,cc_o_c)
299 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
300
301quiet_cmd_cc_lst_c = MKLST $@
302 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
303 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
304 System.map $(OBJDUMP) > $@
305
306$(obj)/%.lst: $(src)/%.c FORCE
307 $(call if_changed_dep,cc_lst_c)
308
309# Compile assembler sources (.S)
310# ---------------------------------------------------------------------------
311
312modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
313
314$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
315$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
316
317quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
318cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
319
320$(obj)/%.s: $(src)/%.S FORCE
321 $(call if_changed_dep,as_s_S)
322
323quiet_cmd_as_o_S = AS $(quiet_modtag) $@
324cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
325
326$(obj)/%.o: $(src)/%.S $(objtool_obj) FORCE
327 $(call if_changed_rule,as_o_S)
328
329targets += $(real-objs-y) $(real-objs-m) $(lib-y)
330targets += $(extra-y) $(MAKECMDGOALS) $(always)
331
332# Linker scripts preprocessor (.lds.S -> .lds)
333# ---------------------------------------------------------------------------
334quiet_cmd_cpp_lds_S = LDS $@
335 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
336 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
337
338$(obj)/%.lds: $(src)/%.lds.S FORCE
339 $(call if_changed_dep,cpp_lds_S)
340
341# ASN.1 grammar
342# ---------------------------------------------------------------------------
343quiet_cmd_asn1_compiler = ASN.1 $@
344 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
345 $(subst .h,.c,$@) $(subst .c,.h,$@)
346
347.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
348
349$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
350 $(call cmd,asn1_compiler)
351
352# Build the compiled-in targets
353# ---------------------------------------------------------------------------
354
355# To build objects in subdirs, we need to descend into the directories
356$(sort $(subdir-obj-y)): $(subdir-ym) ;
357
358#
359# Rule to compile a set of .o files into one .o file
360#
361ifdef builtin-target
362quiet_cmd_link_o_target = LD $@
363# If the list of objects to link is empty, just create an empty built-in.o
364cmd_link_o_target = $(if $(strip $(obj-y)),\
365 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
366 $(cmd_secanalysis),\
367 rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
368
369$(builtin-target): $(obj-y) FORCE
370 $(call if_changed,link_o_target)
371
372targets += $(builtin-target)
373endif # builtin-target
374
375#
376# Rule to create modules.order file
377#
378# Create commands to either record .ko file or cat modules.order from
379# a subdirectory
380modorder-cmds = \
381 $(foreach m, $(modorder), \
382 $(if $(filter %/modules.order, $m), \
383 cat $m;, echo kernel/$m;))
384
385$(modorder-target): $(subdir-ym) FORCE
386 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
387
388#
389# Rule to compile a set of .o files into one .a file
390#
391ifdef lib-target
392quiet_cmd_link_l_target = AR $@
393cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
394
395$(lib-target): $(lib-y) FORCE
396 $(call if_changed,link_l_target)
397
398targets += $(lib-target)
399endif
400
401#
402# Rule to link composite objects
403#
404# Composite objects are specified in kbuild makefile as follows:
405# <composite-object>-objs := <list of .o files>
406# or
407# <composite-object>-y := <list of .o files>
408# or
409# <composite-object>-m := <list of .o files>
410# The -m syntax only works if <composite object> is a module
411link_multi_deps = \
412$(filter $(addprefix $(obj)/, \
413$($(subst $(obj)/,,$(@:.o=-objs))) \
414$($(subst $(obj)/,,$(@:.o=-y))) \
415$($(subst $(obj)/,,$(@:.o=-m)))), $^)
416
417quiet_cmd_link_multi-y = LD $@
418cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
419
420quiet_cmd_link_multi-m = LD [M] $@
421cmd_link_multi-m = $(cmd_link_multi-y)
422
423$(multi-used-y): FORCE
424 $(call if_changed,link_multi-y)
425$(call multi_depend, $(multi-used-y), .o, -objs -y)
426
427$(multi-used-m): FORCE
428 $(call if_changed,link_multi-m)
429 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
430$(call multi_depend, $(multi-used-m), .o, -objs -y -m)
431
432targets += $(multi-used-y) $(multi-used-m)
433
434
435# Descending
436# ---------------------------------------------------------------------------
437
438PHONY += $(subdir-ym)
439$(subdir-ym):
440 $(Q)$(MAKE) $(build)=$@
441
442# Add FORCE to the prequisites of a target to force it to be always rebuilt.
443# ---------------------------------------------------------------------------
444
445PHONY += FORCE
446
447FORCE:
448
449# Read all saved command lines and dependencies for the $(targets) we
450# may be building above, using $(if_changed{,_dep}). As an
451# optimization, we don't need to read them if the target does not
452# exist, we will rebuild anyway in that case.
453
454targets := $(wildcard $(sort $(targets)))
455cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
456
457ifneq ($(cmd_files),)
458 include $(cmd_files)
459endif
460
461# Declare the contents of the .PHONY variable as phony. We keep that
462# information in a variable se we can use it in if_changed and friends.
463
464.PHONY: $(PHONY)
1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS :=
22EXTRA_CFLAGS :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS :=
25asflags-y :=
26ccflags-y :=
27cppflags-y :=
28ldflags-y :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48 ifneq ("$(save-cflags)","$(CFLAGS)")
49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
50 endif
51endif
52
53#
54# make W=... settings
55#
56# W=1 - warnings that may be relevant and does not occur too often
57# W=2 - warnings that occur quite often but may still be relevant
58# W=3 - the more obscure warnings, can most likely be ignored
59#
60# $(call cc-option, -W...) handles gcc -W.. options which
61# are not supported by all versions of the compiler
62ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
63warning- := $(empty)
64
65warning-1 := -Wextra -Wunused -Wno-unused-parameter
66warning-1 += -Wmissing-declarations
67warning-1 += -Wmissing-format-attribute
68warning-1 += -Wmissing-prototypes
69warning-1 += -Wold-style-definition
70warning-1 += $(call cc-option, -Wmissing-include-dirs)
71warning-1 += $(call cc-option, -Wunused-but-set-variable)
72
73warning-2 := -Waggregate-return
74warning-2 += -Wcast-align
75warning-2 += -Wdisabled-optimization
76warning-2 += -Wnested-externs
77warning-2 += -Wshadow
78warning-2 += $(call cc-option, -Wlogical-op)
79
80warning-3 := -Wbad-function-cast
81warning-3 += -Wcast-qual
82warning-3 += -Wconversion
83warning-3 += -Wpacked
84warning-3 += -Wpadded
85warning-3 += -Wpointer-arith
86warning-3 += -Wredundant-decls
87warning-3 += -Wswitch-default
88warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
89warning-3 += $(call cc-option, -Wvla)
90
91warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
92warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
93warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
94
95ifeq ("$(strip $(warning))","")
96 $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
97endif
98
99KBUILD_CFLAGS += $(warning)
100endif
101
102include scripts/Makefile.lib
103
104ifdef host-progs
105ifneq ($(hostprogs-y),$(host-progs))
106$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
107hostprogs-y += $(host-progs)
108endif
109endif
110
111# Do not include host rules unless needed
112ifneq ($(hostprogs-y)$(hostprogs-m),)
113include scripts/Makefile.host
114endif
115
116ifneq ($(KBUILD_SRC),)
117# Create output directory if not already present
118_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
119
120# Create directories for object files if directory does not exist
121# Needed when obj-y := dir/file.o syntax is used
122_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
123endif
124
125ifndef obj
126$(warning kbuild: Makefile.build is included improperly)
127endif
128
129# ===========================================================================
130
131ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
132lib-target := $(obj)/lib.a
133endif
134
135ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
136builtin-target := $(obj)/built-in.o
137endif
138
139modorder-target := $(obj)/modules.order
140
141# We keep a list of all modules in $(MODVERDIR)
142
143__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
144 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
145 $(subdir-ym) $(always)
146 @:
147
148# Linus' kernel sanity checking tool
149ifneq ($(KBUILD_CHECKSRC),0)
150 ifeq ($(KBUILD_CHECKSRC),2)
151 quiet_cmd_force_checksrc = CHECK $<
152 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
153 else
154 quiet_cmd_checksrc = CHECK $<
155 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
156 endif
157endif
158
159# Do section mismatch analysis for each module/built-in.o
160ifdef CONFIG_DEBUG_SECTION_MISMATCH
161 cmd_secanalysis = ; scripts/mod/modpost $@
162endif
163
164# Compile C sources (.c)
165# ---------------------------------------------------------------------------
166
167# Default is built-in, unless we know otherwise
168modkern_cflags = \
169 $(if $(part-of-module), \
170 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
171 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
172quiet_modtag := $(empty) $(empty)
173
174$(real-objs-m) : part-of-module := y
175$(real-objs-m:.o=.i) : part-of-module := y
176$(real-objs-m:.o=.s) : part-of-module := y
177$(real-objs-m:.o=.lst): part-of-module := y
178
179$(real-objs-m) : quiet_modtag := [M]
180$(real-objs-m:.o=.i) : quiet_modtag := [M]
181$(real-objs-m:.o=.s) : quiet_modtag := [M]
182$(real-objs-m:.o=.lst): quiet_modtag := [M]
183
184$(obj-m) : quiet_modtag := [M]
185
186# Default for not multi-part modules
187modname = $(basetarget)
188
189$(multi-objs-m) : modname = $(modname-multi)
190$(multi-objs-m:.o=.i) : modname = $(modname-multi)
191$(multi-objs-m:.o=.s) : modname = $(modname-multi)
192$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
193$(multi-objs-y) : modname = $(modname-multi)
194$(multi-objs-y:.o=.i) : modname = $(modname-multi)
195$(multi-objs-y:.o=.s) : modname = $(modname-multi)
196$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
197
198quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
199cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
200
201$(obj)/%.s: $(src)/%.c FORCE
202 $(call if_changed_dep,cc_s_c)
203
204quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
205cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
206
207$(obj)/%.i: $(src)/%.c FORCE
208 $(call if_changed_dep,cc_i_c)
209
210cmd_gensymtypes = \
211 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
212 $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH) \
213 $(if $(KBUILD_PRESERVE),-p) \
214 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
215
216quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
217cmd_cc_symtypes_c = \
218 set -e; \
219 $(call cmd_gensymtypes,true,$@) >/dev/null; \
220 test -s $@ || rm -f $@
221
222$(obj)/%.symtypes : $(src)/%.c FORCE
223 $(call cmd,cc_symtypes_c)
224
225# C (.c) files
226# The C file is compiled and updated dependency information is generated.
227# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
228
229quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
230
231ifndef CONFIG_MODVERSIONS
232cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
233
234else
235# When module versioning is enabled the following steps are executed:
236# o compile a .tmp_<file>.o from <file>.c
237# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
238# not export symbols, we just rename .tmp_<file>.o to <file>.o and
239# are done.
240# o otherwise, we calculate symbol versions using the good old
241# genksyms on the preprocessed source and postprocess them in a way
242# that they are usable as a linker script
243# o generate <file>.o from .tmp_<file>.o using the linker to
244# replace the unresolved symbols __crc_exported_symbol with
245# the actual value of the checksum generated by genksyms
246
247cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
248cmd_modversions = \
249 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
250 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
251 > $(@D)/.tmp_$(@F:.o=.ver); \
252 \
253 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
254 -T $(@D)/.tmp_$(@F:.o=.ver); \
255 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
256 else \
257 mv -f $(@D)/.tmp_$(@F) $@; \
258 fi;
259endif
260
261ifdef CONFIG_FTRACE_MCOUNT_RECORD
262ifdef BUILD_C_RECORDMCOUNT
263ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
264 RECORDMCOUNT_FLAGS = -w
265endif
266# Due to recursion, we must skip empty.o.
267# The empty.o file is created in the make process in order to determine
268# the target endianness and word size. It is made before all other C
269# files, including recordmcount.
270sub_cmd_record_mcount = \
271 if [ $(@) != "scripts/mod/empty.o" ]; then \
272 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
273 fi;
274recordmcount_source := $(srctree)/scripts/recordmcount.c \
275 $(srctree)/scripts/recordmcount.h
276else
277sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
278 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
279 "$(if $(CONFIG_64BIT),64,32)" \
280 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
281 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
282 "$(if $(part-of-module),1,0)" "$(@)";
283recordmcount_source := $(srctree)/scripts/recordmcount.pl
284endif
285cmd_record_mcount = \
286 if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
287 $(sub_cmd_record_mcount) \
288 fi;
289endif
290
291define rule_cc_o_c
292 $(call echo-cmd,checksrc) $(cmd_checksrc) \
293 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
294 $(cmd_modversions) \
295 $(call echo-cmd,record_mcount) \
296 $(cmd_record_mcount) \
297 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
298 $(dot-target).tmp; \
299 rm -f $(depfile); \
300 mv -f $(dot-target).tmp $(dot-target).cmd
301endef
302
303# Built-in and composite module parts
304$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
305 $(call cmd,force_checksrc)
306 $(call if_changed_rule,cc_o_c)
307
308# Single-part modules are special since we need to mark them in $(MODVERDIR)
309
310$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
311 $(call cmd,force_checksrc)
312 $(call if_changed_rule,cc_o_c)
313 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
314
315quiet_cmd_cc_lst_c = MKLST $@
316 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
317 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
318 System.map $(OBJDUMP) > $@
319
320$(obj)/%.lst: $(src)/%.c FORCE
321 $(call if_changed_dep,cc_lst_c)
322
323# Compile assembler sources (.S)
324# ---------------------------------------------------------------------------
325
326modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
327
328$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
329$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
330
331quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
332cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
333
334$(obj)/%.s: $(src)/%.S FORCE
335 $(call if_changed_dep,as_s_S)
336
337quiet_cmd_as_o_S = AS $(quiet_modtag) $@
338cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
339
340$(obj)/%.o: $(src)/%.S FORCE
341 $(call if_changed_dep,as_o_S)
342
343targets += $(real-objs-y) $(real-objs-m) $(lib-y)
344targets += $(extra-y) $(MAKECMDGOALS) $(always)
345
346# Linker scripts preprocessor (.lds.S -> .lds)
347# ---------------------------------------------------------------------------
348quiet_cmd_cpp_lds_S = LDS $@
349 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
350 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
351
352$(obj)/%.lds: $(src)/%.lds.S FORCE
353 $(call if_changed_dep,cpp_lds_S)
354
355# Build the compiled-in targets
356# ---------------------------------------------------------------------------
357
358# To build objects in subdirs, we need to descend into the directories
359$(sort $(subdir-obj-y)): $(subdir-ym) ;
360
361#
362# Rule to compile a set of .o files into one .o file
363#
364ifdef builtin-target
365quiet_cmd_link_o_target = LD $@
366# If the list of objects to link is empty, just create an empty built-in.o
367cmd_link_o_target = $(if $(strip $(obj-y)),\
368 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
369 $(cmd_secanalysis),\
370 rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
371
372$(builtin-target): $(obj-y) FORCE
373 $(call if_changed,link_o_target)
374
375targets += $(builtin-target)
376endif # builtin-target
377
378#
379# Rule to create modules.order file
380#
381# Create commands to either record .ko file or cat modules.order from
382# a subdirectory
383modorder-cmds = \
384 $(foreach m, $(modorder), \
385 $(if $(filter %/modules.order, $m), \
386 cat $m;, echo kernel/$m;))
387
388$(modorder-target): $(subdir-ym) FORCE
389 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
390
391#
392# Rule to compile a set of .o files into one .a file
393#
394ifdef lib-target
395quiet_cmd_link_l_target = AR $@
396cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
397
398$(lib-target): $(lib-y) FORCE
399 $(call if_changed,link_l_target)
400
401targets += $(lib-target)
402endif
403
404#
405# Rule to link composite objects
406#
407# Composite objects are specified in kbuild makefile as follows:
408# <composite-object>-objs := <list of .o files>
409# or
410# <composite-object>-y := <list of .o files>
411link_multi_deps = \
412$(filter $(addprefix $(obj)/, \
413$($(subst $(obj)/,,$(@:.o=-objs))) \
414$($(subst $(obj)/,,$(@:.o=-y)))), $^)
415
416quiet_cmd_link_multi-y = LD $@
417cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
418
419quiet_cmd_link_multi-m = LD [M] $@
420cmd_link_multi-m = $(cmd_link_multi-y)
421
422# We would rather have a list of rules like
423# foo.o: $(foo-objs)
424# but that's not so easy, so we rather make all composite objects depend
425# on the set of all their parts
426$(multi-used-y) : %.o: $(multi-objs-y) FORCE
427 $(call if_changed,link_multi-y)
428
429$(multi-used-m) : %.o: $(multi-objs-m) FORCE
430 $(call if_changed,link_multi-m)
431 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
432
433targets += $(multi-used-y) $(multi-used-m)
434
435
436# Descending
437# ---------------------------------------------------------------------------
438
439PHONY += $(subdir-ym)
440$(subdir-ym):
441 $(Q)$(MAKE) $(build)=$@
442
443# Add FORCE to the prequisites of a target to force it to be always rebuilt.
444# ---------------------------------------------------------------------------
445
446PHONY += FORCE
447
448FORCE:
449
450# Read all saved command lines and dependencies for the $(targets) we
451# may be building above, using $(if_changed{,_dep}). As an
452# optimization, we don't need to read them if the target does not
453# exist, we will rebuild anyway in that case.
454
455targets := $(wildcard $(sort $(targets)))
456cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
457
458ifneq ($(cmd_files),)
459 include $(cmd_files)
460endif
461
462# Declare the contents of the .PHONY variable as phony. We keep that
463# information in a variable se we can use it in if_changed and friends.
464
465.PHONY: $(PHONY)