1/*
  2 * Copyright © 2014 Intel Corporation
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice (including the next
 12 * paragraph) shall be included in all copies or substantial portions of the
 13 * Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 21 * IN THE SOFTWARE.
 22 *
 23 */
 24#ifndef _INTEL_GUC_H_
 25#define _INTEL_GUC_H_
 26
 27#include "intel_guc_fwif.h"
 28#include "i915_guc_reg.h"
 29
 30struct i915_guc_client {
 31	struct drm_i915_gem_object *client_obj;
 32	struct intel_context *owner;
 33	struct intel_guc *guc;
 34	uint32_t priority;
 35	uint32_t ctx_index;
 36
 37	uint32_t proc_desc_offset;
 38	uint32_t doorbell_offset;
 39	uint32_t cookie;
 40	uint16_t doorbell_id;
 41	uint16_t padding;		/* Maintain alignment		*/
 42
 43	uint32_t wq_offset;
 44	uint32_t wq_size;
 45	uint32_t wq_tail;
 46	uint32_t wq_head;
 47
 48	/* GuC submission statistics & status */
 49	uint64_t submissions[GUC_MAX_ENGINES_NUM];
 50	uint32_t q_fail;
 51	uint32_t b_fail;
 52	int retcode;
 53};
 54
 55enum intel_guc_fw_status {
 56	GUC_FIRMWARE_FAIL = -1,
 57	GUC_FIRMWARE_NONE = 0,
 58	GUC_FIRMWARE_PENDING,
 59	GUC_FIRMWARE_SUCCESS
 60};
 61
 62/*
 63 * This structure encapsulates all the data needed during the process
 64 * of fetching, caching, and loading the firmware image into the GuC.
 65 */
 66struct intel_guc_fw {
 67	struct drm_device *		guc_dev;
 68	const char *			guc_fw_path;
 69	size_t				guc_fw_size;
 70	struct drm_i915_gem_object *	guc_fw_obj;
 71	enum intel_guc_fw_status	guc_fw_fetch_status;
 72	enum intel_guc_fw_status	guc_fw_load_status;
 73
 74	uint16_t			guc_fw_major_wanted;
 75	uint16_t			guc_fw_minor_wanted;
 76	uint16_t			guc_fw_major_found;
 77	uint16_t			guc_fw_minor_found;
 78
 79	uint32_t header_size;
 80	uint32_t header_offset;
 81	uint32_t rsa_size;
 82	uint32_t rsa_offset;
 83	uint32_t ucode_size;
 84	uint32_t ucode_offset;
 85};
 86
 87struct intel_guc {
 88	struct intel_guc_fw guc_fw;
 89	uint32_t log_flags;
 90	struct drm_i915_gem_object *log_obj;
 91
 92	struct drm_i915_gem_object *ads_obj;
 93
 94	struct drm_i915_gem_object *ctx_pool_obj;
 95	struct ida ctx_ids;
 96
 97	struct i915_guc_client *execbuf_client;
 98
 99	DECLARE_BITMAP(doorbell_bitmap, GUC_MAX_DOORBELLS);
100	uint32_t db_cacheline;		/* Cyclic counter mod pagesize	*/
101
102	/* Action status & statistics */
103	uint64_t action_count;		/* Total commands issued	*/
104	uint32_t action_cmd;		/* Last command word		*/
105	uint32_t action_status;		/* Last return status		*/
106	uint32_t action_fail;		/* Total number of failures	*/
107	int32_t action_err;		/* Last error code		*/
108
109	uint64_t submissions[GUC_MAX_ENGINES_NUM];
110	uint32_t last_seqno[GUC_MAX_ENGINES_NUM];
111};
112
113/* intel_guc_loader.c */
114extern void intel_guc_ucode_init(struct drm_device *dev);
115extern int intel_guc_ucode_load(struct drm_device *dev);
116extern void intel_guc_ucode_fini(struct drm_device *dev);
117extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
118extern int intel_guc_suspend(struct drm_device *dev);
119extern int intel_guc_resume(struct drm_device *dev);
120
121/* i915_guc_submission.c */
122int i915_guc_submission_init(struct drm_device *dev);
123int i915_guc_submission_enable(struct drm_device *dev);
124int i915_guc_submit(struct i915_guc_client *client,
125		    struct drm_i915_gem_request *rq);
126void i915_guc_submission_disable(struct drm_device *dev);
127void i915_guc_submission_fini(struct drm_device *dev);
128int i915_guc_wq_check_space(struct i915_guc_client *client);
129
130#endif