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1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25#include <linux/module.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28#include <asm/unaligned.h>
29
30#define ATOM_DEBUG
31
32#include "atom.h"
33#include "atom-names.h"
34#include "atom-bits.h"
35#include "radeon.h"
36
37#define ATOM_COND_ABOVE 0
38#define ATOM_COND_ABOVEOREQUAL 1
39#define ATOM_COND_ALWAYS 2
40#define ATOM_COND_BELOW 3
41#define ATOM_COND_BELOWOREQUAL 4
42#define ATOM_COND_EQUAL 5
43#define ATOM_COND_NOTEQUAL 6
44
45#define ATOM_PORT_ATI 0
46#define ATOM_PORT_PCI 1
47#define ATOM_PORT_SYSIO 2
48
49#define ATOM_UNIT_MICROSEC 0
50#define ATOM_UNIT_MILLISEC 1
51
52#define PLL_INDEX 2
53#define PLL_DATA 3
54
55typedef struct {
56 struct atom_context *ctx;
57 uint32_t *ps, *ws;
58 int ps_shift;
59 uint16_t start;
60 unsigned last_jump;
61 unsigned long last_jump_jiffies;
62 bool abort;
63} atom_exec_context;
64
65int atom_debug = 0;
66static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
67int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
68
69static uint32_t atom_arg_mask[8] = {
70 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
71 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
72};
73static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
74
75static int atom_dst_to_src[8][4] = {
76 /* translate destination alignment field to the source alignment encoding */
77 {0, 0, 0, 0},
78 {1, 2, 3, 0},
79 {1, 2, 3, 0},
80 {1, 2, 3, 0},
81 {4, 5, 6, 7},
82 {4, 5, 6, 7},
83 {4, 5, 6, 7},
84 {4, 5, 6, 7},
85};
86static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
87
88static int debug_depth = 0;
89#ifdef ATOM_DEBUG
90static void debug_print_spaces(int n)
91{
92 while (n--)
93 printk(" ");
94}
95
96#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
97#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
98#else
99#define DEBUG(...) do { } while (0)
100#define SDEBUG(...) do { } while (0)
101#endif
102
103static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
104 uint32_t index, uint32_t data)
105{
106 struct radeon_device *rdev = ctx->card->dev->dev_private;
107 uint32_t temp = 0xCDCDCDCD;
108
109 while (1)
110 switch (CU8(base)) {
111 case ATOM_IIO_NOP:
112 base++;
113 break;
114 case ATOM_IIO_READ:
115 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
116 base += 3;
117 break;
118 case ATOM_IIO_WRITE:
119 if (rdev->family == CHIP_RV515)
120 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
121 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
122 base += 3;
123 break;
124 case ATOM_IIO_CLEAR:
125 temp &=
126 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
127 CU8(base + 2));
128 base += 3;
129 break;
130 case ATOM_IIO_SET:
131 temp |=
132 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
133 2);
134 base += 3;
135 break;
136 case ATOM_IIO_MOVE_INDEX:
137 temp &=
138 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
139 CU8(base + 3));
140 temp |=
141 ((index >> CU8(base + 2)) &
142 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
143 3);
144 base += 4;
145 break;
146 case ATOM_IIO_MOVE_DATA:
147 temp &=
148 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
149 CU8(base + 3));
150 temp |=
151 ((data >> CU8(base + 2)) &
152 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
153 3);
154 base += 4;
155 break;
156 case ATOM_IIO_MOVE_ATTR:
157 temp &=
158 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
159 CU8(base + 3));
160 temp |=
161 ((ctx->
162 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
163 CU8
164 (base
165 +
166 1))))
167 << CU8(base + 3);
168 base += 4;
169 break;
170 case ATOM_IIO_END:
171 return temp;
172 default:
173 printk(KERN_INFO "Unknown IIO opcode.\n");
174 return 0;
175 }
176}
177
178static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
179 int *ptr, uint32_t *saved, int print)
180{
181 uint32_t idx, val = 0xCDCDCDCD, align, arg;
182 struct atom_context *gctx = ctx->ctx;
183 arg = attr & 7;
184 align = (attr >> 3) & 7;
185 switch (arg) {
186 case ATOM_ARG_REG:
187 idx = U16(*ptr);
188 (*ptr) += 2;
189 if (print)
190 DEBUG("REG[0x%04X]", idx);
191 idx += gctx->reg_block;
192 switch (gctx->io_mode) {
193 case ATOM_IO_MM:
194 val = gctx->card->reg_read(gctx->card, idx);
195 break;
196 case ATOM_IO_PCI:
197 printk(KERN_INFO
198 "PCI registers are not implemented.\n");
199 return 0;
200 case ATOM_IO_SYSIO:
201 printk(KERN_INFO
202 "SYSIO registers are not implemented.\n");
203 return 0;
204 default:
205 if (!(gctx->io_mode & 0x80)) {
206 printk(KERN_INFO "Bad IO mode.\n");
207 return 0;
208 }
209 if (!gctx->iio[gctx->io_mode & 0x7F]) {
210 printk(KERN_INFO
211 "Undefined indirect IO read method %d.\n",
212 gctx->io_mode & 0x7F);
213 return 0;
214 }
215 val =
216 atom_iio_execute(gctx,
217 gctx->iio[gctx->io_mode & 0x7F],
218 idx, 0);
219 }
220 break;
221 case ATOM_ARG_PS:
222 idx = U8(*ptr);
223 (*ptr)++;
224 /* get_unaligned_le32 avoids unaligned accesses from atombios
225 * tables, noticed on a DEC Alpha. */
226 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
227 if (print)
228 DEBUG("PS[0x%02X,0x%04X]", idx, val);
229 break;
230 case ATOM_ARG_WS:
231 idx = U8(*ptr);
232 (*ptr)++;
233 if (print)
234 DEBUG("WS[0x%02X]", idx);
235 switch (idx) {
236 case ATOM_WS_QUOTIENT:
237 val = gctx->divmul[0];
238 break;
239 case ATOM_WS_REMAINDER:
240 val = gctx->divmul[1];
241 break;
242 case ATOM_WS_DATAPTR:
243 val = gctx->data_block;
244 break;
245 case ATOM_WS_SHIFT:
246 val = gctx->shift;
247 break;
248 case ATOM_WS_OR_MASK:
249 val = 1 << gctx->shift;
250 break;
251 case ATOM_WS_AND_MASK:
252 val = ~(1 << gctx->shift);
253 break;
254 case ATOM_WS_FB_WINDOW:
255 val = gctx->fb_base;
256 break;
257 case ATOM_WS_ATTRIBUTES:
258 val = gctx->io_attr;
259 break;
260 case ATOM_WS_REGPTR:
261 val = gctx->reg_block;
262 break;
263 default:
264 val = ctx->ws[idx];
265 }
266 break;
267 case ATOM_ARG_ID:
268 idx = U16(*ptr);
269 (*ptr) += 2;
270 if (print) {
271 if (gctx->data_block)
272 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
273 else
274 DEBUG("ID[0x%04X]", idx);
275 }
276 val = U32(idx + gctx->data_block);
277 break;
278 case ATOM_ARG_FB:
279 idx = U8(*ptr);
280 (*ptr)++;
281 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
282 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
283 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
284 val = 0;
285 } else
286 val = gctx->scratch[(gctx->fb_base / 4) + idx];
287 if (print)
288 DEBUG("FB[0x%02X]", idx);
289 break;
290 case ATOM_ARG_IMM:
291 switch (align) {
292 case ATOM_SRC_DWORD:
293 val = U32(*ptr);
294 (*ptr) += 4;
295 if (print)
296 DEBUG("IMM 0x%08X\n", val);
297 return val;
298 case ATOM_SRC_WORD0:
299 case ATOM_SRC_WORD8:
300 case ATOM_SRC_WORD16:
301 val = U16(*ptr);
302 (*ptr) += 2;
303 if (print)
304 DEBUG("IMM 0x%04X\n", val);
305 return val;
306 case ATOM_SRC_BYTE0:
307 case ATOM_SRC_BYTE8:
308 case ATOM_SRC_BYTE16:
309 case ATOM_SRC_BYTE24:
310 val = U8(*ptr);
311 (*ptr)++;
312 if (print)
313 DEBUG("IMM 0x%02X\n", val);
314 return val;
315 }
316 return 0;
317 case ATOM_ARG_PLL:
318 idx = U8(*ptr);
319 (*ptr)++;
320 if (print)
321 DEBUG("PLL[0x%02X]", idx);
322 val = gctx->card->pll_read(gctx->card, idx);
323 break;
324 case ATOM_ARG_MC:
325 idx = U8(*ptr);
326 (*ptr)++;
327 if (print)
328 DEBUG("MC[0x%02X]", idx);
329 val = gctx->card->mc_read(gctx->card, idx);
330 break;
331 }
332 if (saved)
333 *saved = val;
334 val &= atom_arg_mask[align];
335 val >>= atom_arg_shift[align];
336 if (print)
337 switch (align) {
338 case ATOM_SRC_DWORD:
339 DEBUG(".[31:0] -> 0x%08X\n", val);
340 break;
341 case ATOM_SRC_WORD0:
342 DEBUG(".[15:0] -> 0x%04X\n", val);
343 break;
344 case ATOM_SRC_WORD8:
345 DEBUG(".[23:8] -> 0x%04X\n", val);
346 break;
347 case ATOM_SRC_WORD16:
348 DEBUG(".[31:16] -> 0x%04X\n", val);
349 break;
350 case ATOM_SRC_BYTE0:
351 DEBUG(".[7:0] -> 0x%02X\n", val);
352 break;
353 case ATOM_SRC_BYTE8:
354 DEBUG(".[15:8] -> 0x%02X\n", val);
355 break;
356 case ATOM_SRC_BYTE16:
357 DEBUG(".[23:16] -> 0x%02X\n", val);
358 break;
359 case ATOM_SRC_BYTE24:
360 DEBUG(".[31:24] -> 0x%02X\n", val);
361 break;
362 }
363 return val;
364}
365
366static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
367{
368 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
369 switch (arg) {
370 case ATOM_ARG_REG:
371 case ATOM_ARG_ID:
372 (*ptr) += 2;
373 break;
374 case ATOM_ARG_PLL:
375 case ATOM_ARG_MC:
376 case ATOM_ARG_PS:
377 case ATOM_ARG_WS:
378 case ATOM_ARG_FB:
379 (*ptr)++;
380 break;
381 case ATOM_ARG_IMM:
382 switch (align) {
383 case ATOM_SRC_DWORD:
384 (*ptr) += 4;
385 return;
386 case ATOM_SRC_WORD0:
387 case ATOM_SRC_WORD8:
388 case ATOM_SRC_WORD16:
389 (*ptr) += 2;
390 return;
391 case ATOM_SRC_BYTE0:
392 case ATOM_SRC_BYTE8:
393 case ATOM_SRC_BYTE16:
394 case ATOM_SRC_BYTE24:
395 (*ptr)++;
396 return;
397 }
398 return;
399 }
400}
401
402static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
403{
404 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
405}
406
407static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
408{
409 uint32_t val = 0xCDCDCDCD;
410
411 switch (align) {
412 case ATOM_SRC_DWORD:
413 val = U32(*ptr);
414 (*ptr) += 4;
415 break;
416 case ATOM_SRC_WORD0:
417 case ATOM_SRC_WORD8:
418 case ATOM_SRC_WORD16:
419 val = U16(*ptr);
420 (*ptr) += 2;
421 break;
422 case ATOM_SRC_BYTE0:
423 case ATOM_SRC_BYTE8:
424 case ATOM_SRC_BYTE16:
425 case ATOM_SRC_BYTE24:
426 val = U8(*ptr);
427 (*ptr)++;
428 break;
429 }
430 return val;
431}
432
433static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
434 int *ptr, uint32_t *saved, int print)
435{
436 return atom_get_src_int(ctx,
437 arg | atom_dst_to_src[(attr >> 3) &
438 7][(attr >> 6) & 3] << 3,
439 ptr, saved, print);
440}
441
442static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
443{
444 atom_skip_src_int(ctx,
445 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
446 3] << 3, ptr);
447}
448
449static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
450 int *ptr, uint32_t val, uint32_t saved)
451{
452 uint32_t align =
453 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
454 val, idx;
455 struct atom_context *gctx = ctx->ctx;
456 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
457 val <<= atom_arg_shift[align];
458 val &= atom_arg_mask[align];
459 saved &= ~atom_arg_mask[align];
460 val |= saved;
461 switch (arg) {
462 case ATOM_ARG_REG:
463 idx = U16(*ptr);
464 (*ptr) += 2;
465 DEBUG("REG[0x%04X]", idx);
466 idx += gctx->reg_block;
467 switch (gctx->io_mode) {
468 case ATOM_IO_MM:
469 if (idx == 0)
470 gctx->card->reg_write(gctx->card, idx,
471 val << 2);
472 else
473 gctx->card->reg_write(gctx->card, idx, val);
474 break;
475 case ATOM_IO_PCI:
476 printk(KERN_INFO
477 "PCI registers are not implemented.\n");
478 return;
479 case ATOM_IO_SYSIO:
480 printk(KERN_INFO
481 "SYSIO registers are not implemented.\n");
482 return;
483 default:
484 if (!(gctx->io_mode & 0x80)) {
485 printk(KERN_INFO "Bad IO mode.\n");
486 return;
487 }
488 if (!gctx->iio[gctx->io_mode & 0xFF]) {
489 printk(KERN_INFO
490 "Undefined indirect IO write method %d.\n",
491 gctx->io_mode & 0x7F);
492 return;
493 }
494 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
495 idx, val);
496 }
497 break;
498 case ATOM_ARG_PS:
499 idx = U8(*ptr);
500 (*ptr)++;
501 DEBUG("PS[0x%02X]", idx);
502 ctx->ps[idx] = cpu_to_le32(val);
503 break;
504 case ATOM_ARG_WS:
505 idx = U8(*ptr);
506 (*ptr)++;
507 DEBUG("WS[0x%02X]", idx);
508 switch (idx) {
509 case ATOM_WS_QUOTIENT:
510 gctx->divmul[0] = val;
511 break;
512 case ATOM_WS_REMAINDER:
513 gctx->divmul[1] = val;
514 break;
515 case ATOM_WS_DATAPTR:
516 gctx->data_block = val;
517 break;
518 case ATOM_WS_SHIFT:
519 gctx->shift = val;
520 break;
521 case ATOM_WS_OR_MASK:
522 case ATOM_WS_AND_MASK:
523 break;
524 case ATOM_WS_FB_WINDOW:
525 gctx->fb_base = val;
526 break;
527 case ATOM_WS_ATTRIBUTES:
528 gctx->io_attr = val;
529 break;
530 case ATOM_WS_REGPTR:
531 gctx->reg_block = val;
532 break;
533 default:
534 ctx->ws[idx] = val;
535 }
536 break;
537 case ATOM_ARG_FB:
538 idx = U8(*ptr);
539 (*ptr)++;
540 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
541 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
542 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
543 } else
544 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
545 DEBUG("FB[0x%02X]", idx);
546 break;
547 case ATOM_ARG_PLL:
548 idx = U8(*ptr);
549 (*ptr)++;
550 DEBUG("PLL[0x%02X]", idx);
551 gctx->card->pll_write(gctx->card, idx, val);
552 break;
553 case ATOM_ARG_MC:
554 idx = U8(*ptr);
555 (*ptr)++;
556 DEBUG("MC[0x%02X]", idx);
557 gctx->card->mc_write(gctx->card, idx, val);
558 return;
559 }
560 switch (align) {
561 case ATOM_SRC_DWORD:
562 DEBUG(".[31:0] <- 0x%08X\n", old_val);
563 break;
564 case ATOM_SRC_WORD0:
565 DEBUG(".[15:0] <- 0x%04X\n", old_val);
566 break;
567 case ATOM_SRC_WORD8:
568 DEBUG(".[23:8] <- 0x%04X\n", old_val);
569 break;
570 case ATOM_SRC_WORD16:
571 DEBUG(".[31:16] <- 0x%04X\n", old_val);
572 break;
573 case ATOM_SRC_BYTE0:
574 DEBUG(".[7:0] <- 0x%02X\n", old_val);
575 break;
576 case ATOM_SRC_BYTE8:
577 DEBUG(".[15:8] <- 0x%02X\n", old_val);
578 break;
579 case ATOM_SRC_BYTE16:
580 DEBUG(".[23:16] <- 0x%02X\n", old_val);
581 break;
582 case ATOM_SRC_BYTE24:
583 DEBUG(".[31:24] <- 0x%02X\n", old_val);
584 break;
585 }
586}
587
588static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
589{
590 uint8_t attr = U8((*ptr)++);
591 uint32_t dst, src, saved;
592 int dptr = *ptr;
593 SDEBUG(" dst: ");
594 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
595 SDEBUG(" src: ");
596 src = atom_get_src(ctx, attr, ptr);
597 dst += src;
598 SDEBUG(" dst: ");
599 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
600}
601
602static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
603{
604 uint8_t attr = U8((*ptr)++);
605 uint32_t dst, src, saved;
606 int dptr = *ptr;
607 SDEBUG(" dst: ");
608 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
609 SDEBUG(" src: ");
610 src = atom_get_src(ctx, attr, ptr);
611 dst &= src;
612 SDEBUG(" dst: ");
613 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
614}
615
616static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
617{
618 printk("ATOM BIOS beeped!\n");
619}
620
621static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
622{
623 int idx = U8((*ptr)++);
624 int r = 0;
625
626 if (idx < ATOM_TABLE_NAMES_CNT)
627 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
628 else
629 SDEBUG(" table: %d\n", idx);
630 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
631 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
632 if (r) {
633 ctx->abort = true;
634 }
635}
636
637static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
638{
639 uint8_t attr = U8((*ptr)++);
640 uint32_t saved;
641 int dptr = *ptr;
642 attr &= 0x38;
643 attr |= atom_def_dst[attr >> 3] << 6;
644 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
645 SDEBUG(" dst: ");
646 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
647}
648
649static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
650{
651 uint8_t attr = U8((*ptr)++);
652 uint32_t dst, src;
653 SDEBUG(" src1: ");
654 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
655 SDEBUG(" src2: ");
656 src = atom_get_src(ctx, attr, ptr);
657 ctx->ctx->cs_equal = (dst == src);
658 ctx->ctx->cs_above = (dst > src);
659 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
660 ctx->ctx->cs_above ? "GT" : "LE");
661}
662
663static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
664{
665 unsigned count = U8((*ptr)++);
666 SDEBUG(" count: %d\n", count);
667 if (arg == ATOM_UNIT_MICROSEC)
668 udelay(count);
669 else if (!drm_can_sleep())
670 mdelay(count);
671 else
672 msleep(count);
673}
674
675static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
676{
677 uint8_t attr = U8((*ptr)++);
678 uint32_t dst, src;
679 SDEBUG(" src1: ");
680 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
681 SDEBUG(" src2: ");
682 src = atom_get_src(ctx, attr, ptr);
683 if (src != 0) {
684 ctx->ctx->divmul[0] = dst / src;
685 ctx->ctx->divmul[1] = dst % src;
686 } else {
687 ctx->ctx->divmul[0] = 0;
688 ctx->ctx->divmul[1] = 0;
689 }
690}
691
692static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
693{
694 /* functionally, a nop */
695}
696
697static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
698{
699 int execute = 0, target = U16(*ptr);
700 unsigned long cjiffies;
701
702 (*ptr) += 2;
703 switch (arg) {
704 case ATOM_COND_ABOVE:
705 execute = ctx->ctx->cs_above;
706 break;
707 case ATOM_COND_ABOVEOREQUAL:
708 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
709 break;
710 case ATOM_COND_ALWAYS:
711 execute = 1;
712 break;
713 case ATOM_COND_BELOW:
714 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
715 break;
716 case ATOM_COND_BELOWOREQUAL:
717 execute = !ctx->ctx->cs_above;
718 break;
719 case ATOM_COND_EQUAL:
720 execute = ctx->ctx->cs_equal;
721 break;
722 case ATOM_COND_NOTEQUAL:
723 execute = !ctx->ctx->cs_equal;
724 break;
725 }
726 if (arg != ATOM_COND_ALWAYS)
727 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
728 SDEBUG(" target: 0x%04X\n", target);
729 if (execute) {
730 if (ctx->last_jump == (ctx->start + target)) {
731 cjiffies = jiffies;
732 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
733 cjiffies -= ctx->last_jump_jiffies;
734 if ((jiffies_to_msecs(cjiffies) > 5000)) {
735 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
736 ctx->abort = true;
737 }
738 } else {
739 /* jiffies wrap around we will just wait a little longer */
740 ctx->last_jump_jiffies = jiffies;
741 }
742 } else {
743 ctx->last_jump = ctx->start + target;
744 ctx->last_jump_jiffies = jiffies;
745 }
746 *ptr = ctx->start + target;
747 }
748}
749
750static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
751{
752 uint8_t attr = U8((*ptr)++);
753 uint32_t dst, mask, src, saved;
754 int dptr = *ptr;
755 SDEBUG(" dst: ");
756 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
757 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
758 SDEBUG(" mask: 0x%08x", mask);
759 SDEBUG(" src: ");
760 src = atom_get_src(ctx, attr, ptr);
761 dst &= mask;
762 dst |= src;
763 SDEBUG(" dst: ");
764 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
765}
766
767static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
768{
769 uint8_t attr = U8((*ptr)++);
770 uint32_t src, saved;
771 int dptr = *ptr;
772 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
773 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
774 else {
775 atom_skip_dst(ctx, arg, attr, ptr);
776 saved = 0xCDCDCDCD;
777 }
778 SDEBUG(" src: ");
779 src = atom_get_src(ctx, attr, ptr);
780 SDEBUG(" dst: ");
781 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
782}
783
784static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
785{
786 uint8_t attr = U8((*ptr)++);
787 uint32_t dst, src;
788 SDEBUG(" src1: ");
789 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
790 SDEBUG(" src2: ");
791 src = atom_get_src(ctx, attr, ptr);
792 ctx->ctx->divmul[0] = dst * src;
793}
794
795static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
796{
797 /* nothing */
798}
799
800static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
801{
802 uint8_t attr = U8((*ptr)++);
803 uint32_t dst, src, saved;
804 int dptr = *ptr;
805 SDEBUG(" dst: ");
806 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
807 SDEBUG(" src: ");
808 src = atom_get_src(ctx, attr, ptr);
809 dst |= src;
810 SDEBUG(" dst: ");
811 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
812}
813
814static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
815{
816 uint8_t val = U8((*ptr)++);
817 SDEBUG("POST card output: 0x%02X\n", val);
818}
819
820static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
821{
822 printk(KERN_INFO "unimplemented!\n");
823}
824
825static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
826{
827 printk(KERN_INFO "unimplemented!\n");
828}
829
830static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
831{
832 printk(KERN_INFO "unimplemented!\n");
833}
834
835static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
836{
837 int idx = U8(*ptr);
838 (*ptr)++;
839 SDEBUG(" block: %d\n", idx);
840 if (!idx)
841 ctx->ctx->data_block = 0;
842 else if (idx == 255)
843 ctx->ctx->data_block = ctx->start;
844 else
845 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
846 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
847}
848
849static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
850{
851 uint8_t attr = U8((*ptr)++);
852 SDEBUG(" fb_base: ");
853 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
854}
855
856static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
857{
858 int port;
859 switch (arg) {
860 case ATOM_PORT_ATI:
861 port = U16(*ptr);
862 if (port < ATOM_IO_NAMES_CNT)
863 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
864 else
865 SDEBUG(" port: %d\n", port);
866 if (!port)
867 ctx->ctx->io_mode = ATOM_IO_MM;
868 else
869 ctx->ctx->io_mode = ATOM_IO_IIO | port;
870 (*ptr) += 2;
871 break;
872 case ATOM_PORT_PCI:
873 ctx->ctx->io_mode = ATOM_IO_PCI;
874 (*ptr)++;
875 break;
876 case ATOM_PORT_SYSIO:
877 ctx->ctx->io_mode = ATOM_IO_SYSIO;
878 (*ptr)++;
879 break;
880 }
881}
882
883static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
884{
885 ctx->ctx->reg_block = U16(*ptr);
886 (*ptr) += 2;
887 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
888}
889
890static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
891{
892 uint8_t attr = U8((*ptr)++), shift;
893 uint32_t saved, dst;
894 int dptr = *ptr;
895 attr &= 0x38;
896 attr |= atom_def_dst[attr >> 3] << 6;
897 SDEBUG(" dst: ");
898 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
899 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
900 SDEBUG(" shift: %d\n", shift);
901 dst <<= shift;
902 SDEBUG(" dst: ");
903 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
904}
905
906static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
907{
908 uint8_t attr = U8((*ptr)++), shift;
909 uint32_t saved, dst;
910 int dptr = *ptr;
911 attr &= 0x38;
912 attr |= atom_def_dst[attr >> 3] << 6;
913 SDEBUG(" dst: ");
914 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
915 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
916 SDEBUG(" shift: %d\n", shift);
917 dst >>= shift;
918 SDEBUG(" dst: ");
919 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
920}
921
922static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
923{
924 uint8_t attr = U8((*ptr)++), shift;
925 uint32_t saved, dst;
926 int dptr = *ptr;
927 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
928 SDEBUG(" dst: ");
929 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
930 /* op needs to full dst value */
931 dst = saved;
932 shift = atom_get_src(ctx, attr, ptr);
933 SDEBUG(" shift: %d\n", shift);
934 dst <<= shift;
935 dst &= atom_arg_mask[dst_align];
936 dst >>= atom_arg_shift[dst_align];
937 SDEBUG(" dst: ");
938 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
939}
940
941static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
942{
943 uint8_t attr = U8((*ptr)++), shift;
944 uint32_t saved, dst;
945 int dptr = *ptr;
946 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
947 SDEBUG(" dst: ");
948 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
949 /* op needs to full dst value */
950 dst = saved;
951 shift = atom_get_src(ctx, attr, ptr);
952 SDEBUG(" shift: %d\n", shift);
953 dst >>= shift;
954 dst &= atom_arg_mask[dst_align];
955 dst >>= atom_arg_shift[dst_align];
956 SDEBUG(" dst: ");
957 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
958}
959
960static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
961{
962 uint8_t attr = U8((*ptr)++);
963 uint32_t dst, src, saved;
964 int dptr = *ptr;
965 SDEBUG(" dst: ");
966 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
967 SDEBUG(" src: ");
968 src = atom_get_src(ctx, attr, ptr);
969 dst -= src;
970 SDEBUG(" dst: ");
971 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
972}
973
974static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
975{
976 uint8_t attr = U8((*ptr)++);
977 uint32_t src, val, target;
978 SDEBUG(" switch: ");
979 src = atom_get_src(ctx, attr, ptr);
980 while (U16(*ptr) != ATOM_CASE_END)
981 if (U8(*ptr) == ATOM_CASE_MAGIC) {
982 (*ptr)++;
983 SDEBUG(" case: ");
984 val =
985 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
986 ptr);
987 target = U16(*ptr);
988 if (val == src) {
989 SDEBUG(" target: %04X\n", target);
990 *ptr = ctx->start + target;
991 return;
992 }
993 (*ptr) += 2;
994 } else {
995 printk(KERN_INFO "Bad case.\n");
996 return;
997 }
998 (*ptr) += 2;
999}
1000
1001static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1002{
1003 uint8_t attr = U8((*ptr)++);
1004 uint32_t dst, src;
1005 SDEBUG(" src1: ");
1006 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1007 SDEBUG(" src2: ");
1008 src = atom_get_src(ctx, attr, ptr);
1009 ctx->ctx->cs_equal = ((dst & src) == 0);
1010 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1011}
1012
1013static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1014{
1015 uint8_t attr = U8((*ptr)++);
1016 uint32_t dst, src, saved;
1017 int dptr = *ptr;
1018 SDEBUG(" dst: ");
1019 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1020 SDEBUG(" src: ");
1021 src = atom_get_src(ctx, attr, ptr);
1022 dst ^= src;
1023 SDEBUG(" dst: ");
1024 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1025}
1026
1027static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1028{
1029 printk(KERN_INFO "unimplemented!\n");
1030}
1031
1032static struct {
1033 void (*func) (atom_exec_context *, int *, int);
1034 int arg;
1035} opcode_table[ATOM_OP_CNT] = {
1036 {
1037 NULL, 0}, {
1038 atom_op_move, ATOM_ARG_REG}, {
1039 atom_op_move, ATOM_ARG_PS}, {
1040 atom_op_move, ATOM_ARG_WS}, {
1041 atom_op_move, ATOM_ARG_FB}, {
1042 atom_op_move, ATOM_ARG_PLL}, {
1043 atom_op_move, ATOM_ARG_MC}, {
1044 atom_op_and, ATOM_ARG_REG}, {
1045 atom_op_and, ATOM_ARG_PS}, {
1046 atom_op_and, ATOM_ARG_WS}, {
1047 atom_op_and, ATOM_ARG_FB}, {
1048 atom_op_and, ATOM_ARG_PLL}, {
1049 atom_op_and, ATOM_ARG_MC}, {
1050 atom_op_or, ATOM_ARG_REG}, {
1051 atom_op_or, ATOM_ARG_PS}, {
1052 atom_op_or, ATOM_ARG_WS}, {
1053 atom_op_or, ATOM_ARG_FB}, {
1054 atom_op_or, ATOM_ARG_PLL}, {
1055 atom_op_or, ATOM_ARG_MC}, {
1056 atom_op_shift_left, ATOM_ARG_REG}, {
1057 atom_op_shift_left, ATOM_ARG_PS}, {
1058 atom_op_shift_left, ATOM_ARG_WS}, {
1059 atom_op_shift_left, ATOM_ARG_FB}, {
1060 atom_op_shift_left, ATOM_ARG_PLL}, {
1061 atom_op_shift_left, ATOM_ARG_MC}, {
1062 atom_op_shift_right, ATOM_ARG_REG}, {
1063 atom_op_shift_right, ATOM_ARG_PS}, {
1064 atom_op_shift_right, ATOM_ARG_WS}, {
1065 atom_op_shift_right, ATOM_ARG_FB}, {
1066 atom_op_shift_right, ATOM_ARG_PLL}, {
1067 atom_op_shift_right, ATOM_ARG_MC}, {
1068 atom_op_mul, ATOM_ARG_REG}, {
1069 atom_op_mul, ATOM_ARG_PS}, {
1070 atom_op_mul, ATOM_ARG_WS}, {
1071 atom_op_mul, ATOM_ARG_FB}, {
1072 atom_op_mul, ATOM_ARG_PLL}, {
1073 atom_op_mul, ATOM_ARG_MC}, {
1074 atom_op_div, ATOM_ARG_REG}, {
1075 atom_op_div, ATOM_ARG_PS}, {
1076 atom_op_div, ATOM_ARG_WS}, {
1077 atom_op_div, ATOM_ARG_FB}, {
1078 atom_op_div, ATOM_ARG_PLL}, {
1079 atom_op_div, ATOM_ARG_MC}, {
1080 atom_op_add, ATOM_ARG_REG}, {
1081 atom_op_add, ATOM_ARG_PS}, {
1082 atom_op_add, ATOM_ARG_WS}, {
1083 atom_op_add, ATOM_ARG_FB}, {
1084 atom_op_add, ATOM_ARG_PLL}, {
1085 atom_op_add, ATOM_ARG_MC}, {
1086 atom_op_sub, ATOM_ARG_REG}, {
1087 atom_op_sub, ATOM_ARG_PS}, {
1088 atom_op_sub, ATOM_ARG_WS}, {
1089 atom_op_sub, ATOM_ARG_FB}, {
1090 atom_op_sub, ATOM_ARG_PLL}, {
1091 atom_op_sub, ATOM_ARG_MC}, {
1092 atom_op_setport, ATOM_PORT_ATI}, {
1093 atom_op_setport, ATOM_PORT_PCI}, {
1094 atom_op_setport, ATOM_PORT_SYSIO}, {
1095 atom_op_setregblock, 0}, {
1096 atom_op_setfbbase, 0}, {
1097 atom_op_compare, ATOM_ARG_REG}, {
1098 atom_op_compare, ATOM_ARG_PS}, {
1099 atom_op_compare, ATOM_ARG_WS}, {
1100 atom_op_compare, ATOM_ARG_FB}, {
1101 atom_op_compare, ATOM_ARG_PLL}, {
1102 atom_op_compare, ATOM_ARG_MC}, {
1103 atom_op_switch, 0}, {
1104 atom_op_jump, ATOM_COND_ALWAYS}, {
1105 atom_op_jump, ATOM_COND_EQUAL}, {
1106 atom_op_jump, ATOM_COND_BELOW}, {
1107 atom_op_jump, ATOM_COND_ABOVE}, {
1108 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1109 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1110 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1111 atom_op_test, ATOM_ARG_REG}, {
1112 atom_op_test, ATOM_ARG_PS}, {
1113 atom_op_test, ATOM_ARG_WS}, {
1114 atom_op_test, ATOM_ARG_FB}, {
1115 atom_op_test, ATOM_ARG_PLL}, {
1116 atom_op_test, ATOM_ARG_MC}, {
1117 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1118 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1119 atom_op_calltable, 0}, {
1120 atom_op_repeat, 0}, {
1121 atom_op_clear, ATOM_ARG_REG}, {
1122 atom_op_clear, ATOM_ARG_PS}, {
1123 atom_op_clear, ATOM_ARG_WS}, {
1124 atom_op_clear, ATOM_ARG_FB}, {
1125 atom_op_clear, ATOM_ARG_PLL}, {
1126 atom_op_clear, ATOM_ARG_MC}, {
1127 atom_op_nop, 0}, {
1128 atom_op_eot, 0}, {
1129 atom_op_mask, ATOM_ARG_REG}, {
1130 atom_op_mask, ATOM_ARG_PS}, {
1131 atom_op_mask, ATOM_ARG_WS}, {
1132 atom_op_mask, ATOM_ARG_FB}, {
1133 atom_op_mask, ATOM_ARG_PLL}, {
1134 atom_op_mask, ATOM_ARG_MC}, {
1135 atom_op_postcard, 0}, {
1136 atom_op_beep, 0}, {
1137 atom_op_savereg, 0}, {
1138 atom_op_restorereg, 0}, {
1139 atom_op_setdatablock, 0}, {
1140 atom_op_xor, ATOM_ARG_REG}, {
1141 atom_op_xor, ATOM_ARG_PS}, {
1142 atom_op_xor, ATOM_ARG_WS}, {
1143 atom_op_xor, ATOM_ARG_FB}, {
1144 atom_op_xor, ATOM_ARG_PLL}, {
1145 atom_op_xor, ATOM_ARG_MC}, {
1146 atom_op_shl, ATOM_ARG_REG}, {
1147 atom_op_shl, ATOM_ARG_PS}, {
1148 atom_op_shl, ATOM_ARG_WS}, {
1149 atom_op_shl, ATOM_ARG_FB}, {
1150 atom_op_shl, ATOM_ARG_PLL}, {
1151 atom_op_shl, ATOM_ARG_MC}, {
1152 atom_op_shr, ATOM_ARG_REG}, {
1153 atom_op_shr, ATOM_ARG_PS}, {
1154 atom_op_shr, ATOM_ARG_WS}, {
1155 atom_op_shr, ATOM_ARG_FB}, {
1156 atom_op_shr, ATOM_ARG_PLL}, {
1157 atom_op_shr, ATOM_ARG_MC}, {
1158atom_op_debug, 0},};
1159
1160static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1161{
1162 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1163 int len, ws, ps, ptr;
1164 unsigned char op;
1165 atom_exec_context ectx;
1166 int ret = 0;
1167
1168 if (!base)
1169 return -EINVAL;
1170
1171 len = CU16(base + ATOM_CT_SIZE_PTR);
1172 ws = CU8(base + ATOM_CT_WS_PTR);
1173 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1174 ptr = base + ATOM_CT_CODE_PTR;
1175
1176 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1177
1178 ectx.ctx = ctx;
1179 ectx.ps_shift = ps / 4;
1180 ectx.start = base;
1181 ectx.ps = params;
1182 ectx.abort = false;
1183 ectx.last_jump = 0;
1184 if (ws)
1185 ectx.ws = kzalloc(4 * ws, GFP_KERNEL);
1186 else
1187 ectx.ws = NULL;
1188
1189 debug_depth++;
1190 while (1) {
1191 op = CU8(ptr++);
1192 if (op < ATOM_OP_NAMES_CNT)
1193 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1194 else
1195 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1196 if (ectx.abort) {
1197 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1198 base, len, ws, ps, ptr - 1);
1199 ret = -EINVAL;
1200 goto free;
1201 }
1202
1203 if (op < ATOM_OP_CNT && op > 0)
1204 opcode_table[op].func(&ectx, &ptr,
1205 opcode_table[op].arg);
1206 else
1207 break;
1208
1209 if (op == ATOM_OP_EOT)
1210 break;
1211 }
1212 debug_depth--;
1213 SDEBUG("<<\n");
1214
1215free:
1216 if (ws)
1217 kfree(ectx.ws);
1218 return ret;
1219}
1220
1221int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1222{
1223 int r;
1224
1225 mutex_lock(&ctx->mutex);
1226 /* reset data block */
1227 ctx->data_block = 0;
1228 /* reset reg block */
1229 ctx->reg_block = 0;
1230 /* reset fb window */
1231 ctx->fb_base = 0;
1232 /* reset io mode */
1233 ctx->io_mode = ATOM_IO_MM;
1234 /* reset divmul */
1235 ctx->divmul[0] = 0;
1236 ctx->divmul[1] = 0;
1237 r = atom_execute_table_locked(ctx, index, params);
1238 mutex_unlock(&ctx->mutex);
1239 return r;
1240}
1241
1242int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1243{
1244 int r;
1245 mutex_lock(&ctx->scratch_mutex);
1246 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1247 mutex_unlock(&ctx->scratch_mutex);
1248 return r;
1249}
1250
1251static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1252
1253static void atom_index_iio(struct atom_context *ctx, int base)
1254{
1255 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1256 if (!ctx->iio)
1257 return;
1258 while (CU8(base) == ATOM_IIO_START) {
1259 ctx->iio[CU8(base + 1)] = base + 2;
1260 base += 2;
1261 while (CU8(base) != ATOM_IIO_END)
1262 base += atom_iio_len[CU8(base)];
1263 base += 3;
1264 }
1265}
1266
1267struct atom_context *atom_parse(struct card_info *card, void *bios)
1268{
1269 int base;
1270 struct atom_context *ctx =
1271 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1272 char *str;
1273 char name[512];
1274 int i;
1275
1276 if (!ctx)
1277 return NULL;
1278
1279 ctx->card = card;
1280 ctx->bios = bios;
1281
1282 if (CU16(0) != ATOM_BIOS_MAGIC) {
1283 printk(KERN_INFO "Invalid BIOS magic.\n");
1284 kfree(ctx);
1285 return NULL;
1286 }
1287 if (strncmp
1288 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1289 strlen(ATOM_ATI_MAGIC))) {
1290 printk(KERN_INFO "Invalid ATI magic.\n");
1291 kfree(ctx);
1292 return NULL;
1293 }
1294
1295 base = CU16(ATOM_ROM_TABLE_PTR);
1296 if (strncmp
1297 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1298 strlen(ATOM_ROM_MAGIC))) {
1299 printk(KERN_INFO "Invalid ATOM magic.\n");
1300 kfree(ctx);
1301 return NULL;
1302 }
1303
1304 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1305 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1306 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1307 if (!ctx->iio) {
1308 atom_destroy(ctx);
1309 return NULL;
1310 }
1311
1312 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1313 while (*str && ((*str == '\n') || (*str == '\r')))
1314 str++;
1315 /* name string isn't always 0 terminated */
1316 for (i = 0; i < 511; i++) {
1317 name[i] = str[i];
1318 if (name[i] < '.' || name[i] > 'z') {
1319 name[i] = 0;
1320 break;
1321 }
1322 }
1323 printk(KERN_INFO "ATOM BIOS: %s\n", name);
1324
1325 return ctx;
1326}
1327
1328int atom_asic_init(struct atom_context *ctx)
1329{
1330 struct radeon_device *rdev = ctx->card->dev->dev_private;
1331 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1332 uint32_t ps[16];
1333 int ret;
1334
1335 memset(ps, 0, 64);
1336
1337 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1338 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1339 if (!ps[0] || !ps[1])
1340 return 1;
1341
1342 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1343 return 1;
1344 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1345 if (ret)
1346 return ret;
1347
1348 memset(ps, 0, 64);
1349
1350 if (rdev->family < CHIP_R600) {
1351 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1352 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1353 }
1354 return ret;
1355}
1356
1357void atom_destroy(struct atom_context *ctx)
1358{
1359 kfree(ctx->iio);
1360 kfree(ctx);
1361}
1362
1363bool atom_parse_data_header(struct atom_context *ctx, int index,
1364 uint16_t * size, uint8_t * frev, uint8_t * crev,
1365 uint16_t * data_start)
1366{
1367 int offset = index * 2 + 4;
1368 int idx = CU16(ctx->data_table + offset);
1369 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1370
1371 if (!mdt[index])
1372 return false;
1373
1374 if (size)
1375 *size = CU16(idx);
1376 if (frev)
1377 *frev = CU8(idx + 2);
1378 if (crev)
1379 *crev = CU8(idx + 3);
1380 *data_start = idx;
1381 return true;
1382}
1383
1384bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1385 uint8_t * crev)
1386{
1387 int offset = index * 2 + 4;
1388 int idx = CU16(ctx->cmd_table + offset);
1389 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1390
1391 if (!mct[index])
1392 return false;
1393
1394 if (frev)
1395 *frev = CU8(idx + 2);
1396 if (crev)
1397 *crev = CU8(idx + 3);
1398 return true;
1399}
1400
1401int atom_allocate_fb_scratch(struct atom_context *ctx)
1402{
1403 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1404 uint16_t data_offset;
1405 int usage_bytes = 0;
1406 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1407
1408 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1409 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1410
1411 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1412 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1413 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1414
1415 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1416 }
1417 ctx->scratch_size_bytes = 0;
1418 if (usage_bytes == 0)
1419 usage_bytes = 20 * 1024;
1420 /* allocate some scratch memory */
1421 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1422 if (!ctx->scratch)
1423 return -ENOMEM;
1424 ctx->scratch_size_bytes = usage_bytes;
1425 return 0;
1426}
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25#include <linux/module.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28
29#include <asm/unaligned.h>
30
31#include <drm/drm_device.h>
32#include <drm/drm_util.h>
33
34#define ATOM_DEBUG
35
36#include "atom.h"
37#include "atom-names.h"
38#include "atom-bits.h"
39#include "radeon.h"
40
41#define ATOM_COND_ABOVE 0
42#define ATOM_COND_ABOVEOREQUAL 1
43#define ATOM_COND_ALWAYS 2
44#define ATOM_COND_BELOW 3
45#define ATOM_COND_BELOWOREQUAL 4
46#define ATOM_COND_EQUAL 5
47#define ATOM_COND_NOTEQUAL 6
48
49#define ATOM_PORT_ATI 0
50#define ATOM_PORT_PCI 1
51#define ATOM_PORT_SYSIO 2
52
53#define ATOM_UNIT_MICROSEC 0
54#define ATOM_UNIT_MILLISEC 1
55
56#define PLL_INDEX 2
57#define PLL_DATA 3
58
59typedef struct {
60 struct atom_context *ctx;
61 uint32_t *ps, *ws;
62 int ps_shift;
63 uint16_t start;
64 unsigned last_jump;
65 unsigned long last_jump_jiffies;
66 bool abort;
67} atom_exec_context;
68
69int atom_debug = 0;
70static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
71int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
72
73static uint32_t atom_arg_mask[8] = {
74 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
75 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
76};
77static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
78
79static int atom_dst_to_src[8][4] = {
80 /* translate destination alignment field to the source alignment encoding */
81 {0, 0, 0, 0},
82 {1, 2, 3, 0},
83 {1, 2, 3, 0},
84 {1, 2, 3, 0},
85 {4, 5, 6, 7},
86 {4, 5, 6, 7},
87 {4, 5, 6, 7},
88 {4, 5, 6, 7},
89};
90static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
91
92static int debug_depth = 0;
93#ifdef ATOM_DEBUG
94static void debug_print_spaces(int n)
95{
96 while (n--)
97 printk(" ");
98}
99
100#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
101#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
102#else
103#define DEBUG(...) do { } while (0)
104#define SDEBUG(...) do { } while (0)
105#endif
106
107static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
108 uint32_t index, uint32_t data)
109{
110 struct radeon_device *rdev = ctx->card->dev->dev_private;
111 uint32_t temp = 0xCDCDCDCD;
112
113 while (1)
114 switch (CU8(base)) {
115 case ATOM_IIO_NOP:
116 base++;
117 break;
118 case ATOM_IIO_READ:
119 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
120 base += 3;
121 break;
122 case ATOM_IIO_WRITE:
123 if (rdev->family == CHIP_RV515)
124 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
125 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
126 base += 3;
127 break;
128 case ATOM_IIO_CLEAR:
129 temp &=
130 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
131 CU8(base + 2));
132 base += 3;
133 break;
134 case ATOM_IIO_SET:
135 temp |=
136 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
137 2);
138 base += 3;
139 break;
140 case ATOM_IIO_MOVE_INDEX:
141 temp &=
142 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
143 CU8(base + 3));
144 temp |=
145 ((index >> CU8(base + 2)) &
146 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
147 3);
148 base += 4;
149 break;
150 case ATOM_IIO_MOVE_DATA:
151 temp &=
152 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
153 CU8(base + 3));
154 temp |=
155 ((data >> CU8(base + 2)) &
156 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
157 3);
158 base += 4;
159 break;
160 case ATOM_IIO_MOVE_ATTR:
161 temp &=
162 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
163 CU8(base + 3));
164 temp |=
165 ((ctx->
166 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
167 CU8
168 (base
169 +
170 1))))
171 << CU8(base + 3);
172 base += 4;
173 break;
174 case ATOM_IIO_END:
175 return temp;
176 default:
177 pr_info("Unknown IIO opcode\n");
178 return 0;
179 }
180}
181
182static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
183 int *ptr, uint32_t *saved, int print)
184{
185 uint32_t idx, val = 0xCDCDCDCD, align, arg;
186 struct atom_context *gctx = ctx->ctx;
187 arg = attr & 7;
188 align = (attr >> 3) & 7;
189 switch (arg) {
190 case ATOM_ARG_REG:
191 idx = U16(*ptr);
192 (*ptr) += 2;
193 if (print)
194 DEBUG("REG[0x%04X]", idx);
195 idx += gctx->reg_block;
196 switch (gctx->io_mode) {
197 case ATOM_IO_MM:
198 val = gctx->card->reg_read(gctx->card, idx);
199 break;
200 case ATOM_IO_PCI:
201 pr_info("PCI registers are not implemented\n");
202 return 0;
203 case ATOM_IO_SYSIO:
204 pr_info("SYSIO registers are not implemented\n");
205 return 0;
206 default:
207 if (!(gctx->io_mode & 0x80)) {
208 pr_info("Bad IO mode\n");
209 return 0;
210 }
211 if (!gctx->iio[gctx->io_mode & 0x7F]) {
212 pr_info("Undefined indirect IO read method %d\n",
213 gctx->io_mode & 0x7F);
214 return 0;
215 }
216 val =
217 atom_iio_execute(gctx,
218 gctx->iio[gctx->io_mode & 0x7F],
219 idx, 0);
220 }
221 break;
222 case ATOM_ARG_PS:
223 idx = U8(*ptr);
224 (*ptr)++;
225 /* get_unaligned_le32 avoids unaligned accesses from atombios
226 * tables, noticed on a DEC Alpha. */
227 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
228 if (print)
229 DEBUG("PS[0x%02X,0x%04X]", idx, val);
230 break;
231 case ATOM_ARG_WS:
232 idx = U8(*ptr);
233 (*ptr)++;
234 if (print)
235 DEBUG("WS[0x%02X]", idx);
236 switch (idx) {
237 case ATOM_WS_QUOTIENT:
238 val = gctx->divmul[0];
239 break;
240 case ATOM_WS_REMAINDER:
241 val = gctx->divmul[1];
242 break;
243 case ATOM_WS_DATAPTR:
244 val = gctx->data_block;
245 break;
246 case ATOM_WS_SHIFT:
247 val = gctx->shift;
248 break;
249 case ATOM_WS_OR_MASK:
250 val = 1 << gctx->shift;
251 break;
252 case ATOM_WS_AND_MASK:
253 val = ~(1 << gctx->shift);
254 break;
255 case ATOM_WS_FB_WINDOW:
256 val = gctx->fb_base;
257 break;
258 case ATOM_WS_ATTRIBUTES:
259 val = gctx->io_attr;
260 break;
261 case ATOM_WS_REGPTR:
262 val = gctx->reg_block;
263 break;
264 default:
265 val = ctx->ws[idx];
266 }
267 break;
268 case ATOM_ARG_ID:
269 idx = U16(*ptr);
270 (*ptr) += 2;
271 if (print) {
272 if (gctx->data_block)
273 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
274 else
275 DEBUG("ID[0x%04X]", idx);
276 }
277 val = U32(idx + gctx->data_block);
278 break;
279 case ATOM_ARG_FB:
280 idx = U8(*ptr);
281 (*ptr)++;
282 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
283 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
284 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
285 val = 0;
286 } else
287 val = gctx->scratch[(gctx->fb_base / 4) + idx];
288 if (print)
289 DEBUG("FB[0x%02X]", idx);
290 break;
291 case ATOM_ARG_IMM:
292 switch (align) {
293 case ATOM_SRC_DWORD:
294 val = U32(*ptr);
295 (*ptr) += 4;
296 if (print)
297 DEBUG("IMM 0x%08X\n", val);
298 return val;
299 case ATOM_SRC_WORD0:
300 case ATOM_SRC_WORD8:
301 case ATOM_SRC_WORD16:
302 val = U16(*ptr);
303 (*ptr) += 2;
304 if (print)
305 DEBUG("IMM 0x%04X\n", val);
306 return val;
307 case ATOM_SRC_BYTE0:
308 case ATOM_SRC_BYTE8:
309 case ATOM_SRC_BYTE16:
310 case ATOM_SRC_BYTE24:
311 val = U8(*ptr);
312 (*ptr)++;
313 if (print)
314 DEBUG("IMM 0x%02X\n", val);
315 return val;
316 }
317 return 0;
318 case ATOM_ARG_PLL:
319 idx = U8(*ptr);
320 (*ptr)++;
321 if (print)
322 DEBUG("PLL[0x%02X]", idx);
323 val = gctx->card->pll_read(gctx->card, idx);
324 break;
325 case ATOM_ARG_MC:
326 idx = U8(*ptr);
327 (*ptr)++;
328 if (print)
329 DEBUG("MC[0x%02X]", idx);
330 val = gctx->card->mc_read(gctx->card, idx);
331 break;
332 }
333 if (saved)
334 *saved = val;
335 val &= atom_arg_mask[align];
336 val >>= atom_arg_shift[align];
337 if (print)
338 switch (align) {
339 case ATOM_SRC_DWORD:
340 DEBUG(".[31:0] -> 0x%08X\n", val);
341 break;
342 case ATOM_SRC_WORD0:
343 DEBUG(".[15:0] -> 0x%04X\n", val);
344 break;
345 case ATOM_SRC_WORD8:
346 DEBUG(".[23:8] -> 0x%04X\n", val);
347 break;
348 case ATOM_SRC_WORD16:
349 DEBUG(".[31:16] -> 0x%04X\n", val);
350 break;
351 case ATOM_SRC_BYTE0:
352 DEBUG(".[7:0] -> 0x%02X\n", val);
353 break;
354 case ATOM_SRC_BYTE8:
355 DEBUG(".[15:8] -> 0x%02X\n", val);
356 break;
357 case ATOM_SRC_BYTE16:
358 DEBUG(".[23:16] -> 0x%02X\n", val);
359 break;
360 case ATOM_SRC_BYTE24:
361 DEBUG(".[31:24] -> 0x%02X\n", val);
362 break;
363 }
364 return val;
365}
366
367static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
368{
369 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
370 switch (arg) {
371 case ATOM_ARG_REG:
372 case ATOM_ARG_ID:
373 (*ptr) += 2;
374 break;
375 case ATOM_ARG_PLL:
376 case ATOM_ARG_MC:
377 case ATOM_ARG_PS:
378 case ATOM_ARG_WS:
379 case ATOM_ARG_FB:
380 (*ptr)++;
381 break;
382 case ATOM_ARG_IMM:
383 switch (align) {
384 case ATOM_SRC_DWORD:
385 (*ptr) += 4;
386 return;
387 case ATOM_SRC_WORD0:
388 case ATOM_SRC_WORD8:
389 case ATOM_SRC_WORD16:
390 (*ptr) += 2;
391 return;
392 case ATOM_SRC_BYTE0:
393 case ATOM_SRC_BYTE8:
394 case ATOM_SRC_BYTE16:
395 case ATOM_SRC_BYTE24:
396 (*ptr)++;
397 return;
398 }
399 return;
400 }
401}
402
403static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
404{
405 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
406}
407
408static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
409{
410 uint32_t val = 0xCDCDCDCD;
411
412 switch (align) {
413 case ATOM_SRC_DWORD:
414 val = U32(*ptr);
415 (*ptr) += 4;
416 break;
417 case ATOM_SRC_WORD0:
418 case ATOM_SRC_WORD8:
419 case ATOM_SRC_WORD16:
420 val = U16(*ptr);
421 (*ptr) += 2;
422 break;
423 case ATOM_SRC_BYTE0:
424 case ATOM_SRC_BYTE8:
425 case ATOM_SRC_BYTE16:
426 case ATOM_SRC_BYTE24:
427 val = U8(*ptr);
428 (*ptr)++;
429 break;
430 }
431 return val;
432}
433
434static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
435 int *ptr, uint32_t *saved, int print)
436{
437 return atom_get_src_int(ctx,
438 arg | atom_dst_to_src[(attr >> 3) &
439 7][(attr >> 6) & 3] << 3,
440 ptr, saved, print);
441}
442
443static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
444{
445 atom_skip_src_int(ctx,
446 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
447 3] << 3, ptr);
448}
449
450static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
451 int *ptr, uint32_t val, uint32_t saved)
452{
453 uint32_t align =
454 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
455 val, idx;
456 struct atom_context *gctx = ctx->ctx;
457 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
458 val <<= atom_arg_shift[align];
459 val &= atom_arg_mask[align];
460 saved &= ~atom_arg_mask[align];
461 val |= saved;
462 switch (arg) {
463 case ATOM_ARG_REG:
464 idx = U16(*ptr);
465 (*ptr) += 2;
466 DEBUG("REG[0x%04X]", idx);
467 idx += gctx->reg_block;
468 switch (gctx->io_mode) {
469 case ATOM_IO_MM:
470 if (idx == 0)
471 gctx->card->reg_write(gctx->card, idx,
472 val << 2);
473 else
474 gctx->card->reg_write(gctx->card, idx, val);
475 break;
476 case ATOM_IO_PCI:
477 pr_info("PCI registers are not implemented\n");
478 return;
479 case ATOM_IO_SYSIO:
480 pr_info("SYSIO registers are not implemented\n");
481 return;
482 default:
483 if (!(gctx->io_mode & 0x80)) {
484 pr_info("Bad IO mode\n");
485 return;
486 }
487 if (!gctx->iio[gctx->io_mode & 0xFF]) {
488 pr_info("Undefined indirect IO write method %d\n",
489 gctx->io_mode & 0x7F);
490 return;
491 }
492 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
493 idx, val);
494 }
495 break;
496 case ATOM_ARG_PS:
497 idx = U8(*ptr);
498 (*ptr)++;
499 DEBUG("PS[0x%02X]", idx);
500 ctx->ps[idx] = cpu_to_le32(val);
501 break;
502 case ATOM_ARG_WS:
503 idx = U8(*ptr);
504 (*ptr)++;
505 DEBUG("WS[0x%02X]", idx);
506 switch (idx) {
507 case ATOM_WS_QUOTIENT:
508 gctx->divmul[0] = val;
509 break;
510 case ATOM_WS_REMAINDER:
511 gctx->divmul[1] = val;
512 break;
513 case ATOM_WS_DATAPTR:
514 gctx->data_block = val;
515 break;
516 case ATOM_WS_SHIFT:
517 gctx->shift = val;
518 break;
519 case ATOM_WS_OR_MASK:
520 case ATOM_WS_AND_MASK:
521 break;
522 case ATOM_WS_FB_WINDOW:
523 gctx->fb_base = val;
524 break;
525 case ATOM_WS_ATTRIBUTES:
526 gctx->io_attr = val;
527 break;
528 case ATOM_WS_REGPTR:
529 gctx->reg_block = val;
530 break;
531 default:
532 ctx->ws[idx] = val;
533 }
534 break;
535 case ATOM_ARG_FB:
536 idx = U8(*ptr);
537 (*ptr)++;
538 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
539 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
540 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
541 } else
542 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
543 DEBUG("FB[0x%02X]", idx);
544 break;
545 case ATOM_ARG_PLL:
546 idx = U8(*ptr);
547 (*ptr)++;
548 DEBUG("PLL[0x%02X]", idx);
549 gctx->card->pll_write(gctx->card, idx, val);
550 break;
551 case ATOM_ARG_MC:
552 idx = U8(*ptr);
553 (*ptr)++;
554 DEBUG("MC[0x%02X]", idx);
555 gctx->card->mc_write(gctx->card, idx, val);
556 return;
557 }
558 switch (align) {
559 case ATOM_SRC_DWORD:
560 DEBUG(".[31:0] <- 0x%08X\n", old_val);
561 break;
562 case ATOM_SRC_WORD0:
563 DEBUG(".[15:0] <- 0x%04X\n", old_val);
564 break;
565 case ATOM_SRC_WORD8:
566 DEBUG(".[23:8] <- 0x%04X\n", old_val);
567 break;
568 case ATOM_SRC_WORD16:
569 DEBUG(".[31:16] <- 0x%04X\n", old_val);
570 break;
571 case ATOM_SRC_BYTE0:
572 DEBUG(".[7:0] <- 0x%02X\n", old_val);
573 break;
574 case ATOM_SRC_BYTE8:
575 DEBUG(".[15:8] <- 0x%02X\n", old_val);
576 break;
577 case ATOM_SRC_BYTE16:
578 DEBUG(".[23:16] <- 0x%02X\n", old_val);
579 break;
580 case ATOM_SRC_BYTE24:
581 DEBUG(".[31:24] <- 0x%02X\n", old_val);
582 break;
583 }
584}
585
586static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
587{
588 uint8_t attr = U8((*ptr)++);
589 uint32_t dst, src, saved;
590 int dptr = *ptr;
591 SDEBUG(" dst: ");
592 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
593 SDEBUG(" src: ");
594 src = atom_get_src(ctx, attr, ptr);
595 dst += src;
596 SDEBUG(" dst: ");
597 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
598}
599
600static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
601{
602 uint8_t attr = U8((*ptr)++);
603 uint32_t dst, src, saved;
604 int dptr = *ptr;
605 SDEBUG(" dst: ");
606 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
607 SDEBUG(" src: ");
608 src = atom_get_src(ctx, attr, ptr);
609 dst &= src;
610 SDEBUG(" dst: ");
611 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
612}
613
614static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
615{
616 printk("ATOM BIOS beeped!\n");
617}
618
619static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
620{
621 int idx = U8((*ptr)++);
622 int r = 0;
623
624 if (idx < ATOM_TABLE_NAMES_CNT)
625 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
626 else
627 SDEBUG(" table: %d\n", idx);
628 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
629 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
630 if (r) {
631 ctx->abort = true;
632 }
633}
634
635static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
636{
637 uint8_t attr = U8((*ptr)++);
638 uint32_t saved;
639 int dptr = *ptr;
640 attr &= 0x38;
641 attr |= atom_def_dst[attr >> 3] << 6;
642 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
643 SDEBUG(" dst: ");
644 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
645}
646
647static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
648{
649 uint8_t attr = U8((*ptr)++);
650 uint32_t dst, src;
651 SDEBUG(" src1: ");
652 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
653 SDEBUG(" src2: ");
654 src = atom_get_src(ctx, attr, ptr);
655 ctx->ctx->cs_equal = (dst == src);
656 ctx->ctx->cs_above = (dst > src);
657 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
658 ctx->ctx->cs_above ? "GT" : "LE");
659}
660
661static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
662{
663 unsigned count = U8((*ptr)++);
664 SDEBUG(" count: %d\n", count);
665 if (arg == ATOM_UNIT_MICROSEC)
666 udelay(count);
667 else if (!drm_can_sleep())
668 mdelay(count);
669 else
670 msleep(count);
671}
672
673static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
674{
675 uint8_t attr = U8((*ptr)++);
676 uint32_t dst, src;
677 SDEBUG(" src1: ");
678 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
679 SDEBUG(" src2: ");
680 src = atom_get_src(ctx, attr, ptr);
681 if (src != 0) {
682 ctx->ctx->divmul[0] = dst / src;
683 ctx->ctx->divmul[1] = dst % src;
684 } else {
685 ctx->ctx->divmul[0] = 0;
686 ctx->ctx->divmul[1] = 0;
687 }
688}
689
690static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
691{
692 /* functionally, a nop */
693}
694
695static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
696{
697 int execute = 0, target = U16(*ptr);
698 unsigned long cjiffies;
699
700 (*ptr) += 2;
701 switch (arg) {
702 case ATOM_COND_ABOVE:
703 execute = ctx->ctx->cs_above;
704 break;
705 case ATOM_COND_ABOVEOREQUAL:
706 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
707 break;
708 case ATOM_COND_ALWAYS:
709 execute = 1;
710 break;
711 case ATOM_COND_BELOW:
712 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
713 break;
714 case ATOM_COND_BELOWOREQUAL:
715 execute = !ctx->ctx->cs_above;
716 break;
717 case ATOM_COND_EQUAL:
718 execute = ctx->ctx->cs_equal;
719 break;
720 case ATOM_COND_NOTEQUAL:
721 execute = !ctx->ctx->cs_equal;
722 break;
723 }
724 if (arg != ATOM_COND_ALWAYS)
725 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
726 SDEBUG(" target: 0x%04X\n", target);
727 if (execute) {
728 if (ctx->last_jump == (ctx->start + target)) {
729 cjiffies = jiffies;
730 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
731 cjiffies -= ctx->last_jump_jiffies;
732 if ((jiffies_to_msecs(cjiffies) > 5000)) {
733 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
734 ctx->abort = true;
735 }
736 } else {
737 /* jiffies wrap around we will just wait a little longer */
738 ctx->last_jump_jiffies = jiffies;
739 }
740 } else {
741 ctx->last_jump = ctx->start + target;
742 ctx->last_jump_jiffies = jiffies;
743 }
744 *ptr = ctx->start + target;
745 }
746}
747
748static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
749{
750 uint8_t attr = U8((*ptr)++);
751 uint32_t dst, mask, src, saved;
752 int dptr = *ptr;
753 SDEBUG(" dst: ");
754 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
755 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
756 SDEBUG(" mask: 0x%08x", mask);
757 SDEBUG(" src: ");
758 src = atom_get_src(ctx, attr, ptr);
759 dst &= mask;
760 dst |= src;
761 SDEBUG(" dst: ");
762 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
763}
764
765static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
766{
767 uint8_t attr = U8((*ptr)++);
768 uint32_t src, saved;
769 int dptr = *ptr;
770 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
771 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
772 else {
773 atom_skip_dst(ctx, arg, attr, ptr);
774 saved = 0xCDCDCDCD;
775 }
776 SDEBUG(" src: ");
777 src = atom_get_src(ctx, attr, ptr);
778 SDEBUG(" dst: ");
779 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
780}
781
782static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
783{
784 uint8_t attr = U8((*ptr)++);
785 uint32_t dst, src;
786 SDEBUG(" src1: ");
787 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
788 SDEBUG(" src2: ");
789 src = atom_get_src(ctx, attr, ptr);
790 ctx->ctx->divmul[0] = dst * src;
791}
792
793static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
794{
795 /* nothing */
796}
797
798static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
799{
800 uint8_t attr = U8((*ptr)++);
801 uint32_t dst, src, saved;
802 int dptr = *ptr;
803 SDEBUG(" dst: ");
804 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
805 SDEBUG(" src: ");
806 src = atom_get_src(ctx, attr, ptr);
807 dst |= src;
808 SDEBUG(" dst: ");
809 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
810}
811
812static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
813{
814 uint8_t val = U8((*ptr)++);
815 SDEBUG("POST card output: 0x%02X\n", val);
816}
817
818static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
819{
820 pr_info("unimplemented!\n");
821}
822
823static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
824{
825 pr_info("unimplemented!\n");
826}
827
828static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
829{
830 pr_info("unimplemented!\n");
831}
832
833static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
834{
835 int idx = U8(*ptr);
836 (*ptr)++;
837 SDEBUG(" block: %d\n", idx);
838 if (!idx)
839 ctx->ctx->data_block = 0;
840 else if (idx == 255)
841 ctx->ctx->data_block = ctx->start;
842 else
843 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
844 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
845}
846
847static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
848{
849 uint8_t attr = U8((*ptr)++);
850 SDEBUG(" fb_base: ");
851 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
852}
853
854static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
855{
856 int port;
857 switch (arg) {
858 case ATOM_PORT_ATI:
859 port = U16(*ptr);
860 if (port < ATOM_IO_NAMES_CNT)
861 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
862 else
863 SDEBUG(" port: %d\n", port);
864 if (!port)
865 ctx->ctx->io_mode = ATOM_IO_MM;
866 else
867 ctx->ctx->io_mode = ATOM_IO_IIO | port;
868 (*ptr) += 2;
869 break;
870 case ATOM_PORT_PCI:
871 ctx->ctx->io_mode = ATOM_IO_PCI;
872 (*ptr)++;
873 break;
874 case ATOM_PORT_SYSIO:
875 ctx->ctx->io_mode = ATOM_IO_SYSIO;
876 (*ptr)++;
877 break;
878 }
879}
880
881static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
882{
883 ctx->ctx->reg_block = U16(*ptr);
884 (*ptr) += 2;
885 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
886}
887
888static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
889{
890 uint8_t attr = U8((*ptr)++), shift;
891 uint32_t saved, dst;
892 int dptr = *ptr;
893 attr &= 0x38;
894 attr |= atom_def_dst[attr >> 3] << 6;
895 SDEBUG(" dst: ");
896 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
897 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
898 SDEBUG(" shift: %d\n", shift);
899 dst <<= shift;
900 SDEBUG(" dst: ");
901 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
902}
903
904static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
905{
906 uint8_t attr = U8((*ptr)++), shift;
907 uint32_t saved, dst;
908 int dptr = *ptr;
909 attr &= 0x38;
910 attr |= atom_def_dst[attr >> 3] << 6;
911 SDEBUG(" dst: ");
912 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
913 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
914 SDEBUG(" shift: %d\n", shift);
915 dst >>= shift;
916 SDEBUG(" dst: ");
917 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
918}
919
920static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
921{
922 uint8_t attr = U8((*ptr)++), shift;
923 uint32_t saved, dst;
924 int dptr = *ptr;
925 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
926 SDEBUG(" dst: ");
927 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
928 /* op needs to full dst value */
929 dst = saved;
930 shift = atom_get_src(ctx, attr, ptr);
931 SDEBUG(" shift: %d\n", shift);
932 dst <<= shift;
933 dst &= atom_arg_mask[dst_align];
934 dst >>= atom_arg_shift[dst_align];
935 SDEBUG(" dst: ");
936 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
937}
938
939static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
940{
941 uint8_t attr = U8((*ptr)++), shift;
942 uint32_t saved, dst;
943 int dptr = *ptr;
944 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
945 SDEBUG(" dst: ");
946 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
947 /* op needs to full dst value */
948 dst = saved;
949 shift = atom_get_src(ctx, attr, ptr);
950 SDEBUG(" shift: %d\n", shift);
951 dst >>= shift;
952 dst &= atom_arg_mask[dst_align];
953 dst >>= atom_arg_shift[dst_align];
954 SDEBUG(" dst: ");
955 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
956}
957
958static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
959{
960 uint8_t attr = U8((*ptr)++);
961 uint32_t dst, src, saved;
962 int dptr = *ptr;
963 SDEBUG(" dst: ");
964 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
965 SDEBUG(" src: ");
966 src = atom_get_src(ctx, attr, ptr);
967 dst -= src;
968 SDEBUG(" dst: ");
969 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
970}
971
972static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
973{
974 uint8_t attr = U8((*ptr)++);
975 uint32_t src, val, target;
976 SDEBUG(" switch: ");
977 src = atom_get_src(ctx, attr, ptr);
978 while (U16(*ptr) != ATOM_CASE_END)
979 if (U8(*ptr) == ATOM_CASE_MAGIC) {
980 (*ptr)++;
981 SDEBUG(" case: ");
982 val =
983 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
984 ptr);
985 target = U16(*ptr);
986 if (val == src) {
987 SDEBUG(" target: %04X\n", target);
988 *ptr = ctx->start + target;
989 return;
990 }
991 (*ptr) += 2;
992 } else {
993 pr_info("Bad case\n");
994 return;
995 }
996 (*ptr) += 2;
997}
998
999static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1000{
1001 uint8_t attr = U8((*ptr)++);
1002 uint32_t dst, src;
1003 SDEBUG(" src1: ");
1004 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1005 SDEBUG(" src2: ");
1006 src = atom_get_src(ctx, attr, ptr);
1007 ctx->ctx->cs_equal = ((dst & src) == 0);
1008 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1009}
1010
1011static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1012{
1013 uint8_t attr = U8((*ptr)++);
1014 uint32_t dst, src, saved;
1015 int dptr = *ptr;
1016 SDEBUG(" dst: ");
1017 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1018 SDEBUG(" src: ");
1019 src = atom_get_src(ctx, attr, ptr);
1020 dst ^= src;
1021 SDEBUG(" dst: ");
1022 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1023}
1024
1025static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1026{
1027 pr_info("unimplemented!\n");
1028}
1029
1030static struct {
1031 void (*func) (atom_exec_context *, int *, int);
1032 int arg;
1033} opcode_table[ATOM_OP_CNT] = {
1034 {
1035 NULL, 0}, {
1036 atom_op_move, ATOM_ARG_REG}, {
1037 atom_op_move, ATOM_ARG_PS}, {
1038 atom_op_move, ATOM_ARG_WS}, {
1039 atom_op_move, ATOM_ARG_FB}, {
1040 atom_op_move, ATOM_ARG_PLL}, {
1041 atom_op_move, ATOM_ARG_MC}, {
1042 atom_op_and, ATOM_ARG_REG}, {
1043 atom_op_and, ATOM_ARG_PS}, {
1044 atom_op_and, ATOM_ARG_WS}, {
1045 atom_op_and, ATOM_ARG_FB}, {
1046 atom_op_and, ATOM_ARG_PLL}, {
1047 atom_op_and, ATOM_ARG_MC}, {
1048 atom_op_or, ATOM_ARG_REG}, {
1049 atom_op_or, ATOM_ARG_PS}, {
1050 atom_op_or, ATOM_ARG_WS}, {
1051 atom_op_or, ATOM_ARG_FB}, {
1052 atom_op_or, ATOM_ARG_PLL}, {
1053 atom_op_or, ATOM_ARG_MC}, {
1054 atom_op_shift_left, ATOM_ARG_REG}, {
1055 atom_op_shift_left, ATOM_ARG_PS}, {
1056 atom_op_shift_left, ATOM_ARG_WS}, {
1057 atom_op_shift_left, ATOM_ARG_FB}, {
1058 atom_op_shift_left, ATOM_ARG_PLL}, {
1059 atom_op_shift_left, ATOM_ARG_MC}, {
1060 atom_op_shift_right, ATOM_ARG_REG}, {
1061 atom_op_shift_right, ATOM_ARG_PS}, {
1062 atom_op_shift_right, ATOM_ARG_WS}, {
1063 atom_op_shift_right, ATOM_ARG_FB}, {
1064 atom_op_shift_right, ATOM_ARG_PLL}, {
1065 atom_op_shift_right, ATOM_ARG_MC}, {
1066 atom_op_mul, ATOM_ARG_REG}, {
1067 atom_op_mul, ATOM_ARG_PS}, {
1068 atom_op_mul, ATOM_ARG_WS}, {
1069 atom_op_mul, ATOM_ARG_FB}, {
1070 atom_op_mul, ATOM_ARG_PLL}, {
1071 atom_op_mul, ATOM_ARG_MC}, {
1072 atom_op_div, ATOM_ARG_REG}, {
1073 atom_op_div, ATOM_ARG_PS}, {
1074 atom_op_div, ATOM_ARG_WS}, {
1075 atom_op_div, ATOM_ARG_FB}, {
1076 atom_op_div, ATOM_ARG_PLL}, {
1077 atom_op_div, ATOM_ARG_MC}, {
1078 atom_op_add, ATOM_ARG_REG}, {
1079 atom_op_add, ATOM_ARG_PS}, {
1080 atom_op_add, ATOM_ARG_WS}, {
1081 atom_op_add, ATOM_ARG_FB}, {
1082 atom_op_add, ATOM_ARG_PLL}, {
1083 atom_op_add, ATOM_ARG_MC}, {
1084 atom_op_sub, ATOM_ARG_REG}, {
1085 atom_op_sub, ATOM_ARG_PS}, {
1086 atom_op_sub, ATOM_ARG_WS}, {
1087 atom_op_sub, ATOM_ARG_FB}, {
1088 atom_op_sub, ATOM_ARG_PLL}, {
1089 atom_op_sub, ATOM_ARG_MC}, {
1090 atom_op_setport, ATOM_PORT_ATI}, {
1091 atom_op_setport, ATOM_PORT_PCI}, {
1092 atom_op_setport, ATOM_PORT_SYSIO}, {
1093 atom_op_setregblock, 0}, {
1094 atom_op_setfbbase, 0}, {
1095 atom_op_compare, ATOM_ARG_REG}, {
1096 atom_op_compare, ATOM_ARG_PS}, {
1097 atom_op_compare, ATOM_ARG_WS}, {
1098 atom_op_compare, ATOM_ARG_FB}, {
1099 atom_op_compare, ATOM_ARG_PLL}, {
1100 atom_op_compare, ATOM_ARG_MC}, {
1101 atom_op_switch, 0}, {
1102 atom_op_jump, ATOM_COND_ALWAYS}, {
1103 atom_op_jump, ATOM_COND_EQUAL}, {
1104 atom_op_jump, ATOM_COND_BELOW}, {
1105 atom_op_jump, ATOM_COND_ABOVE}, {
1106 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1107 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1108 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1109 atom_op_test, ATOM_ARG_REG}, {
1110 atom_op_test, ATOM_ARG_PS}, {
1111 atom_op_test, ATOM_ARG_WS}, {
1112 atom_op_test, ATOM_ARG_FB}, {
1113 atom_op_test, ATOM_ARG_PLL}, {
1114 atom_op_test, ATOM_ARG_MC}, {
1115 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1116 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1117 atom_op_calltable, 0}, {
1118 atom_op_repeat, 0}, {
1119 atom_op_clear, ATOM_ARG_REG}, {
1120 atom_op_clear, ATOM_ARG_PS}, {
1121 atom_op_clear, ATOM_ARG_WS}, {
1122 atom_op_clear, ATOM_ARG_FB}, {
1123 atom_op_clear, ATOM_ARG_PLL}, {
1124 atom_op_clear, ATOM_ARG_MC}, {
1125 atom_op_nop, 0}, {
1126 atom_op_eot, 0}, {
1127 atom_op_mask, ATOM_ARG_REG}, {
1128 atom_op_mask, ATOM_ARG_PS}, {
1129 atom_op_mask, ATOM_ARG_WS}, {
1130 atom_op_mask, ATOM_ARG_FB}, {
1131 atom_op_mask, ATOM_ARG_PLL}, {
1132 atom_op_mask, ATOM_ARG_MC}, {
1133 atom_op_postcard, 0}, {
1134 atom_op_beep, 0}, {
1135 atom_op_savereg, 0}, {
1136 atom_op_restorereg, 0}, {
1137 atom_op_setdatablock, 0}, {
1138 atom_op_xor, ATOM_ARG_REG}, {
1139 atom_op_xor, ATOM_ARG_PS}, {
1140 atom_op_xor, ATOM_ARG_WS}, {
1141 atom_op_xor, ATOM_ARG_FB}, {
1142 atom_op_xor, ATOM_ARG_PLL}, {
1143 atom_op_xor, ATOM_ARG_MC}, {
1144 atom_op_shl, ATOM_ARG_REG}, {
1145 atom_op_shl, ATOM_ARG_PS}, {
1146 atom_op_shl, ATOM_ARG_WS}, {
1147 atom_op_shl, ATOM_ARG_FB}, {
1148 atom_op_shl, ATOM_ARG_PLL}, {
1149 atom_op_shl, ATOM_ARG_MC}, {
1150 atom_op_shr, ATOM_ARG_REG}, {
1151 atom_op_shr, ATOM_ARG_PS}, {
1152 atom_op_shr, ATOM_ARG_WS}, {
1153 atom_op_shr, ATOM_ARG_FB}, {
1154 atom_op_shr, ATOM_ARG_PLL}, {
1155 atom_op_shr, ATOM_ARG_MC}, {
1156atom_op_debug, 0},};
1157
1158static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1159{
1160 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1161 int len, ws, ps, ptr;
1162 unsigned char op;
1163 atom_exec_context ectx;
1164 int ret = 0;
1165
1166 if (!base)
1167 return -EINVAL;
1168
1169 len = CU16(base + ATOM_CT_SIZE_PTR);
1170 ws = CU8(base + ATOM_CT_WS_PTR);
1171 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1172 ptr = base + ATOM_CT_CODE_PTR;
1173
1174 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1175
1176 ectx.ctx = ctx;
1177 ectx.ps_shift = ps / 4;
1178 ectx.start = base;
1179 ectx.ps = params;
1180 ectx.abort = false;
1181 ectx.last_jump = 0;
1182 if (ws)
1183 ectx.ws = kcalloc(4, ws, GFP_KERNEL);
1184 else
1185 ectx.ws = NULL;
1186
1187 debug_depth++;
1188 while (1) {
1189 op = CU8(ptr++);
1190 if (op < ATOM_OP_NAMES_CNT)
1191 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1192 else
1193 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1194 if (ectx.abort) {
1195 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1196 base, len, ws, ps, ptr - 1);
1197 ret = -EINVAL;
1198 goto free;
1199 }
1200
1201 if (op < ATOM_OP_CNT && op > 0)
1202 opcode_table[op].func(&ectx, &ptr,
1203 opcode_table[op].arg);
1204 else
1205 break;
1206
1207 if (op == ATOM_OP_EOT)
1208 break;
1209 }
1210 debug_depth--;
1211 SDEBUG("<<\n");
1212
1213free:
1214 kfree(ectx.ws);
1215 return ret;
1216}
1217
1218int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1219{
1220 int r;
1221
1222 mutex_lock(&ctx->mutex);
1223 /* reset data block */
1224 ctx->data_block = 0;
1225 /* reset reg block */
1226 ctx->reg_block = 0;
1227 /* reset fb window */
1228 ctx->fb_base = 0;
1229 /* reset io mode */
1230 ctx->io_mode = ATOM_IO_MM;
1231 /* reset divmul */
1232 ctx->divmul[0] = 0;
1233 ctx->divmul[1] = 0;
1234 r = atom_execute_table_locked(ctx, index, params);
1235 mutex_unlock(&ctx->mutex);
1236 return r;
1237}
1238
1239int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1240{
1241 int r;
1242 mutex_lock(&ctx->scratch_mutex);
1243 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1244 mutex_unlock(&ctx->scratch_mutex);
1245 return r;
1246}
1247
1248static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1249
1250static void atom_index_iio(struct atom_context *ctx, int base)
1251{
1252 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1253 if (!ctx->iio)
1254 return;
1255 while (CU8(base) == ATOM_IIO_START) {
1256 ctx->iio[CU8(base + 1)] = base + 2;
1257 base += 2;
1258 while (CU8(base) != ATOM_IIO_END)
1259 base += atom_iio_len[CU8(base)];
1260 base += 3;
1261 }
1262}
1263
1264struct atom_context *atom_parse(struct card_info *card, void *bios)
1265{
1266 int base;
1267 struct atom_context *ctx =
1268 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1269 char *str;
1270 char name[512];
1271 int i;
1272
1273 if (!ctx)
1274 return NULL;
1275
1276 ctx->card = card;
1277 ctx->bios = bios;
1278
1279 if (CU16(0) != ATOM_BIOS_MAGIC) {
1280 pr_info("Invalid BIOS magic\n");
1281 kfree(ctx);
1282 return NULL;
1283 }
1284 if (strncmp
1285 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1286 strlen(ATOM_ATI_MAGIC))) {
1287 pr_info("Invalid ATI magic\n");
1288 kfree(ctx);
1289 return NULL;
1290 }
1291
1292 base = CU16(ATOM_ROM_TABLE_PTR);
1293 if (strncmp
1294 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1295 strlen(ATOM_ROM_MAGIC))) {
1296 pr_info("Invalid ATOM magic\n");
1297 kfree(ctx);
1298 return NULL;
1299 }
1300
1301 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1302 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1303 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1304 if (!ctx->iio) {
1305 atom_destroy(ctx);
1306 return NULL;
1307 }
1308
1309 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1310 while (*str && ((*str == '\n') || (*str == '\r')))
1311 str++;
1312 /* name string isn't always 0 terminated */
1313 for (i = 0; i < 511; i++) {
1314 name[i] = str[i];
1315 if (name[i] < '.' || name[i] > 'z') {
1316 name[i] = 0;
1317 break;
1318 }
1319 }
1320 pr_info("ATOM BIOS: %s\n", name);
1321
1322 return ctx;
1323}
1324
1325int atom_asic_init(struct atom_context *ctx)
1326{
1327 struct radeon_device *rdev = ctx->card->dev->dev_private;
1328 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1329 uint32_t ps[16];
1330 int ret;
1331
1332 memset(ps, 0, 64);
1333
1334 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1335 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1336 if (!ps[0] || !ps[1])
1337 return 1;
1338
1339 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1340 return 1;
1341 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1342 if (ret)
1343 return ret;
1344
1345 memset(ps, 0, 64);
1346
1347 if (rdev->family < CHIP_R600) {
1348 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1349 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1350 }
1351 return ret;
1352}
1353
1354void atom_destroy(struct atom_context *ctx)
1355{
1356 kfree(ctx->iio);
1357 kfree(ctx);
1358}
1359
1360bool atom_parse_data_header(struct atom_context *ctx, int index,
1361 uint16_t * size, uint8_t * frev, uint8_t * crev,
1362 uint16_t * data_start)
1363{
1364 int offset = index * 2 + 4;
1365 int idx = CU16(ctx->data_table + offset);
1366 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1367
1368 if (!mdt[index])
1369 return false;
1370
1371 if (size)
1372 *size = CU16(idx);
1373 if (frev)
1374 *frev = CU8(idx + 2);
1375 if (crev)
1376 *crev = CU8(idx + 3);
1377 *data_start = idx;
1378 return true;
1379}
1380
1381bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1382 uint8_t * crev)
1383{
1384 int offset = index * 2 + 4;
1385 int idx = CU16(ctx->cmd_table + offset);
1386 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1387
1388 if (!mct[index])
1389 return false;
1390
1391 if (frev)
1392 *frev = CU8(idx + 2);
1393 if (crev)
1394 *crev = CU8(idx + 3);
1395 return true;
1396}
1397
1398int atom_allocate_fb_scratch(struct atom_context *ctx)
1399{
1400 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1401 uint16_t data_offset;
1402 int usage_bytes = 0;
1403 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1404
1405 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1406 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1407
1408 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1409 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1410 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1411
1412 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1413 }
1414 ctx->scratch_size_bytes = 0;
1415 if (usage_bytes == 0)
1416 usage_bytes = 20 * 1024;
1417 /* allocate some scratch memory */
1418 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1419 if (!ctx->scratch)
1420 return -ENOMEM;
1421 ctx->scratch_size_bytes = usage_bytes;
1422 return 0;
1423}