Loading...
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25#include <linux/module.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28#include <asm/unaligned.h>
29
30#define ATOM_DEBUG
31
32#include "atom.h"
33#include "atom-names.h"
34#include "atom-bits.h"
35#include "radeon.h"
36
37#define ATOM_COND_ABOVE 0
38#define ATOM_COND_ABOVEOREQUAL 1
39#define ATOM_COND_ALWAYS 2
40#define ATOM_COND_BELOW 3
41#define ATOM_COND_BELOWOREQUAL 4
42#define ATOM_COND_EQUAL 5
43#define ATOM_COND_NOTEQUAL 6
44
45#define ATOM_PORT_ATI 0
46#define ATOM_PORT_PCI 1
47#define ATOM_PORT_SYSIO 2
48
49#define ATOM_UNIT_MICROSEC 0
50#define ATOM_UNIT_MILLISEC 1
51
52#define PLL_INDEX 2
53#define PLL_DATA 3
54
55typedef struct {
56 struct atom_context *ctx;
57 uint32_t *ps, *ws;
58 int ps_shift;
59 uint16_t start;
60 unsigned last_jump;
61 unsigned long last_jump_jiffies;
62 bool abort;
63} atom_exec_context;
64
65int atom_debug = 0;
66static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
67int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
68
69static uint32_t atom_arg_mask[8] = {
70 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
71 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
72};
73static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
74
75static int atom_dst_to_src[8][4] = {
76 /* translate destination alignment field to the source alignment encoding */
77 {0, 0, 0, 0},
78 {1, 2, 3, 0},
79 {1, 2, 3, 0},
80 {1, 2, 3, 0},
81 {4, 5, 6, 7},
82 {4, 5, 6, 7},
83 {4, 5, 6, 7},
84 {4, 5, 6, 7},
85};
86static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
87
88static int debug_depth = 0;
89#ifdef ATOM_DEBUG
90static void debug_print_spaces(int n)
91{
92 while (n--)
93 printk(" ");
94}
95
96#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
97#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
98#else
99#define DEBUG(...) do { } while (0)
100#define SDEBUG(...) do { } while (0)
101#endif
102
103static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
104 uint32_t index, uint32_t data)
105{
106 struct radeon_device *rdev = ctx->card->dev->dev_private;
107 uint32_t temp = 0xCDCDCDCD;
108
109 while (1)
110 switch (CU8(base)) {
111 case ATOM_IIO_NOP:
112 base++;
113 break;
114 case ATOM_IIO_READ:
115 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
116 base += 3;
117 break;
118 case ATOM_IIO_WRITE:
119 if (rdev->family == CHIP_RV515)
120 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
121 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
122 base += 3;
123 break;
124 case ATOM_IIO_CLEAR:
125 temp &=
126 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
127 CU8(base + 2));
128 base += 3;
129 break;
130 case ATOM_IIO_SET:
131 temp |=
132 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
133 2);
134 base += 3;
135 break;
136 case ATOM_IIO_MOVE_INDEX:
137 temp &=
138 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
139 CU8(base + 3));
140 temp |=
141 ((index >> CU8(base + 2)) &
142 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
143 3);
144 base += 4;
145 break;
146 case ATOM_IIO_MOVE_DATA:
147 temp &=
148 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
149 CU8(base + 3));
150 temp |=
151 ((data >> CU8(base + 2)) &
152 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
153 3);
154 base += 4;
155 break;
156 case ATOM_IIO_MOVE_ATTR:
157 temp &=
158 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
159 CU8(base + 3));
160 temp |=
161 ((ctx->
162 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
163 CU8
164 (base
165 +
166 1))))
167 << CU8(base + 3);
168 base += 4;
169 break;
170 case ATOM_IIO_END:
171 return temp;
172 default:
173 printk(KERN_INFO "Unknown IIO opcode.\n");
174 return 0;
175 }
176}
177
178static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
179 int *ptr, uint32_t *saved, int print)
180{
181 uint32_t idx, val = 0xCDCDCDCD, align, arg;
182 struct atom_context *gctx = ctx->ctx;
183 arg = attr & 7;
184 align = (attr >> 3) & 7;
185 switch (arg) {
186 case ATOM_ARG_REG:
187 idx = U16(*ptr);
188 (*ptr) += 2;
189 if (print)
190 DEBUG("REG[0x%04X]", idx);
191 idx += gctx->reg_block;
192 switch (gctx->io_mode) {
193 case ATOM_IO_MM:
194 val = gctx->card->reg_read(gctx->card, idx);
195 break;
196 case ATOM_IO_PCI:
197 printk(KERN_INFO
198 "PCI registers are not implemented.\n");
199 return 0;
200 case ATOM_IO_SYSIO:
201 printk(KERN_INFO
202 "SYSIO registers are not implemented.\n");
203 return 0;
204 default:
205 if (!(gctx->io_mode & 0x80)) {
206 printk(KERN_INFO "Bad IO mode.\n");
207 return 0;
208 }
209 if (!gctx->iio[gctx->io_mode & 0x7F]) {
210 printk(KERN_INFO
211 "Undefined indirect IO read method %d.\n",
212 gctx->io_mode & 0x7F);
213 return 0;
214 }
215 val =
216 atom_iio_execute(gctx,
217 gctx->iio[gctx->io_mode & 0x7F],
218 idx, 0);
219 }
220 break;
221 case ATOM_ARG_PS:
222 idx = U8(*ptr);
223 (*ptr)++;
224 /* get_unaligned_le32 avoids unaligned accesses from atombios
225 * tables, noticed on a DEC Alpha. */
226 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
227 if (print)
228 DEBUG("PS[0x%02X,0x%04X]", idx, val);
229 break;
230 case ATOM_ARG_WS:
231 idx = U8(*ptr);
232 (*ptr)++;
233 if (print)
234 DEBUG("WS[0x%02X]", idx);
235 switch (idx) {
236 case ATOM_WS_QUOTIENT:
237 val = gctx->divmul[0];
238 break;
239 case ATOM_WS_REMAINDER:
240 val = gctx->divmul[1];
241 break;
242 case ATOM_WS_DATAPTR:
243 val = gctx->data_block;
244 break;
245 case ATOM_WS_SHIFT:
246 val = gctx->shift;
247 break;
248 case ATOM_WS_OR_MASK:
249 val = 1 << gctx->shift;
250 break;
251 case ATOM_WS_AND_MASK:
252 val = ~(1 << gctx->shift);
253 break;
254 case ATOM_WS_FB_WINDOW:
255 val = gctx->fb_base;
256 break;
257 case ATOM_WS_ATTRIBUTES:
258 val = gctx->io_attr;
259 break;
260 case ATOM_WS_REGPTR:
261 val = gctx->reg_block;
262 break;
263 default:
264 val = ctx->ws[idx];
265 }
266 break;
267 case ATOM_ARG_ID:
268 idx = U16(*ptr);
269 (*ptr) += 2;
270 if (print) {
271 if (gctx->data_block)
272 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
273 else
274 DEBUG("ID[0x%04X]", idx);
275 }
276 val = U32(idx + gctx->data_block);
277 break;
278 case ATOM_ARG_FB:
279 idx = U8(*ptr);
280 (*ptr)++;
281 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
282 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
283 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
284 val = 0;
285 } else
286 val = gctx->scratch[(gctx->fb_base / 4) + idx];
287 if (print)
288 DEBUG("FB[0x%02X]", idx);
289 break;
290 case ATOM_ARG_IMM:
291 switch (align) {
292 case ATOM_SRC_DWORD:
293 val = U32(*ptr);
294 (*ptr) += 4;
295 if (print)
296 DEBUG("IMM 0x%08X\n", val);
297 return val;
298 case ATOM_SRC_WORD0:
299 case ATOM_SRC_WORD8:
300 case ATOM_SRC_WORD16:
301 val = U16(*ptr);
302 (*ptr) += 2;
303 if (print)
304 DEBUG("IMM 0x%04X\n", val);
305 return val;
306 case ATOM_SRC_BYTE0:
307 case ATOM_SRC_BYTE8:
308 case ATOM_SRC_BYTE16:
309 case ATOM_SRC_BYTE24:
310 val = U8(*ptr);
311 (*ptr)++;
312 if (print)
313 DEBUG("IMM 0x%02X\n", val);
314 return val;
315 }
316 return 0;
317 case ATOM_ARG_PLL:
318 idx = U8(*ptr);
319 (*ptr)++;
320 if (print)
321 DEBUG("PLL[0x%02X]", idx);
322 val = gctx->card->pll_read(gctx->card, idx);
323 break;
324 case ATOM_ARG_MC:
325 idx = U8(*ptr);
326 (*ptr)++;
327 if (print)
328 DEBUG("MC[0x%02X]", idx);
329 val = gctx->card->mc_read(gctx->card, idx);
330 break;
331 }
332 if (saved)
333 *saved = val;
334 val &= atom_arg_mask[align];
335 val >>= atom_arg_shift[align];
336 if (print)
337 switch (align) {
338 case ATOM_SRC_DWORD:
339 DEBUG(".[31:0] -> 0x%08X\n", val);
340 break;
341 case ATOM_SRC_WORD0:
342 DEBUG(".[15:0] -> 0x%04X\n", val);
343 break;
344 case ATOM_SRC_WORD8:
345 DEBUG(".[23:8] -> 0x%04X\n", val);
346 break;
347 case ATOM_SRC_WORD16:
348 DEBUG(".[31:16] -> 0x%04X\n", val);
349 break;
350 case ATOM_SRC_BYTE0:
351 DEBUG(".[7:0] -> 0x%02X\n", val);
352 break;
353 case ATOM_SRC_BYTE8:
354 DEBUG(".[15:8] -> 0x%02X\n", val);
355 break;
356 case ATOM_SRC_BYTE16:
357 DEBUG(".[23:16] -> 0x%02X\n", val);
358 break;
359 case ATOM_SRC_BYTE24:
360 DEBUG(".[31:24] -> 0x%02X\n", val);
361 break;
362 }
363 return val;
364}
365
366static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
367{
368 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
369 switch (arg) {
370 case ATOM_ARG_REG:
371 case ATOM_ARG_ID:
372 (*ptr) += 2;
373 break;
374 case ATOM_ARG_PLL:
375 case ATOM_ARG_MC:
376 case ATOM_ARG_PS:
377 case ATOM_ARG_WS:
378 case ATOM_ARG_FB:
379 (*ptr)++;
380 break;
381 case ATOM_ARG_IMM:
382 switch (align) {
383 case ATOM_SRC_DWORD:
384 (*ptr) += 4;
385 return;
386 case ATOM_SRC_WORD0:
387 case ATOM_SRC_WORD8:
388 case ATOM_SRC_WORD16:
389 (*ptr) += 2;
390 return;
391 case ATOM_SRC_BYTE0:
392 case ATOM_SRC_BYTE8:
393 case ATOM_SRC_BYTE16:
394 case ATOM_SRC_BYTE24:
395 (*ptr)++;
396 return;
397 }
398 return;
399 }
400}
401
402static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
403{
404 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
405}
406
407static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
408{
409 uint32_t val = 0xCDCDCDCD;
410
411 switch (align) {
412 case ATOM_SRC_DWORD:
413 val = U32(*ptr);
414 (*ptr) += 4;
415 break;
416 case ATOM_SRC_WORD0:
417 case ATOM_SRC_WORD8:
418 case ATOM_SRC_WORD16:
419 val = U16(*ptr);
420 (*ptr) += 2;
421 break;
422 case ATOM_SRC_BYTE0:
423 case ATOM_SRC_BYTE8:
424 case ATOM_SRC_BYTE16:
425 case ATOM_SRC_BYTE24:
426 val = U8(*ptr);
427 (*ptr)++;
428 break;
429 }
430 return val;
431}
432
433static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
434 int *ptr, uint32_t *saved, int print)
435{
436 return atom_get_src_int(ctx,
437 arg | atom_dst_to_src[(attr >> 3) &
438 7][(attr >> 6) & 3] << 3,
439 ptr, saved, print);
440}
441
442static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
443{
444 atom_skip_src_int(ctx,
445 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
446 3] << 3, ptr);
447}
448
449static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
450 int *ptr, uint32_t val, uint32_t saved)
451{
452 uint32_t align =
453 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
454 val, idx;
455 struct atom_context *gctx = ctx->ctx;
456 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
457 val <<= atom_arg_shift[align];
458 val &= atom_arg_mask[align];
459 saved &= ~atom_arg_mask[align];
460 val |= saved;
461 switch (arg) {
462 case ATOM_ARG_REG:
463 idx = U16(*ptr);
464 (*ptr) += 2;
465 DEBUG("REG[0x%04X]", idx);
466 idx += gctx->reg_block;
467 switch (gctx->io_mode) {
468 case ATOM_IO_MM:
469 if (idx == 0)
470 gctx->card->reg_write(gctx->card, idx,
471 val << 2);
472 else
473 gctx->card->reg_write(gctx->card, idx, val);
474 break;
475 case ATOM_IO_PCI:
476 printk(KERN_INFO
477 "PCI registers are not implemented.\n");
478 return;
479 case ATOM_IO_SYSIO:
480 printk(KERN_INFO
481 "SYSIO registers are not implemented.\n");
482 return;
483 default:
484 if (!(gctx->io_mode & 0x80)) {
485 printk(KERN_INFO "Bad IO mode.\n");
486 return;
487 }
488 if (!gctx->iio[gctx->io_mode & 0xFF]) {
489 printk(KERN_INFO
490 "Undefined indirect IO write method %d.\n",
491 gctx->io_mode & 0x7F);
492 return;
493 }
494 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
495 idx, val);
496 }
497 break;
498 case ATOM_ARG_PS:
499 idx = U8(*ptr);
500 (*ptr)++;
501 DEBUG("PS[0x%02X]", idx);
502 ctx->ps[idx] = cpu_to_le32(val);
503 break;
504 case ATOM_ARG_WS:
505 idx = U8(*ptr);
506 (*ptr)++;
507 DEBUG("WS[0x%02X]", idx);
508 switch (idx) {
509 case ATOM_WS_QUOTIENT:
510 gctx->divmul[0] = val;
511 break;
512 case ATOM_WS_REMAINDER:
513 gctx->divmul[1] = val;
514 break;
515 case ATOM_WS_DATAPTR:
516 gctx->data_block = val;
517 break;
518 case ATOM_WS_SHIFT:
519 gctx->shift = val;
520 break;
521 case ATOM_WS_OR_MASK:
522 case ATOM_WS_AND_MASK:
523 break;
524 case ATOM_WS_FB_WINDOW:
525 gctx->fb_base = val;
526 break;
527 case ATOM_WS_ATTRIBUTES:
528 gctx->io_attr = val;
529 break;
530 case ATOM_WS_REGPTR:
531 gctx->reg_block = val;
532 break;
533 default:
534 ctx->ws[idx] = val;
535 }
536 break;
537 case ATOM_ARG_FB:
538 idx = U8(*ptr);
539 (*ptr)++;
540 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
541 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
542 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
543 } else
544 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
545 DEBUG("FB[0x%02X]", idx);
546 break;
547 case ATOM_ARG_PLL:
548 idx = U8(*ptr);
549 (*ptr)++;
550 DEBUG("PLL[0x%02X]", idx);
551 gctx->card->pll_write(gctx->card, idx, val);
552 break;
553 case ATOM_ARG_MC:
554 idx = U8(*ptr);
555 (*ptr)++;
556 DEBUG("MC[0x%02X]", idx);
557 gctx->card->mc_write(gctx->card, idx, val);
558 return;
559 }
560 switch (align) {
561 case ATOM_SRC_DWORD:
562 DEBUG(".[31:0] <- 0x%08X\n", old_val);
563 break;
564 case ATOM_SRC_WORD0:
565 DEBUG(".[15:0] <- 0x%04X\n", old_val);
566 break;
567 case ATOM_SRC_WORD8:
568 DEBUG(".[23:8] <- 0x%04X\n", old_val);
569 break;
570 case ATOM_SRC_WORD16:
571 DEBUG(".[31:16] <- 0x%04X\n", old_val);
572 break;
573 case ATOM_SRC_BYTE0:
574 DEBUG(".[7:0] <- 0x%02X\n", old_val);
575 break;
576 case ATOM_SRC_BYTE8:
577 DEBUG(".[15:8] <- 0x%02X\n", old_val);
578 break;
579 case ATOM_SRC_BYTE16:
580 DEBUG(".[23:16] <- 0x%02X\n", old_val);
581 break;
582 case ATOM_SRC_BYTE24:
583 DEBUG(".[31:24] <- 0x%02X\n", old_val);
584 break;
585 }
586}
587
588static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
589{
590 uint8_t attr = U8((*ptr)++);
591 uint32_t dst, src, saved;
592 int dptr = *ptr;
593 SDEBUG(" dst: ");
594 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
595 SDEBUG(" src: ");
596 src = atom_get_src(ctx, attr, ptr);
597 dst += src;
598 SDEBUG(" dst: ");
599 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
600}
601
602static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
603{
604 uint8_t attr = U8((*ptr)++);
605 uint32_t dst, src, saved;
606 int dptr = *ptr;
607 SDEBUG(" dst: ");
608 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
609 SDEBUG(" src: ");
610 src = atom_get_src(ctx, attr, ptr);
611 dst &= src;
612 SDEBUG(" dst: ");
613 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
614}
615
616static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
617{
618 printk("ATOM BIOS beeped!\n");
619}
620
621static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
622{
623 int idx = U8((*ptr)++);
624 int r = 0;
625
626 if (idx < ATOM_TABLE_NAMES_CNT)
627 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
628 else
629 SDEBUG(" table: %d\n", idx);
630 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
631 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
632 if (r) {
633 ctx->abort = true;
634 }
635}
636
637static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
638{
639 uint8_t attr = U8((*ptr)++);
640 uint32_t saved;
641 int dptr = *ptr;
642 attr &= 0x38;
643 attr |= atom_def_dst[attr >> 3] << 6;
644 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
645 SDEBUG(" dst: ");
646 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
647}
648
649static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
650{
651 uint8_t attr = U8((*ptr)++);
652 uint32_t dst, src;
653 SDEBUG(" src1: ");
654 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
655 SDEBUG(" src2: ");
656 src = atom_get_src(ctx, attr, ptr);
657 ctx->ctx->cs_equal = (dst == src);
658 ctx->ctx->cs_above = (dst > src);
659 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
660 ctx->ctx->cs_above ? "GT" : "LE");
661}
662
663static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
664{
665 unsigned count = U8((*ptr)++);
666 SDEBUG(" count: %d\n", count);
667 if (arg == ATOM_UNIT_MICROSEC)
668 udelay(count);
669 else if (!drm_can_sleep())
670 mdelay(count);
671 else
672 msleep(count);
673}
674
675static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
676{
677 uint8_t attr = U8((*ptr)++);
678 uint32_t dst, src;
679 SDEBUG(" src1: ");
680 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
681 SDEBUG(" src2: ");
682 src = atom_get_src(ctx, attr, ptr);
683 if (src != 0) {
684 ctx->ctx->divmul[0] = dst / src;
685 ctx->ctx->divmul[1] = dst % src;
686 } else {
687 ctx->ctx->divmul[0] = 0;
688 ctx->ctx->divmul[1] = 0;
689 }
690}
691
692static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
693{
694 /* functionally, a nop */
695}
696
697static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
698{
699 int execute = 0, target = U16(*ptr);
700 unsigned long cjiffies;
701
702 (*ptr) += 2;
703 switch (arg) {
704 case ATOM_COND_ABOVE:
705 execute = ctx->ctx->cs_above;
706 break;
707 case ATOM_COND_ABOVEOREQUAL:
708 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
709 break;
710 case ATOM_COND_ALWAYS:
711 execute = 1;
712 break;
713 case ATOM_COND_BELOW:
714 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
715 break;
716 case ATOM_COND_BELOWOREQUAL:
717 execute = !ctx->ctx->cs_above;
718 break;
719 case ATOM_COND_EQUAL:
720 execute = ctx->ctx->cs_equal;
721 break;
722 case ATOM_COND_NOTEQUAL:
723 execute = !ctx->ctx->cs_equal;
724 break;
725 }
726 if (arg != ATOM_COND_ALWAYS)
727 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
728 SDEBUG(" target: 0x%04X\n", target);
729 if (execute) {
730 if (ctx->last_jump == (ctx->start + target)) {
731 cjiffies = jiffies;
732 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
733 cjiffies -= ctx->last_jump_jiffies;
734 if ((jiffies_to_msecs(cjiffies) > 5000)) {
735 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
736 ctx->abort = true;
737 }
738 } else {
739 /* jiffies wrap around we will just wait a little longer */
740 ctx->last_jump_jiffies = jiffies;
741 }
742 } else {
743 ctx->last_jump = ctx->start + target;
744 ctx->last_jump_jiffies = jiffies;
745 }
746 *ptr = ctx->start + target;
747 }
748}
749
750static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
751{
752 uint8_t attr = U8((*ptr)++);
753 uint32_t dst, mask, src, saved;
754 int dptr = *ptr;
755 SDEBUG(" dst: ");
756 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
757 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
758 SDEBUG(" mask: 0x%08x", mask);
759 SDEBUG(" src: ");
760 src = atom_get_src(ctx, attr, ptr);
761 dst &= mask;
762 dst |= src;
763 SDEBUG(" dst: ");
764 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
765}
766
767static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
768{
769 uint8_t attr = U8((*ptr)++);
770 uint32_t src, saved;
771 int dptr = *ptr;
772 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
773 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
774 else {
775 atom_skip_dst(ctx, arg, attr, ptr);
776 saved = 0xCDCDCDCD;
777 }
778 SDEBUG(" src: ");
779 src = atom_get_src(ctx, attr, ptr);
780 SDEBUG(" dst: ");
781 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
782}
783
784static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
785{
786 uint8_t attr = U8((*ptr)++);
787 uint32_t dst, src;
788 SDEBUG(" src1: ");
789 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
790 SDEBUG(" src2: ");
791 src = atom_get_src(ctx, attr, ptr);
792 ctx->ctx->divmul[0] = dst * src;
793}
794
795static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
796{
797 /* nothing */
798}
799
800static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
801{
802 uint8_t attr = U8((*ptr)++);
803 uint32_t dst, src, saved;
804 int dptr = *ptr;
805 SDEBUG(" dst: ");
806 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
807 SDEBUG(" src: ");
808 src = atom_get_src(ctx, attr, ptr);
809 dst |= src;
810 SDEBUG(" dst: ");
811 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
812}
813
814static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
815{
816 uint8_t val = U8((*ptr)++);
817 SDEBUG("POST card output: 0x%02X\n", val);
818}
819
820static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
821{
822 printk(KERN_INFO "unimplemented!\n");
823}
824
825static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
826{
827 printk(KERN_INFO "unimplemented!\n");
828}
829
830static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
831{
832 printk(KERN_INFO "unimplemented!\n");
833}
834
835static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
836{
837 int idx = U8(*ptr);
838 (*ptr)++;
839 SDEBUG(" block: %d\n", idx);
840 if (!idx)
841 ctx->ctx->data_block = 0;
842 else if (idx == 255)
843 ctx->ctx->data_block = ctx->start;
844 else
845 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
846 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
847}
848
849static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
850{
851 uint8_t attr = U8((*ptr)++);
852 SDEBUG(" fb_base: ");
853 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
854}
855
856static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
857{
858 int port;
859 switch (arg) {
860 case ATOM_PORT_ATI:
861 port = U16(*ptr);
862 if (port < ATOM_IO_NAMES_CNT)
863 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
864 else
865 SDEBUG(" port: %d\n", port);
866 if (!port)
867 ctx->ctx->io_mode = ATOM_IO_MM;
868 else
869 ctx->ctx->io_mode = ATOM_IO_IIO | port;
870 (*ptr) += 2;
871 break;
872 case ATOM_PORT_PCI:
873 ctx->ctx->io_mode = ATOM_IO_PCI;
874 (*ptr)++;
875 break;
876 case ATOM_PORT_SYSIO:
877 ctx->ctx->io_mode = ATOM_IO_SYSIO;
878 (*ptr)++;
879 break;
880 }
881}
882
883static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
884{
885 ctx->ctx->reg_block = U16(*ptr);
886 (*ptr) += 2;
887 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
888}
889
890static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
891{
892 uint8_t attr = U8((*ptr)++), shift;
893 uint32_t saved, dst;
894 int dptr = *ptr;
895 attr &= 0x38;
896 attr |= atom_def_dst[attr >> 3] << 6;
897 SDEBUG(" dst: ");
898 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
899 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
900 SDEBUG(" shift: %d\n", shift);
901 dst <<= shift;
902 SDEBUG(" dst: ");
903 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
904}
905
906static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
907{
908 uint8_t attr = U8((*ptr)++), shift;
909 uint32_t saved, dst;
910 int dptr = *ptr;
911 attr &= 0x38;
912 attr |= atom_def_dst[attr >> 3] << 6;
913 SDEBUG(" dst: ");
914 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
915 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
916 SDEBUG(" shift: %d\n", shift);
917 dst >>= shift;
918 SDEBUG(" dst: ");
919 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
920}
921
922static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
923{
924 uint8_t attr = U8((*ptr)++), shift;
925 uint32_t saved, dst;
926 int dptr = *ptr;
927 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
928 SDEBUG(" dst: ");
929 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
930 /* op needs to full dst value */
931 dst = saved;
932 shift = atom_get_src(ctx, attr, ptr);
933 SDEBUG(" shift: %d\n", shift);
934 dst <<= shift;
935 dst &= atom_arg_mask[dst_align];
936 dst >>= atom_arg_shift[dst_align];
937 SDEBUG(" dst: ");
938 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
939}
940
941static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
942{
943 uint8_t attr = U8((*ptr)++), shift;
944 uint32_t saved, dst;
945 int dptr = *ptr;
946 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
947 SDEBUG(" dst: ");
948 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
949 /* op needs to full dst value */
950 dst = saved;
951 shift = atom_get_src(ctx, attr, ptr);
952 SDEBUG(" shift: %d\n", shift);
953 dst >>= shift;
954 dst &= atom_arg_mask[dst_align];
955 dst >>= atom_arg_shift[dst_align];
956 SDEBUG(" dst: ");
957 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
958}
959
960static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
961{
962 uint8_t attr = U8((*ptr)++);
963 uint32_t dst, src, saved;
964 int dptr = *ptr;
965 SDEBUG(" dst: ");
966 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
967 SDEBUG(" src: ");
968 src = atom_get_src(ctx, attr, ptr);
969 dst -= src;
970 SDEBUG(" dst: ");
971 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
972}
973
974static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
975{
976 uint8_t attr = U8((*ptr)++);
977 uint32_t src, val, target;
978 SDEBUG(" switch: ");
979 src = atom_get_src(ctx, attr, ptr);
980 while (U16(*ptr) != ATOM_CASE_END)
981 if (U8(*ptr) == ATOM_CASE_MAGIC) {
982 (*ptr)++;
983 SDEBUG(" case: ");
984 val =
985 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
986 ptr);
987 target = U16(*ptr);
988 if (val == src) {
989 SDEBUG(" target: %04X\n", target);
990 *ptr = ctx->start + target;
991 return;
992 }
993 (*ptr) += 2;
994 } else {
995 printk(KERN_INFO "Bad case.\n");
996 return;
997 }
998 (*ptr) += 2;
999}
1000
1001static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1002{
1003 uint8_t attr = U8((*ptr)++);
1004 uint32_t dst, src;
1005 SDEBUG(" src1: ");
1006 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1007 SDEBUG(" src2: ");
1008 src = atom_get_src(ctx, attr, ptr);
1009 ctx->ctx->cs_equal = ((dst & src) == 0);
1010 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1011}
1012
1013static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1014{
1015 uint8_t attr = U8((*ptr)++);
1016 uint32_t dst, src, saved;
1017 int dptr = *ptr;
1018 SDEBUG(" dst: ");
1019 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1020 SDEBUG(" src: ");
1021 src = atom_get_src(ctx, attr, ptr);
1022 dst ^= src;
1023 SDEBUG(" dst: ");
1024 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1025}
1026
1027static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1028{
1029 printk(KERN_INFO "unimplemented!\n");
1030}
1031
1032static struct {
1033 void (*func) (atom_exec_context *, int *, int);
1034 int arg;
1035} opcode_table[ATOM_OP_CNT] = {
1036 {
1037 NULL, 0}, {
1038 atom_op_move, ATOM_ARG_REG}, {
1039 atom_op_move, ATOM_ARG_PS}, {
1040 atom_op_move, ATOM_ARG_WS}, {
1041 atom_op_move, ATOM_ARG_FB}, {
1042 atom_op_move, ATOM_ARG_PLL}, {
1043 atom_op_move, ATOM_ARG_MC}, {
1044 atom_op_and, ATOM_ARG_REG}, {
1045 atom_op_and, ATOM_ARG_PS}, {
1046 atom_op_and, ATOM_ARG_WS}, {
1047 atom_op_and, ATOM_ARG_FB}, {
1048 atom_op_and, ATOM_ARG_PLL}, {
1049 atom_op_and, ATOM_ARG_MC}, {
1050 atom_op_or, ATOM_ARG_REG}, {
1051 atom_op_or, ATOM_ARG_PS}, {
1052 atom_op_or, ATOM_ARG_WS}, {
1053 atom_op_or, ATOM_ARG_FB}, {
1054 atom_op_or, ATOM_ARG_PLL}, {
1055 atom_op_or, ATOM_ARG_MC}, {
1056 atom_op_shift_left, ATOM_ARG_REG}, {
1057 atom_op_shift_left, ATOM_ARG_PS}, {
1058 atom_op_shift_left, ATOM_ARG_WS}, {
1059 atom_op_shift_left, ATOM_ARG_FB}, {
1060 atom_op_shift_left, ATOM_ARG_PLL}, {
1061 atom_op_shift_left, ATOM_ARG_MC}, {
1062 atom_op_shift_right, ATOM_ARG_REG}, {
1063 atom_op_shift_right, ATOM_ARG_PS}, {
1064 atom_op_shift_right, ATOM_ARG_WS}, {
1065 atom_op_shift_right, ATOM_ARG_FB}, {
1066 atom_op_shift_right, ATOM_ARG_PLL}, {
1067 atom_op_shift_right, ATOM_ARG_MC}, {
1068 atom_op_mul, ATOM_ARG_REG}, {
1069 atom_op_mul, ATOM_ARG_PS}, {
1070 atom_op_mul, ATOM_ARG_WS}, {
1071 atom_op_mul, ATOM_ARG_FB}, {
1072 atom_op_mul, ATOM_ARG_PLL}, {
1073 atom_op_mul, ATOM_ARG_MC}, {
1074 atom_op_div, ATOM_ARG_REG}, {
1075 atom_op_div, ATOM_ARG_PS}, {
1076 atom_op_div, ATOM_ARG_WS}, {
1077 atom_op_div, ATOM_ARG_FB}, {
1078 atom_op_div, ATOM_ARG_PLL}, {
1079 atom_op_div, ATOM_ARG_MC}, {
1080 atom_op_add, ATOM_ARG_REG}, {
1081 atom_op_add, ATOM_ARG_PS}, {
1082 atom_op_add, ATOM_ARG_WS}, {
1083 atom_op_add, ATOM_ARG_FB}, {
1084 atom_op_add, ATOM_ARG_PLL}, {
1085 atom_op_add, ATOM_ARG_MC}, {
1086 atom_op_sub, ATOM_ARG_REG}, {
1087 atom_op_sub, ATOM_ARG_PS}, {
1088 atom_op_sub, ATOM_ARG_WS}, {
1089 atom_op_sub, ATOM_ARG_FB}, {
1090 atom_op_sub, ATOM_ARG_PLL}, {
1091 atom_op_sub, ATOM_ARG_MC}, {
1092 atom_op_setport, ATOM_PORT_ATI}, {
1093 atom_op_setport, ATOM_PORT_PCI}, {
1094 atom_op_setport, ATOM_PORT_SYSIO}, {
1095 atom_op_setregblock, 0}, {
1096 atom_op_setfbbase, 0}, {
1097 atom_op_compare, ATOM_ARG_REG}, {
1098 atom_op_compare, ATOM_ARG_PS}, {
1099 atom_op_compare, ATOM_ARG_WS}, {
1100 atom_op_compare, ATOM_ARG_FB}, {
1101 atom_op_compare, ATOM_ARG_PLL}, {
1102 atom_op_compare, ATOM_ARG_MC}, {
1103 atom_op_switch, 0}, {
1104 atom_op_jump, ATOM_COND_ALWAYS}, {
1105 atom_op_jump, ATOM_COND_EQUAL}, {
1106 atom_op_jump, ATOM_COND_BELOW}, {
1107 atom_op_jump, ATOM_COND_ABOVE}, {
1108 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1109 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1110 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1111 atom_op_test, ATOM_ARG_REG}, {
1112 atom_op_test, ATOM_ARG_PS}, {
1113 atom_op_test, ATOM_ARG_WS}, {
1114 atom_op_test, ATOM_ARG_FB}, {
1115 atom_op_test, ATOM_ARG_PLL}, {
1116 atom_op_test, ATOM_ARG_MC}, {
1117 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1118 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1119 atom_op_calltable, 0}, {
1120 atom_op_repeat, 0}, {
1121 atom_op_clear, ATOM_ARG_REG}, {
1122 atom_op_clear, ATOM_ARG_PS}, {
1123 atom_op_clear, ATOM_ARG_WS}, {
1124 atom_op_clear, ATOM_ARG_FB}, {
1125 atom_op_clear, ATOM_ARG_PLL}, {
1126 atom_op_clear, ATOM_ARG_MC}, {
1127 atom_op_nop, 0}, {
1128 atom_op_eot, 0}, {
1129 atom_op_mask, ATOM_ARG_REG}, {
1130 atom_op_mask, ATOM_ARG_PS}, {
1131 atom_op_mask, ATOM_ARG_WS}, {
1132 atom_op_mask, ATOM_ARG_FB}, {
1133 atom_op_mask, ATOM_ARG_PLL}, {
1134 atom_op_mask, ATOM_ARG_MC}, {
1135 atom_op_postcard, 0}, {
1136 atom_op_beep, 0}, {
1137 atom_op_savereg, 0}, {
1138 atom_op_restorereg, 0}, {
1139 atom_op_setdatablock, 0}, {
1140 atom_op_xor, ATOM_ARG_REG}, {
1141 atom_op_xor, ATOM_ARG_PS}, {
1142 atom_op_xor, ATOM_ARG_WS}, {
1143 atom_op_xor, ATOM_ARG_FB}, {
1144 atom_op_xor, ATOM_ARG_PLL}, {
1145 atom_op_xor, ATOM_ARG_MC}, {
1146 atom_op_shl, ATOM_ARG_REG}, {
1147 atom_op_shl, ATOM_ARG_PS}, {
1148 atom_op_shl, ATOM_ARG_WS}, {
1149 atom_op_shl, ATOM_ARG_FB}, {
1150 atom_op_shl, ATOM_ARG_PLL}, {
1151 atom_op_shl, ATOM_ARG_MC}, {
1152 atom_op_shr, ATOM_ARG_REG}, {
1153 atom_op_shr, ATOM_ARG_PS}, {
1154 atom_op_shr, ATOM_ARG_WS}, {
1155 atom_op_shr, ATOM_ARG_FB}, {
1156 atom_op_shr, ATOM_ARG_PLL}, {
1157 atom_op_shr, ATOM_ARG_MC}, {
1158atom_op_debug, 0},};
1159
1160static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1161{
1162 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1163 int len, ws, ps, ptr;
1164 unsigned char op;
1165 atom_exec_context ectx;
1166 int ret = 0;
1167
1168 if (!base)
1169 return -EINVAL;
1170
1171 len = CU16(base + ATOM_CT_SIZE_PTR);
1172 ws = CU8(base + ATOM_CT_WS_PTR);
1173 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1174 ptr = base + ATOM_CT_CODE_PTR;
1175
1176 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1177
1178 ectx.ctx = ctx;
1179 ectx.ps_shift = ps / 4;
1180 ectx.start = base;
1181 ectx.ps = params;
1182 ectx.abort = false;
1183 ectx.last_jump = 0;
1184 if (ws)
1185 ectx.ws = kzalloc(4 * ws, GFP_KERNEL);
1186 else
1187 ectx.ws = NULL;
1188
1189 debug_depth++;
1190 while (1) {
1191 op = CU8(ptr++);
1192 if (op < ATOM_OP_NAMES_CNT)
1193 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1194 else
1195 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1196 if (ectx.abort) {
1197 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1198 base, len, ws, ps, ptr - 1);
1199 ret = -EINVAL;
1200 goto free;
1201 }
1202
1203 if (op < ATOM_OP_CNT && op > 0)
1204 opcode_table[op].func(&ectx, &ptr,
1205 opcode_table[op].arg);
1206 else
1207 break;
1208
1209 if (op == ATOM_OP_EOT)
1210 break;
1211 }
1212 debug_depth--;
1213 SDEBUG("<<\n");
1214
1215free:
1216 if (ws)
1217 kfree(ectx.ws);
1218 return ret;
1219}
1220
1221int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1222{
1223 int r;
1224
1225 mutex_lock(&ctx->mutex);
1226 /* reset data block */
1227 ctx->data_block = 0;
1228 /* reset reg block */
1229 ctx->reg_block = 0;
1230 /* reset fb window */
1231 ctx->fb_base = 0;
1232 /* reset io mode */
1233 ctx->io_mode = ATOM_IO_MM;
1234 /* reset divmul */
1235 ctx->divmul[0] = 0;
1236 ctx->divmul[1] = 0;
1237 r = atom_execute_table_locked(ctx, index, params);
1238 mutex_unlock(&ctx->mutex);
1239 return r;
1240}
1241
1242int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1243{
1244 int r;
1245 mutex_lock(&ctx->scratch_mutex);
1246 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1247 mutex_unlock(&ctx->scratch_mutex);
1248 return r;
1249}
1250
1251static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1252
1253static void atom_index_iio(struct atom_context *ctx, int base)
1254{
1255 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1256 if (!ctx->iio)
1257 return;
1258 while (CU8(base) == ATOM_IIO_START) {
1259 ctx->iio[CU8(base + 1)] = base + 2;
1260 base += 2;
1261 while (CU8(base) != ATOM_IIO_END)
1262 base += atom_iio_len[CU8(base)];
1263 base += 3;
1264 }
1265}
1266
1267struct atom_context *atom_parse(struct card_info *card, void *bios)
1268{
1269 int base;
1270 struct atom_context *ctx =
1271 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1272 char *str;
1273 char name[512];
1274 int i;
1275
1276 if (!ctx)
1277 return NULL;
1278
1279 ctx->card = card;
1280 ctx->bios = bios;
1281
1282 if (CU16(0) != ATOM_BIOS_MAGIC) {
1283 printk(KERN_INFO "Invalid BIOS magic.\n");
1284 kfree(ctx);
1285 return NULL;
1286 }
1287 if (strncmp
1288 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1289 strlen(ATOM_ATI_MAGIC))) {
1290 printk(KERN_INFO "Invalid ATI magic.\n");
1291 kfree(ctx);
1292 return NULL;
1293 }
1294
1295 base = CU16(ATOM_ROM_TABLE_PTR);
1296 if (strncmp
1297 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1298 strlen(ATOM_ROM_MAGIC))) {
1299 printk(KERN_INFO "Invalid ATOM magic.\n");
1300 kfree(ctx);
1301 return NULL;
1302 }
1303
1304 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1305 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1306 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1307 if (!ctx->iio) {
1308 atom_destroy(ctx);
1309 return NULL;
1310 }
1311
1312 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1313 while (*str && ((*str == '\n') || (*str == '\r')))
1314 str++;
1315 /* name string isn't always 0 terminated */
1316 for (i = 0; i < 511; i++) {
1317 name[i] = str[i];
1318 if (name[i] < '.' || name[i] > 'z') {
1319 name[i] = 0;
1320 break;
1321 }
1322 }
1323 printk(KERN_INFO "ATOM BIOS: %s\n", name);
1324
1325 return ctx;
1326}
1327
1328int atom_asic_init(struct atom_context *ctx)
1329{
1330 struct radeon_device *rdev = ctx->card->dev->dev_private;
1331 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1332 uint32_t ps[16];
1333 int ret;
1334
1335 memset(ps, 0, 64);
1336
1337 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1338 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1339 if (!ps[0] || !ps[1])
1340 return 1;
1341
1342 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1343 return 1;
1344 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1345 if (ret)
1346 return ret;
1347
1348 memset(ps, 0, 64);
1349
1350 if (rdev->family < CHIP_R600) {
1351 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1352 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1353 }
1354 return ret;
1355}
1356
1357void atom_destroy(struct atom_context *ctx)
1358{
1359 kfree(ctx->iio);
1360 kfree(ctx);
1361}
1362
1363bool atom_parse_data_header(struct atom_context *ctx, int index,
1364 uint16_t * size, uint8_t * frev, uint8_t * crev,
1365 uint16_t * data_start)
1366{
1367 int offset = index * 2 + 4;
1368 int idx = CU16(ctx->data_table + offset);
1369 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1370
1371 if (!mdt[index])
1372 return false;
1373
1374 if (size)
1375 *size = CU16(idx);
1376 if (frev)
1377 *frev = CU8(idx + 2);
1378 if (crev)
1379 *crev = CU8(idx + 3);
1380 *data_start = idx;
1381 return true;
1382}
1383
1384bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1385 uint8_t * crev)
1386{
1387 int offset = index * 2 + 4;
1388 int idx = CU16(ctx->cmd_table + offset);
1389 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1390
1391 if (!mct[index])
1392 return false;
1393
1394 if (frev)
1395 *frev = CU8(idx + 2);
1396 if (crev)
1397 *crev = CU8(idx + 3);
1398 return true;
1399}
1400
1401int atom_allocate_fb_scratch(struct atom_context *ctx)
1402{
1403 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1404 uint16_t data_offset;
1405 int usage_bytes = 0;
1406 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1407
1408 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1409 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1410
1411 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1412 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1413 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1414
1415 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1416 }
1417 ctx->scratch_size_bytes = 0;
1418 if (usage_bytes == 0)
1419 usage_bytes = 20 * 1024;
1420 /* allocate some scratch memory */
1421 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1422 if (!ctx->scratch)
1423 return -ENOMEM;
1424 ctx->scratch_size_bytes = usage_bytes;
1425 return 0;
1426}
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25#include <linux/module.h>
26#include <linux/sched.h>
27#include <linux/slab.h>
28#include <linux/string_helpers.h>
29
30#include <asm/unaligned.h>
31
32#include <drm/drm_device.h>
33#include <drm/drm_util.h>
34
35#define ATOM_DEBUG
36
37#include "atom.h"
38#include "atom-names.h"
39#include "atom-bits.h"
40#include "radeon.h"
41
42#define ATOM_COND_ABOVE 0
43#define ATOM_COND_ABOVEOREQUAL 1
44#define ATOM_COND_ALWAYS 2
45#define ATOM_COND_BELOW 3
46#define ATOM_COND_BELOWOREQUAL 4
47#define ATOM_COND_EQUAL 5
48#define ATOM_COND_NOTEQUAL 6
49
50#define ATOM_PORT_ATI 0
51#define ATOM_PORT_PCI 1
52#define ATOM_PORT_SYSIO 2
53
54#define ATOM_UNIT_MICROSEC 0
55#define ATOM_UNIT_MILLISEC 1
56
57#define PLL_INDEX 2
58#define PLL_DATA 3
59
60typedef struct {
61 struct atom_context *ctx;
62 uint32_t *ps, *ws;
63 int ps_shift;
64 uint16_t start;
65 unsigned last_jump;
66 unsigned long last_jump_jiffies;
67 bool abort;
68} atom_exec_context;
69
70int atom_debug = 0;
71static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params);
72int atom_execute_table(struct atom_context *ctx, int index, uint32_t *params);
73
74static uint32_t atom_arg_mask[8] = {
75 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
76 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
77};
78static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
79
80static int atom_dst_to_src[8][4] = {
81 /* translate destination alignment field to the source alignment encoding */
82 {0, 0, 0, 0},
83 {1, 2, 3, 0},
84 {1, 2, 3, 0},
85 {1, 2, 3, 0},
86 {4, 5, 6, 7},
87 {4, 5, 6, 7},
88 {4, 5, 6, 7},
89 {4, 5, 6, 7},
90};
91static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
92
93static int debug_depth = 0;
94#ifdef ATOM_DEBUG
95static void debug_print_spaces(int n)
96{
97 while (n--)
98 printk(" ");
99}
100
101#define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
102#define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
103#else
104#define DEBUG(...) do { } while (0)
105#define SDEBUG(...) do { } while (0)
106#endif
107
108static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
109 uint32_t index, uint32_t data)
110{
111 struct radeon_device *rdev = ctx->card->dev->dev_private;
112 uint32_t temp = 0xCDCDCDCD;
113
114 while (1)
115 switch (CU8(base)) {
116 case ATOM_IIO_NOP:
117 base++;
118 break;
119 case ATOM_IIO_READ:
120 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
121 base += 3;
122 break;
123 case ATOM_IIO_WRITE:
124 if (rdev->family == CHIP_RV515)
125 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
126 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
127 base += 3;
128 break;
129 case ATOM_IIO_CLEAR:
130 temp &=
131 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
132 CU8(base + 2));
133 base += 3;
134 break;
135 case ATOM_IIO_SET:
136 temp |=
137 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
138 2);
139 base += 3;
140 break;
141 case ATOM_IIO_MOVE_INDEX:
142 temp &=
143 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
144 CU8(base + 3));
145 temp |=
146 ((index >> CU8(base + 2)) &
147 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
148 3);
149 base += 4;
150 break;
151 case ATOM_IIO_MOVE_DATA:
152 temp &=
153 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
154 CU8(base + 3));
155 temp |=
156 ((data >> CU8(base + 2)) &
157 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
158 3);
159 base += 4;
160 break;
161 case ATOM_IIO_MOVE_ATTR:
162 temp &=
163 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
164 CU8(base + 3));
165 temp |=
166 ((ctx->io_attr >> CU8(base + 2)) &
167 (0xFFFFFFFF >> (32 - CU8(base + 1)))) <<
168 CU8(base + 3);
169 base += 4;
170 break;
171 case ATOM_IIO_END:
172 return temp;
173 default:
174 pr_info("Unknown IIO opcode\n");
175 return 0;
176 }
177}
178
179static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
180 int *ptr, uint32_t *saved, int print)
181{
182 uint32_t idx, val = 0xCDCDCDCD, align, arg;
183 struct atom_context *gctx = ctx->ctx;
184 arg = attr & 7;
185 align = (attr >> 3) & 7;
186 switch (arg) {
187 case ATOM_ARG_REG:
188 idx = U16(*ptr);
189 (*ptr) += 2;
190 if (print)
191 DEBUG("REG[0x%04X]", idx);
192 idx += gctx->reg_block;
193 switch (gctx->io_mode) {
194 case ATOM_IO_MM:
195 val = gctx->card->reg_read(gctx->card, idx);
196 break;
197 case ATOM_IO_PCI:
198 pr_info("PCI registers are not implemented\n");
199 return 0;
200 case ATOM_IO_SYSIO:
201 pr_info("SYSIO registers are not implemented\n");
202 return 0;
203 default:
204 if (!(gctx->io_mode & 0x80)) {
205 pr_info("Bad IO mode\n");
206 return 0;
207 }
208 if (!gctx->iio[gctx->io_mode & 0x7F]) {
209 pr_info("Undefined indirect IO read method %d\n",
210 gctx->io_mode & 0x7F);
211 return 0;
212 }
213 val =
214 atom_iio_execute(gctx,
215 gctx->iio[gctx->io_mode & 0x7F],
216 idx, 0);
217 }
218 break;
219 case ATOM_ARG_PS:
220 idx = U8(*ptr);
221 (*ptr)++;
222 /* get_unaligned_le32 avoids unaligned accesses from atombios
223 * tables, noticed on a DEC Alpha. */
224 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
225 if (print)
226 DEBUG("PS[0x%02X,0x%04X]", idx, val);
227 break;
228 case ATOM_ARG_WS:
229 idx = U8(*ptr);
230 (*ptr)++;
231 if (print)
232 DEBUG("WS[0x%02X]", idx);
233 switch (idx) {
234 case ATOM_WS_QUOTIENT:
235 val = gctx->divmul[0];
236 break;
237 case ATOM_WS_REMAINDER:
238 val = gctx->divmul[1];
239 break;
240 case ATOM_WS_DATAPTR:
241 val = gctx->data_block;
242 break;
243 case ATOM_WS_SHIFT:
244 val = gctx->shift;
245 break;
246 case ATOM_WS_OR_MASK:
247 val = 1 << gctx->shift;
248 break;
249 case ATOM_WS_AND_MASK:
250 val = ~(1 << gctx->shift);
251 break;
252 case ATOM_WS_FB_WINDOW:
253 val = gctx->fb_base;
254 break;
255 case ATOM_WS_ATTRIBUTES:
256 val = gctx->io_attr;
257 break;
258 case ATOM_WS_REGPTR:
259 val = gctx->reg_block;
260 break;
261 default:
262 val = ctx->ws[idx];
263 }
264 break;
265 case ATOM_ARG_ID:
266 idx = U16(*ptr);
267 (*ptr) += 2;
268 if (print) {
269 if (gctx->data_block)
270 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
271 else
272 DEBUG("ID[0x%04X]", idx);
273 }
274 val = U32(idx + gctx->data_block);
275 break;
276 case ATOM_ARG_FB:
277 idx = U8(*ptr);
278 (*ptr)++;
279 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
280 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
281 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
282 val = 0;
283 } else
284 val = gctx->scratch[(gctx->fb_base / 4) + idx];
285 if (print)
286 DEBUG("FB[0x%02X]", idx);
287 break;
288 case ATOM_ARG_IMM:
289 switch (align) {
290 case ATOM_SRC_DWORD:
291 val = U32(*ptr);
292 (*ptr) += 4;
293 if (print)
294 DEBUG("IMM 0x%08X\n", val);
295 return val;
296 case ATOM_SRC_WORD0:
297 case ATOM_SRC_WORD8:
298 case ATOM_SRC_WORD16:
299 val = U16(*ptr);
300 (*ptr) += 2;
301 if (print)
302 DEBUG("IMM 0x%04X\n", val);
303 return val;
304 case ATOM_SRC_BYTE0:
305 case ATOM_SRC_BYTE8:
306 case ATOM_SRC_BYTE16:
307 case ATOM_SRC_BYTE24:
308 val = U8(*ptr);
309 (*ptr)++;
310 if (print)
311 DEBUG("IMM 0x%02X\n", val);
312 return val;
313 }
314 return 0;
315 case ATOM_ARG_PLL:
316 idx = U8(*ptr);
317 (*ptr)++;
318 if (print)
319 DEBUG("PLL[0x%02X]", idx);
320 val = gctx->card->pll_read(gctx->card, idx);
321 break;
322 case ATOM_ARG_MC:
323 idx = U8(*ptr);
324 (*ptr)++;
325 if (print)
326 DEBUG("MC[0x%02X]", idx);
327 val = gctx->card->mc_read(gctx->card, idx);
328 break;
329 }
330 if (saved)
331 *saved = val;
332 val &= atom_arg_mask[align];
333 val >>= atom_arg_shift[align];
334 if (print)
335 switch (align) {
336 case ATOM_SRC_DWORD:
337 DEBUG(".[31:0] -> 0x%08X\n", val);
338 break;
339 case ATOM_SRC_WORD0:
340 DEBUG(".[15:0] -> 0x%04X\n", val);
341 break;
342 case ATOM_SRC_WORD8:
343 DEBUG(".[23:8] -> 0x%04X\n", val);
344 break;
345 case ATOM_SRC_WORD16:
346 DEBUG(".[31:16] -> 0x%04X\n", val);
347 break;
348 case ATOM_SRC_BYTE0:
349 DEBUG(".[7:0] -> 0x%02X\n", val);
350 break;
351 case ATOM_SRC_BYTE8:
352 DEBUG(".[15:8] -> 0x%02X\n", val);
353 break;
354 case ATOM_SRC_BYTE16:
355 DEBUG(".[23:16] -> 0x%02X\n", val);
356 break;
357 case ATOM_SRC_BYTE24:
358 DEBUG(".[31:24] -> 0x%02X\n", val);
359 break;
360 }
361 return val;
362}
363
364static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
365{
366 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
367 switch (arg) {
368 case ATOM_ARG_REG:
369 case ATOM_ARG_ID:
370 (*ptr) += 2;
371 break;
372 case ATOM_ARG_PLL:
373 case ATOM_ARG_MC:
374 case ATOM_ARG_PS:
375 case ATOM_ARG_WS:
376 case ATOM_ARG_FB:
377 (*ptr)++;
378 break;
379 case ATOM_ARG_IMM:
380 switch (align) {
381 case ATOM_SRC_DWORD:
382 (*ptr) += 4;
383 return;
384 case ATOM_SRC_WORD0:
385 case ATOM_SRC_WORD8:
386 case ATOM_SRC_WORD16:
387 (*ptr) += 2;
388 return;
389 case ATOM_SRC_BYTE0:
390 case ATOM_SRC_BYTE8:
391 case ATOM_SRC_BYTE16:
392 case ATOM_SRC_BYTE24:
393 (*ptr)++;
394 return;
395 }
396 return;
397 }
398}
399
400static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
401{
402 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
403}
404
405static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
406{
407 uint32_t val = 0xCDCDCDCD;
408
409 switch (align) {
410 case ATOM_SRC_DWORD:
411 val = U32(*ptr);
412 (*ptr) += 4;
413 break;
414 case ATOM_SRC_WORD0:
415 case ATOM_SRC_WORD8:
416 case ATOM_SRC_WORD16:
417 val = U16(*ptr);
418 (*ptr) += 2;
419 break;
420 case ATOM_SRC_BYTE0:
421 case ATOM_SRC_BYTE8:
422 case ATOM_SRC_BYTE16:
423 case ATOM_SRC_BYTE24:
424 val = U8(*ptr);
425 (*ptr)++;
426 break;
427 }
428 return val;
429}
430
431static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
432 int *ptr, uint32_t *saved, int print)
433{
434 return atom_get_src_int(ctx,
435 arg | atom_dst_to_src[(attr >> 3) &
436 7][(attr >> 6) & 3] << 3,
437 ptr, saved, print);
438}
439
440static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
441{
442 atom_skip_src_int(ctx,
443 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
444 3] << 3, ptr);
445}
446
447static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
448 int *ptr, uint32_t val, uint32_t saved)
449{
450 uint32_t align =
451 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
452 val, idx;
453 struct atom_context *gctx = ctx->ctx;
454 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
455 val <<= atom_arg_shift[align];
456 val &= atom_arg_mask[align];
457 saved &= ~atom_arg_mask[align];
458 val |= saved;
459 switch (arg) {
460 case ATOM_ARG_REG:
461 idx = U16(*ptr);
462 (*ptr) += 2;
463 DEBUG("REG[0x%04X]", idx);
464 idx += gctx->reg_block;
465 switch (gctx->io_mode) {
466 case ATOM_IO_MM:
467 if (idx == 0)
468 gctx->card->reg_write(gctx->card, idx,
469 val << 2);
470 else
471 gctx->card->reg_write(gctx->card, idx, val);
472 break;
473 case ATOM_IO_PCI:
474 pr_info("PCI registers are not implemented\n");
475 return;
476 case ATOM_IO_SYSIO:
477 pr_info("SYSIO registers are not implemented\n");
478 return;
479 default:
480 if (!(gctx->io_mode & 0x80)) {
481 pr_info("Bad IO mode\n");
482 return;
483 }
484 if (!gctx->iio[gctx->io_mode & 0xFF]) {
485 pr_info("Undefined indirect IO write method %d\n",
486 gctx->io_mode & 0x7F);
487 return;
488 }
489 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
490 idx, val);
491 }
492 break;
493 case ATOM_ARG_PS:
494 idx = U8(*ptr);
495 (*ptr)++;
496 DEBUG("PS[0x%02X]", idx);
497 ctx->ps[idx] = cpu_to_le32(val);
498 break;
499 case ATOM_ARG_WS:
500 idx = U8(*ptr);
501 (*ptr)++;
502 DEBUG("WS[0x%02X]", idx);
503 switch (idx) {
504 case ATOM_WS_QUOTIENT:
505 gctx->divmul[0] = val;
506 break;
507 case ATOM_WS_REMAINDER:
508 gctx->divmul[1] = val;
509 break;
510 case ATOM_WS_DATAPTR:
511 gctx->data_block = val;
512 break;
513 case ATOM_WS_SHIFT:
514 gctx->shift = val;
515 break;
516 case ATOM_WS_OR_MASK:
517 case ATOM_WS_AND_MASK:
518 break;
519 case ATOM_WS_FB_WINDOW:
520 gctx->fb_base = val;
521 break;
522 case ATOM_WS_ATTRIBUTES:
523 gctx->io_attr = val;
524 break;
525 case ATOM_WS_REGPTR:
526 gctx->reg_block = val;
527 break;
528 default:
529 ctx->ws[idx] = val;
530 }
531 break;
532 case ATOM_ARG_FB:
533 idx = U8(*ptr);
534 (*ptr)++;
535 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
536 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
537 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
538 } else
539 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
540 DEBUG("FB[0x%02X]", idx);
541 break;
542 case ATOM_ARG_PLL:
543 idx = U8(*ptr);
544 (*ptr)++;
545 DEBUG("PLL[0x%02X]", idx);
546 gctx->card->pll_write(gctx->card, idx, val);
547 break;
548 case ATOM_ARG_MC:
549 idx = U8(*ptr);
550 (*ptr)++;
551 DEBUG("MC[0x%02X]", idx);
552 gctx->card->mc_write(gctx->card, idx, val);
553 return;
554 }
555 switch (align) {
556 case ATOM_SRC_DWORD:
557 DEBUG(".[31:0] <- 0x%08X\n", old_val);
558 break;
559 case ATOM_SRC_WORD0:
560 DEBUG(".[15:0] <- 0x%04X\n", old_val);
561 break;
562 case ATOM_SRC_WORD8:
563 DEBUG(".[23:8] <- 0x%04X\n", old_val);
564 break;
565 case ATOM_SRC_WORD16:
566 DEBUG(".[31:16] <- 0x%04X\n", old_val);
567 break;
568 case ATOM_SRC_BYTE0:
569 DEBUG(".[7:0] <- 0x%02X\n", old_val);
570 break;
571 case ATOM_SRC_BYTE8:
572 DEBUG(".[15:8] <- 0x%02X\n", old_val);
573 break;
574 case ATOM_SRC_BYTE16:
575 DEBUG(".[23:16] <- 0x%02X\n", old_val);
576 break;
577 case ATOM_SRC_BYTE24:
578 DEBUG(".[31:24] <- 0x%02X\n", old_val);
579 break;
580 }
581}
582
583static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
584{
585 uint8_t attr = U8((*ptr)++);
586 uint32_t dst, src, saved;
587 int dptr = *ptr;
588 SDEBUG(" dst: ");
589 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
590 SDEBUG(" src: ");
591 src = atom_get_src(ctx, attr, ptr);
592 dst += src;
593 SDEBUG(" dst: ");
594 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
595}
596
597static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
598{
599 uint8_t attr = U8((*ptr)++);
600 uint32_t dst, src, saved;
601 int dptr = *ptr;
602 SDEBUG(" dst: ");
603 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
604 SDEBUG(" src: ");
605 src = atom_get_src(ctx, attr, ptr);
606 dst &= src;
607 SDEBUG(" dst: ");
608 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
609}
610
611static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
612{
613 printk("ATOM BIOS beeped!\n");
614}
615
616static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
617{
618 int idx = U8((*ptr)++);
619 int r = 0;
620
621 if (idx < ATOM_TABLE_NAMES_CNT)
622 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
623 else
624 SDEBUG(" table: %d\n", idx);
625 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
626 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
627 if (r) {
628 ctx->abort = true;
629 }
630}
631
632static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
633{
634 uint8_t attr = U8((*ptr)++);
635 uint32_t saved;
636 int dptr = *ptr;
637 attr &= 0x38;
638 attr |= atom_def_dst[attr >> 3] << 6;
639 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
640 SDEBUG(" dst: ");
641 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
642}
643
644static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
645{
646 uint8_t attr = U8((*ptr)++);
647 uint32_t dst, src;
648 SDEBUG(" src1: ");
649 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
650 SDEBUG(" src2: ");
651 src = atom_get_src(ctx, attr, ptr);
652 ctx->ctx->cs_equal = (dst == src);
653 ctx->ctx->cs_above = (dst > src);
654 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
655 ctx->ctx->cs_above ? "GT" : "LE");
656}
657
658static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
659{
660 unsigned count = U8((*ptr)++);
661 SDEBUG(" count: %d\n", count);
662 if (arg == ATOM_UNIT_MICROSEC)
663 udelay(count);
664 else if (!drm_can_sleep())
665 mdelay(count);
666 else
667 msleep(count);
668}
669
670static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
671{
672 uint8_t attr = U8((*ptr)++);
673 uint32_t dst, src;
674 SDEBUG(" src1: ");
675 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
676 SDEBUG(" src2: ");
677 src = atom_get_src(ctx, attr, ptr);
678 if (src != 0) {
679 ctx->ctx->divmul[0] = dst / src;
680 ctx->ctx->divmul[1] = dst % src;
681 } else {
682 ctx->ctx->divmul[0] = 0;
683 ctx->ctx->divmul[1] = 0;
684 }
685}
686
687static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
688{
689 /* functionally, a nop */
690}
691
692static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
693{
694 int execute = 0, target = U16(*ptr);
695 unsigned long cjiffies;
696
697 (*ptr) += 2;
698 switch (arg) {
699 case ATOM_COND_ABOVE:
700 execute = ctx->ctx->cs_above;
701 break;
702 case ATOM_COND_ABOVEOREQUAL:
703 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
704 break;
705 case ATOM_COND_ALWAYS:
706 execute = 1;
707 break;
708 case ATOM_COND_BELOW:
709 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
710 break;
711 case ATOM_COND_BELOWOREQUAL:
712 execute = !ctx->ctx->cs_above;
713 break;
714 case ATOM_COND_EQUAL:
715 execute = ctx->ctx->cs_equal;
716 break;
717 case ATOM_COND_NOTEQUAL:
718 execute = !ctx->ctx->cs_equal;
719 break;
720 }
721 if (arg != ATOM_COND_ALWAYS)
722 SDEBUG(" taken: %s\n", str_yes_no(execute));
723 SDEBUG(" target: 0x%04X\n", target);
724 if (execute) {
725 if (ctx->last_jump == (ctx->start + target)) {
726 cjiffies = jiffies;
727 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
728 cjiffies -= ctx->last_jump_jiffies;
729 if ((jiffies_to_msecs(cjiffies) > 5000)) {
730 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
731 ctx->abort = true;
732 }
733 } else {
734 /* jiffies wrap around we will just wait a little longer */
735 ctx->last_jump_jiffies = jiffies;
736 }
737 } else {
738 ctx->last_jump = ctx->start + target;
739 ctx->last_jump_jiffies = jiffies;
740 }
741 *ptr = ctx->start + target;
742 }
743}
744
745static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
746{
747 uint8_t attr = U8((*ptr)++);
748 uint32_t dst, mask, src, saved;
749 int dptr = *ptr;
750 SDEBUG(" dst: ");
751 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
752 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
753 SDEBUG(" mask: 0x%08x", mask);
754 SDEBUG(" src: ");
755 src = atom_get_src(ctx, attr, ptr);
756 dst &= mask;
757 dst |= src;
758 SDEBUG(" dst: ");
759 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
760}
761
762static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
763{
764 uint8_t attr = U8((*ptr)++);
765 uint32_t src, saved;
766 int dptr = *ptr;
767 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
768 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
769 else {
770 atom_skip_dst(ctx, arg, attr, ptr);
771 saved = 0xCDCDCDCD;
772 }
773 SDEBUG(" src: ");
774 src = atom_get_src(ctx, attr, ptr);
775 SDEBUG(" dst: ");
776 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
777}
778
779static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
780{
781 uint8_t attr = U8((*ptr)++);
782 uint32_t dst, src;
783 SDEBUG(" src1: ");
784 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
785 SDEBUG(" src2: ");
786 src = atom_get_src(ctx, attr, ptr);
787 ctx->ctx->divmul[0] = dst * src;
788}
789
790static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
791{
792 /* nothing */
793}
794
795static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
796{
797 uint8_t attr = U8((*ptr)++);
798 uint32_t dst, src, saved;
799 int dptr = *ptr;
800 SDEBUG(" dst: ");
801 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
802 SDEBUG(" src: ");
803 src = atom_get_src(ctx, attr, ptr);
804 dst |= src;
805 SDEBUG(" dst: ");
806 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
807}
808
809static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
810{
811 uint8_t val = U8((*ptr)++);
812 SDEBUG("POST card output: 0x%02X\n", val);
813}
814
815static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
816{
817 pr_info("unimplemented!\n");
818}
819
820static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
821{
822 pr_info("unimplemented!\n");
823}
824
825static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
826{
827 pr_info("unimplemented!\n");
828}
829
830static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
831{
832 int idx = U8(*ptr);
833 (*ptr)++;
834 SDEBUG(" block: %d\n", idx);
835 if (!idx)
836 ctx->ctx->data_block = 0;
837 else if (idx == 255)
838 ctx->ctx->data_block = ctx->start;
839 else
840 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
841 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
842}
843
844static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
845{
846 uint8_t attr = U8((*ptr)++);
847 SDEBUG(" fb_base: ");
848 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
849}
850
851static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
852{
853 int port;
854 switch (arg) {
855 case ATOM_PORT_ATI:
856 port = U16(*ptr);
857 if (port < ATOM_IO_NAMES_CNT)
858 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
859 else
860 SDEBUG(" port: %d\n", port);
861 if (!port)
862 ctx->ctx->io_mode = ATOM_IO_MM;
863 else
864 ctx->ctx->io_mode = ATOM_IO_IIO | port;
865 (*ptr) += 2;
866 break;
867 case ATOM_PORT_PCI:
868 ctx->ctx->io_mode = ATOM_IO_PCI;
869 (*ptr)++;
870 break;
871 case ATOM_PORT_SYSIO:
872 ctx->ctx->io_mode = ATOM_IO_SYSIO;
873 (*ptr)++;
874 break;
875 }
876}
877
878static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
879{
880 ctx->ctx->reg_block = U16(*ptr);
881 (*ptr) += 2;
882 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
883}
884
885static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
886{
887 uint8_t attr = U8((*ptr)++), shift;
888 uint32_t saved, dst;
889 int dptr = *ptr;
890 attr &= 0x38;
891 attr |= atom_def_dst[attr >> 3] << 6;
892 SDEBUG(" dst: ");
893 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
894 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
895 SDEBUG(" shift: %d\n", shift);
896 dst <<= shift;
897 SDEBUG(" dst: ");
898 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
899}
900
901static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
902{
903 uint8_t attr = U8((*ptr)++), shift;
904 uint32_t saved, dst;
905 int dptr = *ptr;
906 attr &= 0x38;
907 attr |= atom_def_dst[attr >> 3] << 6;
908 SDEBUG(" dst: ");
909 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
910 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
911 SDEBUG(" shift: %d\n", shift);
912 dst >>= shift;
913 SDEBUG(" dst: ");
914 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
915}
916
917static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
918{
919 uint8_t attr = U8((*ptr)++), shift;
920 uint32_t saved, dst;
921 int dptr = *ptr;
922 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
923 SDEBUG(" dst: ");
924 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
925 /* op needs to full dst value */
926 dst = saved;
927 shift = atom_get_src(ctx, attr, ptr);
928 SDEBUG(" shift: %d\n", shift);
929 dst <<= shift;
930 dst &= atom_arg_mask[dst_align];
931 dst >>= atom_arg_shift[dst_align];
932 SDEBUG(" dst: ");
933 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
934}
935
936static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
937{
938 uint8_t attr = U8((*ptr)++), shift;
939 uint32_t saved, dst;
940 int dptr = *ptr;
941 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
942 SDEBUG(" dst: ");
943 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
944 /* op needs to full dst value */
945 dst = saved;
946 shift = atom_get_src(ctx, attr, ptr);
947 SDEBUG(" shift: %d\n", shift);
948 dst >>= shift;
949 dst &= atom_arg_mask[dst_align];
950 dst >>= atom_arg_shift[dst_align];
951 SDEBUG(" dst: ");
952 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
953}
954
955static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
956{
957 uint8_t attr = U8((*ptr)++);
958 uint32_t dst, src, saved;
959 int dptr = *ptr;
960 SDEBUG(" dst: ");
961 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
962 SDEBUG(" src: ");
963 src = atom_get_src(ctx, attr, ptr);
964 dst -= src;
965 SDEBUG(" dst: ");
966 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
967}
968
969static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
970{
971 uint8_t attr = U8((*ptr)++);
972 uint32_t src, val, target;
973 SDEBUG(" switch: ");
974 src = atom_get_src(ctx, attr, ptr);
975 while (U16(*ptr) != ATOM_CASE_END)
976 if (U8(*ptr) == ATOM_CASE_MAGIC) {
977 (*ptr)++;
978 SDEBUG(" case: ");
979 val =
980 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
981 ptr);
982 target = U16(*ptr);
983 if (val == src) {
984 SDEBUG(" target: %04X\n", target);
985 *ptr = ctx->start + target;
986 return;
987 }
988 (*ptr) += 2;
989 } else {
990 pr_info("Bad case\n");
991 return;
992 }
993 (*ptr) += 2;
994}
995
996static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
997{
998 uint8_t attr = U8((*ptr)++);
999 uint32_t dst, src;
1000 SDEBUG(" src1: ");
1001 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1002 SDEBUG(" src2: ");
1003 src = atom_get_src(ctx, attr, ptr);
1004 ctx->ctx->cs_equal = ((dst & src) == 0);
1005 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1006}
1007
1008static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1009{
1010 uint8_t attr = U8((*ptr)++);
1011 uint32_t dst, src, saved;
1012 int dptr = *ptr;
1013 SDEBUG(" dst: ");
1014 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1015 SDEBUG(" src: ");
1016 src = atom_get_src(ctx, attr, ptr);
1017 dst ^= src;
1018 SDEBUG(" dst: ");
1019 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1020}
1021
1022static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1023{
1024 pr_info("unimplemented!\n");
1025}
1026
1027static struct {
1028 void (*func) (atom_exec_context *, int *, int);
1029 int arg;
1030} opcode_table[ATOM_OP_CNT] = {
1031 {
1032 NULL, 0}, {
1033 atom_op_move, ATOM_ARG_REG}, {
1034 atom_op_move, ATOM_ARG_PS}, {
1035 atom_op_move, ATOM_ARG_WS}, {
1036 atom_op_move, ATOM_ARG_FB}, {
1037 atom_op_move, ATOM_ARG_PLL}, {
1038 atom_op_move, ATOM_ARG_MC}, {
1039 atom_op_and, ATOM_ARG_REG}, {
1040 atom_op_and, ATOM_ARG_PS}, {
1041 atom_op_and, ATOM_ARG_WS}, {
1042 atom_op_and, ATOM_ARG_FB}, {
1043 atom_op_and, ATOM_ARG_PLL}, {
1044 atom_op_and, ATOM_ARG_MC}, {
1045 atom_op_or, ATOM_ARG_REG}, {
1046 atom_op_or, ATOM_ARG_PS}, {
1047 atom_op_or, ATOM_ARG_WS}, {
1048 atom_op_or, ATOM_ARG_FB}, {
1049 atom_op_or, ATOM_ARG_PLL}, {
1050 atom_op_or, ATOM_ARG_MC}, {
1051 atom_op_shift_left, ATOM_ARG_REG}, {
1052 atom_op_shift_left, ATOM_ARG_PS}, {
1053 atom_op_shift_left, ATOM_ARG_WS}, {
1054 atom_op_shift_left, ATOM_ARG_FB}, {
1055 atom_op_shift_left, ATOM_ARG_PLL}, {
1056 atom_op_shift_left, ATOM_ARG_MC}, {
1057 atom_op_shift_right, ATOM_ARG_REG}, {
1058 atom_op_shift_right, ATOM_ARG_PS}, {
1059 atom_op_shift_right, ATOM_ARG_WS}, {
1060 atom_op_shift_right, ATOM_ARG_FB}, {
1061 atom_op_shift_right, ATOM_ARG_PLL}, {
1062 atom_op_shift_right, ATOM_ARG_MC}, {
1063 atom_op_mul, ATOM_ARG_REG}, {
1064 atom_op_mul, ATOM_ARG_PS}, {
1065 atom_op_mul, ATOM_ARG_WS}, {
1066 atom_op_mul, ATOM_ARG_FB}, {
1067 atom_op_mul, ATOM_ARG_PLL}, {
1068 atom_op_mul, ATOM_ARG_MC}, {
1069 atom_op_div, ATOM_ARG_REG}, {
1070 atom_op_div, ATOM_ARG_PS}, {
1071 atom_op_div, ATOM_ARG_WS}, {
1072 atom_op_div, ATOM_ARG_FB}, {
1073 atom_op_div, ATOM_ARG_PLL}, {
1074 atom_op_div, ATOM_ARG_MC}, {
1075 atom_op_add, ATOM_ARG_REG}, {
1076 atom_op_add, ATOM_ARG_PS}, {
1077 atom_op_add, ATOM_ARG_WS}, {
1078 atom_op_add, ATOM_ARG_FB}, {
1079 atom_op_add, ATOM_ARG_PLL}, {
1080 atom_op_add, ATOM_ARG_MC}, {
1081 atom_op_sub, ATOM_ARG_REG}, {
1082 atom_op_sub, ATOM_ARG_PS}, {
1083 atom_op_sub, ATOM_ARG_WS}, {
1084 atom_op_sub, ATOM_ARG_FB}, {
1085 atom_op_sub, ATOM_ARG_PLL}, {
1086 atom_op_sub, ATOM_ARG_MC}, {
1087 atom_op_setport, ATOM_PORT_ATI}, {
1088 atom_op_setport, ATOM_PORT_PCI}, {
1089 atom_op_setport, ATOM_PORT_SYSIO}, {
1090 atom_op_setregblock, 0}, {
1091 atom_op_setfbbase, 0}, {
1092 atom_op_compare, ATOM_ARG_REG}, {
1093 atom_op_compare, ATOM_ARG_PS}, {
1094 atom_op_compare, ATOM_ARG_WS}, {
1095 atom_op_compare, ATOM_ARG_FB}, {
1096 atom_op_compare, ATOM_ARG_PLL}, {
1097 atom_op_compare, ATOM_ARG_MC}, {
1098 atom_op_switch, 0}, {
1099 atom_op_jump, ATOM_COND_ALWAYS}, {
1100 atom_op_jump, ATOM_COND_EQUAL}, {
1101 atom_op_jump, ATOM_COND_BELOW}, {
1102 atom_op_jump, ATOM_COND_ABOVE}, {
1103 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1104 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1105 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1106 atom_op_test, ATOM_ARG_REG}, {
1107 atom_op_test, ATOM_ARG_PS}, {
1108 atom_op_test, ATOM_ARG_WS}, {
1109 atom_op_test, ATOM_ARG_FB}, {
1110 atom_op_test, ATOM_ARG_PLL}, {
1111 atom_op_test, ATOM_ARG_MC}, {
1112 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1113 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1114 atom_op_calltable, 0}, {
1115 atom_op_repeat, 0}, {
1116 atom_op_clear, ATOM_ARG_REG}, {
1117 atom_op_clear, ATOM_ARG_PS}, {
1118 atom_op_clear, ATOM_ARG_WS}, {
1119 atom_op_clear, ATOM_ARG_FB}, {
1120 atom_op_clear, ATOM_ARG_PLL}, {
1121 atom_op_clear, ATOM_ARG_MC}, {
1122 atom_op_nop, 0}, {
1123 atom_op_eot, 0}, {
1124 atom_op_mask, ATOM_ARG_REG}, {
1125 atom_op_mask, ATOM_ARG_PS}, {
1126 atom_op_mask, ATOM_ARG_WS}, {
1127 atom_op_mask, ATOM_ARG_FB}, {
1128 atom_op_mask, ATOM_ARG_PLL}, {
1129 atom_op_mask, ATOM_ARG_MC}, {
1130 atom_op_postcard, 0}, {
1131 atom_op_beep, 0}, {
1132 atom_op_savereg, 0}, {
1133 atom_op_restorereg, 0}, {
1134 atom_op_setdatablock, 0}, {
1135 atom_op_xor, ATOM_ARG_REG}, {
1136 atom_op_xor, ATOM_ARG_PS}, {
1137 atom_op_xor, ATOM_ARG_WS}, {
1138 atom_op_xor, ATOM_ARG_FB}, {
1139 atom_op_xor, ATOM_ARG_PLL}, {
1140 atom_op_xor, ATOM_ARG_MC}, {
1141 atom_op_shl, ATOM_ARG_REG}, {
1142 atom_op_shl, ATOM_ARG_PS}, {
1143 atom_op_shl, ATOM_ARG_WS}, {
1144 atom_op_shl, ATOM_ARG_FB}, {
1145 atom_op_shl, ATOM_ARG_PLL}, {
1146 atom_op_shl, ATOM_ARG_MC}, {
1147 atom_op_shr, ATOM_ARG_REG}, {
1148 atom_op_shr, ATOM_ARG_PS}, {
1149 atom_op_shr, ATOM_ARG_WS}, {
1150 atom_op_shr, ATOM_ARG_FB}, {
1151 atom_op_shr, ATOM_ARG_PLL}, {
1152 atom_op_shr, ATOM_ARG_MC}, {
1153atom_op_debug, 0},};
1154
1155static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t *params)
1156{
1157 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1158 int len, ws, ps, ptr;
1159 unsigned char op;
1160 atom_exec_context ectx;
1161 int ret = 0;
1162
1163 if (!base)
1164 return -EINVAL;
1165
1166 len = CU16(base + ATOM_CT_SIZE_PTR);
1167 ws = CU8(base + ATOM_CT_WS_PTR);
1168 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1169 ptr = base + ATOM_CT_CODE_PTR;
1170
1171 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1172
1173 ectx.ctx = ctx;
1174 ectx.ps_shift = ps / 4;
1175 ectx.start = base;
1176 ectx.ps = params;
1177 ectx.abort = false;
1178 ectx.last_jump = 0;
1179 if (ws)
1180 ectx.ws = kcalloc(4, ws, GFP_KERNEL);
1181 else
1182 ectx.ws = NULL;
1183
1184 debug_depth++;
1185 while (1) {
1186 op = CU8(ptr++);
1187 if (op < ATOM_OP_NAMES_CNT)
1188 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1189 else
1190 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1191 if (ectx.abort) {
1192 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1193 base, len, ws, ps, ptr - 1);
1194 ret = -EINVAL;
1195 goto free;
1196 }
1197
1198 if (op < ATOM_OP_CNT && op > 0)
1199 opcode_table[op].func(&ectx, &ptr,
1200 opcode_table[op].arg);
1201 else
1202 break;
1203
1204 if (op == ATOM_OP_EOT)
1205 break;
1206 }
1207 debug_depth--;
1208 SDEBUG("<<\n");
1209
1210free:
1211 kfree(ectx.ws);
1212 return ret;
1213}
1214
1215int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t *params)
1216{
1217 int r;
1218
1219 mutex_lock(&ctx->mutex);
1220 /* reset data block */
1221 ctx->data_block = 0;
1222 /* reset reg block */
1223 ctx->reg_block = 0;
1224 /* reset fb window */
1225 ctx->fb_base = 0;
1226 /* reset io mode */
1227 ctx->io_mode = ATOM_IO_MM;
1228 /* reset divmul */
1229 ctx->divmul[0] = 0;
1230 ctx->divmul[1] = 0;
1231 r = atom_execute_table_locked(ctx, index, params);
1232 mutex_unlock(&ctx->mutex);
1233 return r;
1234}
1235
1236int atom_execute_table(struct atom_context *ctx, int index, uint32_t *params)
1237{
1238 int r;
1239 mutex_lock(&ctx->scratch_mutex);
1240 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1241 mutex_unlock(&ctx->scratch_mutex);
1242 return r;
1243}
1244
1245static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1246
1247static void atom_index_iio(struct atom_context *ctx, int base)
1248{
1249 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1250 if (!ctx->iio)
1251 return;
1252 while (CU8(base) == ATOM_IIO_START) {
1253 ctx->iio[CU8(base + 1)] = base + 2;
1254 base += 2;
1255 while (CU8(base) != ATOM_IIO_END)
1256 base += atom_iio_len[CU8(base)];
1257 base += 3;
1258 }
1259}
1260
1261struct atom_context *atom_parse(struct card_info *card, void *bios)
1262{
1263 int base;
1264 struct atom_context *ctx =
1265 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1266 char *str;
1267 char name[512];
1268 int i;
1269
1270 if (!ctx)
1271 return NULL;
1272
1273 ctx->card = card;
1274 ctx->bios = bios;
1275
1276 if (CU16(0) != ATOM_BIOS_MAGIC) {
1277 pr_info("Invalid BIOS magic\n");
1278 kfree(ctx);
1279 return NULL;
1280 }
1281 if (strncmp
1282 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1283 strlen(ATOM_ATI_MAGIC))) {
1284 pr_info("Invalid ATI magic\n");
1285 kfree(ctx);
1286 return NULL;
1287 }
1288
1289 base = CU16(ATOM_ROM_TABLE_PTR);
1290 if (strncmp
1291 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1292 strlen(ATOM_ROM_MAGIC))) {
1293 pr_info("Invalid ATOM magic\n");
1294 kfree(ctx);
1295 return NULL;
1296 }
1297
1298 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1299 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1300 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1301 if (!ctx->iio) {
1302 atom_destroy(ctx);
1303 return NULL;
1304 }
1305
1306 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1307 while (*str && ((*str == '\n') || (*str == '\r')))
1308 str++;
1309 /* name string isn't always 0 terminated */
1310 for (i = 0; i < 511; i++) {
1311 name[i] = str[i];
1312 if (name[i] < '.' || name[i] > 'z') {
1313 name[i] = 0;
1314 break;
1315 }
1316 }
1317 pr_info("ATOM BIOS: %s\n", name);
1318
1319 return ctx;
1320}
1321
1322int atom_asic_init(struct atom_context *ctx)
1323{
1324 struct radeon_device *rdev = ctx->card->dev->dev_private;
1325 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1326 uint32_t ps[16];
1327 int ret;
1328
1329 memset(ps, 0, 64);
1330
1331 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1332 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1333 if (!ps[0] || !ps[1])
1334 return 1;
1335
1336 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1337 return 1;
1338 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1339 if (ret)
1340 return ret;
1341
1342 memset(ps, 0, 64);
1343
1344 if (rdev->family < CHIP_R600) {
1345 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1346 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1347 }
1348 return ret;
1349}
1350
1351void atom_destroy(struct atom_context *ctx)
1352{
1353 kfree(ctx->iio);
1354 kfree(ctx);
1355}
1356
1357bool atom_parse_data_header(struct atom_context *ctx, int index,
1358 uint16_t *size, uint8_t *frev, uint8_t *crev,
1359 uint16_t *data_start)
1360{
1361 int offset = index * 2 + 4;
1362 int idx = CU16(ctx->data_table + offset);
1363 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1364
1365 if (!mdt[index])
1366 return false;
1367
1368 if (size)
1369 *size = CU16(idx);
1370 if (frev)
1371 *frev = CU8(idx + 2);
1372 if (crev)
1373 *crev = CU8(idx + 3);
1374 *data_start = idx;
1375 return true;
1376}
1377
1378bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t *frev,
1379 uint8_t *crev)
1380{
1381 int offset = index * 2 + 4;
1382 int idx = CU16(ctx->cmd_table + offset);
1383 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1384
1385 if (!mct[index])
1386 return false;
1387
1388 if (frev)
1389 *frev = CU8(idx + 2);
1390 if (crev)
1391 *crev = CU8(idx + 3);
1392 return true;
1393}
1394
1395int atom_allocate_fb_scratch(struct atom_context *ctx)
1396{
1397 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1398 uint16_t data_offset;
1399 int usage_bytes = 0;
1400 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1401
1402 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1403 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1404
1405 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1406 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1407 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1408
1409 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1410 }
1411 ctx->scratch_size_bytes = 0;
1412 if (usage_bytes == 0)
1413 usage_bytes = 20 * 1024;
1414 /* allocate some scratch memory */
1415 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1416 if (!ctx->scratch)
1417 return -ENOMEM;
1418 ctx->scratch_size_bytes = usage_bytes;
1419 return 0;
1420}