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1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
31#include <net/udp.h>
32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
39#include <linux/iommu.h>
40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
52#include <linux/if_bridge.h>
53#include <linux/clocksource.h>
54#include <linux/net_tstamp.h>
55#include <linux/ptp_clock_kernel.h>
56#include "i40e_type.h"
57#include "i40e_prototype.h"
58#ifdef I40E_FCOE
59#include "i40e_fcoe.h"
60#endif
61#include "i40e_client.h"
62#include "i40e_virtchnl.h"
63#include "i40e_virtchnl_pf.h"
64#include "i40e_txrx.h"
65#include "i40e_dcb.h"
66
67/* Useful i40e defaults */
68#define I40E_MAX_VEB 16
69
70#define I40E_MAX_NUM_DESCRIPTORS 4096
71#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
72#define I40E_DEFAULT_NUM_DESCRIPTORS 512
73#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
74#define I40E_MIN_NUM_DESCRIPTORS 64
75#define I40E_MIN_MSIX 2
76#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
77#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
78/* max 16 qps */
79#define i40e_default_queues_per_vmdq(pf) \
80 (((pf)->flags & I40E_FLAG_RSS_AQ_CAPABLE) ? 4 : 1)
81#define I40E_DEFAULT_QUEUES_PER_VF 4
82#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
83#define i40e_pf_get_max_q_per_tc(pf) \
84 (((pf)->flags & I40E_FLAG_128_QP_RSS_CAPABLE) ? 128 : 64)
85#define I40E_FDIR_RING 0
86#define I40E_FDIR_RING_COUNT 32
87#ifdef I40E_FCOE
88#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
89#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
90#endif /* I40E_FCOE */
91#define I40E_MAX_AQ_BUF_SIZE 4096
92#define I40E_AQ_LEN 256
93#define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */
94#define I40E_MAX_USER_PRIORITY 8
95#define I40E_DEFAULT_MSG_ENABLE 4
96#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
97#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
98
99/* Ethtool Private Flags */
100#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
101#define I40E_PRIV_FLAGS_LINKPOLL_FLAG BIT(1)
102#define I40E_PRIV_FLAGS_FD_ATR BIT(2)
103#define I40E_PRIV_FLAGS_VEB_STATS BIT(3)
104#define I40E_PRIV_FLAGS_PS BIT(4)
105#define I40E_PRIV_FLAGS_HW_ATR_EVICT BIT(5)
106
107#define I40E_NVM_VERSION_LO_SHIFT 0
108#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
109#define I40E_NVM_VERSION_HI_SHIFT 12
110#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
111#define I40E_OEM_VER_BUILD_MASK 0xffff
112#define I40E_OEM_VER_PATCH_MASK 0xff
113#define I40E_OEM_VER_BUILD_SHIFT 8
114#define I40E_OEM_VER_SHIFT 24
115#define I40E_PHY_DEBUG_PORT BIT(4)
116
117/* The values in here are decimal coded as hex as is the case in the NVM map*/
118#define I40E_CURRENT_NVM_VERSION_HI 0x2
119#define I40E_CURRENT_NVM_VERSION_LO 0x40
120
121/* magic for getting defines into strings */
122#define STRINGIFY(foo) #foo
123#define XSTRINGIFY(bar) STRINGIFY(bar)
124
125#define I40E_RX_DESC(R, i) \
126 ((ring_is_16byte_desc_enabled(R)) \
127 ? (union i40e_32byte_rx_desc *) \
128 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
129 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
130#define I40E_TX_DESC(R, i) \
131 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
132#define I40E_TX_CTXTDESC(R, i) \
133 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
134#define I40E_TX_FDIRDESC(R, i) \
135 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
136
137/* default to trying for four seconds */
138#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
139
140/**
141 * i40e_is_mac_710 - Return true if MAC is X710/XL710
142 * @hw: ptr to the hardware info
143 **/
144static inline bool i40e_is_mac_710(struct i40e_hw *hw)
145{
146 if ((hw->mac.type == I40E_MAC_X710) ||
147 (hw->mac.type == I40E_MAC_XL710))
148 return true;
149
150 return false;
151}
152
153/* driver state flags */
154enum i40e_state_t {
155 __I40E_TESTING,
156 __I40E_CONFIG_BUSY,
157 __I40E_CONFIG_DONE,
158 __I40E_DOWN,
159 __I40E_NEEDS_RESTART,
160 __I40E_SERVICE_SCHED,
161 __I40E_ADMINQ_EVENT_PENDING,
162 __I40E_MDD_EVENT_PENDING,
163 __I40E_VFLR_EVENT_PENDING,
164 __I40E_RESET_RECOVERY_PENDING,
165 __I40E_RESET_INTR_RECEIVED,
166 __I40E_REINIT_REQUESTED,
167 __I40E_PF_RESET_REQUESTED,
168 __I40E_CORE_RESET_REQUESTED,
169 __I40E_GLOBAL_RESET_REQUESTED,
170 __I40E_EMP_RESET_REQUESTED,
171 __I40E_EMP_RESET_INTR_RECEIVED,
172 __I40E_FILTER_OVERFLOW_PROMISC,
173 __I40E_SUSPENDED,
174 __I40E_PTP_TX_IN_PROGRESS,
175 __I40E_BAD_EEPROM,
176 __I40E_DOWN_REQUESTED,
177 __I40E_FD_FLUSH_REQUESTED,
178 __I40E_RESET_FAILED,
179 __I40E_PORT_TX_SUSPENDED,
180 __I40E_VF_DISABLE,
181};
182
183enum i40e_interrupt_policy {
184 I40E_INTERRUPT_BEST_CASE,
185 I40E_INTERRUPT_MEDIUM,
186 I40E_INTERRUPT_LOWEST
187};
188
189struct i40e_lump_tracking {
190 u16 num_entries;
191 u16 search_hint;
192 u16 list[0];
193#define I40E_PILE_VALID_BIT 0x8000
194#define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2)
195};
196
197#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
198#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
199#define I40E_FDIR_BUFFER_FULL_MARGIN 10
200#define I40E_FDIR_BUFFER_HEAD_ROOM 32
201#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
202
203#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
204#define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4)
205
206enum i40e_fd_stat_idx {
207 I40E_FD_STAT_ATR,
208 I40E_FD_STAT_SB,
209 I40E_FD_STAT_ATR_TUNNEL,
210 I40E_FD_STAT_PF_COUNT
211};
212#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
213#define I40E_FD_ATR_STAT_IDX(pf_id) \
214 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
215#define I40E_FD_SB_STAT_IDX(pf_id) \
216 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
217#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
218 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
219
220struct i40e_fdir_filter {
221 struct hlist_node fdir_node;
222 /* filter ipnut set */
223 u8 flow_type;
224 u8 ip4_proto;
225 /* TX packet view of src and dst */
226 __be32 dst_ip[4];
227 __be32 src_ip[4];
228 __be16 src_port;
229 __be16 dst_port;
230 __be32 sctp_v_tag;
231 /* filter control */
232 u16 q_index;
233 u8 flex_off;
234 u8 pctype;
235 u16 dest_vsi;
236 u8 dest_ctl;
237 u8 fd_status;
238 u16 cnt_index;
239 u32 fd_id;
240};
241
242#define I40E_ETH_P_LLDP 0x88cc
243
244#define I40E_DCB_PRIO_TYPE_STRICT 0
245#define I40E_DCB_PRIO_TYPE_ETS 1
246#define I40E_DCB_STRICT_PRIO_CREDITS 127
247#define I40E_MAX_USER_PRIORITY 8
248/* DCB per TC information data structure */
249struct i40e_tc_info {
250 u16 qoffset; /* Queue offset from base queue */
251 u16 qcount; /* Total Queues */
252 u8 netdev_tc; /* Netdev TC index if netdev associated */
253};
254
255/* TC configuration data structure */
256struct i40e_tc_configuration {
257 u8 numtc; /* Total number of enabled TCs */
258 u8 enabled_tc; /* TC map */
259 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
260};
261
262struct i40e_udp_port_config {
263 __be16 index;
264 u8 type;
265};
266
267/* struct that defines the Ethernet device */
268struct i40e_pf {
269 struct pci_dev *pdev;
270 struct i40e_hw hw;
271 unsigned long state;
272 struct msix_entry *msix_entries;
273 bool fc_autoneg_status;
274
275 u16 eeprom_version;
276 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
277 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
278 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
279 u16 num_req_vfs; /* num VFs requested for this VF */
280 u16 num_vf_qps; /* num queue pairs per VF */
281#ifdef I40E_FCOE
282 u16 num_fcoe_qps; /* num fcoe queues this PF has set up */
283 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
284#endif /* I40E_FCOE */
285 u16 num_lan_qps; /* num lan queues this PF has set up */
286 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
287 u16 num_iwarp_msix; /* num of iwarp vectors for this PF */
288 int iwarp_base_vector;
289 int queues_left; /* queues left unclaimed */
290 u16 alloc_rss_size; /* allocated RSS queues */
291 u16 rss_size_max; /* HW defined max RSS queues */
292 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
293 u16 num_alloc_vsi; /* num VSIs this driver supports */
294 u8 atr_sample_rate;
295 bool wol_en;
296
297 struct hlist_head fdir_filter_list;
298 u16 fdir_pf_active_filters;
299 unsigned long fd_flush_timestamp;
300 u32 fd_flush_cnt;
301 u32 fd_add_err;
302 u32 fd_atr_cnt;
303 u32 fd_tcp_rule;
304
305 struct i40e_udp_port_config udp_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
306 u16 pending_udp_bitmap;
307
308 enum i40e_interrupt_policy int_policy;
309 u16 rx_itr_default;
310 u16 tx_itr_default;
311 u32 msg_enable;
312 char int_name[I40E_INT_NAME_STR_LEN];
313 u16 adminq_work_limit; /* num of admin receive queue desc to process */
314 unsigned long service_timer_period;
315 unsigned long service_timer_previous;
316 struct timer_list service_timer;
317 struct work_struct service_task;
318
319 u64 flags;
320#define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1)
321#define I40E_FLAG_MSI_ENABLED BIT_ULL(2)
322#define I40E_FLAG_MSIX_ENABLED BIT_ULL(3)
323#define I40E_FLAG_RX_1BUF_ENABLED BIT_ULL(4)
324#define I40E_FLAG_RX_PS_ENABLED BIT_ULL(5)
325#define I40E_FLAG_RSS_ENABLED BIT_ULL(6)
326#define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7)
327#define I40E_FLAG_FDIR_REQUIRES_REINIT BIT_ULL(8)
328#define I40E_FLAG_NEED_LINK_UPDATE BIT_ULL(9)
329#define I40E_FLAG_IWARP_ENABLED BIT_ULL(10)
330#ifdef I40E_FCOE
331#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
332#endif /* I40E_FCOE */
333#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
334#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
335#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
336#define I40E_FLAG_SERVICE_CLIENT_REQUESTED BIT_ULL(16)
337#define I40E_FLAG_PROCESS_MDD_EVENT BIT_ULL(17)
338#define I40E_FLAG_PROCESS_VFLR_EVENT BIT_ULL(18)
339#define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19)
340#define I40E_FLAG_DCB_ENABLED BIT_ULL(20)
341#define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21)
342#define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22)
343#define I40E_FLAG_PTP BIT_ULL(25)
344#define I40E_FLAG_MFP_ENABLED BIT_ULL(26)
345#define I40E_FLAG_UDP_FILTER_SYNC BIT_ULL(27)
346#define I40E_FLAG_PORT_ID_VALID BIT_ULL(28)
347#define I40E_FLAG_DCB_CAPABLE BIT_ULL(29)
348#define I40E_FLAG_RSS_AQ_CAPABLE BIT_ULL(31)
349#define I40E_FLAG_HW_ATR_EVICT_CAPABLE BIT_ULL(32)
350#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE BIT_ULL(33)
351#define I40E_FLAG_128_QP_RSS_CAPABLE BIT_ULL(34)
352#define I40E_FLAG_WB_ON_ITR_CAPABLE BIT_ULL(35)
353#define I40E_FLAG_VEB_STATS_ENABLED BIT_ULL(37)
354#define I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT_ULL(38)
355#define I40E_FLAG_LINK_POLLING_ENABLED BIT_ULL(39)
356#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
357#define I40E_FLAG_GENEVE_OFFLOAD_CAPABLE BIT_ULL(41)
358#define I40E_FLAG_NO_PCI_LINK_CHECK BIT_ULL(42)
359#define I40E_FLAG_100M_SGMII_CAPABLE BIT_ULL(43)
360#define I40E_FLAG_RESTART_AUTONEG BIT_ULL(44)
361#define I40E_FLAG_NO_DCB_SUPPORT BIT_ULL(45)
362#define I40E_FLAG_USE_SET_LLDP_MIB BIT_ULL(46)
363#define I40E_FLAG_STOP_FW_LLDP BIT_ULL(47)
364#define I40E_FLAG_HAVE_10GBASET_PHY BIT_ULL(48)
365#define I40E_FLAG_PF_MAC BIT_ULL(50)
366
367 /* tracks features that get auto disabled by errors */
368 u64 auto_disable_flags;
369
370#ifdef I40E_FCOE
371 struct i40e_fcoe fcoe;
372
373#endif /* I40E_FCOE */
374 bool stat_offsets_loaded;
375 struct i40e_hw_port_stats stats;
376 struct i40e_hw_port_stats stats_offsets;
377 u32 tx_timeout_count;
378 u32 tx_timeout_recovery_level;
379 unsigned long tx_timeout_last_recovery;
380 u32 tx_sluggish_count;
381 u32 hw_csum_rx_error;
382 u32 led_status;
383 u16 corer_count; /* Core reset count */
384 u16 globr_count; /* Global reset count */
385 u16 empr_count; /* EMP reset count */
386 u16 pfr_count; /* PF reset count */
387 u16 sw_int_count; /* SW interrupt count */
388
389 struct mutex switch_mutex;
390 u16 lan_vsi; /* our default LAN VSI */
391 u16 lan_veb; /* initial relay, if exists */
392#define I40E_NO_VEB 0xffff
393#define I40E_NO_VSI 0xffff
394 u16 next_vsi; /* Next unallocated VSI - 0-based! */
395 struct i40e_vsi **vsi;
396 struct i40e_veb *veb[I40E_MAX_VEB];
397
398 struct i40e_lump_tracking *qp_pile;
399 struct i40e_lump_tracking *irq_pile;
400
401 /* switch config info */
402 u16 pf_seid;
403 u16 main_vsi_seid;
404 u16 mac_seid;
405 struct kobject *switch_kobj;
406#ifdef CONFIG_DEBUG_FS
407 struct dentry *i40e_dbg_pf;
408#endif /* CONFIG_DEBUG_FS */
409 bool cur_promisc;
410
411 u16 instance; /* A unique number per i40e_pf instance in the system */
412
413 /* sr-iov config info */
414 struct i40e_vf *vf;
415 int num_alloc_vfs; /* actual number of VFs allocated */
416 u32 vf_aq_requests;
417 u32 arq_overflows; /* Not fatal, possibly indicative of problems */
418
419 /* DCBx/DCBNL capability for PF that indicates
420 * whether DCBx is managed by firmware or host
421 * based agent (LLDPAD). Also, indicates what
422 * flavor of DCBx protocol (IEEE/CEE) is supported
423 * by the device. For now we're supporting IEEE
424 * mode only.
425 */
426 u16 dcbx_cap;
427
428 u32 fcoe_hmc_filt_num;
429 u32 fcoe_hmc_cntx_num;
430 struct i40e_filter_control_settings filter_settings;
431
432 struct ptp_clock *ptp_clock;
433 struct ptp_clock_info ptp_caps;
434 struct sk_buff *ptp_tx_skb;
435 struct hwtstamp_config tstamp_config;
436 unsigned long last_rx_ptp_check;
437 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
438 u64 ptp_base_adj;
439 u32 tx_hwtstamp_timeouts;
440 u32 rx_hwtstamp_cleared;
441 bool ptp_tx;
442 bool ptp_rx;
443 u16 rss_table_size; /* HW RSS table size */
444 /* These are only valid in NPAR modes */
445 u32 npar_max_bw;
446 u32 npar_min_bw;
447
448 u32 ioremap_len;
449 u32 fd_inv;
450 u16 phy_led_val;
451};
452
453struct i40e_mac_filter {
454 struct list_head list;
455 u8 macaddr[ETH_ALEN];
456#define I40E_VLAN_ANY -1
457 s16 vlan;
458 u8 counter; /* number of instances of this filter */
459 bool is_vf; /* filter belongs to a VF */
460 bool is_netdev; /* filter belongs to a netdev */
461 bool changed; /* filter needs to be sync'd to the HW */
462 bool is_laa; /* filter is a Locally Administered Address */
463};
464
465struct i40e_veb {
466 struct i40e_pf *pf;
467 u16 idx;
468 u16 veb_idx; /* index of VEB parent */
469 u16 seid;
470 u16 uplink_seid;
471 u16 stats_idx; /* index of VEB parent */
472 u8 enabled_tc;
473 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
474 u16 flags;
475 u16 bw_limit;
476 u8 bw_max_quanta;
477 bool is_abs_credits;
478 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
479 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
480 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
481 struct kobject *kobj;
482 bool stat_offsets_loaded;
483 struct i40e_eth_stats stats;
484 struct i40e_eth_stats stats_offsets;
485 struct i40e_veb_tc_stats tc_stats;
486 struct i40e_veb_tc_stats tc_stats_offsets;
487};
488
489/* struct that defines a VSI, associated with a dev */
490struct i40e_vsi {
491 struct net_device *netdev;
492 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
493 bool netdev_registered;
494 bool stat_offsets_loaded;
495
496 u32 current_netdev_flags;
497 unsigned long state;
498#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
499#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
500 unsigned long flags;
501
502 /* Per VSI lock to protect elements/list (MAC filter) */
503 spinlock_t mac_filter_list_lock;
504 struct list_head mac_filter_list;
505
506 /* VSI stats */
507 struct rtnl_link_stats64 net_stats;
508 struct rtnl_link_stats64 net_stats_offsets;
509 struct i40e_eth_stats eth_stats;
510 struct i40e_eth_stats eth_stats_offsets;
511#ifdef I40E_FCOE
512 struct i40e_fcoe_stats fcoe_stats;
513 struct i40e_fcoe_stats fcoe_stats_offsets;
514 bool fcoe_stat_offsets_loaded;
515#endif
516 u32 tx_restart;
517 u32 tx_busy;
518 u64 tx_linearize;
519 u64 tx_force_wb;
520 u64 tx_lost_interrupt;
521 u32 rx_buf_failed;
522 u32 rx_page_failed;
523
524 /* These are containers of ring pointers, allocated at run-time */
525 struct i40e_ring **rx_rings;
526 struct i40e_ring **tx_rings;
527
528 u16 work_limit;
529 u16 int_rate_limit; /* value in usecs */
530
531 u16 rss_table_size; /* HW RSS table size */
532 u16 rss_size; /* Allocated RSS queues */
533 u8 *rss_hkey_user; /* User configured hash keys */
534 u8 *rss_lut_user; /* User configured lookup table entries */
535
536 u16 max_frame;
537 u16 rx_hdr_len;
538 u16 rx_buf_len;
539 u8 dtype;
540
541 /* List of q_vectors allocated to this VSI */
542 struct i40e_q_vector **q_vectors;
543 int num_q_vectors;
544 int base_vector;
545 bool irqs_ready;
546
547 u16 seid; /* HW index of this VSI (absolute index) */
548 u16 id; /* VSI number */
549 u16 uplink_seid;
550
551 u16 base_queue; /* vsi's first queue in hw array */
552 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
553 u16 req_queue_pairs; /* User requested queue pairs */
554 u16 num_queue_pairs; /* Used tx and rx pairs */
555 u16 num_desc;
556 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
557 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
558
559 struct i40e_tc_configuration tc_config;
560 struct i40e_aqc_vsi_properties_data info;
561
562 /* VSI BW limit (absolute across all TCs) */
563 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
564 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
565
566 /* Relative TC credits across VSIs */
567 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
568 /* TC BW limit credits within VSI */
569 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
570 /* TC BW limit max quanta within VSI */
571 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
572
573 struct i40e_pf *back; /* Backreference to associated PF */
574 u16 idx; /* index in pf->vsi[] */
575 u16 veb_idx; /* index of VEB parent */
576 struct kobject *kobj; /* sysfs object */
577 bool current_isup; /* Sync 'link up' logging */
578
579 void *priv; /* client driver data reference. */
580
581 /* VSI specific handlers */
582 irqreturn_t (*irq_handler)(int irq, void *data);
583
584 /* current rxnfc data */
585 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
586} ____cacheline_internodealigned_in_smp;
587
588struct i40e_netdev_priv {
589 struct i40e_vsi *vsi;
590};
591
592/* struct that defines an interrupt vector */
593struct i40e_q_vector {
594 struct i40e_vsi *vsi;
595
596 u16 v_idx; /* index in the vsi->q_vector array. */
597 u16 reg_idx; /* register index of the interrupt */
598
599 struct napi_struct napi;
600
601 struct i40e_ring_container rx;
602 struct i40e_ring_container tx;
603
604 u8 num_ringpairs; /* total number of ring pairs in vector */
605
606#define I40E_Q_VECTOR_HUNG_DETECT 0 /* Bit Index for hung detection logic */
607 unsigned long hung_detected; /* Set/Reset for hung_detection logic */
608
609 cpumask_t affinity_mask;
610 struct rcu_head rcu; /* to avoid race with update stats on free */
611 char name[I40E_INT_NAME_STR_LEN];
612 bool arm_wb_state;
613#define ITR_COUNTDOWN_START 100
614 u8 itr_countdown; /* when 0 should adjust ITR */
615} ____cacheline_internodealigned_in_smp;
616
617/* lan device */
618struct i40e_device {
619 struct list_head list;
620 struct i40e_pf *pf;
621};
622
623/**
624 * i40e_nvm_version_str - format the NVM version strings
625 * @hw: ptr to the hardware info
626 **/
627static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
628{
629 static char buf[32];
630 u32 full_ver;
631 u8 ver, patch;
632 u16 build;
633
634 full_ver = hw->nvm.oem_ver;
635 ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
636 build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) &
637 I40E_OEM_VER_BUILD_MASK);
638 patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
639
640 snprintf(buf, sizeof(buf),
641 "%x.%02x 0x%x %d.%d.%d",
642 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
643 I40E_NVM_VERSION_HI_SHIFT,
644 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
645 I40E_NVM_VERSION_LO_SHIFT,
646 hw->nvm.eetrack, ver, build, patch);
647
648 return buf;
649}
650
651/**
652 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
653 * @netdev: the corresponding netdev
654 *
655 * Return the PF struct for the given netdev
656 **/
657static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
658{
659 struct i40e_netdev_priv *np = netdev_priv(netdev);
660 struct i40e_vsi *vsi = np->vsi;
661
662 return vsi->back;
663}
664
665static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
666 irqreturn_t (*irq_handler)(int, void *))
667{
668 vsi->irq_handler = irq_handler;
669}
670
671/**
672 * i40e_rx_is_programming_status - check for programming status descriptor
673 * @qw: the first quad word of the program status descriptor
674 *
675 * The value of in the descriptor length field indicate if this
676 * is a programming status descriptor for flow director or FCoE
677 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
678 * it is a packet descriptor.
679 **/
680static inline bool i40e_rx_is_programming_status(u64 qw)
681{
682 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
683 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
684}
685
686/**
687 * i40e_get_fd_cnt_all - get the total FD filter space available
688 * @pf: pointer to the PF struct
689 **/
690static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
691{
692 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
693}
694
695/* needed by i40e_ethtool.c */
696int i40e_up(struct i40e_vsi *vsi);
697void i40e_down(struct i40e_vsi *vsi);
698extern const char i40e_driver_name[];
699extern const char i40e_driver_version_str[];
700void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
701void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
702int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
703int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
704struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
705void i40e_update_stats(struct i40e_vsi *vsi);
706void i40e_update_eth_stats(struct i40e_vsi *vsi);
707struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
708int i40e_fetch_switch_configuration(struct i40e_pf *pf,
709 bool printconfig);
710
711int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
712 struct i40e_pf *pf, bool add);
713int i40e_add_del_fdir(struct i40e_vsi *vsi,
714 struct i40e_fdir_filter *input, bool add);
715void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
716u32 i40e_get_current_fd_count(struct i40e_pf *pf);
717u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
718u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
719u32 i40e_get_global_fd_count(struct i40e_pf *pf);
720bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
721void i40e_set_ethtool_ops(struct net_device *netdev);
722struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
723 u8 *macaddr, s16 vlan,
724 bool is_vf, bool is_netdev);
725void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
726 bool is_vf, bool is_netdev);
727int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
728struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
729 u16 uplink, u32 param1);
730int i40e_vsi_release(struct i40e_vsi *vsi);
731struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
732 struct i40e_vsi *start_vsi);
733#ifdef I40E_FCOE
734void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
735 struct i40e_vsi_context *ctxt,
736 u8 enabled_tc, bool is_add);
737#endif
738void i40e_service_event_schedule(struct i40e_pf *pf);
739void i40e_notify_client_of_vf_msg(struct i40e_vsi *vsi, u32 vf_id,
740 u8 *msg, u16 len);
741
742int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
743int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
744struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
745 u16 downlink_seid, u8 enabled_tc);
746void i40e_veb_release(struct i40e_veb *veb);
747
748int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
749int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
750void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
751void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
752void i40e_pf_reset_stats(struct i40e_pf *pf);
753#ifdef CONFIG_DEBUG_FS
754void i40e_dbg_pf_init(struct i40e_pf *pf);
755void i40e_dbg_pf_exit(struct i40e_pf *pf);
756void i40e_dbg_init(void);
757void i40e_dbg_exit(void);
758#else
759static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
760static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
761static inline void i40e_dbg_init(void) {}
762static inline void i40e_dbg_exit(void) {}
763#endif /* CONFIG_DEBUG_FS*/
764/* needed by client drivers */
765int i40e_lan_add_device(struct i40e_pf *pf);
766int i40e_lan_del_device(struct i40e_pf *pf);
767void i40e_client_subtask(struct i40e_pf *pf);
768void i40e_notify_client_of_l2_param_changes(struct i40e_vsi *vsi);
769void i40e_notify_client_of_netdev_open(struct i40e_vsi *vsi);
770void i40e_notify_client_of_netdev_close(struct i40e_vsi *vsi, bool reset);
771void i40e_notify_client_of_vf_enable(struct i40e_pf *pf, u32 num_vfs);
772void i40e_notify_client_of_vf_reset(struct i40e_pf *pf, u32 vf_id);
773int i40e_vf_client_capable(struct i40e_pf *pf, u32 vf_id,
774 enum i40e_client_type type);
775/**
776 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
777 * @vsi: pointer to a vsi
778 * @vector: enable a particular Hw Interrupt vector, without base_vector
779 **/
780static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
781{
782 struct i40e_pf *pf = vsi->back;
783 struct i40e_hw *hw = &pf->hw;
784 u32 val;
785
786 /* definitely clear the PBA here, as this function is meant to
787 * clean out all previous interrupts AND enable the interrupt
788 */
789 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
790 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
791 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
792 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
793 /* skip the flush */
794}
795
796void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
797void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba);
798#ifdef I40E_FCOE
799struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
800 struct net_device *netdev,
801 struct rtnl_link_stats64 *storage);
802int i40e_set_mac(struct net_device *netdev, void *p);
803void i40e_set_rx_mode(struct net_device *netdev);
804#endif
805int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
806#ifdef I40E_FCOE
807void i40e_tx_timeout(struct net_device *netdev);
808int i40e_vlan_rx_add_vid(struct net_device *netdev,
809 __always_unused __be16 proto, u16 vid);
810int i40e_vlan_rx_kill_vid(struct net_device *netdev,
811 __always_unused __be16 proto, u16 vid);
812#endif
813int i40e_open(struct net_device *netdev);
814int i40e_vsi_open(struct i40e_vsi *vsi);
815void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
816int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
817int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
818struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
819 bool is_vf, bool is_netdev);
820int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
821 bool is_vf, bool is_netdev);
822bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
823struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
824 bool is_vf, bool is_netdev);
825#ifdef I40E_FCOE
826int i40e_close(struct net_device *netdev);
827int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
828 struct tc_to_netdev *tc);
829void i40e_netpoll(struct net_device *netdev);
830int i40e_fcoe_enable(struct net_device *netdev);
831int i40e_fcoe_disable(struct net_device *netdev);
832int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
833u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
834void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
835void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
836void i40e_init_pf_fcoe(struct i40e_pf *pf);
837int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
838void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
839int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
840 union i40e_rx_desc *rx_desc,
841 struct sk_buff *skb);
842void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
843 union i40e_rx_desc *rx_desc, u8 prog_id);
844#endif /* I40E_FCOE */
845void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
846#ifdef CONFIG_I40E_DCB
847void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
848 struct i40e_dcbx_config *old_cfg,
849 struct i40e_dcbx_config *new_cfg);
850void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
851void i40e_dcbnl_setup(struct i40e_vsi *vsi);
852bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
853 struct i40e_dcbx_config *old_cfg,
854 struct i40e_dcbx_config *new_cfg);
855#endif /* CONFIG_I40E_DCB */
856void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
857void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
858void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
859void i40e_ptp_set_increment(struct i40e_pf *pf);
860int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
861int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
862void i40e_ptp_init(struct i40e_pf *pf);
863void i40e_ptp_stop(struct i40e_pf *pf);
864int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
865i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
866i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
867i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
868void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
869#endif /* _I40E_H_ */
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 2013 - 2021 Intel Corporation. */
3
4#ifndef _I40E_H_
5#define _I40E_H_
6
7#include <net/tcp.h>
8#include <net/udp.h>
9#include <linux/types.h>
10#include <linux/errno.h>
11#include <linux/module.h>
12#include <linux/pci.h>
13#include <linux/aer.h>
14#include <linux/netdevice.h>
15#include <linux/ioport.h>
16#include <linux/iommu.h>
17#include <linux/slab.h>
18#include <linux/list.h>
19#include <linux/hashtable.h>
20#include <linux/string.h>
21#include <linux/in.h>
22#include <linux/ip.h>
23#include <linux/sctp.h>
24#include <linux/pkt_sched.h>
25#include <linux/ipv6.h>
26#include <net/checksum.h>
27#include <net/ip6_checksum.h>
28#include <linux/ethtool.h>
29#include <linux/if_vlan.h>
30#include <linux/if_macvlan.h>
31#include <linux/if_bridge.h>
32#include <linux/clocksource.h>
33#include <linux/net_tstamp.h>
34#include <linux/ptp_clock_kernel.h>
35#include <net/pkt_cls.h>
36#include <net/tc_act/tc_gact.h>
37#include <net/tc_act/tc_mirred.h>
38#include <net/udp_tunnel.h>
39#include <net/xdp_sock.h>
40#include "i40e_type.h"
41#include "i40e_prototype.h"
42#include <linux/net/intel/i40e_client.h>
43#include <linux/avf/virtchnl.h>
44#include "i40e_virtchnl_pf.h"
45#include "i40e_txrx.h"
46#include "i40e_dcb.h"
47
48/* Useful i40e defaults */
49#define I40E_MAX_VEB 16
50
51#define I40E_MAX_NUM_DESCRIPTORS 4096
52#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
53#define I40E_DEFAULT_NUM_DESCRIPTORS 512
54#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
55#define I40E_MIN_NUM_DESCRIPTORS 64
56#define I40E_MIN_MSIX 2
57#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
58#define I40E_MIN_VSI_ALLOC 83 /* LAN, ATR, FCOE, 64 VF */
59/* max 16 qps */
60#define i40e_default_queues_per_vmdq(pf) \
61 (((pf)->hw_features & I40E_HW_RSS_AQ_CAPABLE) ? 4 : 1)
62#define I40E_DEFAULT_QUEUES_PER_VF 4
63#define I40E_MAX_VF_QUEUES 16
64#define i40e_pf_get_max_q_per_tc(pf) \
65 (((pf)->hw_features & I40E_HW_128_QP_RSS_CAPABLE) ? 128 : 64)
66#define I40E_FDIR_RING_COUNT 32
67#define I40E_MAX_AQ_BUF_SIZE 4096
68#define I40E_AQ_LEN 256
69#define I40E_MIN_ARQ_LEN 1
70#define I40E_MIN_ASQ_LEN 2
71#define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */
72#define I40E_MAX_USER_PRIORITY 8
73#define I40E_DEFAULT_TRAFFIC_CLASS BIT(0)
74#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
75#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
76
77#define I40E_NVM_VERSION_LO_SHIFT 0
78#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
79#define I40E_NVM_VERSION_HI_SHIFT 12
80#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
81#define I40E_OEM_VER_BUILD_MASK 0xffff
82#define I40E_OEM_VER_PATCH_MASK 0xff
83#define I40E_OEM_VER_BUILD_SHIFT 8
84#define I40E_OEM_VER_SHIFT 24
85#define I40E_PHY_DEBUG_ALL \
86 (I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW | \
87 I40E_AQ_PHY_DEBUG_DISABLE_ALL_LINK_FW)
88
89#define I40E_OEM_EETRACK_ID 0xffffffff
90#define I40E_OEM_GEN_SHIFT 24
91#define I40E_OEM_SNAP_MASK 0x00ff0000
92#define I40E_OEM_SNAP_SHIFT 16
93#define I40E_OEM_RELEASE_MASK 0x0000ffff
94
95#define I40E_RX_DESC(R, i) \
96 (&(((union i40e_rx_desc *)((R)->desc))[i]))
97#define I40E_TX_DESC(R, i) \
98 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
99#define I40E_TX_CTXTDESC(R, i) \
100 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
101#define I40E_TX_FDIRDESC(R, i) \
102 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
103
104/* BW rate limiting */
105#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
106#define I40E_BW_MBPS_DIVISOR 125000 /* rate / (1000000 / 8) Mbps */
107#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* accumulate 4 credits max */
108
109/* driver state flags */
110enum i40e_state_t {
111 __I40E_TESTING,
112 __I40E_CONFIG_BUSY,
113 __I40E_CONFIG_DONE,
114 __I40E_DOWN,
115 __I40E_SERVICE_SCHED,
116 __I40E_ADMINQ_EVENT_PENDING,
117 __I40E_MDD_EVENT_PENDING,
118 __I40E_VFLR_EVENT_PENDING,
119 __I40E_RESET_RECOVERY_PENDING,
120 __I40E_TIMEOUT_RECOVERY_PENDING,
121 __I40E_MISC_IRQ_REQUESTED,
122 __I40E_RESET_INTR_RECEIVED,
123 __I40E_REINIT_REQUESTED,
124 __I40E_PF_RESET_REQUESTED,
125 __I40E_PF_RESET_AND_REBUILD_REQUESTED,
126 __I40E_CORE_RESET_REQUESTED,
127 __I40E_GLOBAL_RESET_REQUESTED,
128 __I40E_EMP_RESET_INTR_RECEIVED,
129 __I40E_SUSPENDED,
130 __I40E_PTP_TX_IN_PROGRESS,
131 __I40E_BAD_EEPROM,
132 __I40E_DOWN_REQUESTED,
133 __I40E_FD_FLUSH_REQUESTED,
134 __I40E_FD_ATR_AUTO_DISABLED,
135 __I40E_FD_SB_AUTO_DISABLED,
136 __I40E_RESET_FAILED,
137 __I40E_PORT_SUSPENDED,
138 __I40E_VF_DISABLE,
139 __I40E_MACVLAN_SYNC_PENDING,
140 __I40E_TEMP_LINK_POLLING,
141 __I40E_CLIENT_SERVICE_REQUESTED,
142 __I40E_CLIENT_L2_CHANGE,
143 __I40E_CLIENT_RESET,
144 __I40E_VIRTCHNL_OP_PENDING,
145 __I40E_RECOVERY_MODE,
146 __I40E_VF_RESETS_DISABLED, /* disable resets during i40e_remove */
147 __I40E_VFS_RELEASING,
148 /* This must be last as it determines the size of the BITMAP */
149 __I40E_STATE_SIZE__,
150};
151
152#define I40E_PF_RESET_FLAG BIT_ULL(__I40E_PF_RESET_REQUESTED)
153#define I40E_PF_RESET_AND_REBUILD_FLAG \
154 BIT_ULL(__I40E_PF_RESET_AND_REBUILD_REQUESTED)
155
156/* VSI state flags */
157enum i40e_vsi_state_t {
158 __I40E_VSI_DOWN,
159 __I40E_VSI_NEEDS_RESTART,
160 __I40E_VSI_SYNCING_FILTERS,
161 __I40E_VSI_OVERFLOW_PROMISC,
162 __I40E_VSI_REINIT_REQUESTED,
163 __I40E_VSI_DOWN_REQUESTED,
164 /* This must be last as it determines the size of the BITMAP */
165 __I40E_VSI_STATE_SIZE__,
166};
167
168enum i40e_interrupt_policy {
169 I40E_INTERRUPT_BEST_CASE,
170 I40E_INTERRUPT_MEDIUM,
171 I40E_INTERRUPT_LOWEST
172};
173
174struct i40e_lump_tracking {
175 u16 num_entries;
176 u16 search_hint;
177 u16 list[0];
178#define I40E_PILE_VALID_BIT 0x8000
179#define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2)
180};
181
182#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
183#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
184#define I40E_FDIR_BUFFER_FULL_MARGIN 10
185#define I40E_FDIR_BUFFER_HEAD_ROOM 32
186#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
187
188#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
189#define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4)
190#define I40E_VF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4)
191
192enum i40e_fd_stat_idx {
193 I40E_FD_STAT_ATR,
194 I40E_FD_STAT_SB,
195 I40E_FD_STAT_ATR_TUNNEL,
196 I40E_FD_STAT_PF_COUNT
197};
198#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
199#define I40E_FD_ATR_STAT_IDX(pf_id) \
200 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
201#define I40E_FD_SB_STAT_IDX(pf_id) \
202 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
203#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
204 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
205
206/* The following structure contains the data parsed from the user-defined
207 * field of the ethtool_rx_flow_spec structure.
208 */
209struct i40e_rx_flow_userdef {
210 bool flex_filter;
211 u16 flex_word;
212 u16 flex_offset;
213};
214
215struct i40e_fdir_filter {
216 struct hlist_node fdir_node;
217 /* filter ipnut set */
218 u8 flow_type;
219 u8 ipl4_proto;
220 /* TX packet view of src and dst */
221 __be32 dst_ip;
222 __be32 src_ip;
223 __be32 dst_ip6[4];
224 __be32 src_ip6[4];
225 __be16 src_port;
226 __be16 dst_port;
227 __be32 sctp_v_tag;
228
229 __be16 vlan_etype;
230 __be16 vlan_tag;
231 /* Flexible data to match within the packet payload */
232 __be16 flex_word;
233 u16 flex_offset;
234 bool flex_filter;
235
236 /* filter control */
237 u16 q_index;
238 u8 flex_off;
239 u8 pctype;
240 u16 dest_vsi;
241 u8 dest_ctl;
242 u8 fd_status;
243 u16 cnt_index;
244 u32 fd_id;
245};
246
247#define I40E_CLOUD_FIELD_OMAC BIT(0)
248#define I40E_CLOUD_FIELD_IMAC BIT(1)
249#define I40E_CLOUD_FIELD_IVLAN BIT(2)
250#define I40E_CLOUD_FIELD_TEN_ID BIT(3)
251#define I40E_CLOUD_FIELD_IIP BIT(4)
252
253#define I40E_CLOUD_FILTER_FLAGS_OMAC I40E_CLOUD_FIELD_OMAC
254#define I40E_CLOUD_FILTER_FLAGS_IMAC I40E_CLOUD_FIELD_IMAC
255#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN (I40E_CLOUD_FIELD_IMAC | \
256 I40E_CLOUD_FIELD_IVLAN)
257#define I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID (I40E_CLOUD_FIELD_IMAC | \
258 I40E_CLOUD_FIELD_TEN_ID)
259#define I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC (I40E_CLOUD_FIELD_OMAC | \
260 I40E_CLOUD_FIELD_IMAC | \
261 I40E_CLOUD_FIELD_TEN_ID)
262#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID (I40E_CLOUD_FIELD_IMAC | \
263 I40E_CLOUD_FIELD_IVLAN | \
264 I40E_CLOUD_FIELD_TEN_ID)
265#define I40E_CLOUD_FILTER_FLAGS_IIP I40E_CLOUD_FIELD_IIP
266
267struct i40e_cloud_filter {
268 struct hlist_node cloud_node;
269 unsigned long cookie;
270 /* cloud filter input set follows */
271 u8 dst_mac[ETH_ALEN];
272 u8 src_mac[ETH_ALEN];
273 __be16 vlan_id;
274 u16 seid; /* filter control */
275 __be16 dst_port;
276 __be16 src_port;
277 u32 tenant_id;
278 union {
279 struct {
280 struct in_addr dst_ip;
281 struct in_addr src_ip;
282 } v4;
283 struct {
284 struct in6_addr dst_ip6;
285 struct in6_addr src_ip6;
286 } v6;
287 } ip;
288#define dst_ipv6 ip.v6.dst_ip6.s6_addr32
289#define src_ipv6 ip.v6.src_ip6.s6_addr32
290#define dst_ipv4 ip.v4.dst_ip.s_addr
291#define src_ipv4 ip.v4.src_ip.s_addr
292 u16 n_proto; /* Ethernet Protocol */
293 u8 ip_proto; /* IPPROTO value */
294 u8 flags;
295#define I40E_CLOUD_TNL_TYPE_NONE 0xff
296 u8 tunnel_type;
297};
298
299#define I40E_DCB_PRIO_TYPE_STRICT 0
300#define I40E_DCB_PRIO_TYPE_ETS 1
301#define I40E_DCB_STRICT_PRIO_CREDITS 127
302/* DCB per TC information data structure */
303struct i40e_tc_info {
304 u16 qoffset; /* Queue offset from base queue */
305 u16 qcount; /* Total Queues */
306 u8 netdev_tc; /* Netdev TC index if netdev associated */
307};
308
309/* TC configuration data structure */
310struct i40e_tc_configuration {
311 u8 numtc; /* Total number of enabled TCs */
312 u8 enabled_tc; /* TC map */
313 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
314};
315
316#define I40E_UDP_PORT_INDEX_UNUSED 255
317struct i40e_udp_port_config {
318 /* AdminQ command interface expects port number in Host byte order */
319 u16 port;
320 u8 type;
321 u8 filter_index;
322};
323
324#define I40_DDP_FLASH_REGION 100
325#define I40E_PROFILE_INFO_SIZE 48
326#define I40E_MAX_PROFILE_NUM 16
327#define I40E_PROFILE_LIST_SIZE \
328 (I40E_PROFILE_INFO_SIZE * I40E_MAX_PROFILE_NUM + 4)
329#define I40E_DDP_PROFILE_PATH "intel/i40e/ddp/"
330#define I40E_DDP_PROFILE_NAME_MAX 64
331
332int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size,
333 bool is_add);
334int i40e_ddp_flash(struct net_device *netdev, struct ethtool_flash *flash);
335
336struct i40e_ddp_profile_list {
337 u32 p_count;
338 struct i40e_profile_info p_info[];
339};
340
341struct i40e_ddp_old_profile_list {
342 struct list_head list;
343 size_t old_ddp_size;
344 u8 old_ddp_buf[];
345};
346
347/* macros related to FLX_PIT */
348#define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \
349 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \
350 I40E_PRTQF_FLX_PIT_FSIZE_MASK)
351#define I40E_FLEX_SET_DST_WORD(dst) (((dst) << \
352 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) & \
353 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK)
354#define I40E_FLEX_SET_SRC_WORD(src) (((src) << \
355 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) & \
356 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK)
357#define I40E_FLEX_PREP_VAL(dst, fsize, src) (I40E_FLEX_SET_DST_WORD(dst) | \
358 I40E_FLEX_SET_FSIZE(fsize) | \
359 I40E_FLEX_SET_SRC_WORD(src))
360
361
362#define I40E_MAX_FLEX_SRC_OFFSET 0x1F
363
364/* macros related to GLQF_ORT */
365#define I40E_ORT_SET_IDX(idx) (((idx) << \
366 I40E_GLQF_ORT_PIT_INDX_SHIFT) & \
367 I40E_GLQF_ORT_PIT_INDX_MASK)
368
369#define I40E_ORT_SET_COUNT(count) (((count) << \
370 I40E_GLQF_ORT_FIELD_CNT_SHIFT) & \
371 I40E_GLQF_ORT_FIELD_CNT_MASK)
372
373#define I40E_ORT_SET_PAYLOAD(payload) (((payload) << \
374 I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) & \
375 I40E_GLQF_ORT_FLX_PAYLOAD_MASK)
376
377#define I40E_ORT_PREP_VAL(idx, count, payload) (I40E_ORT_SET_IDX(idx) | \
378 I40E_ORT_SET_COUNT(count) | \
379 I40E_ORT_SET_PAYLOAD(payload))
380
381#define I40E_L3_GLQF_ORT_IDX 34
382#define I40E_L4_GLQF_ORT_IDX 35
383
384/* Flex PIT register index */
385#define I40E_FLEX_PIT_IDX_START_L3 3
386#define I40E_FLEX_PIT_IDX_START_L4 6
387
388#define I40E_FLEX_PIT_TABLE_SIZE 3
389
390#define I40E_FLEX_DEST_UNUSED 63
391
392#define I40E_FLEX_INDEX_ENTRIES 8
393
394/* Flex MASK to disable all flexible entries */
395#define I40E_FLEX_INPUT_MASK (I40E_FLEX_50_MASK | I40E_FLEX_51_MASK | \
396 I40E_FLEX_52_MASK | I40E_FLEX_53_MASK | \
397 I40E_FLEX_54_MASK | I40E_FLEX_55_MASK | \
398 I40E_FLEX_56_MASK | I40E_FLEX_57_MASK)
399
400struct i40e_flex_pit {
401 struct list_head list;
402 u16 src_offset;
403 u8 pit_index;
404};
405
406struct i40e_fwd_adapter {
407 struct net_device *netdev;
408 int bit_no;
409};
410
411struct i40e_channel {
412 struct list_head list;
413 bool initialized;
414 u8 type;
415 u16 vsi_number; /* Assigned VSI number from AQ 'Add VSI' response */
416 u16 stat_counter_idx;
417 u16 base_queue;
418 u16 num_queue_pairs; /* Requested by user */
419 u16 seid;
420
421 u8 enabled_tc;
422 struct i40e_aqc_vsi_properties_data info;
423
424 u64 max_tx_rate;
425 struct i40e_fwd_adapter *fwd;
426
427 /* track this channel belongs to which VSI */
428 struct i40e_vsi *parent_vsi;
429};
430
431static inline bool i40e_is_channel_macvlan(struct i40e_channel *ch)
432{
433 return !!ch->fwd;
434}
435
436static inline u8 *i40e_channel_mac(struct i40e_channel *ch)
437{
438 if (i40e_is_channel_macvlan(ch))
439 return ch->fwd->netdev->dev_addr;
440 else
441 return NULL;
442}
443
444/* struct that defines the Ethernet device */
445struct i40e_pf {
446 struct pci_dev *pdev;
447 struct i40e_hw hw;
448 DECLARE_BITMAP(state, __I40E_STATE_SIZE__);
449 struct msix_entry *msix_entries;
450 bool fc_autoneg_status;
451
452 u16 eeprom_version;
453 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
454 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
455 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
456 u16 num_req_vfs; /* num VFs requested for this PF */
457 u16 num_vf_qps; /* num queue pairs per VF */
458 u16 num_lan_qps; /* num lan queues this PF has set up */
459 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
460 u16 num_fdsb_msix; /* num queue vectors for sideband Fdir */
461 u16 num_iwarp_msix; /* num of iwarp vectors for this PF */
462 int iwarp_base_vector;
463 int queues_left; /* queues left unclaimed */
464 u16 alloc_rss_size; /* allocated RSS queues */
465 u16 rss_size_max; /* HW defined max RSS queues */
466 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
467 u16 num_alloc_vsi; /* num VSIs this driver supports */
468 u8 atr_sample_rate;
469 bool wol_en;
470
471 struct hlist_head fdir_filter_list;
472 u16 fdir_pf_active_filters;
473 unsigned long fd_flush_timestamp;
474 u32 fd_flush_cnt;
475 u32 fd_add_err;
476 u32 fd_atr_cnt;
477
478 /* Book-keeping of side-band filter count per flow-type.
479 * This is used to detect and handle input set changes for
480 * respective flow-type.
481 */
482 u16 fd_tcp4_filter_cnt;
483 u16 fd_udp4_filter_cnt;
484 u16 fd_sctp4_filter_cnt;
485 u16 fd_ip4_filter_cnt;
486
487 u16 fd_tcp6_filter_cnt;
488 u16 fd_udp6_filter_cnt;
489 u16 fd_sctp6_filter_cnt;
490 u16 fd_ip6_filter_cnt;
491
492 /* Flexible filter table values that need to be programmed into
493 * hardware, which expects L3 and L4 to be programmed separately. We
494 * need to ensure that the values are in ascended order and don't have
495 * duplicates, so we track each L3 and L4 values in separate lists.
496 */
497 struct list_head l3_flex_pit_list;
498 struct list_head l4_flex_pit_list;
499
500 struct udp_tunnel_nic_shared udp_tunnel_shared;
501 struct udp_tunnel_nic_info udp_tunnel_nic;
502
503 struct hlist_head cloud_filter_list;
504 u16 num_cloud_filters;
505
506 enum i40e_interrupt_policy int_policy;
507 u16 rx_itr_default;
508 u16 tx_itr_default;
509 u32 msg_enable;
510 char int_name[I40E_INT_NAME_STR_LEN];
511 u16 adminq_work_limit; /* num of admin receive queue desc to process */
512 unsigned long service_timer_period;
513 unsigned long service_timer_previous;
514 struct timer_list service_timer;
515 struct work_struct service_task;
516
517 u32 hw_features;
518#define I40E_HW_RSS_AQ_CAPABLE BIT(0)
519#define I40E_HW_128_QP_RSS_CAPABLE BIT(1)
520#define I40E_HW_ATR_EVICT_CAPABLE BIT(2)
521#define I40E_HW_WB_ON_ITR_CAPABLE BIT(3)
522#define I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT(4)
523#define I40E_HW_NO_PCI_LINK_CHECK BIT(5)
524#define I40E_HW_100M_SGMII_CAPABLE BIT(6)
525#define I40E_HW_NO_DCB_SUPPORT BIT(7)
526#define I40E_HW_USE_SET_LLDP_MIB BIT(8)
527#define I40E_HW_GENEVE_OFFLOAD_CAPABLE BIT(9)
528#define I40E_HW_PTP_L4_CAPABLE BIT(10)
529#define I40E_HW_WOL_MC_MAGIC_PKT_WAKE BIT(11)
530#define I40E_HW_HAVE_CRT_RETIMER BIT(13)
531#define I40E_HW_OUTER_UDP_CSUM_CAPABLE BIT(14)
532#define I40E_HW_PHY_CONTROLS_LEDS BIT(15)
533#define I40E_HW_STOP_FW_LLDP BIT(16)
534#define I40E_HW_PORT_ID_VALID BIT(17)
535#define I40E_HW_RESTART_AUTONEG BIT(18)
536
537 u32 flags;
538#define I40E_FLAG_RX_CSUM_ENABLED BIT(0)
539#define I40E_FLAG_MSI_ENABLED BIT(1)
540#define I40E_FLAG_MSIX_ENABLED BIT(2)
541#define I40E_FLAG_RSS_ENABLED BIT(3)
542#define I40E_FLAG_VMDQ_ENABLED BIT(4)
543#define I40E_FLAG_SRIOV_ENABLED BIT(5)
544#define I40E_FLAG_DCB_CAPABLE BIT(6)
545#define I40E_FLAG_DCB_ENABLED BIT(7)
546#define I40E_FLAG_FD_SB_ENABLED BIT(8)
547#define I40E_FLAG_FD_ATR_ENABLED BIT(9)
548#define I40E_FLAG_MFP_ENABLED BIT(10)
549#define I40E_FLAG_HW_ATR_EVICT_ENABLED BIT(11)
550#define I40E_FLAG_VEB_MODE_ENABLED BIT(12)
551#define I40E_FLAG_VEB_STATS_ENABLED BIT(13)
552#define I40E_FLAG_LINK_POLLING_ENABLED BIT(14)
553#define I40E_FLAG_TRUE_PROMISC_SUPPORT BIT(15)
554#define I40E_FLAG_LEGACY_RX BIT(16)
555#define I40E_FLAG_PTP BIT(17)
556#define I40E_FLAG_IWARP_ENABLED BIT(18)
557#define I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED BIT(19)
558#define I40E_FLAG_SOURCE_PRUNING_DISABLED BIT(20)
559#define I40E_FLAG_TC_MQPRIO BIT(21)
560#define I40E_FLAG_FD_SB_INACTIVE BIT(22)
561#define I40E_FLAG_FD_SB_TO_CLOUD_FILTER BIT(23)
562#define I40E_FLAG_DISABLE_FW_LLDP BIT(24)
563#define I40E_FLAG_RS_FEC BIT(25)
564#define I40E_FLAG_BASE_R_FEC BIT(26)
565/* TOTAL_PORT_SHUTDOWN
566 * Allows to physically disable the link on the NIC's port.
567 * If enabled, (after link down request from the OS)
568 * no link, traffic or led activity is possible on that port.
569 *
570 * If I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED is set, the
571 * I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED must be explicitly forced to true
572 * and cannot be disabled by system admin at that time.
573 * The functionalities are exclusive in terms of configuration, but they also
574 * have similar behavior (allowing to disable physical link of the port),
575 * with following differences:
576 * - LINK_DOWN_ON_CLOSE_ENABLED is configurable at host OS run-time and is
577 * supported by whole family of 7xx Intel Ethernet Controllers
578 * - TOTAL_PORT_SHUTDOWN may be enabled only before OS loads (in BIOS)
579 * only if motherboard's BIOS and NIC's FW has support of it
580 * - when LINK_DOWN_ON_CLOSE_ENABLED is used, the link is being brought down
581 * by sending phy_type=0 to NIC's FW
582 * - when TOTAL_PORT_SHUTDOWN is used, phy_type is not altered, instead
583 * the link is being brought down by clearing bit (I40E_AQ_PHY_ENABLE_LINK)
584 * in abilities field of i40e_aq_set_phy_config structure
585 */
586#define I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED BIT(27)
587
588 struct i40e_client_instance *cinst;
589 bool stat_offsets_loaded;
590 struct i40e_hw_port_stats stats;
591 struct i40e_hw_port_stats stats_offsets;
592 u32 tx_timeout_count;
593 u32 tx_timeout_recovery_level;
594 unsigned long tx_timeout_last_recovery;
595 u32 tx_sluggish_count;
596 u32 hw_csum_rx_error;
597 u32 led_status;
598 u16 corer_count; /* Core reset count */
599 u16 globr_count; /* Global reset count */
600 u16 empr_count; /* EMP reset count */
601 u16 pfr_count; /* PF reset count */
602 u16 sw_int_count; /* SW interrupt count */
603
604 struct mutex switch_mutex;
605 u16 lan_vsi; /* our default LAN VSI */
606 u16 lan_veb; /* initial relay, if exists */
607#define I40E_NO_VEB 0xffff
608#define I40E_NO_VSI 0xffff
609 u16 next_vsi; /* Next unallocated VSI - 0-based! */
610 struct i40e_vsi **vsi;
611 struct i40e_veb *veb[I40E_MAX_VEB];
612
613 struct i40e_lump_tracking *qp_pile;
614 struct i40e_lump_tracking *irq_pile;
615
616 /* switch config info */
617 u16 pf_seid;
618 u16 main_vsi_seid;
619 u16 mac_seid;
620 struct kobject *switch_kobj;
621#ifdef CONFIG_DEBUG_FS
622 struct dentry *i40e_dbg_pf;
623#endif /* CONFIG_DEBUG_FS */
624 bool cur_promisc;
625
626 u16 instance; /* A unique number per i40e_pf instance in the system */
627
628 /* sr-iov config info */
629 struct i40e_vf *vf;
630 int num_alloc_vfs; /* actual number of VFs allocated */
631 u32 vf_aq_requests;
632 u32 arq_overflows; /* Not fatal, possibly indicative of problems */
633
634 /* DCBx/DCBNL capability for PF that indicates
635 * whether DCBx is managed by firmware or host
636 * based agent (LLDPAD). Also, indicates what
637 * flavor of DCBx protocol (IEEE/CEE) is supported
638 * by the device. For now we're supporting IEEE
639 * mode only.
640 */
641 u16 dcbx_cap;
642
643 struct i40e_filter_control_settings filter_settings;
644 struct i40e_rx_pb_config pb_cfg; /* Current Rx packet buffer config */
645 struct i40e_dcbx_config tmp_cfg;
646
647 struct ptp_clock *ptp_clock;
648 struct ptp_clock_info ptp_caps;
649 struct sk_buff *ptp_tx_skb;
650 unsigned long ptp_tx_start;
651 struct hwtstamp_config tstamp_config;
652 struct timespec64 ptp_prev_hw_time;
653 ktime_t ptp_reset_start;
654 struct mutex tmreg_lock; /* Used to protect the SYSTIME registers. */
655 u32 ptp_adj_mult;
656 u32 tx_hwtstamp_timeouts;
657 u32 tx_hwtstamp_skipped;
658 u32 rx_hwtstamp_cleared;
659 u32 latch_event_flags;
660 spinlock_t ptp_rx_lock; /* Used to protect Rx timestamp registers. */
661 unsigned long latch_events[4];
662 bool ptp_tx;
663 bool ptp_rx;
664 u16 rss_table_size; /* HW RSS table size */
665 u32 max_bw;
666 u32 min_bw;
667
668 u32 ioremap_len;
669 u32 fd_inv;
670 u16 phy_led_val;
671
672 u16 override_q_count;
673 u16 last_sw_conf_flags;
674 u16 last_sw_conf_valid_flags;
675 /* List to keep previous DDP profiles to be rolled back in the future */
676 struct list_head ddp_old_prof;
677};
678
679/**
680 * i40e_mac_to_hkey - Convert a 6-byte MAC Address to a u64 hash key
681 * @macaddr: the MAC Address as the base key
682 *
683 * Simply copies the address and returns it as a u64 for hashing
684 **/
685static inline u64 i40e_addr_to_hkey(const u8 *macaddr)
686{
687 u64 key = 0;
688
689 ether_addr_copy((u8 *)&key, macaddr);
690 return key;
691}
692
693enum i40e_filter_state {
694 I40E_FILTER_INVALID = 0, /* Invalid state */
695 I40E_FILTER_NEW, /* New, not sent to FW yet */
696 I40E_FILTER_ACTIVE, /* Added to switch by FW */
697 I40E_FILTER_FAILED, /* Rejected by FW */
698 I40E_FILTER_REMOVE, /* To be removed */
699/* There is no 'removed' state; the filter struct is freed */
700};
701struct i40e_mac_filter {
702 struct hlist_node hlist;
703 u8 macaddr[ETH_ALEN];
704#define I40E_VLAN_ANY -1
705 s16 vlan;
706 enum i40e_filter_state state;
707};
708
709/* Wrapper structure to keep track of filters while we are preparing to send
710 * firmware commands. We cannot send firmware commands while holding a
711 * spinlock, since it might sleep. To avoid this, we wrap the added filters in
712 * a separate structure, which will track the state change and update the real
713 * filter while under lock. We can't simply hold the filters in a separate
714 * list, as this opens a window for a race condition when adding new MAC
715 * addresses to all VLANs, or when adding new VLANs to all MAC addresses.
716 */
717struct i40e_new_mac_filter {
718 struct hlist_node hlist;
719 struct i40e_mac_filter *f;
720
721 /* Track future changes to state separately */
722 enum i40e_filter_state state;
723};
724
725struct i40e_veb {
726 struct i40e_pf *pf;
727 u16 idx;
728 u16 veb_idx; /* index of VEB parent */
729 u16 seid;
730 u16 uplink_seid;
731 u16 stats_idx; /* index of VEB parent */
732 u8 enabled_tc;
733 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
734 u16 flags;
735 u16 bw_limit;
736 u8 bw_max_quanta;
737 bool is_abs_credits;
738 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
739 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
740 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
741 struct kobject *kobj;
742 bool stat_offsets_loaded;
743 struct i40e_eth_stats stats;
744 struct i40e_eth_stats stats_offsets;
745 struct i40e_veb_tc_stats tc_stats;
746 struct i40e_veb_tc_stats tc_stats_offsets;
747};
748
749/* struct that defines a VSI, associated with a dev */
750struct i40e_vsi {
751 struct net_device *netdev;
752 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
753 bool netdev_registered;
754 bool stat_offsets_loaded;
755
756 u32 current_netdev_flags;
757 DECLARE_BITMAP(state, __I40E_VSI_STATE_SIZE__);
758#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
759#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
760 unsigned long flags;
761
762 /* Per VSI lock to protect elements/hash (MAC filter) */
763 spinlock_t mac_filter_hash_lock;
764 /* Fixed size hash table with 2^8 buckets for MAC filters */
765 DECLARE_HASHTABLE(mac_filter_hash, 8);
766 bool has_vlan_filter;
767
768 /* VSI stats */
769 struct rtnl_link_stats64 net_stats;
770 struct rtnl_link_stats64 net_stats_offsets;
771 struct i40e_eth_stats eth_stats;
772 struct i40e_eth_stats eth_stats_offsets;
773 u32 tx_restart;
774 u32 tx_busy;
775 u64 tx_linearize;
776 u64 tx_force_wb;
777 u32 rx_buf_failed;
778 u32 rx_page_failed;
779
780 /* These are containers of ring pointers, allocated at run-time */
781 struct i40e_ring **rx_rings;
782 struct i40e_ring **tx_rings;
783 struct i40e_ring **xdp_rings; /* XDP Tx rings */
784
785 u32 active_filters;
786 u32 promisc_threshold;
787
788 u16 work_limit;
789 u16 int_rate_limit; /* value in usecs */
790
791 u16 rss_table_size; /* HW RSS table size */
792 u16 rss_size; /* Allocated RSS queues */
793 u8 *rss_hkey_user; /* User configured hash keys */
794 u8 *rss_lut_user; /* User configured lookup table entries */
795
796
797 u16 max_frame;
798 u16 rx_buf_len;
799
800 struct bpf_prog *xdp_prog;
801
802 /* List of q_vectors allocated to this VSI */
803 struct i40e_q_vector **q_vectors;
804 int num_q_vectors;
805 int base_vector;
806 bool irqs_ready;
807
808 u16 seid; /* HW index of this VSI (absolute index) */
809 u16 id; /* VSI number */
810 u16 uplink_seid;
811
812 u16 base_queue; /* vsi's first queue in hw array */
813 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
814 u16 req_queue_pairs; /* User requested queue pairs */
815 u16 num_queue_pairs; /* Used tx and rx pairs */
816 u16 num_tx_desc;
817 u16 num_rx_desc;
818 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
819 s16 vf_id; /* Virtual function ID for SRIOV VSIs */
820
821 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
822 struct i40e_tc_configuration tc_config;
823 struct i40e_aqc_vsi_properties_data info;
824
825 /* VSI BW limit (absolute across all TCs) */
826 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
827 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
828
829 /* Relative TC credits across VSIs */
830 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
831 /* TC BW limit credits within VSI */
832 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
833 /* TC BW limit max quanta within VSI */
834 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
835
836 struct i40e_pf *back; /* Backreference to associated PF */
837 u16 idx; /* index in pf->vsi[] */
838 u16 veb_idx; /* index of VEB parent */
839 struct kobject *kobj; /* sysfs object */
840 bool current_isup; /* Sync 'link up' logging */
841 enum i40e_aq_link_speed current_speed; /* Sync link speed logging */
842
843 /* channel specific fields */
844 u16 cnt_q_avail; /* num of queues available for channel usage */
845 u16 orig_rss_size;
846 u16 current_rss_size;
847 bool reconfig_rss;
848
849 u16 next_base_queue; /* next queue to be used for channel setup */
850
851 struct list_head ch_list;
852 u16 tc_seid_map[I40E_MAX_TRAFFIC_CLASS];
853
854 /* macvlan fields */
855#define I40E_MAX_MACVLANS 128 /* Max HW vectors - 1 on FVL */
856#define I40E_MIN_MACVLAN_VECTORS 2 /* Min vectors to enable macvlans */
857 DECLARE_BITMAP(fwd_bitmask, I40E_MAX_MACVLANS);
858 struct list_head macvlan_list;
859 int macvlan_cnt;
860
861 void *priv; /* client driver data reference. */
862
863 /* VSI specific handlers */
864 irqreturn_t (*irq_handler)(int irq, void *data);
865
866 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */
867} ____cacheline_internodealigned_in_smp;
868
869struct i40e_netdev_priv {
870 struct i40e_vsi *vsi;
871};
872
873extern struct ida i40e_client_ida;
874
875/* struct that defines an interrupt vector */
876struct i40e_q_vector {
877 struct i40e_vsi *vsi;
878
879 u16 v_idx; /* index in the vsi->q_vector array. */
880 u16 reg_idx; /* register index of the interrupt */
881
882 struct napi_struct napi;
883
884 struct i40e_ring_container rx;
885 struct i40e_ring_container tx;
886
887 u8 itr_countdown; /* when 0 should adjust adaptive ITR */
888 u8 num_ringpairs; /* total number of ring pairs in vector */
889
890 cpumask_t affinity_mask;
891 struct irq_affinity_notify affinity_notify;
892
893 struct rcu_head rcu; /* to avoid race with update stats on free */
894 char name[I40E_INT_NAME_STR_LEN];
895 bool arm_wb_state;
896} ____cacheline_internodealigned_in_smp;
897
898/* lan device */
899struct i40e_device {
900 struct list_head list;
901 struct i40e_pf *pf;
902};
903
904/**
905 * i40e_nvm_version_str - format the NVM version strings
906 * @hw: ptr to the hardware info
907 **/
908static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
909{
910 static char buf[32];
911 u32 full_ver;
912
913 full_ver = hw->nvm.oem_ver;
914
915 if (hw->nvm.eetrack == I40E_OEM_EETRACK_ID) {
916 u8 gen, snap;
917 u16 release;
918
919 gen = (u8)(full_ver >> I40E_OEM_GEN_SHIFT);
920 snap = (u8)((full_ver & I40E_OEM_SNAP_MASK) >>
921 I40E_OEM_SNAP_SHIFT);
922 release = (u16)(full_ver & I40E_OEM_RELEASE_MASK);
923
924 snprintf(buf, sizeof(buf), "%x.%x.%x", gen, snap, release);
925 } else {
926 u8 ver, patch;
927 u16 build;
928
929 ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
930 build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) &
931 I40E_OEM_VER_BUILD_MASK);
932 patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
933
934 snprintf(buf, sizeof(buf),
935 "%x.%02x 0x%x %d.%d.%d",
936 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
937 I40E_NVM_VERSION_HI_SHIFT,
938 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
939 I40E_NVM_VERSION_LO_SHIFT,
940 hw->nvm.eetrack, ver, build, patch);
941 }
942
943 return buf;
944}
945
946/**
947 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
948 * @netdev: the corresponding netdev
949 *
950 * Return the PF struct for the given netdev
951 **/
952static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
953{
954 struct i40e_netdev_priv *np = netdev_priv(netdev);
955 struct i40e_vsi *vsi = np->vsi;
956
957 return vsi->back;
958}
959
960static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
961 irqreturn_t (*irq_handler)(int, void *))
962{
963 vsi->irq_handler = irq_handler;
964}
965
966/**
967 * i40e_get_fd_cnt_all - get the total FD filter space available
968 * @pf: pointer to the PF struct
969 **/
970static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
971{
972 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
973}
974
975/**
976 * i40e_read_fd_input_set - reads value of flow director input set register
977 * @pf: pointer to the PF struct
978 * @addr: register addr
979 *
980 * This function reads value of flow director input set register
981 * specified by 'addr' (which is specific to flow-type)
982 **/
983static inline u64 i40e_read_fd_input_set(struct i40e_pf *pf, u16 addr)
984{
985 u64 val;
986
987 val = i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1));
988 val <<= 32;
989 val += i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0));
990
991 return val;
992}
993
994/**
995 * i40e_write_fd_input_set - writes value into flow director input set register
996 * @pf: pointer to the PF struct
997 * @addr: register addr
998 * @val: value to be written
999 *
1000 * This function writes specified value to the register specified by 'addr'.
1001 * This register is input set register based on flow-type.
1002 **/
1003static inline void i40e_write_fd_input_set(struct i40e_pf *pf,
1004 u16 addr, u64 val)
1005{
1006 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1),
1007 (u32)(val >> 32));
1008 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0),
1009 (u32)(val & 0xFFFFFFFFULL));
1010}
1011
1012/* needed by i40e_ethtool.c */
1013int i40e_up(struct i40e_vsi *vsi);
1014void i40e_down(struct i40e_vsi *vsi);
1015extern const char i40e_driver_name[];
1016void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
1017void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired);
1018int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
1019int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
1020void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
1021 u16 rss_table_size, u16 rss_size);
1022struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
1023/**
1024 * i40e_find_vsi_by_type - Find and return Flow Director VSI
1025 * @pf: PF to search for VSI
1026 * @type: Value indicating type of VSI we are looking for
1027 **/
1028static inline struct i40e_vsi *
1029i40e_find_vsi_by_type(struct i40e_pf *pf, u16 type)
1030{
1031 int i;
1032
1033 for (i = 0; i < pf->num_alloc_vsi; i++) {
1034 struct i40e_vsi *vsi = pf->vsi[i];
1035
1036 if (vsi && vsi->type == type)
1037 return vsi;
1038 }
1039
1040 return NULL;
1041}
1042void i40e_update_stats(struct i40e_vsi *vsi);
1043void i40e_update_veb_stats(struct i40e_veb *veb);
1044void i40e_update_eth_stats(struct i40e_vsi *vsi);
1045struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
1046int i40e_fetch_switch_configuration(struct i40e_pf *pf,
1047 bool printconfig);
1048
1049int i40e_add_del_fdir(struct i40e_vsi *vsi,
1050 struct i40e_fdir_filter *input, bool add);
1051void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
1052u32 i40e_get_current_fd_count(struct i40e_pf *pf);
1053u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
1054u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
1055u32 i40e_get_global_fd_count(struct i40e_pf *pf);
1056bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
1057void i40e_set_ethtool_ops(struct net_device *netdev);
1058struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1059 const u8 *macaddr, s16 vlan);
1060void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f);
1061void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan);
1062int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
1063struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
1064 u16 uplink, u32 param1);
1065int i40e_vsi_release(struct i40e_vsi *vsi);
1066void i40e_service_event_schedule(struct i40e_pf *pf);
1067void i40e_notify_client_of_vf_msg(struct i40e_vsi *vsi, u32 vf_id,
1068 u8 *msg, u16 len);
1069
1070int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q, bool is_xdp,
1071 bool enable);
1072int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable);
1073int i40e_vsi_start_rings(struct i40e_vsi *vsi);
1074void i40e_vsi_stop_rings(struct i40e_vsi *vsi);
1075void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi);
1076int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi);
1077int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
1078struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
1079 u16 downlink_seid, u8 enabled_tc);
1080void i40e_veb_release(struct i40e_veb *veb);
1081
1082int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
1083int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
1084void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
1085void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
1086void i40e_pf_reset_stats(struct i40e_pf *pf);
1087#ifdef CONFIG_DEBUG_FS
1088void i40e_dbg_pf_init(struct i40e_pf *pf);
1089void i40e_dbg_pf_exit(struct i40e_pf *pf);
1090void i40e_dbg_init(void);
1091void i40e_dbg_exit(void);
1092#else
1093static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
1094static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
1095static inline void i40e_dbg_init(void) {}
1096static inline void i40e_dbg_exit(void) {}
1097#endif /* CONFIG_DEBUG_FS*/
1098/* needed by client drivers */
1099int i40e_lan_add_device(struct i40e_pf *pf);
1100int i40e_lan_del_device(struct i40e_pf *pf);
1101void i40e_client_subtask(struct i40e_pf *pf);
1102void i40e_notify_client_of_l2_param_changes(struct i40e_vsi *vsi);
1103void i40e_notify_client_of_netdev_close(struct i40e_vsi *vsi, bool reset);
1104void i40e_notify_client_of_vf_enable(struct i40e_pf *pf, u32 num_vfs);
1105void i40e_notify_client_of_vf_reset(struct i40e_pf *pf, u32 vf_id);
1106void i40e_client_update_msix_info(struct i40e_pf *pf);
1107int i40e_vf_client_capable(struct i40e_pf *pf, u32 vf_id);
1108/**
1109 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
1110 * @vsi: pointer to a vsi
1111 * @vector: enable a particular Hw Interrupt vector, without base_vector
1112 **/
1113static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
1114{
1115 struct i40e_pf *pf = vsi->back;
1116 struct i40e_hw *hw = &pf->hw;
1117 u32 val;
1118
1119 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
1120 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
1121 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
1122 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
1123 /* skip the flush */
1124}
1125
1126void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
1127void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
1128int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
1129int i40e_open(struct net_device *netdev);
1130int i40e_close(struct net_device *netdev);
1131int i40e_vsi_open(struct i40e_vsi *vsi);
1132void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
1133int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
1134int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid);
1135void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
1136void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid);
1137struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1138 const u8 *macaddr);
1139int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr);
1140bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
1141int i40e_count_filters(struct i40e_vsi *vsi);
1142struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);
1143void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
1144static inline bool i40e_is_sw_dcb(struct i40e_pf *pf)
1145{
1146 return !!(pf->flags & I40E_FLAG_DISABLE_FW_LLDP);
1147}
1148
1149#ifdef CONFIG_I40E_DCB
1150void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
1151 struct i40e_dcbx_config *old_cfg,
1152 struct i40e_dcbx_config *new_cfg);
1153void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
1154void i40e_dcbnl_setup(struct i40e_vsi *vsi);
1155bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
1156 struct i40e_dcbx_config *old_cfg,
1157 struct i40e_dcbx_config *new_cfg);
1158int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg);
1159int i40e_dcb_sw_default_config(struct i40e_pf *pf);
1160#endif /* CONFIG_I40E_DCB */
1161void i40e_ptp_rx_hang(struct i40e_pf *pf);
1162void i40e_ptp_tx_hang(struct i40e_pf *pf);
1163void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
1164void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
1165void i40e_ptp_set_increment(struct i40e_pf *pf);
1166int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
1167int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
1168void i40e_ptp_save_hw_time(struct i40e_pf *pf);
1169void i40e_ptp_restore_hw_time(struct i40e_pf *pf);
1170void i40e_ptp_init(struct i40e_pf *pf);
1171void i40e_ptp_stop(struct i40e_pf *pf);
1172int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
1173i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf);
1174i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf);
1175i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf);
1176void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
1177
1178void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags);
1179
1180static inline bool i40e_enabled_xdp_vsi(struct i40e_vsi *vsi)
1181{
1182 return !!READ_ONCE(vsi->xdp_prog);
1183}
1184
1185int i40e_create_queue_channel(struct i40e_vsi *vsi, struct i40e_channel *ch);
1186int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate);
1187int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
1188 struct i40e_cloud_filter *filter,
1189 bool add);
1190int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
1191 struct i40e_cloud_filter *filter,
1192 bool add);
1193#endif /* _I40E_H_ */