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1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33#include <linux/kernel.h>
34#include <linux/moduleparam.h>
35#include <linux/pwm.h>
36#include "intel_drv.h"
37
38#define CRC_PMIC_PWM_PERIOD_NS 21333
39
40void
41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
42 struct drm_display_mode *adjusted_mode)
43{
44 drm_mode_copy(adjusted_mode, fixed_mode);
45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
47}
48
49/**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev: drm device
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58struct drm_display_mode *
59intel_find_panel_downclock(struct drm_device *dev,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62{
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(dev, tmp_mode);
98 else
99 return NULL;
100}
101
102/* adjusted_mode has been preset to be the panel's fixed mode */
103void
104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
105 struct intel_crtc_state *pipe_config,
106 int fitting_mode)
107{
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
110
111 /* Native modes don't need fitting */
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
127 u32 scaled_width = adjusted_mode->crtc_hdisplay
128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
130 * adjusted_mode->crtc_vdisplay;
131 if (scaled_width > scaled_height) { /* pillar */
132 width = scaled_height / pipe_config->pipe_src_h;
133 if (width & 1)
134 width++;
135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
136 y = 0;
137 height = adjusted_mode->crtc_vdisplay;
138 } else if (scaled_width < scaled_height) { /* letter */
139 height = scaled_width / pipe_config->pipe_src_w;
140 if (height & 1)
141 height++;
142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
143 x = 0;
144 width = adjusted_mode->crtc_hdisplay;
145 } else {
146 x = y = 0;
147 width = adjusted_mode->crtc_hdisplay;
148 height = adjusted_mode->crtc_vdisplay;
149 }
150 }
151 break;
152
153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
155 width = adjusted_mode->crtc_hdisplay;
156 height = adjusted_mode->crtc_vdisplay;
157 break;
158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
162 }
163
164done:
165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
168}
169
170static void
171centre_horizontally(struct drm_display_mode *adjusted_mode,
172 int width)
173{
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
183
184 adjusted_mode->crtc_hdisplay = width;
185 adjusted_mode->crtc_hblank_start = width + border;
186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
187
188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
190}
191
192static void
193centre_vertically(struct drm_display_mode *adjusted_mode,
194 int height)
195{
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
201 sync_pos = (blank_width - sync_width + 1) / 2;
202
203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
204
205 adjusted_mode->crtc_vdisplay = height;
206 adjusted_mode->crtc_vblank_start = height + border;
207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
208
209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
211}
212
213static inline u32 panel_fitter_scaling(u32 source, u32 target)
214{
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220#define ACCURACY 12
221#define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224}
225
226static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
227 u32 *pfit_control)
228{
229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
230 u32 scaled_width = adjusted_mode->crtc_hdisplay *
231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
233 adjusted_mode->crtc_vdisplay;
234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244}
245
246static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249{
250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
251 u32 scaled_width = adjusted_mode->crtc_hdisplay *
252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
254 adjusted_mode->crtc_vdisplay;
255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
270 adjusted_mode->crtc_vdisplay);
271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
286 adjusted_mode->crtc_hdisplay);
287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301}
302
303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
304 struct intel_crtc_state *pipe_config,
305 int fitting_mode)
306{
307 struct drm_device *dev = intel_crtc->base.dev;
308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
310
311 /* Native modes don't need fitting */
312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
314 goto out;
315
316 switch (fitting_mode) {
317 case DRM_MODE_SCALE_CENTER:
318 /*
319 * For centered modes, we have to calculate border widths &
320 * heights and modify the values programmed into the CRTC.
321 */
322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
324 border = LVDS_BORDER_ENABLE;
325 break;
326 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the aspect ratio */
328 if (INTEL_INFO(dev)->gen >= 4)
329 i965_scale_aspect(pipe_config, &pfit_control);
330 else
331 i9xx_scale_aspect(pipe_config, &pfit_control,
332 &pfit_pgm_ratios, &border);
333 break;
334 case DRM_MODE_SCALE_FULLSCREEN:
335 /*
336 * Full scaling, even if it changes the aspect ratio.
337 * Fortunately this is all done for us in hw.
338 */
339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
341 pfit_control |= PFIT_ENABLE;
342 if (INTEL_INFO(dev)->gen >= 4)
343 pfit_control |= PFIT_SCALING_AUTO;
344 else
345 pfit_control |= (VERT_AUTO_SCALE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_AUTO_SCALE |
348 HORIZ_INTERP_BILINEAR);
349 }
350 break;
351 default:
352 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
353 return;
354 }
355
356 /* 965+ wants fuzzy fitting */
357 /* FIXME: handle multiple panels by failing gracefully */
358 if (INTEL_INFO(dev)->gen >= 4)
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
360 PFIT_FILTER_FUZZY);
361
362out:
363 if ((pfit_control & PFIT_ENABLE) == 0) {
364 pfit_control = 0;
365 pfit_pgm_ratios = 0;
366 }
367
368 /* Make sure pre-965 set dither correctly for 18bpp panels. */
369 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
372 pipe_config->gmch_pfit.control = pfit_control;
373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
374 pipe_config->gmch_pfit.lvds_border_bits = border;
375}
376
377enum drm_connector_status
378intel_panel_detect(struct drm_device *dev)
379{
380 struct drm_i915_private *dev_priv = dev->dev_private;
381
382 /* Assume that the BIOS does not lie through the OpRegion... */
383 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
384 return *dev_priv->opregion.lid_state & 0x1 ?
385 connector_status_connected :
386 connector_status_disconnected;
387 }
388
389 switch (i915.panel_ignore_lid) {
390 case -2:
391 return connector_status_connected;
392 case -1:
393 return connector_status_disconnected;
394 default:
395 return connector_status_unknown;
396 }
397}
398
399/**
400 * scale - scale values from one range to another
401 *
402 * @source_val: value in range [@source_min..@source_max]
403 *
404 * Return @source_val in range [@source_min..@source_max] scaled to range
405 * [@target_min..@target_max].
406 */
407static uint32_t scale(uint32_t source_val,
408 uint32_t source_min, uint32_t source_max,
409 uint32_t target_min, uint32_t target_max)
410{
411 uint64_t target_val;
412
413 WARN_ON(source_min > source_max);
414 WARN_ON(target_min > target_max);
415
416 /* defensive */
417 source_val = clamp(source_val, source_min, source_max);
418
419 /* avoid overflows */
420 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
421 (target_max - target_min), source_max - source_min);
422 target_val += target_min;
423
424 return target_val;
425}
426
427/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
428static inline u32 scale_user_to_hw(struct intel_connector *connector,
429 u32 user_level, u32 user_max)
430{
431 struct intel_panel *panel = &connector->panel;
432
433 return scale(user_level, 0, user_max,
434 panel->backlight.min, panel->backlight.max);
435}
436
437/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
438 * to [hw_min..hw_max]. */
439static inline u32 clamp_user_to_hw(struct intel_connector *connector,
440 u32 user_level, u32 user_max)
441{
442 struct intel_panel *panel = &connector->panel;
443 u32 hw_level;
444
445 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
446 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
447
448 return hw_level;
449}
450
451/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
452static inline u32 scale_hw_to_user(struct intel_connector *connector,
453 u32 hw_level, u32 user_max)
454{
455 struct intel_panel *panel = &connector->panel;
456
457 return scale(hw_level, panel->backlight.min, panel->backlight.max,
458 0, user_max);
459}
460
461static u32 intel_panel_compute_brightness(struct intel_connector *connector,
462 u32 val)
463{
464 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
465 struct intel_panel *panel = &connector->panel;
466
467 WARN_ON(panel->backlight.max == 0);
468
469 if (i915.invert_brightness < 0)
470 return val;
471
472 if (i915.invert_brightness > 0 ||
473 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
474 return panel->backlight.max - val;
475 }
476
477 return val;
478}
479
480static u32 lpt_get_backlight(struct intel_connector *connector)
481{
482 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
483
484 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
485}
486
487static u32 pch_get_backlight(struct intel_connector *connector)
488{
489 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
490
491 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
492}
493
494static u32 i9xx_get_backlight(struct intel_connector *connector)
495{
496 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
497 struct intel_panel *panel = &connector->panel;
498 u32 val;
499
500 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
501 if (INTEL_INFO(dev_priv)->gen < 4)
502 val >>= 1;
503
504 if (panel->backlight.combination_mode) {
505 u8 lbpc;
506
507 pci_read_config_byte(dev_priv->dev->pdev, PCI_LBPC, &lbpc);
508 val *= lbpc;
509 }
510
511 return val;
512}
513
514static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
515{
516 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
517 return 0;
518
519 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
520}
521
522static u32 vlv_get_backlight(struct intel_connector *connector)
523{
524 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
525 enum pipe pipe = intel_get_pipe_from_connector(connector);
526
527 return _vlv_get_backlight(dev_priv, pipe);
528}
529
530static u32 bxt_get_backlight(struct intel_connector *connector)
531{
532 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
533 struct intel_panel *panel = &connector->panel;
534
535 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
536}
537
538static u32 pwm_get_backlight(struct intel_connector *connector)
539{
540 struct intel_panel *panel = &connector->panel;
541 int duty_ns;
542
543 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
544 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
545}
546
547static u32 intel_panel_get_backlight(struct intel_connector *connector)
548{
549 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
550 struct intel_panel *panel = &connector->panel;
551 u32 val = 0;
552
553 mutex_lock(&dev_priv->backlight_lock);
554
555 if (panel->backlight.enabled) {
556 val = panel->backlight.get(connector);
557 val = intel_panel_compute_brightness(connector, val);
558 }
559
560 mutex_unlock(&dev_priv->backlight_lock);
561
562 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
563 return val;
564}
565
566static void lpt_set_backlight(struct intel_connector *connector, u32 level)
567{
568 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
569 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
570 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
571}
572
573static void pch_set_backlight(struct intel_connector *connector, u32 level)
574{
575 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
576 u32 tmp;
577
578 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
579 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
580}
581
582static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
583{
584 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
585 struct intel_panel *panel = &connector->panel;
586 u32 tmp, mask;
587
588 WARN_ON(panel->backlight.max == 0);
589
590 if (panel->backlight.combination_mode) {
591 u8 lbpc;
592
593 lbpc = level * 0xfe / panel->backlight.max + 1;
594 level /= lbpc;
595 pci_write_config_byte(dev_priv->dev->pdev, PCI_LBPC, lbpc);
596 }
597
598 if (IS_GEN4(dev_priv)) {
599 mask = BACKLIGHT_DUTY_CYCLE_MASK;
600 } else {
601 level <<= 1;
602 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
603 }
604
605 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
606 I915_WRITE(BLC_PWM_CTL, tmp | level);
607}
608
609static void vlv_set_backlight(struct intel_connector *connector, u32 level)
610{
611 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
612 enum pipe pipe = intel_get_pipe_from_connector(connector);
613 u32 tmp;
614
615 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
616 return;
617
618 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
619 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
620}
621
622static void bxt_set_backlight(struct intel_connector *connector, u32 level)
623{
624 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
625 struct intel_panel *panel = &connector->panel;
626
627 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
628}
629
630static void pwm_set_backlight(struct intel_connector *connector, u32 level)
631{
632 struct intel_panel *panel = &connector->panel;
633 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
634
635 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
636}
637
638static void
639intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
640{
641 struct intel_panel *panel = &connector->panel;
642
643 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
644
645 level = intel_panel_compute_brightness(connector, level);
646 panel->backlight.set(connector, level);
647}
648
649/* set backlight brightness to level in range [0..max], scaling wrt hw min */
650static void intel_panel_set_backlight(struct intel_connector *connector,
651 u32 user_level, u32 user_max)
652{
653 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
654 struct intel_panel *panel = &connector->panel;
655 u32 hw_level;
656
657 if (!panel->backlight.present)
658 return;
659
660 mutex_lock(&dev_priv->backlight_lock);
661
662 WARN_ON(panel->backlight.max == 0);
663
664 hw_level = scale_user_to_hw(connector, user_level, user_max);
665 panel->backlight.level = hw_level;
666
667 if (panel->backlight.enabled)
668 intel_panel_actually_set_backlight(connector, hw_level);
669
670 mutex_unlock(&dev_priv->backlight_lock);
671}
672
673/* set backlight brightness to level in range [0..max], assuming hw min is
674 * respected.
675 */
676void intel_panel_set_backlight_acpi(struct intel_connector *connector,
677 u32 user_level, u32 user_max)
678{
679 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
680 struct intel_panel *panel = &connector->panel;
681 enum pipe pipe = intel_get_pipe_from_connector(connector);
682 u32 hw_level;
683
684 /*
685 * INVALID_PIPE may occur during driver init because
686 * connection_mutex isn't held across the entire backlight
687 * setup + modeset readout, and the BIOS can issue the
688 * requests at any time.
689 */
690 if (!panel->backlight.present || pipe == INVALID_PIPE)
691 return;
692
693 mutex_lock(&dev_priv->backlight_lock);
694
695 WARN_ON(panel->backlight.max == 0);
696
697 hw_level = clamp_user_to_hw(connector, user_level, user_max);
698 panel->backlight.level = hw_level;
699
700 if (panel->backlight.device)
701 panel->backlight.device->props.brightness =
702 scale_hw_to_user(connector,
703 panel->backlight.level,
704 panel->backlight.device->props.max_brightness);
705
706 if (panel->backlight.enabled)
707 intel_panel_actually_set_backlight(connector, hw_level);
708
709 mutex_unlock(&dev_priv->backlight_lock);
710}
711
712static void lpt_disable_backlight(struct intel_connector *connector)
713{
714 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
715 u32 tmp;
716
717 intel_panel_actually_set_backlight(connector, 0);
718
719 /*
720 * Although we don't support or enable CPU PWM with LPT/SPT based
721 * systems, it may have been enabled prior to loading the
722 * driver. Disable to avoid warnings on LCPLL disable.
723 *
724 * This needs rework if we need to add support for CPU PWM on PCH split
725 * platforms.
726 */
727 tmp = I915_READ(BLC_PWM_CPU_CTL2);
728 if (tmp & BLM_PWM_ENABLE) {
729 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
730 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
731 }
732
733 tmp = I915_READ(BLC_PWM_PCH_CTL1);
734 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
735}
736
737static void pch_disable_backlight(struct intel_connector *connector)
738{
739 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
740 u32 tmp;
741
742 intel_panel_actually_set_backlight(connector, 0);
743
744 tmp = I915_READ(BLC_PWM_CPU_CTL2);
745 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
746
747 tmp = I915_READ(BLC_PWM_PCH_CTL1);
748 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
749}
750
751static void i9xx_disable_backlight(struct intel_connector *connector)
752{
753 intel_panel_actually_set_backlight(connector, 0);
754}
755
756static void i965_disable_backlight(struct intel_connector *connector)
757{
758 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
759 u32 tmp;
760
761 intel_panel_actually_set_backlight(connector, 0);
762
763 tmp = I915_READ(BLC_PWM_CTL2);
764 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
765}
766
767static void vlv_disable_backlight(struct intel_connector *connector)
768{
769 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
770 enum pipe pipe = intel_get_pipe_from_connector(connector);
771 u32 tmp;
772
773 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
774 return;
775
776 intel_panel_actually_set_backlight(connector, 0);
777
778 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
779 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
780}
781
782static void bxt_disable_backlight(struct intel_connector *connector)
783{
784 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
785 struct intel_panel *panel = &connector->panel;
786 u32 tmp, val;
787
788 intel_panel_actually_set_backlight(connector, 0);
789
790 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
791 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
792 tmp & ~BXT_BLC_PWM_ENABLE);
793
794 if (panel->backlight.controller == 1) {
795 val = I915_READ(UTIL_PIN_CTL);
796 val &= ~UTIL_PIN_ENABLE;
797 I915_WRITE(UTIL_PIN_CTL, val);
798 }
799}
800
801static void pwm_disable_backlight(struct intel_connector *connector)
802{
803 struct intel_panel *panel = &connector->panel;
804
805 /* Disable the backlight */
806 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
807 usleep_range(2000, 3000);
808 pwm_disable(panel->backlight.pwm);
809}
810
811void intel_panel_disable_backlight(struct intel_connector *connector)
812{
813 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
814 struct intel_panel *panel = &connector->panel;
815
816 if (!panel->backlight.present)
817 return;
818
819 /*
820 * Do not disable backlight on the vga_switcheroo path. When switching
821 * away from i915, the other client may depend on i915 to handle the
822 * backlight. This will leave the backlight on unnecessarily when
823 * another client is not activated.
824 */
825 if (dev_priv->dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
826 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
827 return;
828 }
829
830 mutex_lock(&dev_priv->backlight_lock);
831
832 if (panel->backlight.device)
833 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
834 panel->backlight.enabled = false;
835 panel->backlight.disable(connector);
836
837 mutex_unlock(&dev_priv->backlight_lock);
838}
839
840static void lpt_enable_backlight(struct intel_connector *connector)
841{
842 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
843 struct intel_panel *panel = &connector->panel;
844 u32 pch_ctl1, pch_ctl2;
845
846 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
847 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
848 DRM_DEBUG_KMS("pch backlight already enabled\n");
849 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
850 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
851 }
852
853 pch_ctl2 = panel->backlight.max << 16;
854 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
855
856 pch_ctl1 = 0;
857 if (panel->backlight.active_low_pwm)
858 pch_ctl1 |= BLM_PCH_POLARITY;
859
860 /* After LPT, override is the default. */
861 if (HAS_PCH_LPT(dev_priv))
862 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
863
864 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
865 POSTING_READ(BLC_PWM_PCH_CTL1);
866 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
867
868 /* This won't stick until the above enable. */
869 intel_panel_actually_set_backlight(connector, panel->backlight.level);
870}
871
872static void pch_enable_backlight(struct intel_connector *connector)
873{
874 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
875 struct intel_panel *panel = &connector->panel;
876 enum pipe pipe = intel_get_pipe_from_connector(connector);
877 enum transcoder cpu_transcoder =
878 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
879 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
880
881 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
882 if (cpu_ctl2 & BLM_PWM_ENABLE) {
883 DRM_DEBUG_KMS("cpu backlight already enabled\n");
884 cpu_ctl2 &= ~BLM_PWM_ENABLE;
885 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
886 }
887
888 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
889 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
890 DRM_DEBUG_KMS("pch backlight already enabled\n");
891 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
892 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
893 }
894
895 if (cpu_transcoder == TRANSCODER_EDP)
896 cpu_ctl2 = BLM_TRANSCODER_EDP;
897 else
898 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
899 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
900 POSTING_READ(BLC_PWM_CPU_CTL2);
901 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
902
903 /* This won't stick until the above enable. */
904 intel_panel_actually_set_backlight(connector, panel->backlight.level);
905
906 pch_ctl2 = panel->backlight.max << 16;
907 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
908
909 pch_ctl1 = 0;
910 if (panel->backlight.active_low_pwm)
911 pch_ctl1 |= BLM_PCH_POLARITY;
912
913 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
914 POSTING_READ(BLC_PWM_PCH_CTL1);
915 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
916}
917
918static void i9xx_enable_backlight(struct intel_connector *connector)
919{
920 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
921 struct intel_panel *panel = &connector->panel;
922 u32 ctl, freq;
923
924 ctl = I915_READ(BLC_PWM_CTL);
925 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
926 DRM_DEBUG_KMS("backlight already enabled\n");
927 I915_WRITE(BLC_PWM_CTL, 0);
928 }
929
930 freq = panel->backlight.max;
931 if (panel->backlight.combination_mode)
932 freq /= 0xff;
933
934 ctl = freq << 17;
935 if (panel->backlight.combination_mode)
936 ctl |= BLM_LEGACY_MODE;
937 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
938 ctl |= BLM_POLARITY_PNV;
939
940 I915_WRITE(BLC_PWM_CTL, ctl);
941 POSTING_READ(BLC_PWM_CTL);
942
943 /* XXX: combine this into above write? */
944 intel_panel_actually_set_backlight(connector, panel->backlight.level);
945
946 /*
947 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
948 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
949 * that has backlight.
950 */
951 if (IS_GEN2(dev_priv))
952 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
953}
954
955static void i965_enable_backlight(struct intel_connector *connector)
956{
957 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
958 struct intel_panel *panel = &connector->panel;
959 enum pipe pipe = intel_get_pipe_from_connector(connector);
960 u32 ctl, ctl2, freq;
961
962 ctl2 = I915_READ(BLC_PWM_CTL2);
963 if (ctl2 & BLM_PWM_ENABLE) {
964 DRM_DEBUG_KMS("backlight already enabled\n");
965 ctl2 &= ~BLM_PWM_ENABLE;
966 I915_WRITE(BLC_PWM_CTL2, ctl2);
967 }
968
969 freq = panel->backlight.max;
970 if (panel->backlight.combination_mode)
971 freq /= 0xff;
972
973 ctl = freq << 16;
974 I915_WRITE(BLC_PWM_CTL, ctl);
975
976 ctl2 = BLM_PIPE(pipe);
977 if (panel->backlight.combination_mode)
978 ctl2 |= BLM_COMBINATION_MODE;
979 if (panel->backlight.active_low_pwm)
980 ctl2 |= BLM_POLARITY_I965;
981 I915_WRITE(BLC_PWM_CTL2, ctl2);
982 POSTING_READ(BLC_PWM_CTL2);
983 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
984
985 intel_panel_actually_set_backlight(connector, panel->backlight.level);
986}
987
988static void vlv_enable_backlight(struct intel_connector *connector)
989{
990 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
991 struct intel_panel *panel = &connector->panel;
992 enum pipe pipe = intel_get_pipe_from_connector(connector);
993 u32 ctl, ctl2;
994
995 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
996 return;
997
998 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
999 if (ctl2 & BLM_PWM_ENABLE) {
1000 DRM_DEBUG_KMS("backlight already enabled\n");
1001 ctl2 &= ~BLM_PWM_ENABLE;
1002 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1003 }
1004
1005 ctl = panel->backlight.max << 16;
1006 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1007
1008 /* XXX: combine this into above write? */
1009 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1010
1011 ctl2 = 0;
1012 if (panel->backlight.active_low_pwm)
1013 ctl2 |= BLM_POLARITY_I965;
1014 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1015 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1016 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1017}
1018
1019static void bxt_enable_backlight(struct intel_connector *connector)
1020{
1021 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1022 struct intel_panel *panel = &connector->panel;
1023 enum pipe pipe = intel_get_pipe_from_connector(connector);
1024 u32 pwm_ctl, val;
1025
1026 /* To use 2nd set of backlight registers, utility pin has to be
1027 * enabled with PWM mode.
1028 * The field should only be changed when the utility pin is disabled
1029 */
1030 if (panel->backlight.controller == 1) {
1031 val = I915_READ(UTIL_PIN_CTL);
1032 if (val & UTIL_PIN_ENABLE) {
1033 DRM_DEBUG_KMS("util pin already enabled\n");
1034 val &= ~UTIL_PIN_ENABLE;
1035 I915_WRITE(UTIL_PIN_CTL, val);
1036 }
1037
1038 val = 0;
1039 if (panel->backlight.util_pin_active_low)
1040 val |= UTIL_PIN_POLARITY;
1041 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1042 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1043 }
1044
1045 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1046 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1047 DRM_DEBUG_KMS("backlight already enabled\n");
1048 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1049 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1050 pwm_ctl);
1051 }
1052
1053 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1054 panel->backlight.max);
1055
1056 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1057
1058 pwm_ctl = 0;
1059 if (panel->backlight.active_low_pwm)
1060 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1061
1062 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1063 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1064 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1065 pwm_ctl | BXT_BLC_PWM_ENABLE);
1066}
1067
1068static void pwm_enable_backlight(struct intel_connector *connector)
1069{
1070 struct intel_panel *panel = &connector->panel;
1071
1072 pwm_enable(panel->backlight.pwm);
1073 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1074}
1075
1076void intel_panel_enable_backlight(struct intel_connector *connector)
1077{
1078 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1079 struct intel_panel *panel = &connector->panel;
1080 enum pipe pipe = intel_get_pipe_from_connector(connector);
1081
1082 if (!panel->backlight.present)
1083 return;
1084
1085 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1086
1087 mutex_lock(&dev_priv->backlight_lock);
1088
1089 WARN_ON(panel->backlight.max == 0);
1090
1091 if (panel->backlight.level <= panel->backlight.min) {
1092 panel->backlight.level = panel->backlight.max;
1093 if (panel->backlight.device)
1094 panel->backlight.device->props.brightness =
1095 scale_hw_to_user(connector,
1096 panel->backlight.level,
1097 panel->backlight.device->props.max_brightness);
1098 }
1099
1100 panel->backlight.enable(connector);
1101 panel->backlight.enabled = true;
1102 if (panel->backlight.device)
1103 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1104
1105 mutex_unlock(&dev_priv->backlight_lock);
1106}
1107
1108#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1109static int intel_backlight_device_update_status(struct backlight_device *bd)
1110{
1111 struct intel_connector *connector = bl_get_data(bd);
1112 struct intel_panel *panel = &connector->panel;
1113 struct drm_device *dev = connector->base.dev;
1114
1115 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1116 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1117 bd->props.brightness, bd->props.max_brightness);
1118 intel_panel_set_backlight(connector, bd->props.brightness,
1119 bd->props.max_brightness);
1120
1121 /*
1122 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1123 * backlight class device does not make it easy to to differentiate
1124 * between callbacks for brightness and bl_power, so our backlight_power
1125 * callback needs to take this into account.
1126 */
1127 if (panel->backlight.enabled) {
1128 if (panel->backlight.power) {
1129 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1130 bd->props.brightness != 0;
1131 panel->backlight.power(connector, enable);
1132 }
1133 } else {
1134 bd->props.power = FB_BLANK_POWERDOWN;
1135 }
1136
1137 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1138 return 0;
1139}
1140
1141static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1142{
1143 struct intel_connector *connector = bl_get_data(bd);
1144 struct drm_device *dev = connector->base.dev;
1145 struct drm_i915_private *dev_priv = dev->dev_private;
1146 u32 hw_level;
1147 int ret;
1148
1149 intel_runtime_pm_get(dev_priv);
1150 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1151
1152 hw_level = intel_panel_get_backlight(connector);
1153 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1154
1155 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1156 intel_runtime_pm_put(dev_priv);
1157
1158 return ret;
1159}
1160
1161static const struct backlight_ops intel_backlight_device_ops = {
1162 .update_status = intel_backlight_device_update_status,
1163 .get_brightness = intel_backlight_device_get_brightness,
1164};
1165
1166static int intel_backlight_device_register(struct intel_connector *connector)
1167{
1168 struct intel_panel *panel = &connector->panel;
1169 struct backlight_properties props;
1170
1171 if (WARN_ON(panel->backlight.device))
1172 return -ENODEV;
1173
1174 if (!panel->backlight.present)
1175 return 0;
1176
1177 WARN_ON(panel->backlight.max == 0);
1178
1179 memset(&props, 0, sizeof(props));
1180 props.type = BACKLIGHT_RAW;
1181
1182 /*
1183 * Note: Everything should work even if the backlight device max
1184 * presented to the userspace is arbitrarily chosen.
1185 */
1186 props.max_brightness = panel->backlight.max;
1187 props.brightness = scale_hw_to_user(connector,
1188 panel->backlight.level,
1189 props.max_brightness);
1190
1191 if (panel->backlight.enabled)
1192 props.power = FB_BLANK_UNBLANK;
1193 else
1194 props.power = FB_BLANK_POWERDOWN;
1195
1196 /*
1197 * Note: using the same name independent of the connector prevents
1198 * registration of multiple backlight devices in the driver.
1199 */
1200 panel->backlight.device =
1201 backlight_device_register("intel_backlight",
1202 connector->base.kdev,
1203 connector,
1204 &intel_backlight_device_ops, &props);
1205
1206 if (IS_ERR(panel->backlight.device)) {
1207 DRM_ERROR("Failed to register backlight: %ld\n",
1208 PTR_ERR(panel->backlight.device));
1209 panel->backlight.device = NULL;
1210 return -ENODEV;
1211 }
1212
1213 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1214 connector->base.name);
1215
1216 return 0;
1217}
1218
1219static void intel_backlight_device_unregister(struct intel_connector *connector)
1220{
1221 struct intel_panel *panel = &connector->panel;
1222
1223 if (panel->backlight.device) {
1224 backlight_device_unregister(panel->backlight.device);
1225 panel->backlight.device = NULL;
1226 }
1227}
1228#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1229static int intel_backlight_device_register(struct intel_connector *connector)
1230{
1231 return 0;
1232}
1233static void intel_backlight_device_unregister(struct intel_connector *connector)
1234{
1235}
1236#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1237
1238/*
1239 * BXT: PWM clock frequency = 19.2 MHz.
1240 */
1241static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1242{
1243 return KHz(19200) / pwm_freq_hz;
1244}
1245
1246/*
1247 * SPT: This value represents the period of the PWM stream in clock periods
1248 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1249 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1250 */
1251static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1252{
1253 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1254 u32 mul, clock;
1255
1256 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
1257 mul = 128;
1258 else
1259 mul = 16;
1260
1261 clock = MHz(24);
1262
1263 return clock / (pwm_freq_hz * mul);
1264}
1265
1266/*
1267 * LPT: This value represents the period of the PWM stream in clock periods
1268 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1269 * LPT SOUTH_CHICKEN2 register bit 5).
1270 */
1271static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1272{
1273 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1274 u32 mul, clock;
1275
1276 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
1277 mul = 16;
1278 else
1279 mul = 128;
1280
1281 if (HAS_PCH_LPT_H(dev_priv))
1282 clock = MHz(135); /* LPT:H */
1283 else
1284 clock = MHz(24); /* LPT:LP */
1285
1286 return clock / (pwm_freq_hz * mul);
1287}
1288
1289/*
1290 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1291 * display raw clocks multiplied by 128.
1292 */
1293static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1294{
1295 struct drm_device *dev = connector->base.dev;
1296 int clock = MHz(intel_pch_rawclk(dev));
1297
1298 return clock / (pwm_freq_hz * 128);
1299}
1300
1301/*
1302 * Gen2: This field determines the number of time base events (display core
1303 * clock frequency/32) in total for a complete cycle of modulated backlight
1304 * control.
1305 *
1306 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1307 * divided by 32.
1308 */
1309static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1310{
1311 struct drm_device *dev = connector->base.dev;
1312 struct drm_i915_private *dev_priv = dev->dev_private;
1313 int clock;
1314
1315 if (IS_PINEVIEW(dev))
1316 clock = MHz(intel_hrawclk(dev));
1317 else
1318 clock = 1000 * dev_priv->cdclk_freq;
1319
1320 return clock / (pwm_freq_hz * 32);
1321}
1322
1323/*
1324 * Gen4: This value represents the period of the PWM stream in display core
1325 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1326 *
1327 */
1328static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1329{
1330 struct drm_device *dev = connector->base.dev;
1331 struct drm_i915_private *dev_priv = dev->dev_private;
1332 int clock;
1333
1334 if (IS_G4X(dev_priv))
1335 clock = MHz(intel_hrawclk(dev));
1336 else
1337 clock = 1000 * dev_priv->cdclk_freq;
1338
1339 return clock / (pwm_freq_hz * 128);
1340}
1341
1342/*
1343 * VLV: This value represents the period of the PWM stream in display core
1344 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1345 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1346 */
1347static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1348{
1349 struct drm_device *dev = connector->base.dev;
1350 struct drm_i915_private *dev_priv = dev->dev_private;
1351 int clock;
1352
1353 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1354 if (IS_CHERRYVIEW(dev))
1355 return KHz(19200) / (pwm_freq_hz * 16);
1356 else
1357 return MHz(25) / (pwm_freq_hz * 16);
1358 } else {
1359 clock = intel_hrawclk(dev);
1360 return MHz(clock) / (pwm_freq_hz * 128);
1361 }
1362}
1363
1364static u32 get_backlight_max_vbt(struct intel_connector *connector)
1365{
1366 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1367 struct intel_panel *panel = &connector->panel;
1368 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1369 u32 pwm;
1370
1371 if (!panel->backlight.hz_to_pwm) {
1372 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1373 return 0;
1374 }
1375
1376 if (pwm_freq_hz) {
1377 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1378 pwm_freq_hz);
1379 } else {
1380 pwm_freq_hz = 200;
1381 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1382 pwm_freq_hz);
1383 }
1384
1385 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1386 if (!pwm) {
1387 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1388 return 0;
1389 }
1390
1391 return pwm;
1392}
1393
1394/*
1395 * Note: The setup hooks can't assume pipe is set!
1396 */
1397static u32 get_backlight_min_vbt(struct intel_connector *connector)
1398{
1399 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1400 struct intel_panel *panel = &connector->panel;
1401 int min;
1402
1403 WARN_ON(panel->backlight.max == 0);
1404
1405 /*
1406 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1407 * to problems. There are such machines out there. Either our
1408 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1409 * against this by letting the minimum be at most (arbitrarily chosen)
1410 * 25% of the max.
1411 */
1412 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1413 if (min != dev_priv->vbt.backlight.min_brightness) {
1414 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1415 dev_priv->vbt.backlight.min_brightness, min);
1416 }
1417
1418 /* vbt value is a coefficient in range [0..255] */
1419 return scale(min, 0, 255, 0, panel->backlight.max);
1420}
1421
1422static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1423{
1424 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1425 struct intel_panel *panel = &connector->panel;
1426 u32 pch_ctl1, pch_ctl2, val;
1427
1428 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1429 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1430
1431 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1432 panel->backlight.max = pch_ctl2 >> 16;
1433
1434 if (!panel->backlight.max)
1435 panel->backlight.max = get_backlight_max_vbt(connector);
1436
1437 if (!panel->backlight.max)
1438 return -ENODEV;
1439
1440 panel->backlight.min = get_backlight_min_vbt(connector);
1441
1442 val = lpt_get_backlight(connector);
1443 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1444
1445 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1446 panel->backlight.level != 0;
1447
1448 return 0;
1449}
1450
1451static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1452{
1453 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1454 struct intel_panel *panel = &connector->panel;
1455 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1456
1457 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1458 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1459
1460 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1461 panel->backlight.max = pch_ctl2 >> 16;
1462
1463 if (!panel->backlight.max)
1464 panel->backlight.max = get_backlight_max_vbt(connector);
1465
1466 if (!panel->backlight.max)
1467 return -ENODEV;
1468
1469 panel->backlight.min = get_backlight_min_vbt(connector);
1470
1471 val = pch_get_backlight(connector);
1472 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1473
1474 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1475 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1476 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1477
1478 return 0;
1479}
1480
1481static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1482{
1483 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1484 struct intel_panel *panel = &connector->panel;
1485 u32 ctl, val;
1486
1487 ctl = I915_READ(BLC_PWM_CTL);
1488
1489 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1490 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1491
1492 if (IS_PINEVIEW(dev_priv))
1493 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1494
1495 panel->backlight.max = ctl >> 17;
1496
1497 if (!panel->backlight.max) {
1498 panel->backlight.max = get_backlight_max_vbt(connector);
1499 panel->backlight.max >>= 1;
1500 }
1501
1502 if (!panel->backlight.max)
1503 return -ENODEV;
1504
1505 if (panel->backlight.combination_mode)
1506 panel->backlight.max *= 0xff;
1507
1508 panel->backlight.min = get_backlight_min_vbt(connector);
1509
1510 val = i9xx_get_backlight(connector);
1511 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1512
1513 panel->backlight.enabled = panel->backlight.level != 0;
1514
1515 return 0;
1516}
1517
1518static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1519{
1520 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1521 struct intel_panel *panel = &connector->panel;
1522 u32 ctl, ctl2, val;
1523
1524 ctl2 = I915_READ(BLC_PWM_CTL2);
1525 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1526 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1527
1528 ctl = I915_READ(BLC_PWM_CTL);
1529 panel->backlight.max = ctl >> 16;
1530
1531 if (!panel->backlight.max)
1532 panel->backlight.max = get_backlight_max_vbt(connector);
1533
1534 if (!panel->backlight.max)
1535 return -ENODEV;
1536
1537 if (panel->backlight.combination_mode)
1538 panel->backlight.max *= 0xff;
1539
1540 panel->backlight.min = get_backlight_min_vbt(connector);
1541
1542 val = i9xx_get_backlight(connector);
1543 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1544
1545 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1546 panel->backlight.level != 0;
1547
1548 return 0;
1549}
1550
1551static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1552{
1553 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1554 struct intel_panel *panel = &connector->panel;
1555 u32 ctl, ctl2, val;
1556
1557 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1558 return -ENODEV;
1559
1560 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1561 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1562
1563 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1564 panel->backlight.max = ctl >> 16;
1565
1566 if (!panel->backlight.max)
1567 panel->backlight.max = get_backlight_max_vbt(connector);
1568
1569 if (!panel->backlight.max)
1570 return -ENODEV;
1571
1572 panel->backlight.min = get_backlight_min_vbt(connector);
1573
1574 val = _vlv_get_backlight(dev_priv, pipe);
1575 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1576
1577 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1578 panel->backlight.level != 0;
1579
1580 return 0;
1581}
1582
1583static int
1584bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1585{
1586 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1587 struct intel_panel *panel = &connector->panel;
1588 u32 pwm_ctl, val;
1589
1590 /*
1591 * For BXT hard coding the Backlight controller to 0.
1592 * TODO : Read the controller value from VBT and generalize
1593 */
1594 panel->backlight.controller = 0;
1595
1596 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1597
1598 /* Keeping the check if controller 1 is to be programmed.
1599 * This will come into affect once the VBT parsing
1600 * is fixed for controller selection, and controller 1 is used
1601 * for a prticular display configuration.
1602 */
1603 if (panel->backlight.controller == 1) {
1604 val = I915_READ(UTIL_PIN_CTL);
1605 panel->backlight.util_pin_active_low =
1606 val & UTIL_PIN_POLARITY;
1607 }
1608
1609 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1610 panel->backlight.max =
1611 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1612
1613 if (!panel->backlight.max)
1614 panel->backlight.max = get_backlight_max_vbt(connector);
1615
1616 if (!panel->backlight.max)
1617 return -ENODEV;
1618
1619 val = bxt_get_backlight(connector);
1620 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1621
1622 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1623 panel->backlight.level != 0;
1624
1625 return 0;
1626}
1627
1628static int pwm_setup_backlight(struct intel_connector *connector,
1629 enum pipe pipe)
1630{
1631 struct drm_device *dev = connector->base.dev;
1632 struct intel_panel *panel = &connector->panel;
1633 int retval;
1634
1635 /* Get the PWM chip for backlight control */
1636 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1637 if (IS_ERR(panel->backlight.pwm)) {
1638 DRM_ERROR("Failed to own the pwm chip\n");
1639 panel->backlight.pwm = NULL;
1640 return -ENODEV;
1641 }
1642
1643 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1644 CRC_PMIC_PWM_PERIOD_NS);
1645 if (retval < 0) {
1646 DRM_ERROR("Failed to configure the pwm chip\n");
1647 pwm_put(panel->backlight.pwm);
1648 panel->backlight.pwm = NULL;
1649 return retval;
1650 }
1651
1652 panel->backlight.min = 0; /* 0% */
1653 panel->backlight.max = 100; /* 100% */
1654 panel->backlight.level = DIV_ROUND_UP(
1655 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1656 CRC_PMIC_PWM_PERIOD_NS);
1657 panel->backlight.enabled = panel->backlight.level != 0;
1658
1659 return 0;
1660}
1661
1662int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1663{
1664 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1665 struct intel_connector *intel_connector = to_intel_connector(connector);
1666 struct intel_panel *panel = &intel_connector->panel;
1667 int ret;
1668
1669 if (!dev_priv->vbt.backlight.present) {
1670 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1671 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1672 } else {
1673 DRM_DEBUG_KMS("no backlight present per VBT\n");
1674 return 0;
1675 }
1676 }
1677
1678 /* ensure intel_panel has been initialized first */
1679 if (WARN_ON(!panel->backlight.setup))
1680 return -ENODEV;
1681
1682 /* set level and max in panel struct */
1683 mutex_lock(&dev_priv->backlight_lock);
1684 ret = panel->backlight.setup(intel_connector, pipe);
1685 mutex_unlock(&dev_priv->backlight_lock);
1686
1687 if (ret) {
1688 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1689 connector->name);
1690 return ret;
1691 }
1692
1693 panel->backlight.present = true;
1694
1695 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1696 connector->name,
1697 panel->backlight.enabled ? "enabled" : "disabled",
1698 panel->backlight.level, panel->backlight.max);
1699
1700 return 0;
1701}
1702
1703void intel_panel_destroy_backlight(struct drm_connector *connector)
1704{
1705 struct intel_connector *intel_connector = to_intel_connector(connector);
1706 struct intel_panel *panel = &intel_connector->panel;
1707
1708 /* dispose of the pwm */
1709 if (panel->backlight.pwm)
1710 pwm_put(panel->backlight.pwm);
1711
1712 panel->backlight.present = false;
1713}
1714
1715/* Set up chip specific backlight functions */
1716static void
1717intel_panel_init_backlight_funcs(struct intel_panel *panel)
1718{
1719 struct intel_connector *connector =
1720 container_of(panel, struct intel_connector, panel);
1721 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1722
1723 if (IS_BROXTON(dev_priv)) {
1724 panel->backlight.setup = bxt_setup_backlight;
1725 panel->backlight.enable = bxt_enable_backlight;
1726 panel->backlight.disable = bxt_disable_backlight;
1727 panel->backlight.set = bxt_set_backlight;
1728 panel->backlight.get = bxt_get_backlight;
1729 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1730 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv)) {
1731 panel->backlight.setup = lpt_setup_backlight;
1732 panel->backlight.enable = lpt_enable_backlight;
1733 panel->backlight.disable = lpt_disable_backlight;
1734 panel->backlight.set = lpt_set_backlight;
1735 panel->backlight.get = lpt_get_backlight;
1736 if (HAS_PCH_LPT(dev_priv))
1737 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1738 else
1739 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1740 } else if (HAS_PCH_SPLIT(dev_priv)) {
1741 panel->backlight.setup = pch_setup_backlight;
1742 panel->backlight.enable = pch_enable_backlight;
1743 panel->backlight.disable = pch_disable_backlight;
1744 panel->backlight.set = pch_set_backlight;
1745 panel->backlight.get = pch_get_backlight;
1746 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1747 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1748 if (dev_priv->vbt.has_mipi) {
1749 panel->backlight.setup = pwm_setup_backlight;
1750 panel->backlight.enable = pwm_enable_backlight;
1751 panel->backlight.disable = pwm_disable_backlight;
1752 panel->backlight.set = pwm_set_backlight;
1753 panel->backlight.get = pwm_get_backlight;
1754 } else {
1755 panel->backlight.setup = vlv_setup_backlight;
1756 panel->backlight.enable = vlv_enable_backlight;
1757 panel->backlight.disable = vlv_disable_backlight;
1758 panel->backlight.set = vlv_set_backlight;
1759 panel->backlight.get = vlv_get_backlight;
1760 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1761 }
1762 } else if (IS_GEN4(dev_priv)) {
1763 panel->backlight.setup = i965_setup_backlight;
1764 panel->backlight.enable = i965_enable_backlight;
1765 panel->backlight.disable = i965_disable_backlight;
1766 panel->backlight.set = i9xx_set_backlight;
1767 panel->backlight.get = i9xx_get_backlight;
1768 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1769 } else {
1770 panel->backlight.setup = i9xx_setup_backlight;
1771 panel->backlight.enable = i9xx_enable_backlight;
1772 panel->backlight.disable = i9xx_disable_backlight;
1773 panel->backlight.set = i9xx_set_backlight;
1774 panel->backlight.get = i9xx_get_backlight;
1775 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1776 }
1777}
1778
1779int intel_panel_init(struct intel_panel *panel,
1780 struct drm_display_mode *fixed_mode,
1781 struct drm_display_mode *downclock_mode)
1782{
1783 intel_panel_init_backlight_funcs(panel);
1784
1785 panel->fixed_mode = fixed_mode;
1786 panel->downclock_mode = downclock_mode;
1787
1788 return 0;
1789}
1790
1791void intel_panel_fini(struct intel_panel *panel)
1792{
1793 struct intel_connector *intel_connector =
1794 container_of(panel, struct intel_connector, panel);
1795
1796 if (panel->fixed_mode)
1797 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1798
1799 if (panel->downclock_mode)
1800 drm_mode_destroy(intel_connector->base.dev,
1801 panel->downclock_mode);
1802}
1803
1804void intel_backlight_register(struct drm_device *dev)
1805{
1806 struct intel_connector *connector;
1807
1808 for_each_intel_connector(dev, connector)
1809 intel_backlight_device_register(connector);
1810}
1811
1812void intel_backlight_unregister(struct drm_device *dev)
1813{
1814 struct intel_connector *connector;
1815
1816 for_each_intel_connector(dev, connector)
1817 intel_backlight_device_unregister(connector);
1818}
1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33#include <linux/kernel.h>
34#include <linux/moduleparam.h>
35#include <linux/pwm.h>
36#include "intel_drv.h"
37
38#define CRC_PMIC_PWM_PERIOD_NS 21333
39
40void
41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
42 struct drm_display_mode *adjusted_mode)
43{
44 drm_mode_copy(adjusted_mode, fixed_mode);
45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
47}
48
49/**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev_priv: i915 device instance
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58struct drm_display_mode *
59intel_find_panel_downclock(struct drm_i915_private *dev_priv,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62{
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
98 else
99 return NULL;
100}
101
102/* adjusted_mode has been preset to be the panel's fixed mode */
103void
104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
105 struct intel_crtc_state *pipe_config,
106 int fitting_mode)
107{
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
110
111 /* Native modes don't need fitting */
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
114 !pipe_config->ycbcr420)
115 goto done;
116
117 switch (fitting_mode) {
118 case DRM_MODE_SCALE_CENTER:
119 width = pipe_config->pipe_src_w;
120 height = pipe_config->pipe_src_h;
121 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
122 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
123 break;
124
125 case DRM_MODE_SCALE_ASPECT:
126 /* Scale but preserve the aspect ratio */
127 {
128 u32 scaled_width = adjusted_mode->crtc_hdisplay
129 * pipe_config->pipe_src_h;
130 u32 scaled_height = pipe_config->pipe_src_w
131 * adjusted_mode->crtc_vdisplay;
132 if (scaled_width > scaled_height) { /* pillar */
133 width = scaled_height / pipe_config->pipe_src_h;
134 if (width & 1)
135 width++;
136 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
137 y = 0;
138 height = adjusted_mode->crtc_vdisplay;
139 } else if (scaled_width < scaled_height) { /* letter */
140 height = scaled_width / pipe_config->pipe_src_w;
141 if (height & 1)
142 height++;
143 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
144 x = 0;
145 width = adjusted_mode->crtc_hdisplay;
146 } else {
147 x = y = 0;
148 width = adjusted_mode->crtc_hdisplay;
149 height = adjusted_mode->crtc_vdisplay;
150 }
151 }
152 break;
153
154 case DRM_MODE_SCALE_FULLSCREEN:
155 x = y = 0;
156 width = adjusted_mode->crtc_hdisplay;
157 height = adjusted_mode->crtc_vdisplay;
158 break;
159
160 default:
161 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
162 return;
163 }
164
165done:
166 pipe_config->pch_pfit.pos = (x << 16) | y;
167 pipe_config->pch_pfit.size = (width << 16) | height;
168 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
169}
170
171static void
172centre_horizontally(struct drm_display_mode *adjusted_mode,
173 int width)
174{
175 u32 border, sync_pos, blank_width, sync_width;
176
177 /* keep the hsync and hblank widths constant */
178 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
179 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
180 sync_pos = (blank_width - sync_width + 1) / 2;
181
182 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
183 border += border & 1; /* make the border even */
184
185 adjusted_mode->crtc_hdisplay = width;
186 adjusted_mode->crtc_hblank_start = width + border;
187 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
188
189 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
190 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
191}
192
193static void
194centre_vertically(struct drm_display_mode *adjusted_mode,
195 int height)
196{
197 u32 border, sync_pos, blank_width, sync_width;
198
199 /* keep the vsync and vblank widths constant */
200 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
201 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
202 sync_pos = (blank_width - sync_width + 1) / 2;
203
204 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
205
206 adjusted_mode->crtc_vdisplay = height;
207 adjusted_mode->crtc_vblank_start = height + border;
208 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
209
210 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
211 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
212}
213
214static inline u32 panel_fitter_scaling(u32 source, u32 target)
215{
216 /*
217 * Floating point operation is not supported. So the FACTOR
218 * is defined, which can avoid the floating point computation
219 * when calculating the panel ratio.
220 */
221#define ACCURACY 12
222#define FACTOR (1 << ACCURACY)
223 u32 ratio = source * FACTOR / target;
224 return (FACTOR * ratio + FACTOR/2) / FACTOR;
225}
226
227static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
228 u32 *pfit_control)
229{
230 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
231 u32 scaled_width = adjusted_mode->crtc_hdisplay *
232 pipe_config->pipe_src_h;
233 u32 scaled_height = pipe_config->pipe_src_w *
234 adjusted_mode->crtc_vdisplay;
235
236 /* 965+ is easy, it does everything in hw */
237 if (scaled_width > scaled_height)
238 *pfit_control |= PFIT_ENABLE |
239 PFIT_SCALING_PILLAR;
240 else if (scaled_width < scaled_height)
241 *pfit_control |= PFIT_ENABLE |
242 PFIT_SCALING_LETTER;
243 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
244 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
245}
246
247static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
248 u32 *pfit_control, u32 *pfit_pgm_ratios,
249 u32 *border)
250{
251 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
252 u32 scaled_width = adjusted_mode->crtc_hdisplay *
253 pipe_config->pipe_src_h;
254 u32 scaled_height = pipe_config->pipe_src_w *
255 adjusted_mode->crtc_vdisplay;
256 u32 bits;
257
258 /*
259 * For earlier chips we have to calculate the scaling
260 * ratio by hand and program it into the
261 * PFIT_PGM_RATIO register
262 */
263 if (scaled_width > scaled_height) { /* pillar */
264 centre_horizontally(adjusted_mode,
265 scaled_height /
266 pipe_config->pipe_src_h);
267
268 *border = LVDS_BORDER_ENABLE;
269 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
270 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
271 adjusted_mode->crtc_vdisplay);
272
273 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
274 bits << PFIT_VERT_SCALE_SHIFT);
275 *pfit_control |= (PFIT_ENABLE |
276 VERT_INTERP_BILINEAR |
277 HORIZ_INTERP_BILINEAR);
278 }
279 } else if (scaled_width < scaled_height) { /* letter */
280 centre_vertically(adjusted_mode,
281 scaled_width /
282 pipe_config->pipe_src_w);
283
284 *border = LVDS_BORDER_ENABLE;
285 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
286 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
287 adjusted_mode->crtc_hdisplay);
288
289 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
290 bits << PFIT_VERT_SCALE_SHIFT);
291 *pfit_control |= (PFIT_ENABLE |
292 VERT_INTERP_BILINEAR |
293 HORIZ_INTERP_BILINEAR);
294 }
295 } else {
296 /* Aspects match, Let hw scale both directions */
297 *pfit_control |= (PFIT_ENABLE |
298 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
299 VERT_INTERP_BILINEAR |
300 HORIZ_INTERP_BILINEAR);
301 }
302}
303
304void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
305 struct intel_crtc_state *pipe_config,
306 int fitting_mode)
307{
308 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
309 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
310 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
311
312 /* Native modes don't need fitting */
313 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
314 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
315 goto out;
316
317 switch (fitting_mode) {
318 case DRM_MODE_SCALE_CENTER:
319 /*
320 * For centered modes, we have to calculate border widths &
321 * heights and modify the values programmed into the CRTC.
322 */
323 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
324 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
325 border = LVDS_BORDER_ENABLE;
326 break;
327 case DRM_MODE_SCALE_ASPECT:
328 /* Scale but preserve the aspect ratio */
329 if (INTEL_GEN(dev_priv) >= 4)
330 i965_scale_aspect(pipe_config, &pfit_control);
331 else
332 i9xx_scale_aspect(pipe_config, &pfit_control,
333 &pfit_pgm_ratios, &border);
334 break;
335 case DRM_MODE_SCALE_FULLSCREEN:
336 /*
337 * Full scaling, even if it changes the aspect ratio.
338 * Fortunately this is all done for us in hw.
339 */
340 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
341 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
342 pfit_control |= PFIT_ENABLE;
343 if (INTEL_GEN(dev_priv) >= 4)
344 pfit_control |= PFIT_SCALING_AUTO;
345 else
346 pfit_control |= (VERT_AUTO_SCALE |
347 VERT_INTERP_BILINEAR |
348 HORIZ_AUTO_SCALE |
349 HORIZ_INTERP_BILINEAR);
350 }
351 break;
352 default:
353 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
354 return;
355 }
356
357 /* 965+ wants fuzzy fitting */
358 /* FIXME: handle multiple panels by failing gracefully */
359 if (INTEL_GEN(dev_priv) >= 4)
360 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
361 PFIT_FILTER_FUZZY);
362
363out:
364 if ((pfit_control & PFIT_ENABLE) == 0) {
365 pfit_control = 0;
366 pfit_pgm_ratios = 0;
367 }
368
369 /* Make sure pre-965 set dither correctly for 18bpp panels. */
370 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
371 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
372
373 pipe_config->gmch_pfit.control = pfit_control;
374 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
375 pipe_config->gmch_pfit.lvds_border_bits = border;
376}
377
378enum drm_connector_status
379intel_panel_detect(struct drm_i915_private *dev_priv)
380{
381 /* Assume that the BIOS does not lie through the OpRegion... */
382 if (!i915_modparams.panel_ignore_lid && dev_priv->opregion.lid_state) {
383 return *dev_priv->opregion.lid_state & 0x1 ?
384 connector_status_connected :
385 connector_status_disconnected;
386 }
387
388 switch (i915_modparams.panel_ignore_lid) {
389 case -2:
390 return connector_status_connected;
391 case -1:
392 return connector_status_disconnected;
393 default:
394 return connector_status_unknown;
395 }
396}
397
398/**
399 * scale - scale values from one range to another
400 * @source_val: value in range [@source_min..@source_max]
401 * @source_min: minimum legal value for @source_val
402 * @source_max: maximum legal value for @source_val
403 * @target_min: corresponding target value for @source_min
404 * @target_max: corresponding target value for @source_max
405 *
406 * Return @source_val in range [@source_min..@source_max] scaled to range
407 * [@target_min..@target_max].
408 */
409static uint32_t scale(uint32_t source_val,
410 uint32_t source_min, uint32_t source_max,
411 uint32_t target_min, uint32_t target_max)
412{
413 uint64_t target_val;
414
415 WARN_ON(source_min > source_max);
416 WARN_ON(target_min > target_max);
417
418 /* defensive */
419 source_val = clamp(source_val, source_min, source_max);
420
421 /* avoid overflows */
422 target_val = mul_u32_u32(source_val - source_min,
423 target_max - target_min);
424 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
425 target_val += target_min;
426
427 return target_val;
428}
429
430/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
431static inline u32 scale_user_to_hw(struct intel_connector *connector,
432 u32 user_level, u32 user_max)
433{
434 struct intel_panel *panel = &connector->panel;
435
436 return scale(user_level, 0, user_max,
437 panel->backlight.min, panel->backlight.max);
438}
439
440/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
441 * to [hw_min..hw_max]. */
442static inline u32 clamp_user_to_hw(struct intel_connector *connector,
443 u32 user_level, u32 user_max)
444{
445 struct intel_panel *panel = &connector->panel;
446 u32 hw_level;
447
448 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
449 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
450
451 return hw_level;
452}
453
454/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
455static inline u32 scale_hw_to_user(struct intel_connector *connector,
456 u32 hw_level, u32 user_max)
457{
458 struct intel_panel *panel = &connector->panel;
459
460 return scale(hw_level, panel->backlight.min, panel->backlight.max,
461 0, user_max);
462}
463
464static u32 intel_panel_compute_brightness(struct intel_connector *connector,
465 u32 val)
466{
467 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
468 struct intel_panel *panel = &connector->panel;
469
470 WARN_ON(panel->backlight.max == 0);
471
472 if (i915_modparams.invert_brightness < 0)
473 return val;
474
475 if (i915_modparams.invert_brightness > 0 ||
476 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
477 return panel->backlight.max - val + panel->backlight.min;
478 }
479
480 return val;
481}
482
483static u32 lpt_get_backlight(struct intel_connector *connector)
484{
485 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
486
487 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
488}
489
490static u32 pch_get_backlight(struct intel_connector *connector)
491{
492 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
493
494 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
495}
496
497static u32 i9xx_get_backlight(struct intel_connector *connector)
498{
499 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
500 struct intel_panel *panel = &connector->panel;
501 u32 val;
502
503 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
504 if (INTEL_GEN(dev_priv) < 4)
505 val >>= 1;
506
507 if (panel->backlight.combination_mode) {
508 u8 lbpc;
509
510 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
511 val *= lbpc;
512 }
513
514 return val;
515}
516
517static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
518{
519 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
520 return 0;
521
522 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
523}
524
525static u32 vlv_get_backlight(struct intel_connector *connector)
526{
527 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
528 enum pipe pipe = intel_get_pipe_from_connector(connector);
529
530 return _vlv_get_backlight(dev_priv, pipe);
531}
532
533static u32 bxt_get_backlight(struct intel_connector *connector)
534{
535 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
536 struct intel_panel *panel = &connector->panel;
537
538 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
539}
540
541static u32 pwm_get_backlight(struct intel_connector *connector)
542{
543 struct intel_panel *panel = &connector->panel;
544 int duty_ns;
545
546 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
547 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
548}
549
550static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
551{
552 struct intel_connector *connector = to_intel_connector(conn_state->connector);
553 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
554
555 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
556 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
557}
558
559static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
560{
561 struct intel_connector *connector = to_intel_connector(conn_state->connector);
562 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
563 u32 tmp;
564
565 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
566 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
567}
568
569static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
570{
571 struct intel_connector *connector = to_intel_connector(conn_state->connector);
572 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
573 struct intel_panel *panel = &connector->panel;
574 u32 tmp, mask;
575
576 WARN_ON(panel->backlight.max == 0);
577
578 if (panel->backlight.combination_mode) {
579 u8 lbpc;
580
581 lbpc = level * 0xfe / panel->backlight.max + 1;
582 level /= lbpc;
583 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
584 }
585
586 if (IS_GEN4(dev_priv)) {
587 mask = BACKLIGHT_DUTY_CYCLE_MASK;
588 } else {
589 level <<= 1;
590 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
591 }
592
593 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
594 I915_WRITE(BLC_PWM_CTL, tmp | level);
595}
596
597static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
598{
599 struct intel_connector *connector = to_intel_connector(conn_state->connector);
600 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
601 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
602 u32 tmp;
603
604 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
605 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
606}
607
608static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
609{
610 struct intel_connector *connector = to_intel_connector(conn_state->connector);
611 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
612 struct intel_panel *panel = &connector->panel;
613
614 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
615}
616
617static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
618{
619 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
620 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
621
622 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
623}
624
625static void
626intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
627{
628 struct intel_connector *connector = to_intel_connector(conn_state->connector);
629 struct intel_panel *panel = &connector->panel;
630
631 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
632
633 level = intel_panel_compute_brightness(connector, level);
634 panel->backlight.set(conn_state, level);
635}
636
637/* set backlight brightness to level in range [0..max], assuming hw min is
638 * respected.
639 */
640void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
641 u32 user_level, u32 user_max)
642{
643 struct intel_connector *connector = to_intel_connector(conn_state->connector);
644 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
645 struct intel_panel *panel = &connector->panel;
646 u32 hw_level;
647
648 /*
649 * Lack of crtc may occur during driver init because
650 * connection_mutex isn't held across the entire backlight
651 * setup + modeset readout, and the BIOS can issue the
652 * requests at any time.
653 */
654 if (!panel->backlight.present || !conn_state->crtc)
655 return;
656
657 mutex_lock(&dev_priv->backlight_lock);
658
659 WARN_ON(panel->backlight.max == 0);
660
661 hw_level = clamp_user_to_hw(connector, user_level, user_max);
662 panel->backlight.level = hw_level;
663
664 if (panel->backlight.device)
665 panel->backlight.device->props.brightness =
666 scale_hw_to_user(connector,
667 panel->backlight.level,
668 panel->backlight.device->props.max_brightness);
669
670 if (panel->backlight.enabled)
671 intel_panel_actually_set_backlight(conn_state, hw_level);
672
673 mutex_unlock(&dev_priv->backlight_lock);
674}
675
676static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
677{
678 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
679 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
680 u32 tmp;
681
682 intel_panel_actually_set_backlight(old_conn_state, 0);
683
684 /*
685 * Although we don't support or enable CPU PWM with LPT/SPT based
686 * systems, it may have been enabled prior to loading the
687 * driver. Disable to avoid warnings on LCPLL disable.
688 *
689 * This needs rework if we need to add support for CPU PWM on PCH split
690 * platforms.
691 */
692 tmp = I915_READ(BLC_PWM_CPU_CTL2);
693 if (tmp & BLM_PWM_ENABLE) {
694 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
695 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
696 }
697
698 tmp = I915_READ(BLC_PWM_PCH_CTL1);
699 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
700}
701
702static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
703{
704 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
705 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
706 u32 tmp;
707
708 intel_panel_actually_set_backlight(old_conn_state, 0);
709
710 tmp = I915_READ(BLC_PWM_CPU_CTL2);
711 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
712
713 tmp = I915_READ(BLC_PWM_PCH_CTL1);
714 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
715}
716
717static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
718{
719 intel_panel_actually_set_backlight(old_conn_state, 0);
720}
721
722static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
723{
724 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
725 u32 tmp;
726
727 intel_panel_actually_set_backlight(old_conn_state, 0);
728
729 tmp = I915_READ(BLC_PWM_CTL2);
730 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
731}
732
733static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
734{
735 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
736 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
737 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
738 u32 tmp;
739
740 intel_panel_actually_set_backlight(old_conn_state, 0);
741
742 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
743 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
744}
745
746static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
747{
748 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
749 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
750 struct intel_panel *panel = &connector->panel;
751 u32 tmp, val;
752
753 intel_panel_actually_set_backlight(old_conn_state, 0);
754
755 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
756 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
757 tmp & ~BXT_BLC_PWM_ENABLE);
758
759 if (panel->backlight.controller == 1) {
760 val = I915_READ(UTIL_PIN_CTL);
761 val &= ~UTIL_PIN_ENABLE;
762 I915_WRITE(UTIL_PIN_CTL, val);
763 }
764}
765
766static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
767{
768 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
769 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
770 struct intel_panel *panel = &connector->panel;
771 u32 tmp;
772
773 intel_panel_actually_set_backlight(old_conn_state, 0);
774
775 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
776 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
777 tmp & ~BXT_BLC_PWM_ENABLE);
778}
779
780static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
781{
782 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
783 struct intel_panel *panel = &connector->panel;
784
785 /* Disable the backlight */
786 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
787 usleep_range(2000, 3000);
788 pwm_disable(panel->backlight.pwm);
789}
790
791void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
792{
793 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
794 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
795 struct intel_panel *panel = &connector->panel;
796
797 if (!panel->backlight.present)
798 return;
799
800 /*
801 * Do not disable backlight on the vga_switcheroo path. When switching
802 * away from i915, the other client may depend on i915 to handle the
803 * backlight. This will leave the backlight on unnecessarily when
804 * another client is not activated.
805 */
806 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
807 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
808 return;
809 }
810
811 mutex_lock(&dev_priv->backlight_lock);
812
813 if (panel->backlight.device)
814 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
815 panel->backlight.enabled = false;
816 panel->backlight.disable(old_conn_state);
817
818 mutex_unlock(&dev_priv->backlight_lock);
819}
820
821static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
822 const struct drm_connector_state *conn_state)
823{
824 struct intel_connector *connector = to_intel_connector(conn_state->connector);
825 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
826 struct intel_panel *panel = &connector->panel;
827 u32 pch_ctl1, pch_ctl2, schicken;
828
829 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
830 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
831 DRM_DEBUG_KMS("pch backlight already enabled\n");
832 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
833 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
834 }
835
836 if (HAS_PCH_LPT(dev_priv)) {
837 schicken = I915_READ(SOUTH_CHICKEN2);
838 if (panel->backlight.alternate_pwm_increment)
839 schicken |= LPT_PWM_GRANULARITY;
840 else
841 schicken &= ~LPT_PWM_GRANULARITY;
842 I915_WRITE(SOUTH_CHICKEN2, schicken);
843 } else {
844 schicken = I915_READ(SOUTH_CHICKEN1);
845 if (panel->backlight.alternate_pwm_increment)
846 schicken |= SPT_PWM_GRANULARITY;
847 else
848 schicken &= ~SPT_PWM_GRANULARITY;
849 I915_WRITE(SOUTH_CHICKEN1, schicken);
850 }
851
852 pch_ctl2 = panel->backlight.max << 16;
853 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
854
855 pch_ctl1 = 0;
856 if (panel->backlight.active_low_pwm)
857 pch_ctl1 |= BLM_PCH_POLARITY;
858
859 /* After LPT, override is the default. */
860 if (HAS_PCH_LPT(dev_priv))
861 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
862
863 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
864 POSTING_READ(BLC_PWM_PCH_CTL1);
865 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
866
867 /* This won't stick until the above enable. */
868 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
869}
870
871static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
872 const struct drm_connector_state *conn_state)
873{
874 struct intel_connector *connector = to_intel_connector(conn_state->connector);
875 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
876 struct intel_panel *panel = &connector->panel;
877 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
878 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
879
880 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
881 if (cpu_ctl2 & BLM_PWM_ENABLE) {
882 DRM_DEBUG_KMS("cpu backlight already enabled\n");
883 cpu_ctl2 &= ~BLM_PWM_ENABLE;
884 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
885 }
886
887 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
888 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
889 DRM_DEBUG_KMS("pch backlight already enabled\n");
890 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
891 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
892 }
893
894 if (cpu_transcoder == TRANSCODER_EDP)
895 cpu_ctl2 = BLM_TRANSCODER_EDP;
896 else
897 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
898 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
899 POSTING_READ(BLC_PWM_CPU_CTL2);
900 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
901
902 /* This won't stick until the above enable. */
903 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
904
905 pch_ctl2 = panel->backlight.max << 16;
906 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
907
908 pch_ctl1 = 0;
909 if (panel->backlight.active_low_pwm)
910 pch_ctl1 |= BLM_PCH_POLARITY;
911
912 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
913 POSTING_READ(BLC_PWM_PCH_CTL1);
914 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
915}
916
917static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
918 const struct drm_connector_state *conn_state)
919{
920 struct intel_connector *connector = to_intel_connector(conn_state->connector);
921 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
922 struct intel_panel *panel = &connector->panel;
923 u32 ctl, freq;
924
925 ctl = I915_READ(BLC_PWM_CTL);
926 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
927 DRM_DEBUG_KMS("backlight already enabled\n");
928 I915_WRITE(BLC_PWM_CTL, 0);
929 }
930
931 freq = panel->backlight.max;
932 if (panel->backlight.combination_mode)
933 freq /= 0xff;
934
935 ctl = freq << 17;
936 if (panel->backlight.combination_mode)
937 ctl |= BLM_LEGACY_MODE;
938 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
939 ctl |= BLM_POLARITY_PNV;
940
941 I915_WRITE(BLC_PWM_CTL, ctl);
942 POSTING_READ(BLC_PWM_CTL);
943
944 /* XXX: combine this into above write? */
945 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
946
947 /*
948 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
949 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
950 * that has backlight.
951 */
952 if (IS_GEN2(dev_priv))
953 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
954}
955
956static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
957 const struct drm_connector_state *conn_state)
958{
959 struct intel_connector *connector = to_intel_connector(conn_state->connector);
960 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
961 struct intel_panel *panel = &connector->panel;
962 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
963 u32 ctl, ctl2, freq;
964
965 ctl2 = I915_READ(BLC_PWM_CTL2);
966 if (ctl2 & BLM_PWM_ENABLE) {
967 DRM_DEBUG_KMS("backlight already enabled\n");
968 ctl2 &= ~BLM_PWM_ENABLE;
969 I915_WRITE(BLC_PWM_CTL2, ctl2);
970 }
971
972 freq = panel->backlight.max;
973 if (panel->backlight.combination_mode)
974 freq /= 0xff;
975
976 ctl = freq << 16;
977 I915_WRITE(BLC_PWM_CTL, ctl);
978
979 ctl2 = BLM_PIPE(pipe);
980 if (panel->backlight.combination_mode)
981 ctl2 |= BLM_COMBINATION_MODE;
982 if (panel->backlight.active_low_pwm)
983 ctl2 |= BLM_POLARITY_I965;
984 I915_WRITE(BLC_PWM_CTL2, ctl2);
985 POSTING_READ(BLC_PWM_CTL2);
986 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
987
988 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
989}
990
991static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
992 const struct drm_connector_state *conn_state)
993{
994 struct intel_connector *connector = to_intel_connector(conn_state->connector);
995 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
996 struct intel_panel *panel = &connector->panel;
997 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
998 u32 ctl, ctl2;
999
1000 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1001 if (ctl2 & BLM_PWM_ENABLE) {
1002 DRM_DEBUG_KMS("backlight already enabled\n");
1003 ctl2 &= ~BLM_PWM_ENABLE;
1004 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1005 }
1006
1007 ctl = panel->backlight.max << 16;
1008 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1009
1010 /* XXX: combine this into above write? */
1011 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1012
1013 ctl2 = 0;
1014 if (panel->backlight.active_low_pwm)
1015 ctl2 |= BLM_POLARITY_I965;
1016 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1017 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1018 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1019}
1020
1021static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1022 const struct drm_connector_state *conn_state)
1023{
1024 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1025 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1026 struct intel_panel *panel = &connector->panel;
1027 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1028 u32 pwm_ctl, val;
1029
1030 /* Controller 1 uses the utility pin. */
1031 if (panel->backlight.controller == 1) {
1032 val = I915_READ(UTIL_PIN_CTL);
1033 if (val & UTIL_PIN_ENABLE) {
1034 DRM_DEBUG_KMS("util pin already enabled\n");
1035 val &= ~UTIL_PIN_ENABLE;
1036 I915_WRITE(UTIL_PIN_CTL, val);
1037 }
1038
1039 val = 0;
1040 if (panel->backlight.util_pin_active_low)
1041 val |= UTIL_PIN_POLARITY;
1042 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1043 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1044 }
1045
1046 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1047 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1048 DRM_DEBUG_KMS("backlight already enabled\n");
1049 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1050 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1051 pwm_ctl);
1052 }
1053
1054 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1055 panel->backlight.max);
1056
1057 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1058
1059 pwm_ctl = 0;
1060 if (panel->backlight.active_low_pwm)
1061 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1062
1063 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1064 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1065 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1066 pwm_ctl | BXT_BLC_PWM_ENABLE);
1067}
1068
1069static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1070 const struct drm_connector_state *conn_state)
1071{
1072 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1073 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1074 struct intel_panel *panel = &connector->panel;
1075 u32 pwm_ctl;
1076
1077 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1078 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1079 DRM_DEBUG_KMS("backlight already enabled\n");
1080 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1081 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1082 pwm_ctl);
1083 }
1084
1085 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1086 panel->backlight.max);
1087
1088 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1089
1090 pwm_ctl = 0;
1091 if (panel->backlight.active_low_pwm)
1092 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1093
1094 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1095 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1096 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1097 pwm_ctl | BXT_BLC_PWM_ENABLE);
1098}
1099
1100static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1101 const struct drm_connector_state *conn_state)
1102{
1103 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1104 struct intel_panel *panel = &connector->panel;
1105
1106 pwm_enable(panel->backlight.pwm);
1107 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1108}
1109
1110void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1111 const struct drm_connector_state *conn_state)
1112{
1113 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1114 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1115 struct intel_panel *panel = &connector->panel;
1116 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1117
1118 if (!panel->backlight.present)
1119 return;
1120
1121 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1122
1123 mutex_lock(&dev_priv->backlight_lock);
1124
1125 WARN_ON(panel->backlight.max == 0);
1126
1127 if (panel->backlight.level <= panel->backlight.min) {
1128 panel->backlight.level = panel->backlight.max;
1129 if (panel->backlight.device)
1130 panel->backlight.device->props.brightness =
1131 scale_hw_to_user(connector,
1132 panel->backlight.level,
1133 panel->backlight.device->props.max_brightness);
1134 }
1135
1136 panel->backlight.enable(crtc_state, conn_state);
1137 panel->backlight.enabled = true;
1138 if (panel->backlight.device)
1139 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1140
1141 mutex_unlock(&dev_priv->backlight_lock);
1142}
1143
1144#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1145static u32 intel_panel_get_backlight(struct intel_connector *connector)
1146{
1147 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1148 struct intel_panel *panel = &connector->panel;
1149 u32 val = 0;
1150
1151 mutex_lock(&dev_priv->backlight_lock);
1152
1153 if (panel->backlight.enabled) {
1154 val = panel->backlight.get(connector);
1155 val = intel_panel_compute_brightness(connector, val);
1156 }
1157
1158 mutex_unlock(&dev_priv->backlight_lock);
1159
1160 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
1161 return val;
1162}
1163
1164/* set backlight brightness to level in range [0..max], scaling wrt hw min */
1165static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
1166 u32 user_level, u32 user_max)
1167{
1168 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1169 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1170 struct intel_panel *panel = &connector->panel;
1171 u32 hw_level;
1172
1173 if (!panel->backlight.present)
1174 return;
1175
1176 mutex_lock(&dev_priv->backlight_lock);
1177
1178 WARN_ON(panel->backlight.max == 0);
1179
1180 hw_level = scale_user_to_hw(connector, user_level, user_max);
1181 panel->backlight.level = hw_level;
1182
1183 if (panel->backlight.enabled)
1184 intel_panel_actually_set_backlight(conn_state, hw_level);
1185
1186 mutex_unlock(&dev_priv->backlight_lock);
1187}
1188
1189static int intel_backlight_device_update_status(struct backlight_device *bd)
1190{
1191 struct intel_connector *connector = bl_get_data(bd);
1192 struct intel_panel *panel = &connector->panel;
1193 struct drm_device *dev = connector->base.dev;
1194
1195 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1196 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1197 bd->props.brightness, bd->props.max_brightness);
1198 intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1199 bd->props.max_brightness);
1200
1201 /*
1202 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1203 * backlight class device does not make it easy to to differentiate
1204 * between callbacks for brightness and bl_power, so our backlight_power
1205 * callback needs to take this into account.
1206 */
1207 if (panel->backlight.enabled) {
1208 if (panel->backlight.power) {
1209 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1210 bd->props.brightness != 0;
1211 panel->backlight.power(connector, enable);
1212 }
1213 } else {
1214 bd->props.power = FB_BLANK_POWERDOWN;
1215 }
1216
1217 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1218 return 0;
1219}
1220
1221static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1222{
1223 struct intel_connector *connector = bl_get_data(bd);
1224 struct drm_device *dev = connector->base.dev;
1225 struct drm_i915_private *dev_priv = to_i915(dev);
1226 u32 hw_level;
1227 int ret;
1228
1229 intel_runtime_pm_get(dev_priv);
1230 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1231
1232 hw_level = intel_panel_get_backlight(connector);
1233 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1234
1235 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1236 intel_runtime_pm_put(dev_priv);
1237
1238 return ret;
1239}
1240
1241static const struct backlight_ops intel_backlight_device_ops = {
1242 .update_status = intel_backlight_device_update_status,
1243 .get_brightness = intel_backlight_device_get_brightness,
1244};
1245
1246int intel_backlight_device_register(struct intel_connector *connector)
1247{
1248 struct intel_panel *panel = &connector->panel;
1249 struct backlight_properties props;
1250
1251 if (WARN_ON(panel->backlight.device))
1252 return -ENODEV;
1253
1254 if (!panel->backlight.present)
1255 return 0;
1256
1257 WARN_ON(panel->backlight.max == 0);
1258
1259 memset(&props, 0, sizeof(props));
1260 props.type = BACKLIGHT_RAW;
1261
1262 /*
1263 * Note: Everything should work even if the backlight device max
1264 * presented to the userspace is arbitrarily chosen.
1265 */
1266 props.max_brightness = panel->backlight.max;
1267 props.brightness = scale_hw_to_user(connector,
1268 panel->backlight.level,
1269 props.max_brightness);
1270
1271 if (panel->backlight.enabled)
1272 props.power = FB_BLANK_UNBLANK;
1273 else
1274 props.power = FB_BLANK_POWERDOWN;
1275
1276 /*
1277 * Note: using the same name independent of the connector prevents
1278 * registration of multiple backlight devices in the driver.
1279 */
1280 panel->backlight.device =
1281 backlight_device_register("intel_backlight",
1282 connector->base.kdev,
1283 connector,
1284 &intel_backlight_device_ops, &props);
1285
1286 if (IS_ERR(panel->backlight.device)) {
1287 DRM_ERROR("Failed to register backlight: %ld\n",
1288 PTR_ERR(panel->backlight.device));
1289 panel->backlight.device = NULL;
1290 return -ENODEV;
1291 }
1292
1293 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1294 connector->base.name);
1295
1296 return 0;
1297}
1298
1299void intel_backlight_device_unregister(struct intel_connector *connector)
1300{
1301 struct intel_panel *panel = &connector->panel;
1302
1303 if (panel->backlight.device) {
1304 backlight_device_unregister(panel->backlight.device);
1305 panel->backlight.device = NULL;
1306 }
1307}
1308#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1309
1310/*
1311 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
1312 * PWM increment = 1
1313 */
1314static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1315{
1316 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1317
1318 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
1319}
1320
1321/*
1322 * BXT: PWM clock frequency = 19.2 MHz.
1323 */
1324static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1325{
1326 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1327}
1328
1329/*
1330 * SPT: This value represents the period of the PWM stream in clock periods
1331 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1332 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1333 */
1334static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1335{
1336 struct intel_panel *panel = &connector->panel;
1337 u32 mul;
1338
1339 if (panel->backlight.alternate_pwm_increment)
1340 mul = 128;
1341 else
1342 mul = 16;
1343
1344 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1345}
1346
1347/*
1348 * LPT: This value represents the period of the PWM stream in clock periods
1349 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1350 * LPT SOUTH_CHICKEN2 register bit 5).
1351 */
1352static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1353{
1354 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1355 struct intel_panel *panel = &connector->panel;
1356 u32 mul, clock;
1357
1358 if (panel->backlight.alternate_pwm_increment)
1359 mul = 16;
1360 else
1361 mul = 128;
1362
1363 if (HAS_PCH_LPT_H(dev_priv))
1364 clock = MHz(135); /* LPT:H */
1365 else
1366 clock = MHz(24); /* LPT:LP */
1367
1368 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1369}
1370
1371/*
1372 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1373 * display raw clocks multiplied by 128.
1374 */
1375static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1376{
1377 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1378
1379 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1380}
1381
1382/*
1383 * Gen2: This field determines the number of time base events (display core
1384 * clock frequency/32) in total for a complete cycle of modulated backlight
1385 * control.
1386 *
1387 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1388 * divided by 32.
1389 */
1390static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1391{
1392 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1393 int clock;
1394
1395 if (IS_PINEVIEW(dev_priv))
1396 clock = KHz(dev_priv->rawclk_freq);
1397 else
1398 clock = KHz(dev_priv->cdclk.hw.cdclk);
1399
1400 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1401}
1402
1403/*
1404 * Gen4: This value represents the period of the PWM stream in display core
1405 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1406 *
1407 */
1408static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1409{
1410 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1411 int clock;
1412
1413 if (IS_G4X(dev_priv))
1414 clock = KHz(dev_priv->rawclk_freq);
1415 else
1416 clock = KHz(dev_priv->cdclk.hw.cdclk);
1417
1418 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1419}
1420
1421/*
1422 * VLV: This value represents the period of the PWM stream in display core
1423 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1424 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1425 */
1426static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1427{
1428 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1429 int mul, clock;
1430
1431 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1432 if (IS_CHERRYVIEW(dev_priv))
1433 clock = KHz(19200);
1434 else
1435 clock = MHz(25);
1436 mul = 16;
1437 } else {
1438 clock = KHz(dev_priv->rawclk_freq);
1439 mul = 128;
1440 }
1441
1442 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1443}
1444
1445static u32 get_backlight_max_vbt(struct intel_connector *connector)
1446{
1447 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1448 struct intel_panel *panel = &connector->panel;
1449 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1450 u32 pwm;
1451
1452 if (!panel->backlight.hz_to_pwm) {
1453 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1454 return 0;
1455 }
1456
1457 if (pwm_freq_hz) {
1458 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1459 pwm_freq_hz);
1460 } else {
1461 pwm_freq_hz = 200;
1462 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1463 pwm_freq_hz);
1464 }
1465
1466 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1467 if (!pwm) {
1468 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1469 return 0;
1470 }
1471
1472 return pwm;
1473}
1474
1475/*
1476 * Note: The setup hooks can't assume pipe is set!
1477 */
1478static u32 get_backlight_min_vbt(struct intel_connector *connector)
1479{
1480 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1481 struct intel_panel *panel = &connector->panel;
1482 int min;
1483
1484 WARN_ON(panel->backlight.max == 0);
1485
1486 /*
1487 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1488 * to problems. There are such machines out there. Either our
1489 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1490 * against this by letting the minimum be at most (arbitrarily chosen)
1491 * 25% of the max.
1492 */
1493 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1494 if (min != dev_priv->vbt.backlight.min_brightness) {
1495 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1496 dev_priv->vbt.backlight.min_brightness, min);
1497 }
1498
1499 /* vbt value is a coefficient in range [0..255] */
1500 return scale(min, 0, 255, 0, panel->backlight.max);
1501}
1502
1503static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1504{
1505 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1506 struct intel_panel *panel = &connector->panel;
1507 u32 pch_ctl1, pch_ctl2, val;
1508 bool alt;
1509
1510 if (HAS_PCH_LPT(dev_priv))
1511 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1512 else
1513 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1514 panel->backlight.alternate_pwm_increment = alt;
1515
1516 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1517 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1518
1519 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1520 panel->backlight.max = pch_ctl2 >> 16;
1521
1522 if (!panel->backlight.max)
1523 panel->backlight.max = get_backlight_max_vbt(connector);
1524
1525 if (!panel->backlight.max)
1526 return -ENODEV;
1527
1528 panel->backlight.min = get_backlight_min_vbt(connector);
1529
1530 val = lpt_get_backlight(connector);
1531 val = intel_panel_compute_brightness(connector, val);
1532 panel->backlight.level = clamp(val, panel->backlight.min,
1533 panel->backlight.max);
1534
1535 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1536
1537 return 0;
1538}
1539
1540static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1541{
1542 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1543 struct intel_panel *panel = &connector->panel;
1544 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1545
1546 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1547 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1548
1549 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1550 panel->backlight.max = pch_ctl2 >> 16;
1551
1552 if (!panel->backlight.max)
1553 panel->backlight.max = get_backlight_max_vbt(connector);
1554
1555 if (!panel->backlight.max)
1556 return -ENODEV;
1557
1558 panel->backlight.min = get_backlight_min_vbt(connector);
1559
1560 val = pch_get_backlight(connector);
1561 val = intel_panel_compute_brightness(connector, val);
1562 panel->backlight.level = clamp(val, panel->backlight.min,
1563 panel->backlight.max);
1564
1565 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1566 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1567 (pch_ctl1 & BLM_PCH_PWM_ENABLE);
1568
1569 return 0;
1570}
1571
1572static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1573{
1574 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1575 struct intel_panel *panel = &connector->panel;
1576 u32 ctl, val;
1577
1578 ctl = I915_READ(BLC_PWM_CTL);
1579
1580 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1581 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1582
1583 if (IS_PINEVIEW(dev_priv))
1584 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1585
1586 panel->backlight.max = ctl >> 17;
1587
1588 if (!panel->backlight.max) {
1589 panel->backlight.max = get_backlight_max_vbt(connector);
1590 panel->backlight.max >>= 1;
1591 }
1592
1593 if (!panel->backlight.max)
1594 return -ENODEV;
1595
1596 if (panel->backlight.combination_mode)
1597 panel->backlight.max *= 0xff;
1598
1599 panel->backlight.min = get_backlight_min_vbt(connector);
1600
1601 val = i9xx_get_backlight(connector);
1602 val = intel_panel_compute_brightness(connector, val);
1603 panel->backlight.level = clamp(val, panel->backlight.min,
1604 panel->backlight.max);
1605
1606 panel->backlight.enabled = val != 0;
1607
1608 return 0;
1609}
1610
1611static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1612{
1613 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1614 struct intel_panel *panel = &connector->panel;
1615 u32 ctl, ctl2, val;
1616
1617 ctl2 = I915_READ(BLC_PWM_CTL2);
1618 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1619 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1620
1621 ctl = I915_READ(BLC_PWM_CTL);
1622 panel->backlight.max = ctl >> 16;
1623
1624 if (!panel->backlight.max)
1625 panel->backlight.max = get_backlight_max_vbt(connector);
1626
1627 if (!panel->backlight.max)
1628 return -ENODEV;
1629
1630 if (panel->backlight.combination_mode)
1631 panel->backlight.max *= 0xff;
1632
1633 panel->backlight.min = get_backlight_min_vbt(connector);
1634
1635 val = i9xx_get_backlight(connector);
1636 val = intel_panel_compute_brightness(connector, val);
1637 panel->backlight.level = clamp(val, panel->backlight.min,
1638 panel->backlight.max);
1639
1640 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1641
1642 return 0;
1643}
1644
1645static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1646{
1647 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1648 struct intel_panel *panel = &connector->panel;
1649 u32 ctl, ctl2, val;
1650
1651 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1652 return -ENODEV;
1653
1654 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1655 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1656
1657 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1658 panel->backlight.max = ctl >> 16;
1659
1660 if (!panel->backlight.max)
1661 panel->backlight.max = get_backlight_max_vbt(connector);
1662
1663 if (!panel->backlight.max)
1664 return -ENODEV;
1665
1666 panel->backlight.min = get_backlight_min_vbt(connector);
1667
1668 val = _vlv_get_backlight(dev_priv, pipe);
1669 val = intel_panel_compute_brightness(connector, val);
1670 panel->backlight.level = clamp(val, panel->backlight.min,
1671 panel->backlight.max);
1672
1673 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1674
1675 return 0;
1676}
1677
1678static int
1679bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1680{
1681 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1682 struct intel_panel *panel = &connector->panel;
1683 u32 pwm_ctl, val;
1684
1685 panel->backlight.controller = dev_priv->vbt.backlight.controller;
1686
1687 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1688
1689 /* Controller 1 uses the utility pin. */
1690 if (panel->backlight.controller == 1) {
1691 val = I915_READ(UTIL_PIN_CTL);
1692 panel->backlight.util_pin_active_low =
1693 val & UTIL_PIN_POLARITY;
1694 }
1695
1696 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1697 panel->backlight.max =
1698 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1699
1700 if (!panel->backlight.max)
1701 panel->backlight.max = get_backlight_max_vbt(connector);
1702
1703 if (!panel->backlight.max)
1704 return -ENODEV;
1705
1706 panel->backlight.min = get_backlight_min_vbt(connector);
1707
1708 val = bxt_get_backlight(connector);
1709 val = intel_panel_compute_brightness(connector, val);
1710 panel->backlight.level = clamp(val, panel->backlight.min,
1711 panel->backlight.max);
1712
1713 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1714
1715 return 0;
1716}
1717
1718static int
1719cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
1720{
1721 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1722 struct intel_panel *panel = &connector->panel;
1723 u32 pwm_ctl, val;
1724
1725 /*
1726 * CNP has the BXT implementation of backlight, but with only one
1727 * controller. TODO: ICP has multiple controllers but we only use
1728 * controller 0 for now.
1729 */
1730 panel->backlight.controller = 0;
1731
1732 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1733
1734 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1735 panel->backlight.max =
1736 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1737
1738 if (!panel->backlight.max)
1739 panel->backlight.max = get_backlight_max_vbt(connector);
1740
1741 if (!panel->backlight.max)
1742 return -ENODEV;
1743
1744 panel->backlight.min = get_backlight_min_vbt(connector);
1745
1746 val = bxt_get_backlight(connector);
1747 val = intel_panel_compute_brightness(connector, val);
1748 panel->backlight.level = clamp(val, panel->backlight.min,
1749 panel->backlight.max);
1750
1751 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1752
1753 return 0;
1754}
1755
1756static int pwm_setup_backlight(struct intel_connector *connector,
1757 enum pipe pipe)
1758{
1759 struct drm_device *dev = connector->base.dev;
1760 struct intel_panel *panel = &connector->panel;
1761 int retval;
1762
1763 /* Get the PWM chip for backlight control */
1764 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1765 if (IS_ERR(panel->backlight.pwm)) {
1766 DRM_ERROR("Failed to own the pwm chip\n");
1767 panel->backlight.pwm = NULL;
1768 return -ENODEV;
1769 }
1770
1771 /*
1772 * FIXME: pwm_apply_args() should be removed when switching to
1773 * the atomic PWM API.
1774 */
1775 pwm_apply_args(panel->backlight.pwm);
1776
1777 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1778 CRC_PMIC_PWM_PERIOD_NS);
1779 if (retval < 0) {
1780 DRM_ERROR("Failed to configure the pwm chip\n");
1781 pwm_put(panel->backlight.pwm);
1782 panel->backlight.pwm = NULL;
1783 return retval;
1784 }
1785
1786 panel->backlight.min = 0; /* 0% */
1787 panel->backlight.max = 100; /* 100% */
1788 panel->backlight.level = DIV_ROUND_UP(
1789 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1790 CRC_PMIC_PWM_PERIOD_NS);
1791 panel->backlight.enabled = panel->backlight.level != 0;
1792
1793 return 0;
1794}
1795
1796int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1797{
1798 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1799 struct intel_connector *intel_connector = to_intel_connector(connector);
1800 struct intel_panel *panel = &intel_connector->panel;
1801 int ret;
1802
1803 if (!dev_priv->vbt.backlight.present) {
1804 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1805 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1806 } else {
1807 DRM_DEBUG_KMS("no backlight present per VBT\n");
1808 return 0;
1809 }
1810 }
1811
1812 /* ensure intel_panel has been initialized first */
1813 if (WARN_ON(!panel->backlight.setup))
1814 return -ENODEV;
1815
1816 /* set level and max in panel struct */
1817 mutex_lock(&dev_priv->backlight_lock);
1818 ret = panel->backlight.setup(intel_connector, pipe);
1819 mutex_unlock(&dev_priv->backlight_lock);
1820
1821 if (ret) {
1822 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1823 connector->name);
1824 return ret;
1825 }
1826
1827 panel->backlight.present = true;
1828
1829 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1830 connector->name,
1831 enableddisabled(panel->backlight.enabled),
1832 panel->backlight.level, panel->backlight.max);
1833
1834 return 0;
1835}
1836
1837void intel_panel_destroy_backlight(struct drm_connector *connector)
1838{
1839 struct intel_connector *intel_connector = to_intel_connector(connector);
1840 struct intel_panel *panel = &intel_connector->panel;
1841
1842 /* dispose of the pwm */
1843 if (panel->backlight.pwm)
1844 pwm_put(panel->backlight.pwm);
1845
1846 panel->backlight.present = false;
1847}
1848
1849/* Set up chip specific backlight functions */
1850static void
1851intel_panel_init_backlight_funcs(struct intel_panel *panel)
1852{
1853 struct intel_connector *connector =
1854 container_of(panel, struct intel_connector, panel);
1855 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1856
1857 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
1858 intel_dp_aux_init_backlight_funcs(connector) == 0)
1859 return;
1860
1861 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
1862 intel_dsi_dcs_init_backlight_funcs(connector) == 0)
1863 return;
1864
1865 if (IS_GEN9_LP(dev_priv)) {
1866 panel->backlight.setup = bxt_setup_backlight;
1867 panel->backlight.enable = bxt_enable_backlight;
1868 panel->backlight.disable = bxt_disable_backlight;
1869 panel->backlight.set = bxt_set_backlight;
1870 panel->backlight.get = bxt_get_backlight;
1871 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1872 } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
1873 panel->backlight.setup = cnp_setup_backlight;
1874 panel->backlight.enable = cnp_enable_backlight;
1875 panel->backlight.disable = cnp_disable_backlight;
1876 panel->backlight.set = bxt_set_backlight;
1877 panel->backlight.get = bxt_get_backlight;
1878 panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
1879 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1880 HAS_PCH_KBP(dev_priv)) {
1881 panel->backlight.setup = lpt_setup_backlight;
1882 panel->backlight.enable = lpt_enable_backlight;
1883 panel->backlight.disable = lpt_disable_backlight;
1884 panel->backlight.set = lpt_set_backlight;
1885 panel->backlight.get = lpt_get_backlight;
1886 if (HAS_PCH_LPT(dev_priv))
1887 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1888 else
1889 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1890 } else if (HAS_PCH_SPLIT(dev_priv)) {
1891 panel->backlight.setup = pch_setup_backlight;
1892 panel->backlight.enable = pch_enable_backlight;
1893 panel->backlight.disable = pch_disable_backlight;
1894 panel->backlight.set = pch_set_backlight;
1895 panel->backlight.get = pch_get_backlight;
1896 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1897 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1898 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1899 panel->backlight.setup = pwm_setup_backlight;
1900 panel->backlight.enable = pwm_enable_backlight;
1901 panel->backlight.disable = pwm_disable_backlight;
1902 panel->backlight.set = pwm_set_backlight;
1903 panel->backlight.get = pwm_get_backlight;
1904 } else {
1905 panel->backlight.setup = vlv_setup_backlight;
1906 panel->backlight.enable = vlv_enable_backlight;
1907 panel->backlight.disable = vlv_disable_backlight;
1908 panel->backlight.set = vlv_set_backlight;
1909 panel->backlight.get = vlv_get_backlight;
1910 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1911 }
1912 } else if (IS_GEN4(dev_priv)) {
1913 panel->backlight.setup = i965_setup_backlight;
1914 panel->backlight.enable = i965_enable_backlight;
1915 panel->backlight.disable = i965_disable_backlight;
1916 panel->backlight.set = i9xx_set_backlight;
1917 panel->backlight.get = i9xx_get_backlight;
1918 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1919 } else {
1920 panel->backlight.setup = i9xx_setup_backlight;
1921 panel->backlight.enable = i9xx_enable_backlight;
1922 panel->backlight.disable = i9xx_disable_backlight;
1923 panel->backlight.set = i9xx_set_backlight;
1924 panel->backlight.get = i9xx_get_backlight;
1925 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1926 }
1927}
1928
1929int intel_panel_init(struct intel_panel *panel,
1930 struct drm_display_mode *fixed_mode,
1931 struct drm_display_mode *alt_fixed_mode,
1932 struct drm_display_mode *downclock_mode)
1933{
1934 intel_panel_init_backlight_funcs(panel);
1935
1936 panel->fixed_mode = fixed_mode;
1937 panel->alt_fixed_mode = alt_fixed_mode;
1938 panel->downclock_mode = downclock_mode;
1939
1940 return 0;
1941}
1942
1943void intel_panel_fini(struct intel_panel *panel)
1944{
1945 struct intel_connector *intel_connector =
1946 container_of(panel, struct intel_connector, panel);
1947
1948 if (panel->fixed_mode)
1949 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1950
1951 if (panel->alt_fixed_mode)
1952 drm_mode_destroy(intel_connector->base.dev,
1953 panel->alt_fixed_mode);
1954
1955 if (panel->downclock_mode)
1956 drm_mode_destroy(intel_connector->base.dev,
1957 panel->downclock_mode);
1958}