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1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
31#include "i915_drv.h"
32#include "intel_bios.h"
33
34/**
35 * DOC: Video BIOS Table (VBT)
36 *
37 * The Video BIOS Table, or VBT, provides platform and board specific
38 * configuration information to the driver that is not discoverable or available
39 * through other means. The configuration is mostly related to display
40 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
41 * the PCI ROM.
42 *
43 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
44 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
45 * contain the actual configuration information. The VBT Header, and thus the
46 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
47 * BDB Header. The data blocks are concatenated after the BDB Header. The data
48 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
49 * data. (Block 53, the MIPI Sequence Block is an exception.)
50 *
51 * The driver parses the VBT during load. The relevant information is stored in
52 * driver private data for ease of use, and the actual VBT is not read after
53 * that.
54 */
55
56#define SLAVE_ADDR1 0x70
57#define SLAVE_ADDR2 0x72
58
59static int panel_type;
60
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
77static const void *
78find_section(const void *_bdb, int section_id)
79{
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
82 int index = 0;
83 u32 total, current_size;
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
91 while (index + 3 < total) {
92 current_id = *(base + index);
93 current_size = _get_blocksize(base + index);
94 index += 3;
95
96 if (index + current_size > total)
97 return NULL;
98
99 if (current_id == section_id)
100 return base + index;
101
102 index += current_size;
103 }
104
105 return NULL;
106}
107
108static void
109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
110 const struct lvds_dvo_timing *dvo_timing)
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 dvo_timing->hsync_pulse_width;
118 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
119 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
120
121 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
122 dvo_timing->vactive_lo;
123 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
124 dvo_timing->vsync_off;
125 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
126 dvo_timing->vsync_pulse_width;
127 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
128 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
129 panel_fixed_mode->clock = dvo_timing->clock * 10;
130 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
131
132 if (dvo_timing->hsync_positive)
133 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
134 else
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
136
137 if (dvo_timing->vsync_positive)
138 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
139 else
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
141
142 /* Some VBTs have bogus h/vtotal values */
143 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
144 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
145 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
146 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
147
148 drm_mode_set_name(panel_fixed_mode);
149}
150
151static const struct lvds_dvo_timing *
152get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
153 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
154 int index)
155{
156 /*
157 * the size of fp_timing varies on the different platform.
158 * So calculate the DVO timing relative offset in LVDS data
159 * entry to get the DVO timing entry
160 */
161
162 int lfp_data_size =
163 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
164 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
165 int dvo_timing_offset =
166 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
168 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
169
170 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
171}
172
173/* get lvds_fp_timing entry
174 * this function may return NULL if the corresponding entry is invalid
175 */
176static const struct lvds_fp_timing *
177get_lvds_fp_timing(const struct bdb_header *bdb,
178 const struct bdb_lvds_lfp_data *data,
179 const struct bdb_lvds_lfp_data_ptrs *ptrs,
180 int index)
181{
182 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
183 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
184 size_t ofs;
185
186 if (index >= ARRAY_SIZE(ptrs->ptr))
187 return NULL;
188 ofs = ptrs->ptr[index].fp_timing_offset;
189 if (ofs < data_ofs ||
190 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
191 return NULL;
192 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
193}
194
195/* Try to find integrated panel data */
196static void
197parse_lfp_panel_data(struct drm_i915_private *dev_priv,
198 const struct bdb_header *bdb)
199{
200 const struct bdb_lvds_options *lvds_options;
201 const struct bdb_lvds_lfp_data *lvds_lfp_data;
202 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
203 const struct lvds_dvo_timing *panel_dvo_timing;
204 const struct lvds_fp_timing *fp_timing;
205 struct drm_display_mode *panel_fixed_mode;
206 int drrs_mode;
207
208 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
209 if (!lvds_options)
210 return;
211
212 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
213 if (lvds_options->panel_type == 0xff)
214 return;
215
216 panel_type = lvds_options->panel_type;
217
218 drrs_mode = (lvds_options->dps_panel_type_bits
219 >> (panel_type * 2)) & MODE_MASK;
220 /*
221 * VBT has static DRRS = 0 and seamless DRRS = 2.
222 * The below piece of code is required to adjust vbt.drrs_type
223 * to match the enum drrs_support_type.
224 */
225 switch (drrs_mode) {
226 case 0:
227 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
228 DRM_DEBUG_KMS("DRRS supported mode is static\n");
229 break;
230 case 2:
231 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
232 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
233 break;
234 default:
235 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
236 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
237 break;
238 }
239
240 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
241 if (!lvds_lfp_data)
242 return;
243
244 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
245 if (!lvds_lfp_data_ptrs)
246 return;
247
248 dev_priv->vbt.lvds_vbt = 1;
249
250 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
251 lvds_lfp_data_ptrs,
252 lvds_options->panel_type);
253
254 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
255 if (!panel_fixed_mode)
256 return;
257
258 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
259
260 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
261
262 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
263 drm_mode_debug_printmodeline(panel_fixed_mode);
264
265 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
266 lvds_lfp_data_ptrs,
267 lvds_options->panel_type);
268 if (fp_timing) {
269 /* check the resolution, just to be sure */
270 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
271 fp_timing->y_res == panel_fixed_mode->vdisplay) {
272 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
273 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
274 dev_priv->vbt.bios_lvds_val);
275 }
276 }
277}
278
279static void
280parse_lfp_backlight(struct drm_i915_private *dev_priv,
281 const struct bdb_header *bdb)
282{
283 const struct bdb_lfp_backlight_data *backlight_data;
284 const struct bdb_lfp_backlight_data_entry *entry;
285
286 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
287 if (!backlight_data)
288 return;
289
290 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
291 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
292 backlight_data->entry_size);
293 return;
294 }
295
296 entry = &backlight_data->data[panel_type];
297
298 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
299 if (!dev_priv->vbt.backlight.present) {
300 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
301 entry->type);
302 return;
303 }
304
305 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
306 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
307 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
308 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
309 "active %s, min brightness %u, level %u\n",
310 dev_priv->vbt.backlight.pwm_freq_hz,
311 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
312 dev_priv->vbt.backlight.min_brightness,
313 backlight_data->level[panel_type]);
314}
315
316/* Try to find sdvo panel data */
317static void
318parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
319 const struct bdb_header *bdb)
320{
321 const struct lvds_dvo_timing *dvo_timing;
322 struct drm_display_mode *panel_fixed_mode;
323 int index;
324
325 index = i915.vbt_sdvo_panel_type;
326 if (index == -2) {
327 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
328 return;
329 }
330
331 if (index == -1) {
332 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
333
334 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
335 if (!sdvo_lvds_options)
336 return;
337
338 index = sdvo_lvds_options->panel_type;
339 }
340
341 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
342 if (!dvo_timing)
343 return;
344
345 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
346 if (!panel_fixed_mode)
347 return;
348
349 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
350
351 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
352
353 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
354 drm_mode_debug_printmodeline(panel_fixed_mode);
355}
356
357static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
358 bool alternate)
359{
360 switch (INTEL_INFO(dev_priv)->gen) {
361 case 2:
362 return alternate ? 66667 : 48000;
363 case 3:
364 case 4:
365 return alternate ? 100000 : 96000;
366 default:
367 return alternate ? 100000 : 120000;
368 }
369}
370
371static void
372parse_general_features(struct drm_i915_private *dev_priv,
373 const struct bdb_header *bdb)
374{
375 const struct bdb_general_features *general;
376
377 general = find_section(bdb, BDB_GENERAL_FEATURES);
378 if (!general)
379 return;
380
381 dev_priv->vbt.int_tv_support = general->int_tv_support;
382 /* int_crt_support can't be trusted on earlier platforms */
383 if (bdb->version >= 155 &&
384 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
385 dev_priv->vbt.int_crt_support = general->int_crt_support;
386 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
387 dev_priv->vbt.lvds_ssc_freq =
388 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
389 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
390 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
391 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
392 dev_priv->vbt.int_tv_support,
393 dev_priv->vbt.int_crt_support,
394 dev_priv->vbt.lvds_use_ssc,
395 dev_priv->vbt.lvds_ssc_freq,
396 dev_priv->vbt.display_clock_mode,
397 dev_priv->vbt.fdi_rx_polarity_inverted);
398}
399
400static void
401parse_general_definitions(struct drm_i915_private *dev_priv,
402 const struct bdb_header *bdb)
403{
404 const struct bdb_general_definitions *general;
405
406 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
407 if (general) {
408 u16 block_size = get_blocksize(general);
409 if (block_size >= sizeof(*general)) {
410 int bus_pin = general->crt_ddc_gmbus_pin;
411 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
412 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
413 dev_priv->vbt.crt_ddc_pin = bus_pin;
414 } else {
415 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
416 block_size);
417 }
418 }
419}
420
421static const union child_device_config *
422child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
423{
424 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
425}
426
427static void
428parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
429 const struct bdb_header *bdb)
430{
431 struct sdvo_device_mapping *p_mapping;
432 const struct bdb_general_definitions *p_defs;
433 const struct old_child_dev_config *child; /* legacy */
434 int i, child_device_num, count;
435 u16 block_size;
436
437 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
438 if (!p_defs) {
439 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
440 return;
441 }
442
443 /*
444 * Only parse SDVO mappings when the general definitions block child
445 * device size matches that of the *legacy* child device config
446 * struct. Thus, SDVO mapping will be skipped for newer VBT.
447 */
448 if (p_defs->child_dev_size != sizeof(*child)) {
449 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
450 return;
451 }
452 /* get the block size of general definitions */
453 block_size = get_blocksize(p_defs);
454 /* get the number of child device */
455 child_device_num = (block_size - sizeof(*p_defs)) /
456 p_defs->child_dev_size;
457 count = 0;
458 for (i = 0; i < child_device_num; i++) {
459 child = &child_device_ptr(p_defs, i)->old;
460 if (!child->device_type) {
461 /* skip the device block if device type is invalid */
462 continue;
463 }
464 if (child->slave_addr != SLAVE_ADDR1 &&
465 child->slave_addr != SLAVE_ADDR2) {
466 /*
467 * If the slave address is neither 0x70 nor 0x72,
468 * it is not a SDVO device. Skip it.
469 */
470 continue;
471 }
472 if (child->dvo_port != DEVICE_PORT_DVOB &&
473 child->dvo_port != DEVICE_PORT_DVOC) {
474 /* skip the incorrect SDVO port */
475 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
476 continue;
477 }
478 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
479 " %s port\n",
480 child->slave_addr,
481 (child->dvo_port == DEVICE_PORT_DVOB) ?
482 "SDVOB" : "SDVOC");
483 p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]);
484 if (!p_mapping->initialized) {
485 p_mapping->dvo_port = child->dvo_port;
486 p_mapping->slave_addr = child->slave_addr;
487 p_mapping->dvo_wiring = child->dvo_wiring;
488 p_mapping->ddc_pin = child->ddc_pin;
489 p_mapping->i2c_pin = child->i2c_pin;
490 p_mapping->initialized = 1;
491 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
492 p_mapping->dvo_port,
493 p_mapping->slave_addr,
494 p_mapping->dvo_wiring,
495 p_mapping->ddc_pin,
496 p_mapping->i2c_pin);
497 } else {
498 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
499 "two SDVO device.\n");
500 }
501 if (child->slave2_addr) {
502 /* Maybe this is a SDVO device with multiple inputs */
503 /* And the mapping info is not added */
504 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
505 " is a SDVO device with multiple inputs.\n");
506 }
507 count++;
508 }
509
510 if (!count) {
511 /* No SDVO device info is found */
512 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
513 }
514 return;
515}
516
517static void
518parse_driver_features(struct drm_i915_private *dev_priv,
519 const struct bdb_header *bdb)
520{
521 const struct bdb_driver_features *driver;
522
523 driver = find_section(bdb, BDB_DRIVER_FEATURES);
524 if (!driver)
525 return;
526
527 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
528 dev_priv->vbt.edp_support = 1;
529
530 if (driver->dual_frequency)
531 dev_priv->render_reclock_avail = true;
532
533 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
534 /*
535 * If DRRS is not supported, drrs_type has to be set to 0.
536 * This is because, VBT is configured in such a way that
537 * static DRRS is 0 and DRRS not supported is represented by
538 * driver->drrs_enabled=false
539 */
540 if (!driver->drrs_enabled)
541 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
542}
543
544static void
545parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
546{
547 const struct bdb_edp *edp;
548 const struct edp_power_seq *edp_pps;
549 const struct edp_link_params *edp_link_params;
550
551 edp = find_section(bdb, BDB_EDP);
552 if (!edp) {
553 if (dev_priv->vbt.edp_support)
554 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
555 return;
556 }
557
558 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
559 case EDP_18BPP:
560 dev_priv->vbt.edp_bpp = 18;
561 break;
562 case EDP_24BPP:
563 dev_priv->vbt.edp_bpp = 24;
564 break;
565 case EDP_30BPP:
566 dev_priv->vbt.edp_bpp = 30;
567 break;
568 }
569
570 /* Get the eDP sequencing and link info */
571 edp_pps = &edp->power_seqs[panel_type];
572 edp_link_params = &edp->link_params[panel_type];
573
574 dev_priv->vbt.edp_pps = *edp_pps;
575
576 switch (edp_link_params->rate) {
577 case EDP_RATE_1_62:
578 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
579 break;
580 case EDP_RATE_2_7:
581 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
582 break;
583 default:
584 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
585 edp_link_params->rate);
586 break;
587 }
588
589 switch (edp_link_params->lanes) {
590 case EDP_LANE_1:
591 dev_priv->vbt.edp_lanes = 1;
592 break;
593 case EDP_LANE_2:
594 dev_priv->vbt.edp_lanes = 2;
595 break;
596 case EDP_LANE_4:
597 dev_priv->vbt.edp_lanes = 4;
598 break;
599 default:
600 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
601 edp_link_params->lanes);
602 break;
603 }
604
605 switch (edp_link_params->preemphasis) {
606 case EDP_PREEMPHASIS_NONE:
607 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
608 break;
609 case EDP_PREEMPHASIS_3_5dB:
610 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
611 break;
612 case EDP_PREEMPHASIS_6dB:
613 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
614 break;
615 case EDP_PREEMPHASIS_9_5dB:
616 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
617 break;
618 default:
619 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
620 edp_link_params->preemphasis);
621 break;
622 }
623
624 switch (edp_link_params->vswing) {
625 case EDP_VSWING_0_4V:
626 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
627 break;
628 case EDP_VSWING_0_6V:
629 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
630 break;
631 case EDP_VSWING_0_8V:
632 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
633 break;
634 case EDP_VSWING_1_2V:
635 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
636 break;
637 default:
638 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
639 edp_link_params->vswing);
640 break;
641 }
642
643 if (bdb->version >= 173) {
644 uint8_t vswing;
645
646 /* Don't read from VBT if module parameter has valid value*/
647 if (i915.edp_vswing) {
648 dev_priv->edp_low_vswing = i915.edp_vswing == 1;
649 } else {
650 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
651 dev_priv->edp_low_vswing = vswing == 0;
652 }
653 }
654}
655
656static void
657parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
658{
659 const struct bdb_psr *psr;
660 const struct psr_table *psr_table;
661
662 psr = find_section(bdb, BDB_PSR);
663 if (!psr) {
664 DRM_DEBUG_KMS("No PSR BDB found.\n");
665 return;
666 }
667
668 psr_table = &psr->psr_table[panel_type];
669
670 dev_priv->vbt.psr.full_link = psr_table->full_link;
671 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
672
673 /* Allowed VBT values goes from 0 to 15 */
674 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
675 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
676
677 switch (psr_table->lines_to_wait) {
678 case 0:
679 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
680 break;
681 case 1:
682 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
683 break;
684 case 2:
685 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
686 break;
687 case 3:
688 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
689 break;
690 default:
691 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
692 psr_table->lines_to_wait);
693 break;
694 }
695
696 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
697 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
698}
699
700static void
701parse_mipi_config(struct drm_i915_private *dev_priv,
702 const struct bdb_header *bdb)
703{
704 const struct bdb_mipi_config *start;
705 const struct mipi_config *config;
706 const struct mipi_pps_data *pps;
707
708 /* parse MIPI blocks only if LFP type is MIPI */
709 if (!dev_priv->vbt.has_mipi)
710 return;
711
712 /* Initialize this to undefined indicating no generic MIPI support */
713 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
714
715 /* Block #40 is already parsed and panel_fixed_mode is
716 * stored in dev_priv->lfp_lvds_vbt_mode
717 * resuse this when needed
718 */
719
720 /* Parse #52 for panel index used from panel_type already
721 * parsed
722 */
723 start = find_section(bdb, BDB_MIPI_CONFIG);
724 if (!start) {
725 DRM_DEBUG_KMS("No MIPI config BDB found");
726 return;
727 }
728
729 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
730 panel_type);
731
732 /*
733 * get hold of the correct configuration block and pps data as per
734 * the panel_type as index
735 */
736 config = &start->config[panel_type];
737 pps = &start->pps[panel_type];
738
739 /* store as of now full data. Trim when we realise all is not needed */
740 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
741 if (!dev_priv->vbt.dsi.config)
742 return;
743
744 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
745 if (!dev_priv->vbt.dsi.pps) {
746 kfree(dev_priv->vbt.dsi.config);
747 return;
748 }
749
750 /* We have mandatory mipi config blocks. Initialize as generic panel */
751 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
752}
753
754/* Find the sequence block and size for the given panel. */
755static const u8 *
756find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
757 u16 panel_id, u32 *seq_size)
758{
759 u32 total = get_blocksize(sequence);
760 const u8 *data = &sequence->data[0];
761 u8 current_id;
762 u32 current_size;
763 int header_size = sequence->version >= 3 ? 5 : 3;
764 int index = 0;
765 int i;
766
767 /* skip new block size */
768 if (sequence->version >= 3)
769 data += 4;
770
771 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
772 if (index + header_size > total) {
773 DRM_ERROR("Invalid sequence block (header)\n");
774 return NULL;
775 }
776
777 current_id = *(data + index);
778 if (sequence->version >= 3)
779 current_size = *((const u32 *)(data + index + 1));
780 else
781 current_size = *((const u16 *)(data + index + 1));
782
783 index += header_size;
784
785 if (index + current_size > total) {
786 DRM_ERROR("Invalid sequence block\n");
787 return NULL;
788 }
789
790 if (current_id == panel_id) {
791 *seq_size = current_size;
792 return data + index;
793 }
794
795 index += current_size;
796 }
797
798 DRM_ERROR("Sequence block detected but no valid configuration\n");
799
800 return NULL;
801}
802
803static int goto_next_sequence(const u8 *data, int index, int total)
804{
805 u16 len;
806
807 /* Skip Sequence Byte. */
808 for (index = index + 1; index < total; index += len) {
809 u8 operation_byte = *(data + index);
810 index++;
811
812 switch (operation_byte) {
813 case MIPI_SEQ_ELEM_END:
814 return index;
815 case MIPI_SEQ_ELEM_SEND_PKT:
816 if (index + 4 > total)
817 return 0;
818
819 len = *((const u16 *)(data + index + 2)) + 4;
820 break;
821 case MIPI_SEQ_ELEM_DELAY:
822 len = 4;
823 break;
824 case MIPI_SEQ_ELEM_GPIO:
825 len = 2;
826 break;
827 case MIPI_SEQ_ELEM_I2C:
828 if (index + 7 > total)
829 return 0;
830 len = *(data + index + 6) + 7;
831 break;
832 default:
833 DRM_ERROR("Unknown operation byte\n");
834 return 0;
835 }
836 }
837
838 return 0;
839}
840
841static int goto_next_sequence_v3(const u8 *data, int index, int total)
842{
843 int seq_end;
844 u16 len;
845 u32 size_of_sequence;
846
847 /*
848 * Could skip sequence based on Size of Sequence alone, but also do some
849 * checking on the structure.
850 */
851 if (total < 5) {
852 DRM_ERROR("Too small sequence size\n");
853 return 0;
854 }
855
856 /* Skip Sequence Byte. */
857 index++;
858
859 /*
860 * Size of Sequence. Excludes the Sequence Byte and the size itself,
861 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
862 * byte.
863 */
864 size_of_sequence = *((const uint32_t *)(data + index));
865 index += 4;
866
867 seq_end = index + size_of_sequence;
868 if (seq_end > total) {
869 DRM_ERROR("Invalid sequence size\n");
870 return 0;
871 }
872
873 for (; index < total; index += len) {
874 u8 operation_byte = *(data + index);
875 index++;
876
877 if (operation_byte == MIPI_SEQ_ELEM_END) {
878 if (index != seq_end) {
879 DRM_ERROR("Invalid element structure\n");
880 return 0;
881 }
882 return index;
883 }
884
885 len = *(data + index);
886 index++;
887
888 /*
889 * FIXME: Would be nice to check elements like for v1/v2 in
890 * goto_next_sequence() above.
891 */
892 switch (operation_byte) {
893 case MIPI_SEQ_ELEM_SEND_PKT:
894 case MIPI_SEQ_ELEM_DELAY:
895 case MIPI_SEQ_ELEM_GPIO:
896 case MIPI_SEQ_ELEM_I2C:
897 case MIPI_SEQ_ELEM_SPI:
898 case MIPI_SEQ_ELEM_PMIC:
899 break;
900 default:
901 DRM_ERROR("Unknown operation byte %u\n",
902 operation_byte);
903 break;
904 }
905 }
906
907 return 0;
908}
909
910static void
911parse_mipi_sequence(struct drm_i915_private *dev_priv,
912 const struct bdb_header *bdb)
913{
914 const struct bdb_mipi_sequence *sequence;
915 const u8 *seq_data;
916 u32 seq_size;
917 u8 *data;
918 int index = 0;
919
920 /* Only our generic panel driver uses the sequence block. */
921 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
922 return;
923
924 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
925 if (!sequence) {
926 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
927 return;
928 }
929
930 /* Fail gracefully for forward incompatible sequence block. */
931 if (sequence->version >= 4) {
932 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
933 sequence->version);
934 return;
935 }
936
937 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
938
939 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
940 if (!seq_data)
941 return;
942
943 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
944 if (!data)
945 return;
946
947 /* Parse the sequences, store pointers to each sequence. */
948 for (;;) {
949 u8 seq_id = *(data + index);
950 if (seq_id == MIPI_SEQ_END)
951 break;
952
953 if (seq_id >= MIPI_SEQ_MAX) {
954 DRM_ERROR("Unknown sequence %u\n", seq_id);
955 goto err;
956 }
957
958 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
959
960 if (sequence->version >= 3)
961 index = goto_next_sequence_v3(data, index, seq_size);
962 else
963 index = goto_next_sequence(data, index, seq_size);
964 if (!index) {
965 DRM_ERROR("Invalid sequence %u\n", seq_id);
966 goto err;
967 }
968 }
969
970 dev_priv->vbt.dsi.data = data;
971 dev_priv->vbt.dsi.size = seq_size;
972 dev_priv->vbt.dsi.seq_version = sequence->version;
973
974 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
975 return;
976
977err:
978 kfree(data);
979 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
980}
981
982static u8 translate_iboost(u8 val)
983{
984 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
985
986 if (val >= ARRAY_SIZE(mapping)) {
987 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
988 return 0;
989 }
990 return mapping[val];
991}
992
993static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
994 const struct bdb_header *bdb)
995{
996 union child_device_config *it, *child = NULL;
997 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
998 uint8_t hdmi_level_shift;
999 int i, j;
1000 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1001 uint8_t aux_channel, ddc_pin;
1002 /* Each DDI port can have more than one value on the "DVO Port" field,
1003 * so look for all the possible values for each port and abort if more
1004 * than one is found. */
1005 int dvo_ports[][3] = {
1006 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1007 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1008 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1009 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1010 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
1011 };
1012
1013 /* Find the child device to use, abort if more than one found. */
1014 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1015 it = dev_priv->vbt.child_dev + i;
1016
1017 for (j = 0; j < 3; j++) {
1018 if (dvo_ports[port][j] == -1)
1019 break;
1020
1021 if (it->common.dvo_port == dvo_ports[port][j]) {
1022 if (child) {
1023 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1024 port_name(port));
1025 return;
1026 }
1027 child = it;
1028 }
1029 }
1030 }
1031 if (!child)
1032 return;
1033
1034 aux_channel = child->raw[25];
1035 ddc_pin = child->common.ddc_pin;
1036
1037 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1038 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1039 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1040 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1041 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1042
1043 info->supports_dvi = is_dvi;
1044 info->supports_hdmi = is_hdmi;
1045 info->supports_dp = is_dp;
1046
1047 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1048 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1049
1050 if (is_edp && is_dvi)
1051 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1052 port_name(port));
1053 if (is_crt && port != PORT_E)
1054 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1055 if (is_crt && (is_dvi || is_dp))
1056 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1057 port_name(port));
1058 if (is_dvi && (port == PORT_A || port == PORT_E))
1059 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
1060 if (!is_dvi && !is_dp && !is_crt)
1061 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1062 port_name(port));
1063 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1064 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
1065
1066 if (is_dvi) {
1067 if (port == PORT_E) {
1068 info->alternate_ddc_pin = ddc_pin;
1069 /* if DDIE share ddc pin with other port, then
1070 * dvi/hdmi couldn't exist on the shared port.
1071 * Otherwise they share the same ddc bin and system
1072 * couldn't communicate with them seperately. */
1073 if (ddc_pin == DDC_PIN_B) {
1074 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1075 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1076 } else if (ddc_pin == DDC_PIN_C) {
1077 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1078 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1079 } else if (ddc_pin == DDC_PIN_D) {
1080 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1081 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1082 }
1083 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
1084 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
1085 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
1086 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
1087 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
1088 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1089 }
1090
1091 if (is_dp) {
1092 if (port == PORT_E) {
1093 info->alternate_aux_channel = aux_channel;
1094 /* if DDIE share aux channel with other port, then
1095 * DP couldn't exist on the shared port. Otherwise
1096 * they share the same aux channel and system
1097 * couldn't communicate with them seperately. */
1098 if (aux_channel == DP_AUX_A)
1099 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1100 else if (aux_channel == DP_AUX_B)
1101 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1102 else if (aux_channel == DP_AUX_C)
1103 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1104 else if (aux_channel == DP_AUX_D)
1105 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1106 }
1107 else if (aux_channel == DP_AUX_A && port != PORT_A)
1108 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
1109 else if (aux_channel == DP_AUX_B && port != PORT_B)
1110 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
1111 else if (aux_channel == DP_AUX_C && port != PORT_C)
1112 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
1113 else if (aux_channel == DP_AUX_D && port != PORT_D)
1114 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1115 }
1116
1117 if (bdb->version >= 158) {
1118 /* The VBT HDMI level shift values match the table we have. */
1119 hdmi_level_shift = child->raw[7] & 0xF;
1120 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1121 port_name(port),
1122 hdmi_level_shift);
1123 info->hdmi_level_shift = hdmi_level_shift;
1124 }
1125
1126 /* Parse the I_boost config for SKL and above */
1127 if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
1128 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1129 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1130 port_name(port), info->dp_boost_level);
1131 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1132 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1133 port_name(port), info->hdmi_boost_level);
1134 }
1135}
1136
1137static void parse_ddi_ports(struct drm_i915_private *dev_priv,
1138 const struct bdb_header *bdb)
1139{
1140 enum port port;
1141
1142 if (!HAS_DDI(dev_priv))
1143 return;
1144
1145 if (!dev_priv->vbt.child_dev_num)
1146 return;
1147
1148 if (bdb->version < 155)
1149 return;
1150
1151 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1152 parse_ddi_port(dev_priv, port, bdb);
1153}
1154
1155static void
1156parse_device_mapping(struct drm_i915_private *dev_priv,
1157 const struct bdb_header *bdb)
1158{
1159 const struct bdb_general_definitions *p_defs;
1160 const union child_device_config *p_child;
1161 union child_device_config *child_dev_ptr;
1162 int i, child_device_num, count;
1163 u8 expected_size;
1164 u16 block_size;
1165
1166 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1167 if (!p_defs) {
1168 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1169 return;
1170 }
1171 if (bdb->version < 106) {
1172 expected_size = 22;
1173 } else if (bdb->version < 109) {
1174 expected_size = 27;
1175 } else if (bdb->version < 195) {
1176 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
1177 expected_size = sizeof(struct old_child_dev_config);
1178 } else if (bdb->version == 195) {
1179 expected_size = 37;
1180 } else if (bdb->version <= 197) {
1181 expected_size = 38;
1182 } else {
1183 expected_size = 38;
1184 BUILD_BUG_ON(sizeof(*p_child) < 38);
1185 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1186 bdb->version, expected_size);
1187 }
1188
1189 /* Flag an error for unexpected size, but continue anyway. */
1190 if (p_defs->child_dev_size != expected_size)
1191 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1192 p_defs->child_dev_size, expected_size, bdb->version);
1193
1194 /* The legacy sized child device config is the minimum we need. */
1195 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1196 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1197 p_defs->child_dev_size);
1198 return;
1199 }
1200
1201 /* get the block size of general definitions */
1202 block_size = get_blocksize(p_defs);
1203 /* get the number of child device */
1204 child_device_num = (block_size - sizeof(*p_defs)) /
1205 p_defs->child_dev_size;
1206 count = 0;
1207 /* get the number of child device that is present */
1208 for (i = 0; i < child_device_num; i++) {
1209 p_child = child_device_ptr(p_defs, i);
1210 if (!p_child->common.device_type) {
1211 /* skip the device block if device type is invalid */
1212 continue;
1213 }
1214 count++;
1215 }
1216 if (!count) {
1217 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1218 return;
1219 }
1220 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1221 if (!dev_priv->vbt.child_dev) {
1222 DRM_DEBUG_KMS("No memory space for child device\n");
1223 return;
1224 }
1225
1226 dev_priv->vbt.child_dev_num = count;
1227 count = 0;
1228 for (i = 0; i < child_device_num; i++) {
1229 p_child = child_device_ptr(p_defs, i);
1230 if (!p_child->common.device_type) {
1231 /* skip the device block if device type is invalid */
1232 continue;
1233 }
1234
1235 if (p_child->common.dvo_port >= DVO_PORT_MIPIA
1236 && p_child->common.dvo_port <= DVO_PORT_MIPID
1237 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
1238 DRM_DEBUG_KMS("Found MIPI as LFP\n");
1239 dev_priv->vbt.has_mipi = 1;
1240 dev_priv->vbt.dsi.port = p_child->common.dvo_port;
1241 }
1242
1243 child_dev_ptr = dev_priv->vbt.child_dev + count;
1244 count++;
1245
1246 /*
1247 * Copy as much as we know (sizeof) and is available
1248 * (child_dev_size) of the child device. Accessing the data must
1249 * depend on VBT version.
1250 */
1251 memcpy(child_dev_ptr, p_child,
1252 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
1253 }
1254 return;
1255}
1256
1257static void
1258init_vbt_defaults(struct drm_i915_private *dev_priv)
1259{
1260 enum port port;
1261
1262 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1263
1264 /* Default to having backlight */
1265 dev_priv->vbt.backlight.present = true;
1266
1267 /* LFP panel data */
1268 dev_priv->vbt.lvds_dither = 1;
1269 dev_priv->vbt.lvds_vbt = 0;
1270
1271 /* SDVO panel data */
1272 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1273
1274 /* general features */
1275 dev_priv->vbt.int_tv_support = 1;
1276 dev_priv->vbt.int_crt_support = 1;
1277
1278 /* Default to using SSC */
1279 dev_priv->vbt.lvds_use_ssc = 1;
1280 /*
1281 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1282 * clock for LVDS.
1283 */
1284 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1285 !HAS_PCH_SPLIT(dev_priv));
1286 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1287
1288 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1289 struct ddi_vbt_port_info *info =
1290 &dev_priv->vbt.ddi_port_info[port];
1291
1292 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1293
1294 info->supports_dvi = (port != PORT_A && port != PORT_E);
1295 info->supports_hdmi = info->supports_dvi;
1296 info->supports_dp = (port != PORT_E);
1297 }
1298}
1299
1300static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1301{
1302 const void *_vbt = vbt;
1303
1304 return _vbt + vbt->bdb_offset;
1305}
1306
1307/**
1308 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1309 * @buf: pointer to a buffer to validate
1310 * @size: size of the buffer
1311 *
1312 * Returns true on valid VBT.
1313 */
1314bool intel_bios_is_valid_vbt(const void *buf, size_t size)
1315{
1316 const struct vbt_header *vbt = buf;
1317 const struct bdb_header *bdb;
1318
1319 if (!vbt)
1320 return false;
1321
1322 if (sizeof(struct vbt_header) > size) {
1323 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1324 return false;
1325 }
1326
1327 if (memcmp(vbt->signature, "$VBT", 4)) {
1328 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1329 return false;
1330 }
1331
1332 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
1333 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1334 return false;
1335 }
1336
1337 bdb = get_bdb_header(vbt);
1338 if (vbt->bdb_offset + bdb->bdb_size > size) {
1339 DRM_DEBUG_DRIVER("BDB incomplete\n");
1340 return false;
1341 }
1342
1343 return vbt;
1344}
1345
1346static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
1347{
1348 size_t i;
1349
1350 /* Scour memory looking for the VBT signature. */
1351 for (i = 0; i + 4 < size; i++) {
1352 void *vbt;
1353
1354 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1355 continue;
1356
1357 /*
1358 * This is the one place where we explicitly discard the address
1359 * space (__iomem) of the BIOS/VBT.
1360 */
1361 vbt = (void __force *) bios + i;
1362 if (intel_bios_is_valid_vbt(vbt, size - i))
1363 return vbt;
1364
1365 break;
1366 }
1367
1368 return NULL;
1369}
1370
1371/**
1372 * intel_bios_init - find VBT and initialize settings from the BIOS
1373 * @dev_priv: i915 device instance
1374 *
1375 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1376 * to appropriate values.
1377 *
1378 * Returns 0 on success, nonzero on failure.
1379 */
1380int
1381intel_bios_init(struct drm_i915_private *dev_priv)
1382{
1383 struct pci_dev *pdev = dev_priv->dev->pdev;
1384 const struct vbt_header *vbt = dev_priv->opregion.vbt;
1385 const struct bdb_header *bdb;
1386 u8 __iomem *bios = NULL;
1387
1388 if (HAS_PCH_NOP(dev_priv))
1389 return -ENODEV;
1390
1391 init_vbt_defaults(dev_priv);
1392
1393 if (!vbt) {
1394 size_t size;
1395
1396 bios = pci_map_rom(pdev, &size);
1397 if (!bios)
1398 return -1;
1399
1400 vbt = find_vbt(bios, size);
1401 if (!vbt) {
1402 pci_unmap_rom(pdev, bios);
1403 return -1;
1404 }
1405
1406 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
1407 }
1408
1409 bdb = get_bdb_header(vbt);
1410
1411 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1412 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
1413
1414 /* Grab useful general definitions */
1415 parse_general_features(dev_priv, bdb);
1416 parse_general_definitions(dev_priv, bdb);
1417 parse_lfp_panel_data(dev_priv, bdb);
1418 parse_lfp_backlight(dev_priv, bdb);
1419 parse_sdvo_panel_data(dev_priv, bdb);
1420 parse_sdvo_device_mapping(dev_priv, bdb);
1421 parse_device_mapping(dev_priv, bdb);
1422 parse_driver_features(dev_priv, bdb);
1423 parse_edp(dev_priv, bdb);
1424 parse_psr(dev_priv, bdb);
1425 parse_mipi_config(dev_priv, bdb);
1426 parse_mipi_sequence(dev_priv, bdb);
1427 parse_ddi_ports(dev_priv, bdb);
1428
1429 if (bios)
1430 pci_unmap_rom(pdev, bios);
1431
1432 return 0;
1433}
1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
31#include "i915_drv.h"
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
35
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
60
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
77static const void *
78find_section(const void *_bdb, int section_id)
79{
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
82 int index = 0;
83 u32 total, current_size;
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
91 while (index + 3 < total) {
92 current_id = *(base + index);
93 current_size = _get_blocksize(base + index);
94 index += 3;
95
96 if (index + current_size > total)
97 return NULL;
98
99 if (current_id == section_id)
100 return base + index;
101
102 index += current_size;
103 }
104
105 return NULL;
106}
107
108static void
109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
110 const struct lvds_dvo_timing *dvo_timing)
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 ((dvo_timing->hsync_pulse_width_hi << 8) |
118 dvo_timing->hsync_pulse_width_lo);
119 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
120 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
121
122 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
123 dvo_timing->vactive_lo;
124 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
125 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
126 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
127 ((dvo_timing->vsync_pulse_width_hi << 4) |
128 dvo_timing->vsync_pulse_width_lo);
129 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
130 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
131 panel_fixed_mode->clock = dvo_timing->clock * 10;
132 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
133
134 if (dvo_timing->hsync_positive)
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
136 else
137 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
138
139 if (dvo_timing->vsync_positive)
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
141 else
142 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
143
144 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
145 dvo_timing->himage_lo;
146 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
147 dvo_timing->vimage_lo;
148
149 /* Some VBTs have bogus h/vtotal values */
150 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
151 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
152 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
153 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
154
155 drm_mode_set_name(panel_fixed_mode);
156}
157
158static const struct lvds_dvo_timing *
159get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
160 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
161 int index)
162{
163 /*
164 * the size of fp_timing varies on the different platform.
165 * So calculate the DVO timing relative offset in LVDS data
166 * entry to get the DVO timing entry
167 */
168
169 int lfp_data_size =
170 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
172 int dvo_timing_offset =
173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
175 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
176
177 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
178}
179
180/* get lvds_fp_timing entry
181 * this function may return NULL if the corresponding entry is invalid
182 */
183static const struct lvds_fp_timing *
184get_lvds_fp_timing(const struct bdb_header *bdb,
185 const struct bdb_lvds_lfp_data *data,
186 const struct bdb_lvds_lfp_data_ptrs *ptrs,
187 int index)
188{
189 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
190 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
191 size_t ofs;
192
193 if (index >= ARRAY_SIZE(ptrs->ptr))
194 return NULL;
195 ofs = ptrs->ptr[index].fp_timing_offset;
196 if (ofs < data_ofs ||
197 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
198 return NULL;
199 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
200}
201
202/* Try to find integrated panel data */
203static void
204parse_lfp_panel_data(struct drm_i915_private *dev_priv,
205 const struct bdb_header *bdb)
206{
207 const struct bdb_lvds_options *lvds_options;
208 const struct bdb_lvds_lfp_data *lvds_lfp_data;
209 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
210 const struct lvds_dvo_timing *panel_dvo_timing;
211 const struct lvds_fp_timing *fp_timing;
212 struct drm_display_mode *panel_fixed_mode;
213 int panel_type;
214 int drrs_mode;
215 int ret;
216
217 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
218 if (!lvds_options)
219 return;
220
221 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
222
223 ret = intel_opregion_get_panel_type(dev_priv);
224 if (ret >= 0) {
225 WARN_ON(ret > 0xf);
226 panel_type = ret;
227 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
228 } else {
229 if (lvds_options->panel_type > 0xf) {
230 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
231 lvds_options->panel_type);
232 return;
233 }
234 panel_type = lvds_options->panel_type;
235 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
236 }
237
238 dev_priv->vbt.panel_type = panel_type;
239
240 drrs_mode = (lvds_options->dps_panel_type_bits
241 >> (panel_type * 2)) & MODE_MASK;
242 /*
243 * VBT has static DRRS = 0 and seamless DRRS = 2.
244 * The below piece of code is required to adjust vbt.drrs_type
245 * to match the enum drrs_support_type.
246 */
247 switch (drrs_mode) {
248 case 0:
249 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
250 DRM_DEBUG_KMS("DRRS supported mode is static\n");
251 break;
252 case 2:
253 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
254 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
255 break;
256 default:
257 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
258 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
259 break;
260 }
261
262 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
263 if (!lvds_lfp_data)
264 return;
265
266 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
267 if (!lvds_lfp_data_ptrs)
268 return;
269
270 dev_priv->vbt.lvds_vbt = 1;
271
272 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
273 lvds_lfp_data_ptrs,
274 panel_type);
275
276 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
277 if (!panel_fixed_mode)
278 return;
279
280 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
281
282 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
283
284 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
285 drm_mode_debug_printmodeline(panel_fixed_mode);
286
287 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
288 lvds_lfp_data_ptrs,
289 panel_type);
290 if (fp_timing) {
291 /* check the resolution, just to be sure */
292 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
293 fp_timing->y_res == panel_fixed_mode->vdisplay) {
294 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
295 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
296 dev_priv->vbt.bios_lvds_val);
297 }
298 }
299}
300
301static void
302parse_lfp_backlight(struct drm_i915_private *dev_priv,
303 const struct bdb_header *bdb)
304{
305 const struct bdb_lfp_backlight_data *backlight_data;
306 const struct bdb_lfp_backlight_data_entry *entry;
307 int panel_type = dev_priv->vbt.panel_type;
308
309 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
310 if (!backlight_data)
311 return;
312
313 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
314 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
315 backlight_data->entry_size);
316 return;
317 }
318
319 entry = &backlight_data->data[panel_type];
320
321 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
322 if (!dev_priv->vbt.backlight.present) {
323 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
324 entry->type);
325 return;
326 }
327
328 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
329 if (bdb->version >= 191 &&
330 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
331 const struct bdb_lfp_backlight_control_method *method;
332
333 method = &backlight_data->backlight_control[panel_type];
334 dev_priv->vbt.backlight.type = method->type;
335 dev_priv->vbt.backlight.controller = method->controller;
336 }
337
338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
342 "active %s, min brightness %u, level %u, controller %u\n",
343 dev_priv->vbt.backlight.pwm_freq_hz,
344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
345 dev_priv->vbt.backlight.min_brightness,
346 backlight_data->level[panel_type],
347 dev_priv->vbt.backlight.controller);
348}
349
350/* Try to find sdvo panel data */
351static void
352parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
353 const struct bdb_header *bdb)
354{
355 const struct lvds_dvo_timing *dvo_timing;
356 struct drm_display_mode *panel_fixed_mode;
357 int index;
358
359 index = i915_modparams.vbt_sdvo_panel_type;
360 if (index == -2) {
361 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
362 return;
363 }
364
365 if (index == -1) {
366 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
367
368 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
369 if (!sdvo_lvds_options)
370 return;
371
372 index = sdvo_lvds_options->panel_type;
373 }
374
375 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
376 if (!dvo_timing)
377 return;
378
379 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
380 if (!panel_fixed_mode)
381 return;
382
383 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
384
385 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
386
387 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
388 drm_mode_debug_printmodeline(panel_fixed_mode);
389}
390
391static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
392 bool alternate)
393{
394 switch (INTEL_GEN(dev_priv)) {
395 case 2:
396 return alternate ? 66667 : 48000;
397 case 3:
398 case 4:
399 return alternate ? 100000 : 96000;
400 default:
401 return alternate ? 100000 : 120000;
402 }
403}
404
405static void
406parse_general_features(struct drm_i915_private *dev_priv,
407 const struct bdb_header *bdb)
408{
409 const struct bdb_general_features *general;
410
411 general = find_section(bdb, BDB_GENERAL_FEATURES);
412 if (!general)
413 return;
414
415 dev_priv->vbt.int_tv_support = general->int_tv_support;
416 /* int_crt_support can't be trusted on earlier platforms */
417 if (bdb->version >= 155 &&
418 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
419 dev_priv->vbt.int_crt_support = general->int_crt_support;
420 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
421 dev_priv->vbt.lvds_ssc_freq =
422 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
423 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
424 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
425 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
426 dev_priv->vbt.int_tv_support,
427 dev_priv->vbt.int_crt_support,
428 dev_priv->vbt.lvds_use_ssc,
429 dev_priv->vbt.lvds_ssc_freq,
430 dev_priv->vbt.display_clock_mode,
431 dev_priv->vbt.fdi_rx_polarity_inverted);
432}
433
434static const struct child_device_config *
435child_device_ptr(const struct bdb_general_definitions *defs, int i)
436{
437 return (const void *) &defs->devices[i * defs->child_dev_size];
438}
439
440static void
441parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
442{
443 struct sdvo_device_mapping *mapping;
444 const struct child_device_config *child;
445 int i, count = 0;
446
447 /*
448 * Only parse SDVO mappings on gens that could have SDVO. This isn't
449 * accurate and doesn't have to be, as long as it's not too strict.
450 */
451 if (!IS_GEN(dev_priv, 3, 7)) {
452 DRM_DEBUG_KMS("Skipping SDVO device mapping\n");
453 return;
454 }
455
456 for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
457 child = dev_priv->vbt.child_dev + i;
458
459 if (child->slave_addr != SLAVE_ADDR1 &&
460 child->slave_addr != SLAVE_ADDR2) {
461 /*
462 * If the slave address is neither 0x70 nor 0x72,
463 * it is not a SDVO device. Skip it.
464 */
465 continue;
466 }
467 if (child->dvo_port != DEVICE_PORT_DVOB &&
468 child->dvo_port != DEVICE_PORT_DVOC) {
469 /* skip the incorrect SDVO port */
470 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
471 continue;
472 }
473 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
474 " %s port\n",
475 child->slave_addr,
476 (child->dvo_port == DEVICE_PORT_DVOB) ?
477 "SDVOB" : "SDVOC");
478 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
479 if (!mapping->initialized) {
480 mapping->dvo_port = child->dvo_port;
481 mapping->slave_addr = child->slave_addr;
482 mapping->dvo_wiring = child->dvo_wiring;
483 mapping->ddc_pin = child->ddc_pin;
484 mapping->i2c_pin = child->i2c_pin;
485 mapping->initialized = 1;
486 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
487 mapping->dvo_port,
488 mapping->slave_addr,
489 mapping->dvo_wiring,
490 mapping->ddc_pin,
491 mapping->i2c_pin);
492 } else {
493 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
494 "two SDVO device.\n");
495 }
496 if (child->slave2_addr) {
497 /* Maybe this is a SDVO device with multiple inputs */
498 /* And the mapping info is not added */
499 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
500 " is a SDVO device with multiple inputs.\n");
501 }
502 count++;
503 }
504
505 if (!count) {
506 /* No SDVO device info is found */
507 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
508 }
509}
510
511static void
512parse_driver_features(struct drm_i915_private *dev_priv,
513 const struct bdb_header *bdb)
514{
515 const struct bdb_driver_features *driver;
516
517 driver = find_section(bdb, BDB_DRIVER_FEATURES);
518 if (!driver)
519 return;
520
521 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
522 dev_priv->vbt.edp.support = 1;
523
524 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
525 /*
526 * If DRRS is not supported, drrs_type has to be set to 0.
527 * This is because, VBT is configured in such a way that
528 * static DRRS is 0 and DRRS not supported is represented by
529 * driver->drrs_enabled=false
530 */
531 if (!driver->drrs_enabled)
532 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
533}
534
535static void
536parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
537{
538 const struct bdb_edp *edp;
539 const struct edp_power_seq *edp_pps;
540 const struct edp_fast_link_params *edp_link_params;
541 int panel_type = dev_priv->vbt.panel_type;
542
543 edp = find_section(bdb, BDB_EDP);
544 if (!edp) {
545 if (dev_priv->vbt.edp.support)
546 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
547 return;
548 }
549
550 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
551 case EDP_18BPP:
552 dev_priv->vbt.edp.bpp = 18;
553 break;
554 case EDP_24BPP:
555 dev_priv->vbt.edp.bpp = 24;
556 break;
557 case EDP_30BPP:
558 dev_priv->vbt.edp.bpp = 30;
559 break;
560 }
561
562 /* Get the eDP sequencing and link info */
563 edp_pps = &edp->power_seqs[panel_type];
564 edp_link_params = &edp->fast_link_params[panel_type];
565
566 dev_priv->vbt.edp.pps = *edp_pps;
567
568 switch (edp_link_params->rate) {
569 case EDP_RATE_1_62:
570 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
571 break;
572 case EDP_RATE_2_7:
573 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
574 break;
575 default:
576 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
577 edp_link_params->rate);
578 break;
579 }
580
581 switch (edp_link_params->lanes) {
582 case EDP_LANE_1:
583 dev_priv->vbt.edp.lanes = 1;
584 break;
585 case EDP_LANE_2:
586 dev_priv->vbt.edp.lanes = 2;
587 break;
588 case EDP_LANE_4:
589 dev_priv->vbt.edp.lanes = 4;
590 break;
591 default:
592 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
593 edp_link_params->lanes);
594 break;
595 }
596
597 switch (edp_link_params->preemphasis) {
598 case EDP_PREEMPHASIS_NONE:
599 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
600 break;
601 case EDP_PREEMPHASIS_3_5dB:
602 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
603 break;
604 case EDP_PREEMPHASIS_6dB:
605 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
606 break;
607 case EDP_PREEMPHASIS_9_5dB:
608 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
609 break;
610 default:
611 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
612 edp_link_params->preemphasis);
613 break;
614 }
615
616 switch (edp_link_params->vswing) {
617 case EDP_VSWING_0_4V:
618 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
619 break;
620 case EDP_VSWING_0_6V:
621 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
622 break;
623 case EDP_VSWING_0_8V:
624 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
625 break;
626 case EDP_VSWING_1_2V:
627 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
628 break;
629 default:
630 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
631 edp_link_params->vswing);
632 break;
633 }
634
635 if (bdb->version >= 173) {
636 uint8_t vswing;
637
638 /* Don't read from VBT if module parameter has valid value*/
639 if (i915_modparams.edp_vswing) {
640 dev_priv->vbt.edp.low_vswing =
641 i915_modparams.edp_vswing == 1;
642 } else {
643 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
644 dev_priv->vbt.edp.low_vswing = vswing == 0;
645 }
646 }
647}
648
649static void
650parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
651{
652 const struct bdb_psr *psr;
653 const struct psr_table *psr_table;
654 int panel_type = dev_priv->vbt.panel_type;
655
656 psr = find_section(bdb, BDB_PSR);
657 if (!psr) {
658 DRM_DEBUG_KMS("No PSR BDB found.\n");
659 return;
660 }
661
662 psr_table = &psr->psr_table[panel_type];
663
664 dev_priv->vbt.psr.full_link = psr_table->full_link;
665 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
666
667 /* Allowed VBT values goes from 0 to 15 */
668 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
669 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
670
671 switch (psr_table->lines_to_wait) {
672 case 0:
673 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
674 break;
675 case 1:
676 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
677 break;
678 case 2:
679 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
680 break;
681 case 3:
682 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
683 break;
684 default:
685 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
686 psr_table->lines_to_wait);
687 break;
688 }
689
690 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
691 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
692}
693
694static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
695 u16 version, enum port port)
696{
697 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
698 dev_priv->vbt.dsi.bl_ports = BIT(port);
699 if (dev_priv->vbt.dsi.config->cabc_supported)
700 dev_priv->vbt.dsi.cabc_ports = BIT(port);
701
702 return;
703 }
704
705 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
706 case DL_DCS_PORT_A:
707 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
708 break;
709 case DL_DCS_PORT_C:
710 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
711 break;
712 default:
713 case DL_DCS_PORT_A_AND_C:
714 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
715 break;
716 }
717
718 if (!dev_priv->vbt.dsi.config->cabc_supported)
719 return;
720
721 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
722 case DL_DCS_PORT_A:
723 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
724 break;
725 case DL_DCS_PORT_C:
726 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
727 break;
728 default:
729 case DL_DCS_PORT_A_AND_C:
730 dev_priv->vbt.dsi.cabc_ports =
731 BIT(PORT_A) | BIT(PORT_C);
732 break;
733 }
734}
735
736static void
737parse_mipi_config(struct drm_i915_private *dev_priv,
738 const struct bdb_header *bdb)
739{
740 const struct bdb_mipi_config *start;
741 const struct mipi_config *config;
742 const struct mipi_pps_data *pps;
743 int panel_type = dev_priv->vbt.panel_type;
744 enum port port;
745
746 /* parse MIPI blocks only if LFP type is MIPI */
747 if (!intel_bios_is_dsi_present(dev_priv, &port))
748 return;
749
750 /* Initialize this to undefined indicating no generic MIPI support */
751 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
752
753 /* Block #40 is already parsed and panel_fixed_mode is
754 * stored in dev_priv->lfp_lvds_vbt_mode
755 * resuse this when needed
756 */
757
758 /* Parse #52 for panel index used from panel_type already
759 * parsed
760 */
761 start = find_section(bdb, BDB_MIPI_CONFIG);
762 if (!start) {
763 DRM_DEBUG_KMS("No MIPI config BDB found");
764 return;
765 }
766
767 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
768 panel_type);
769
770 /*
771 * get hold of the correct configuration block and pps data as per
772 * the panel_type as index
773 */
774 config = &start->config[panel_type];
775 pps = &start->pps[panel_type];
776
777 /* store as of now full data. Trim when we realise all is not needed */
778 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
779 if (!dev_priv->vbt.dsi.config)
780 return;
781
782 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
783 if (!dev_priv->vbt.dsi.pps) {
784 kfree(dev_priv->vbt.dsi.config);
785 return;
786 }
787
788 parse_dsi_backlight_ports(dev_priv, bdb->version, port);
789
790 /* We have mandatory mipi config blocks. Initialize as generic panel */
791 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
792}
793
794/* Find the sequence block and size for the given panel. */
795static const u8 *
796find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
797 u16 panel_id, u32 *seq_size)
798{
799 u32 total = get_blocksize(sequence);
800 const u8 *data = &sequence->data[0];
801 u8 current_id;
802 u32 current_size;
803 int header_size = sequence->version >= 3 ? 5 : 3;
804 int index = 0;
805 int i;
806
807 /* skip new block size */
808 if (sequence->version >= 3)
809 data += 4;
810
811 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
812 if (index + header_size > total) {
813 DRM_ERROR("Invalid sequence block (header)\n");
814 return NULL;
815 }
816
817 current_id = *(data + index);
818 if (sequence->version >= 3)
819 current_size = *((const u32 *)(data + index + 1));
820 else
821 current_size = *((const u16 *)(data + index + 1));
822
823 index += header_size;
824
825 if (index + current_size > total) {
826 DRM_ERROR("Invalid sequence block\n");
827 return NULL;
828 }
829
830 if (current_id == panel_id) {
831 *seq_size = current_size;
832 return data + index;
833 }
834
835 index += current_size;
836 }
837
838 DRM_ERROR("Sequence block detected but no valid configuration\n");
839
840 return NULL;
841}
842
843static int goto_next_sequence(const u8 *data, int index, int total)
844{
845 u16 len;
846
847 /* Skip Sequence Byte. */
848 for (index = index + 1; index < total; index += len) {
849 u8 operation_byte = *(data + index);
850 index++;
851
852 switch (operation_byte) {
853 case MIPI_SEQ_ELEM_END:
854 return index;
855 case MIPI_SEQ_ELEM_SEND_PKT:
856 if (index + 4 > total)
857 return 0;
858
859 len = *((const u16 *)(data + index + 2)) + 4;
860 break;
861 case MIPI_SEQ_ELEM_DELAY:
862 len = 4;
863 break;
864 case MIPI_SEQ_ELEM_GPIO:
865 len = 2;
866 break;
867 case MIPI_SEQ_ELEM_I2C:
868 if (index + 7 > total)
869 return 0;
870 len = *(data + index + 6) + 7;
871 break;
872 default:
873 DRM_ERROR("Unknown operation byte\n");
874 return 0;
875 }
876 }
877
878 return 0;
879}
880
881static int goto_next_sequence_v3(const u8 *data, int index, int total)
882{
883 int seq_end;
884 u16 len;
885 u32 size_of_sequence;
886
887 /*
888 * Could skip sequence based on Size of Sequence alone, but also do some
889 * checking on the structure.
890 */
891 if (total < 5) {
892 DRM_ERROR("Too small sequence size\n");
893 return 0;
894 }
895
896 /* Skip Sequence Byte. */
897 index++;
898
899 /*
900 * Size of Sequence. Excludes the Sequence Byte and the size itself,
901 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
902 * byte.
903 */
904 size_of_sequence = *((const uint32_t *)(data + index));
905 index += 4;
906
907 seq_end = index + size_of_sequence;
908 if (seq_end > total) {
909 DRM_ERROR("Invalid sequence size\n");
910 return 0;
911 }
912
913 for (; index < total; index += len) {
914 u8 operation_byte = *(data + index);
915 index++;
916
917 if (operation_byte == MIPI_SEQ_ELEM_END) {
918 if (index != seq_end) {
919 DRM_ERROR("Invalid element structure\n");
920 return 0;
921 }
922 return index;
923 }
924
925 len = *(data + index);
926 index++;
927
928 /*
929 * FIXME: Would be nice to check elements like for v1/v2 in
930 * goto_next_sequence() above.
931 */
932 switch (operation_byte) {
933 case MIPI_SEQ_ELEM_SEND_PKT:
934 case MIPI_SEQ_ELEM_DELAY:
935 case MIPI_SEQ_ELEM_GPIO:
936 case MIPI_SEQ_ELEM_I2C:
937 case MIPI_SEQ_ELEM_SPI:
938 case MIPI_SEQ_ELEM_PMIC:
939 break;
940 default:
941 DRM_ERROR("Unknown operation byte %u\n",
942 operation_byte);
943 break;
944 }
945 }
946
947 return 0;
948}
949
950/*
951 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
952 * skip all delay + gpio operands and stop at the first DSI packet op.
953 */
954static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
955{
956 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
957 int index, len;
958
959 if (WARN_ON(!data || dev_priv->vbt.dsi.seq_version != 1))
960 return 0;
961
962 /* index = 1 to skip sequence byte */
963 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
964 switch (data[index]) {
965 case MIPI_SEQ_ELEM_SEND_PKT:
966 return index == 1 ? 0 : index;
967 case MIPI_SEQ_ELEM_DELAY:
968 len = 5; /* 1 byte for operand + uint32 */
969 break;
970 case MIPI_SEQ_ELEM_GPIO:
971 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
972 break;
973 default:
974 return 0;
975 }
976 }
977
978 return 0;
979}
980
981/*
982 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
983 * The deassert must be done before calling intel_dsi_device_ready, so for
984 * these devices we split the init OTP sequence into a deassert sequence and
985 * the actual init OTP part.
986 */
987static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
988{
989 u8 *init_otp;
990 int len;
991
992 /* Limit this to VLV for now. */
993 if (!IS_VALLEYVIEW(dev_priv))
994 return;
995
996 /* Limit this to v1 vid-mode sequences */
997 if (dev_priv->vbt.dsi.config->is_cmd_mode ||
998 dev_priv->vbt.dsi.seq_version != 1)
999 return;
1000
1001 /* Only do this if there are otp and assert seqs and no deassert seq */
1002 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1003 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1004 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1005 return;
1006
1007 /* The deassert-sequence ends at the first DSI packet */
1008 len = get_init_otp_deassert_fragment_len(dev_priv);
1009 if (!len)
1010 return;
1011
1012 DRM_DEBUG_KMS("Using init OTP fragment to deassert reset\n");
1013
1014 /* Copy the fragment, update seq byte and terminate it */
1015 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1016 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1017 if (!dev_priv->vbt.dsi.deassert_seq)
1018 return;
1019 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1020 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1021 /* Use the copy for deassert */
1022 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1023 dev_priv->vbt.dsi.deassert_seq;
1024 /* Replace the last byte of the fragment with init OTP seq byte */
1025 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1026 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1027 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1028}
1029
1030static void
1031parse_mipi_sequence(struct drm_i915_private *dev_priv,
1032 const struct bdb_header *bdb)
1033{
1034 int panel_type = dev_priv->vbt.panel_type;
1035 const struct bdb_mipi_sequence *sequence;
1036 const u8 *seq_data;
1037 u32 seq_size;
1038 u8 *data;
1039 int index = 0;
1040
1041 /* Only our generic panel driver uses the sequence block. */
1042 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1043 return;
1044
1045 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1046 if (!sequence) {
1047 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
1048 return;
1049 }
1050
1051 /* Fail gracefully for forward incompatible sequence block. */
1052 if (sequence->version >= 4) {
1053 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
1054 sequence->version);
1055 return;
1056 }
1057
1058 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
1059
1060 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1061 if (!seq_data)
1062 return;
1063
1064 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1065 if (!data)
1066 return;
1067
1068 /* Parse the sequences, store pointers to each sequence. */
1069 for (;;) {
1070 u8 seq_id = *(data + index);
1071 if (seq_id == MIPI_SEQ_END)
1072 break;
1073
1074 if (seq_id >= MIPI_SEQ_MAX) {
1075 DRM_ERROR("Unknown sequence %u\n", seq_id);
1076 goto err;
1077 }
1078
1079 /* Log about presence of sequences we won't run. */
1080 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1081 DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id);
1082
1083 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1084
1085 if (sequence->version >= 3)
1086 index = goto_next_sequence_v3(data, index, seq_size);
1087 else
1088 index = goto_next_sequence(data, index, seq_size);
1089 if (!index) {
1090 DRM_ERROR("Invalid sequence %u\n", seq_id);
1091 goto err;
1092 }
1093 }
1094
1095 dev_priv->vbt.dsi.data = data;
1096 dev_priv->vbt.dsi.size = seq_size;
1097 dev_priv->vbt.dsi.seq_version = sequence->version;
1098
1099 fixup_mipi_sequences(dev_priv);
1100
1101 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
1102 return;
1103
1104err:
1105 kfree(data);
1106 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1107}
1108
1109static u8 translate_iboost(u8 val)
1110{
1111 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1112
1113 if (val >= ARRAY_SIZE(mapping)) {
1114 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1115 return 0;
1116 }
1117 return mapping[val];
1118}
1119
1120static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1121 enum port port)
1122{
1123 const struct ddi_vbt_port_info *info =
1124 &dev_priv->vbt.ddi_port_info[port];
1125 enum port p;
1126
1127 if (!info->alternate_ddc_pin)
1128 return;
1129
1130 for_each_port_masked(p, (1 << port) - 1) {
1131 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1132
1133 if (info->alternate_ddc_pin != i->alternate_ddc_pin)
1134 continue;
1135
1136 DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
1137 "disabling port %c DVI/HDMI support\n",
1138 port_name(p), i->alternate_ddc_pin,
1139 port_name(port), port_name(p));
1140
1141 /*
1142 * If we have multiple ports supposedly sharing the
1143 * pin, then dvi/hdmi couldn't exist on the shared
1144 * port. Otherwise they share the same ddc bin and
1145 * system couldn't communicate with them separately.
1146 *
1147 * Due to parsing the ports in alphabetical order,
1148 * a higher port will always clobber a lower one.
1149 */
1150 i->supports_dvi = false;
1151 i->supports_hdmi = false;
1152 i->alternate_ddc_pin = 0;
1153 }
1154}
1155
1156static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1157 enum port port)
1158{
1159 const struct ddi_vbt_port_info *info =
1160 &dev_priv->vbt.ddi_port_info[port];
1161 enum port p;
1162
1163 if (!info->alternate_aux_channel)
1164 return;
1165
1166 for_each_port_masked(p, (1 << port) - 1) {
1167 struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p];
1168
1169 if (info->alternate_aux_channel != i->alternate_aux_channel)
1170 continue;
1171
1172 DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
1173 "disabling port %c DP support\n",
1174 port_name(p), i->alternate_aux_channel,
1175 port_name(port), port_name(p));
1176
1177 /*
1178 * If we have multiple ports supposedlt sharing the
1179 * aux channel, then DP couldn't exist on the shared
1180 * port. Otherwise they share the same aux channel
1181 * and system couldn't communicate with them separately.
1182 *
1183 * Due to parsing the ports in alphabetical order,
1184 * a higher port will always clobber a lower one.
1185 */
1186 i->supports_dp = false;
1187 i->alternate_aux_channel = 0;
1188 }
1189}
1190
1191static const u8 cnp_ddc_pin_map[] = {
1192 [0] = 0, /* N/A */
1193 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1194 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1195 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1196 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1197};
1198
1199static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1200{
1201 if (HAS_PCH_CNP(dev_priv)) {
1202 if (vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map)) {
1203 return cnp_ddc_pin_map[vbt_pin];
1204 } else {
1205 DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", vbt_pin);
1206 return 0;
1207 }
1208 }
1209
1210 return vbt_pin;
1211}
1212
1213static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
1214 u8 bdb_version)
1215{
1216 struct child_device_config *it, *child = NULL;
1217 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1218 uint8_t hdmi_level_shift;
1219 int i, j;
1220 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1221 uint8_t aux_channel, ddc_pin;
1222 /* Each DDI port can have more than one value on the "DVO Port" field,
1223 * so look for all the possible values for each port.
1224 */
1225 int dvo_ports[][3] = {
1226 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1227 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1228 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1229 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1230 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
1231 {DVO_PORT_HDMIF, DVO_PORT_DPF, -1},
1232 };
1233
1234 /*
1235 * Find the first child device to reference the port, report if more
1236 * than one found.
1237 */
1238 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1239 it = dev_priv->vbt.child_dev + i;
1240
1241 for (j = 0; j < 3; j++) {
1242 if (dvo_ports[port][j] == -1)
1243 break;
1244
1245 if (it->dvo_port == dvo_ports[port][j]) {
1246 if (child) {
1247 DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n",
1248 port_name(port));
1249 } else {
1250 child = it;
1251 }
1252 }
1253 }
1254 }
1255 if (!child)
1256 return;
1257
1258 aux_channel = child->aux_channel;
1259
1260 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1261 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1262 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1263 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1264 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1265
1266 if (port == PORT_A && is_dvi) {
1267 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1268 is_hdmi ? "/HDMI" : "");
1269 is_dvi = false;
1270 is_hdmi = false;
1271 }
1272
1273 if (port == PORT_A && is_dvi) {
1274 DRM_DEBUG_KMS("VBT claims port A supports DVI%s, ignoring\n",
1275 is_hdmi ? "/HDMI" : "");
1276 is_dvi = false;
1277 is_hdmi = false;
1278 }
1279
1280 info->supports_dvi = is_dvi;
1281 info->supports_hdmi = is_hdmi;
1282 info->supports_dp = is_dp;
1283 info->supports_edp = is_edp;
1284
1285 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1286 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1287
1288 if (is_edp && is_dvi)
1289 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1290 port_name(port));
1291 if (is_crt && port != PORT_E)
1292 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1293 if (is_crt && (is_dvi || is_dp))
1294 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1295 port_name(port));
1296 if (is_dvi && (port == PORT_A || port == PORT_E))
1297 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
1298 if (!is_dvi && !is_dp && !is_crt)
1299 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1300 port_name(port));
1301 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1302 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
1303
1304 if (is_dvi) {
1305 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1306 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1307 info->alternate_ddc_pin = ddc_pin;
1308 sanitize_ddc_pin(dev_priv, port);
1309 } else {
1310 DRM_DEBUG_KMS("Port %c has invalid DDC pin %d, "
1311 "sticking to defaults\n",
1312 port_name(port), ddc_pin);
1313 }
1314 }
1315
1316 if (is_dp) {
1317 info->alternate_aux_channel = aux_channel;
1318
1319 sanitize_aux_ch(dev_priv, port);
1320 }
1321
1322 if (bdb_version >= 158) {
1323 /* The VBT HDMI level shift values match the table we have. */
1324 hdmi_level_shift = child->hdmi_level_shifter_value;
1325 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1326 port_name(port),
1327 hdmi_level_shift);
1328 info->hdmi_level_shift = hdmi_level_shift;
1329 }
1330
1331 if (bdb_version >= 204) {
1332 int max_tmds_clock;
1333
1334 switch (child->hdmi_max_data_rate) {
1335 default:
1336 MISSING_CASE(child->hdmi_max_data_rate);
1337 /* fall through */
1338 case HDMI_MAX_DATA_RATE_PLATFORM:
1339 max_tmds_clock = 0;
1340 break;
1341 case HDMI_MAX_DATA_RATE_297:
1342 max_tmds_clock = 297000;
1343 break;
1344 case HDMI_MAX_DATA_RATE_165:
1345 max_tmds_clock = 165000;
1346 break;
1347 }
1348
1349 if (max_tmds_clock)
1350 DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
1351 port_name(port), max_tmds_clock);
1352 info->max_tmds_clock = max_tmds_clock;
1353 }
1354
1355 /* Parse the I_boost config for SKL and above */
1356 if (bdb_version >= 196 && child->iboost) {
1357 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1358 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1359 port_name(port), info->dp_boost_level);
1360 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1361 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1362 port_name(port), info->hdmi_boost_level);
1363 }
1364
1365 /* DP max link rate for CNL+ */
1366 if (bdb_version >= 216) {
1367 switch (child->dp_max_link_rate) {
1368 default:
1369 case VBT_DP_MAX_LINK_RATE_HBR3:
1370 info->dp_max_link_rate = 810000;
1371 break;
1372 case VBT_DP_MAX_LINK_RATE_HBR2:
1373 info->dp_max_link_rate = 540000;
1374 break;
1375 case VBT_DP_MAX_LINK_RATE_HBR:
1376 info->dp_max_link_rate = 270000;
1377 break;
1378 case VBT_DP_MAX_LINK_RATE_LBR:
1379 info->dp_max_link_rate = 162000;
1380 break;
1381 }
1382 DRM_DEBUG_KMS("VBT DP max link rate for port %c: %d\n",
1383 port_name(port), info->dp_max_link_rate);
1384 }
1385}
1386
1387static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1388{
1389 enum port port;
1390
1391 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1392 return;
1393
1394 if (!dev_priv->vbt.child_dev_num)
1395 return;
1396
1397 if (bdb_version < 155)
1398 return;
1399
1400 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1401 parse_ddi_port(dev_priv, port, bdb_version);
1402}
1403
1404static void
1405parse_general_definitions(struct drm_i915_private *dev_priv,
1406 const struct bdb_header *bdb)
1407{
1408 const struct bdb_general_definitions *defs;
1409 const struct child_device_config *child;
1410 int i, child_device_num, count;
1411 u8 expected_size;
1412 u16 block_size;
1413 int bus_pin;
1414
1415 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1416 if (!defs) {
1417 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1418 return;
1419 }
1420
1421 block_size = get_blocksize(defs);
1422 if (block_size < sizeof(*defs)) {
1423 DRM_DEBUG_KMS("General definitions block too small (%u)\n",
1424 block_size);
1425 return;
1426 }
1427
1428 bus_pin = defs->crt_ddc_gmbus_pin;
1429 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
1430 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1431 dev_priv->vbt.crt_ddc_pin = bus_pin;
1432
1433 if (bdb->version < 106) {
1434 expected_size = 22;
1435 } else if (bdb->version < 111) {
1436 expected_size = 27;
1437 } else if (bdb->version < 195) {
1438 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1439 } else if (bdb->version == 195) {
1440 expected_size = 37;
1441 } else if (bdb->version <= 215) {
1442 expected_size = 38;
1443 } else if (bdb->version <= 216) {
1444 expected_size = 39;
1445 } else {
1446 expected_size = sizeof(*child);
1447 BUILD_BUG_ON(sizeof(*child) < 39);
1448 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1449 bdb->version, expected_size);
1450 }
1451
1452 /* Flag an error for unexpected size, but continue anyway. */
1453 if (defs->child_dev_size != expected_size)
1454 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1455 defs->child_dev_size, expected_size, bdb->version);
1456
1457 /* The legacy sized child device config is the minimum we need. */
1458 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1459 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1460 defs->child_dev_size);
1461 return;
1462 }
1463
1464 /* get the number of child device */
1465 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1466 count = 0;
1467 /* get the number of child device that is present */
1468 for (i = 0; i < child_device_num; i++) {
1469 child = child_device_ptr(defs, i);
1470 if (!child->device_type)
1471 continue;
1472 count++;
1473 }
1474 if (!count) {
1475 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1476 return;
1477 }
1478 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
1479 if (!dev_priv->vbt.child_dev) {
1480 DRM_DEBUG_KMS("No memory space for child device\n");
1481 return;
1482 }
1483
1484 dev_priv->vbt.child_dev_num = count;
1485 count = 0;
1486 for (i = 0; i < child_device_num; i++) {
1487 child = child_device_ptr(defs, i);
1488 if (!child->device_type)
1489 continue;
1490
1491 /*
1492 * Copy as much as we know (sizeof) and is available
1493 * (child_dev_size) of the child device. Accessing the data must
1494 * depend on VBT version.
1495 */
1496 memcpy(dev_priv->vbt.child_dev + count, child,
1497 min_t(size_t, defs->child_dev_size, sizeof(*child)));
1498 count++;
1499 }
1500}
1501
1502/* Common defaults which may be overridden by VBT. */
1503static void
1504init_vbt_defaults(struct drm_i915_private *dev_priv)
1505{
1506 enum port port;
1507
1508 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1509
1510 /* Default to having backlight */
1511 dev_priv->vbt.backlight.present = true;
1512
1513 /* LFP panel data */
1514 dev_priv->vbt.lvds_dither = 1;
1515 dev_priv->vbt.lvds_vbt = 0;
1516
1517 /* SDVO panel data */
1518 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1519
1520 /* general features */
1521 dev_priv->vbt.int_tv_support = 1;
1522 dev_priv->vbt.int_crt_support = 1;
1523
1524 /* Default to using SSC */
1525 dev_priv->vbt.lvds_use_ssc = 1;
1526 /*
1527 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1528 * clock for LVDS.
1529 */
1530 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1531 !HAS_PCH_SPLIT(dev_priv));
1532 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1533
1534 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1535 struct ddi_vbt_port_info *info =
1536 &dev_priv->vbt.ddi_port_info[port];
1537
1538 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1539 }
1540}
1541
1542/* Defaults to initialize only if there is no VBT. */
1543static void
1544init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1545{
1546 enum port port;
1547
1548 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1549 struct ddi_vbt_port_info *info =
1550 &dev_priv->vbt.ddi_port_info[port];
1551
1552 info->supports_dvi = (port != PORT_A && port != PORT_E);
1553 info->supports_hdmi = info->supports_dvi;
1554 info->supports_dp = (port != PORT_E);
1555 }
1556}
1557
1558static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1559{
1560 const void *_vbt = vbt;
1561
1562 return _vbt + vbt->bdb_offset;
1563}
1564
1565/**
1566 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1567 * @buf: pointer to a buffer to validate
1568 * @size: size of the buffer
1569 *
1570 * Returns true on valid VBT.
1571 */
1572bool intel_bios_is_valid_vbt(const void *buf, size_t size)
1573{
1574 const struct vbt_header *vbt = buf;
1575 const struct bdb_header *bdb;
1576
1577 if (!vbt)
1578 return false;
1579
1580 if (sizeof(struct vbt_header) > size) {
1581 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1582 return false;
1583 }
1584
1585 if (memcmp(vbt->signature, "$VBT", 4)) {
1586 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1587 return false;
1588 }
1589
1590 if (range_overflows_t(size_t,
1591 vbt->bdb_offset,
1592 sizeof(struct bdb_header),
1593 size)) {
1594 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1595 return false;
1596 }
1597
1598 bdb = get_bdb_header(vbt);
1599 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
1600 DRM_DEBUG_DRIVER("BDB incomplete\n");
1601 return false;
1602 }
1603
1604 return vbt;
1605}
1606
1607static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
1608{
1609 size_t i;
1610
1611 /* Scour memory looking for the VBT signature. */
1612 for (i = 0; i + 4 < size; i++) {
1613 void *vbt;
1614
1615 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1616 continue;
1617
1618 /*
1619 * This is the one place where we explicitly discard the address
1620 * space (__iomem) of the BIOS/VBT.
1621 */
1622 vbt = (void __force *) bios + i;
1623 if (intel_bios_is_valid_vbt(vbt, size - i))
1624 return vbt;
1625
1626 break;
1627 }
1628
1629 return NULL;
1630}
1631
1632/**
1633 * intel_bios_init - find VBT and initialize settings from the BIOS
1634 * @dev_priv: i915 device instance
1635 *
1636 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
1637 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
1638 * initialize some defaults if the VBT is not present at all.
1639 */
1640void intel_bios_init(struct drm_i915_private *dev_priv)
1641{
1642 struct pci_dev *pdev = dev_priv->drm.pdev;
1643 const struct vbt_header *vbt = dev_priv->opregion.vbt;
1644 const struct bdb_header *bdb;
1645 u8 __iomem *bios = NULL;
1646
1647 if (HAS_PCH_NOP(dev_priv)) {
1648 DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
1649 return;
1650 }
1651
1652 init_vbt_defaults(dev_priv);
1653
1654 /* If the OpRegion does not have VBT, look in PCI ROM. */
1655 if (!vbt) {
1656 size_t size;
1657
1658 bios = pci_map_rom(pdev, &size);
1659 if (!bios)
1660 goto out;
1661
1662 vbt = find_vbt(bios, size);
1663 if (!vbt)
1664 goto out;
1665
1666 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
1667 }
1668
1669 bdb = get_bdb_header(vbt);
1670
1671 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1672 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
1673
1674 /* Grab useful general definitions */
1675 parse_general_features(dev_priv, bdb);
1676 parse_general_definitions(dev_priv, bdb);
1677 parse_lfp_panel_data(dev_priv, bdb);
1678 parse_lfp_backlight(dev_priv, bdb);
1679 parse_sdvo_panel_data(dev_priv, bdb);
1680 parse_driver_features(dev_priv, bdb);
1681 parse_edp(dev_priv, bdb);
1682 parse_psr(dev_priv, bdb);
1683 parse_mipi_config(dev_priv, bdb);
1684 parse_mipi_sequence(dev_priv, bdb);
1685
1686 /* Further processing on pre-parsed data */
1687 parse_sdvo_device_mapping(dev_priv, bdb->version);
1688 parse_ddi_ports(dev_priv, bdb->version);
1689
1690out:
1691 if (!vbt) {
1692 DRM_INFO("Failed to find VBIOS tables (VBT)\n");
1693 init_vbt_missing_defaults(dev_priv);
1694 }
1695
1696 if (bios)
1697 pci_unmap_rom(pdev, bios);
1698}
1699
1700/**
1701 * intel_bios_cleanup - Free any resources allocated by intel_bios_init()
1702 * @dev_priv: i915 device instance
1703 */
1704void intel_bios_cleanup(struct drm_i915_private *dev_priv)
1705{
1706 kfree(dev_priv->vbt.child_dev);
1707 dev_priv->vbt.child_dev = NULL;
1708 dev_priv->vbt.child_dev_num = 0;
1709 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
1710 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1711 kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
1712 dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
1713 kfree(dev_priv->vbt.dsi.data);
1714 dev_priv->vbt.dsi.data = NULL;
1715 kfree(dev_priv->vbt.dsi.pps);
1716 dev_priv->vbt.dsi.pps = NULL;
1717 kfree(dev_priv->vbt.dsi.config);
1718 dev_priv->vbt.dsi.config = NULL;
1719 kfree(dev_priv->vbt.dsi.deassert_seq);
1720 dev_priv->vbt.dsi.deassert_seq = NULL;
1721}
1722
1723/**
1724 * intel_bios_is_tv_present - is integrated TV present in VBT
1725 * @dev_priv: i915 device instance
1726 *
1727 * Return true if TV is present. If no child devices were parsed from VBT,
1728 * assume TV is present.
1729 */
1730bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1731{
1732 const struct child_device_config *child;
1733 int i;
1734
1735 if (!dev_priv->vbt.int_tv_support)
1736 return false;
1737
1738 if (!dev_priv->vbt.child_dev_num)
1739 return true;
1740
1741 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1742 child = dev_priv->vbt.child_dev + i;
1743 /*
1744 * If the device type is not TV, continue.
1745 */
1746 switch (child->device_type) {
1747 case DEVICE_TYPE_INT_TV:
1748 case DEVICE_TYPE_TV:
1749 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1750 break;
1751 default:
1752 continue;
1753 }
1754 /* Only when the addin_offset is non-zero, it is regarded
1755 * as present.
1756 */
1757 if (child->addin_offset)
1758 return true;
1759 }
1760
1761 return false;
1762}
1763
1764/**
1765 * intel_bios_is_lvds_present - is LVDS present in VBT
1766 * @dev_priv: i915 device instance
1767 * @i2c_pin: i2c pin for LVDS if present
1768 *
1769 * Return true if LVDS is present. If no child devices were parsed from VBT,
1770 * assume LVDS is present.
1771 */
1772bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1773{
1774 const struct child_device_config *child;
1775 int i;
1776
1777 if (!dev_priv->vbt.child_dev_num)
1778 return true;
1779
1780 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1781 child = dev_priv->vbt.child_dev + i;
1782
1783 /* If the device type is not LFP, continue.
1784 * We have to check both the new identifiers as well as the
1785 * old for compatibility with some BIOSes.
1786 */
1787 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1788 child->device_type != DEVICE_TYPE_LFP)
1789 continue;
1790
1791 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1792 *i2c_pin = child->i2c_pin;
1793
1794 /* However, we cannot trust the BIOS writers to populate
1795 * the VBT correctly. Since LVDS requires additional
1796 * information from AIM blocks, a non-zero addin offset is
1797 * a good indicator that the LVDS is actually present.
1798 */
1799 if (child->addin_offset)
1800 return true;
1801
1802 /* But even then some BIOS writers perform some black magic
1803 * and instantiate the device without reference to any
1804 * additional data. Trust that if the VBT was written into
1805 * the OpRegion then they have validated the LVDS's existence.
1806 */
1807 if (dev_priv->opregion.vbt)
1808 return true;
1809 }
1810
1811 return false;
1812}
1813
1814/**
1815 * intel_bios_is_port_present - is the specified digital port present
1816 * @dev_priv: i915 device instance
1817 * @port: port to check
1818 *
1819 * Return true if the device in %port is present.
1820 */
1821bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1822{
1823 const struct child_device_config *child;
1824 static const struct {
1825 u16 dp, hdmi;
1826 } port_mapping[] = {
1827 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1828 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1829 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1830 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1831 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
1832 };
1833 int i;
1834
1835 /* FIXME maybe deal with port A as well? */
1836 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1837 return false;
1838
1839 if (!dev_priv->vbt.child_dev_num)
1840 return false;
1841
1842 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1843 child = dev_priv->vbt.child_dev + i;
1844
1845 if ((child->dvo_port == port_mapping[port].dp ||
1846 child->dvo_port == port_mapping[port].hdmi) &&
1847 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1848 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
1849 return true;
1850 }
1851
1852 return false;
1853}
1854
1855/**
1856 * intel_bios_is_port_edp - is the device in given port eDP
1857 * @dev_priv: i915 device instance
1858 * @port: port to check
1859 *
1860 * Return true if the device in %port is eDP.
1861 */
1862bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1863{
1864 const struct child_device_config *child;
1865 static const short port_mapping[] = {
1866 [PORT_B] = DVO_PORT_DPB,
1867 [PORT_C] = DVO_PORT_DPC,
1868 [PORT_D] = DVO_PORT_DPD,
1869 [PORT_E] = DVO_PORT_DPE,
1870 [PORT_F] = DVO_PORT_DPF,
1871 };
1872 int i;
1873
1874 if (HAS_DDI(dev_priv))
1875 return dev_priv->vbt.ddi_port_info[port].supports_edp;
1876
1877 if (!dev_priv->vbt.child_dev_num)
1878 return false;
1879
1880 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1881 child = dev_priv->vbt.child_dev + i;
1882
1883 if (child->dvo_port == port_mapping[port] &&
1884 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
1885 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1886 return true;
1887 }
1888
1889 return false;
1890}
1891
1892static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
1893 enum port port)
1894{
1895 static const struct {
1896 u16 dp, hdmi;
1897 } port_mapping[] = {
1898 /*
1899 * Buggy VBTs may declare DP ports as having
1900 * HDMI type dvo_port :( So let's check both.
1901 */
1902 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1903 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1904 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1905 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1906 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
1907 };
1908
1909 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1910 return false;
1911
1912 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
1913 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
1914 return false;
1915
1916 if (child->dvo_port == port_mapping[port].dp)
1917 return true;
1918
1919 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
1920 if (child->dvo_port == port_mapping[port].hdmi &&
1921 child->aux_channel != 0)
1922 return true;
1923
1924 return false;
1925}
1926
1927bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
1928 enum port port)
1929{
1930 const struct child_device_config *child;
1931 int i;
1932
1933 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1934 child = dev_priv->vbt.child_dev + i;
1935
1936 if (child_dev_is_dp_dual_mode(child, port))
1937 return true;
1938 }
1939
1940 return false;
1941}
1942
1943/**
1944 * intel_bios_is_dsi_present - is DSI present in VBT
1945 * @dev_priv: i915 device instance
1946 * @port: port for DSI if present
1947 *
1948 * Return true if DSI is present, and return the port in %port.
1949 */
1950bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1951 enum port *port)
1952{
1953 const struct child_device_config *child;
1954 u8 dvo_port;
1955 int i;
1956
1957 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1958 child = dev_priv->vbt.child_dev + i;
1959
1960 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
1961 continue;
1962
1963 dvo_port = child->dvo_port;
1964
1965 switch (dvo_port) {
1966 case DVO_PORT_MIPIA:
1967 case DVO_PORT_MIPIC:
1968 if (port)
1969 *port = dvo_port - DVO_PORT_MIPIA;
1970 return true;
1971 case DVO_PORT_MIPIB:
1972 case DVO_PORT_MIPID:
1973 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1974 port_name(dvo_port - DVO_PORT_MIPIA));
1975 break;
1976 }
1977 }
1978
1979 return false;
1980}
1981
1982/**
1983 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1984 * @dev_priv: i915 device instance
1985 * @port: port to check
1986 *
1987 * Return true if HPD should be inverted for %port.
1988 */
1989bool
1990intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1991 enum port port)
1992{
1993 const struct child_device_config *child;
1994 int i;
1995
1996 if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv)))
1997 return false;
1998
1999 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
2000 child = dev_priv->vbt.child_dev + i;
2001
2002 if (!child->hpd_invert)
2003 continue;
2004
2005 switch (child->dvo_port) {
2006 case DVO_PORT_DPA:
2007 case DVO_PORT_HDMIA:
2008 if (port == PORT_A)
2009 return true;
2010 break;
2011 case DVO_PORT_DPB:
2012 case DVO_PORT_HDMIB:
2013 if (port == PORT_B)
2014 return true;
2015 break;
2016 case DVO_PORT_DPC:
2017 case DVO_PORT_HDMIC:
2018 if (port == PORT_C)
2019 return true;
2020 break;
2021 default:
2022 break;
2023 }
2024 }
2025
2026 return false;
2027}
2028
2029/**
2030 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2031 * @dev_priv: i915 device instance
2032 * @port: port to check
2033 *
2034 * Return true if LSPCON is present on this port
2035 */
2036bool
2037intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
2038 enum port port)
2039{
2040 const struct child_device_config *child;
2041 int i;
2042
2043 if (!HAS_LSPCON(dev_priv))
2044 return false;
2045
2046 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
2047 child = dev_priv->vbt.child_dev + i;
2048
2049 if (!child->lspcon)
2050 continue;
2051
2052 switch (child->dvo_port) {
2053 case DVO_PORT_DPA:
2054 case DVO_PORT_HDMIA:
2055 if (port == PORT_A)
2056 return true;
2057 break;
2058 case DVO_PORT_DPB:
2059 case DVO_PORT_HDMIB:
2060 if (port == PORT_B)
2061 return true;
2062 break;
2063 case DVO_PORT_DPC:
2064 case DVO_PORT_HDMIC:
2065 if (port == PORT_C)
2066 return true;
2067 break;
2068 case DVO_PORT_DPD:
2069 case DVO_PORT_HDMID:
2070 if (port == PORT_D)
2071 return true;
2072 break;
2073 case DVO_PORT_DPF:
2074 case DVO_PORT_HDMIF:
2075 if (port == PORT_F)
2076 return true;
2077 break;
2078 default:
2079 break;
2080 }
2081 }
2082
2083 return false;
2084}