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1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28#include <drm/drm_dp_helper.h>
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
31#include "i915_drv.h"
32#include "intel_bios.h"
33
34/**
35 * DOC: Video BIOS Table (VBT)
36 *
37 * The Video BIOS Table, or VBT, provides platform and board specific
38 * configuration information to the driver that is not discoverable or available
39 * through other means. The configuration is mostly related to display
40 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
41 * the PCI ROM.
42 *
43 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
44 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
45 * contain the actual configuration information. The VBT Header, and thus the
46 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
47 * BDB Header. The data blocks are concatenated after the BDB Header. The data
48 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
49 * data. (Block 53, the MIPI Sequence Block is an exception.)
50 *
51 * The driver parses the VBT during load. The relevant information is stored in
52 * driver private data for ease of use, and the actual VBT is not read after
53 * that.
54 */
55
56#define SLAVE_ADDR1 0x70
57#define SLAVE_ADDR2 0x72
58
59static int panel_type;
60
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
77static const void *
78find_section(const void *_bdb, int section_id)
79{
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
82 int index = 0;
83 u32 total, current_size;
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
91 while (index + 3 < total) {
92 current_id = *(base + index);
93 current_size = _get_blocksize(base + index);
94 index += 3;
95
96 if (index + current_size > total)
97 return NULL;
98
99 if (current_id == section_id)
100 return base + index;
101
102 index += current_size;
103 }
104
105 return NULL;
106}
107
108static void
109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
110 const struct lvds_dvo_timing *dvo_timing)
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 dvo_timing->hsync_pulse_width;
118 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
119 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
120
121 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
122 dvo_timing->vactive_lo;
123 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
124 dvo_timing->vsync_off;
125 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
126 dvo_timing->vsync_pulse_width;
127 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
128 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
129 panel_fixed_mode->clock = dvo_timing->clock * 10;
130 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
131
132 if (dvo_timing->hsync_positive)
133 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
134 else
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
136
137 if (dvo_timing->vsync_positive)
138 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
139 else
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
141
142 /* Some VBTs have bogus h/vtotal values */
143 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
144 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
145 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
146 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
147
148 drm_mode_set_name(panel_fixed_mode);
149}
150
151static const struct lvds_dvo_timing *
152get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
153 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
154 int index)
155{
156 /*
157 * the size of fp_timing varies on the different platform.
158 * So calculate the DVO timing relative offset in LVDS data
159 * entry to get the DVO timing entry
160 */
161
162 int lfp_data_size =
163 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
164 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
165 int dvo_timing_offset =
166 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
168 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
169
170 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
171}
172
173/* get lvds_fp_timing entry
174 * this function may return NULL if the corresponding entry is invalid
175 */
176static const struct lvds_fp_timing *
177get_lvds_fp_timing(const struct bdb_header *bdb,
178 const struct bdb_lvds_lfp_data *data,
179 const struct bdb_lvds_lfp_data_ptrs *ptrs,
180 int index)
181{
182 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
183 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
184 size_t ofs;
185
186 if (index >= ARRAY_SIZE(ptrs->ptr))
187 return NULL;
188 ofs = ptrs->ptr[index].fp_timing_offset;
189 if (ofs < data_ofs ||
190 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
191 return NULL;
192 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
193}
194
195/* Try to find integrated panel data */
196static void
197parse_lfp_panel_data(struct drm_i915_private *dev_priv,
198 const struct bdb_header *bdb)
199{
200 const struct bdb_lvds_options *lvds_options;
201 const struct bdb_lvds_lfp_data *lvds_lfp_data;
202 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
203 const struct lvds_dvo_timing *panel_dvo_timing;
204 const struct lvds_fp_timing *fp_timing;
205 struct drm_display_mode *panel_fixed_mode;
206 int drrs_mode;
207
208 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
209 if (!lvds_options)
210 return;
211
212 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
213 if (lvds_options->panel_type == 0xff)
214 return;
215
216 panel_type = lvds_options->panel_type;
217
218 drrs_mode = (lvds_options->dps_panel_type_bits
219 >> (panel_type * 2)) & MODE_MASK;
220 /*
221 * VBT has static DRRS = 0 and seamless DRRS = 2.
222 * The below piece of code is required to adjust vbt.drrs_type
223 * to match the enum drrs_support_type.
224 */
225 switch (drrs_mode) {
226 case 0:
227 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
228 DRM_DEBUG_KMS("DRRS supported mode is static\n");
229 break;
230 case 2:
231 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
232 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
233 break;
234 default:
235 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
236 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
237 break;
238 }
239
240 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
241 if (!lvds_lfp_data)
242 return;
243
244 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
245 if (!lvds_lfp_data_ptrs)
246 return;
247
248 dev_priv->vbt.lvds_vbt = 1;
249
250 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
251 lvds_lfp_data_ptrs,
252 lvds_options->panel_type);
253
254 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
255 if (!panel_fixed_mode)
256 return;
257
258 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
259
260 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
261
262 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
263 drm_mode_debug_printmodeline(panel_fixed_mode);
264
265 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
266 lvds_lfp_data_ptrs,
267 lvds_options->panel_type);
268 if (fp_timing) {
269 /* check the resolution, just to be sure */
270 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
271 fp_timing->y_res == panel_fixed_mode->vdisplay) {
272 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
273 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
274 dev_priv->vbt.bios_lvds_val);
275 }
276 }
277}
278
279static void
280parse_lfp_backlight(struct drm_i915_private *dev_priv,
281 const struct bdb_header *bdb)
282{
283 const struct bdb_lfp_backlight_data *backlight_data;
284 const struct bdb_lfp_backlight_data_entry *entry;
285
286 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
287 if (!backlight_data)
288 return;
289
290 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
291 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
292 backlight_data->entry_size);
293 return;
294 }
295
296 entry = &backlight_data->data[panel_type];
297
298 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
299 if (!dev_priv->vbt.backlight.present) {
300 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
301 entry->type);
302 return;
303 }
304
305 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
306 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
307 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
308 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
309 "active %s, min brightness %u, level %u\n",
310 dev_priv->vbt.backlight.pwm_freq_hz,
311 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
312 dev_priv->vbt.backlight.min_brightness,
313 backlight_data->level[panel_type]);
314}
315
316/* Try to find sdvo panel data */
317static void
318parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
319 const struct bdb_header *bdb)
320{
321 const struct lvds_dvo_timing *dvo_timing;
322 struct drm_display_mode *panel_fixed_mode;
323 int index;
324
325 index = i915.vbt_sdvo_panel_type;
326 if (index == -2) {
327 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
328 return;
329 }
330
331 if (index == -1) {
332 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
333
334 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
335 if (!sdvo_lvds_options)
336 return;
337
338 index = sdvo_lvds_options->panel_type;
339 }
340
341 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
342 if (!dvo_timing)
343 return;
344
345 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
346 if (!panel_fixed_mode)
347 return;
348
349 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
350
351 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
352
353 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
354 drm_mode_debug_printmodeline(panel_fixed_mode);
355}
356
357static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
358 bool alternate)
359{
360 switch (INTEL_INFO(dev_priv)->gen) {
361 case 2:
362 return alternate ? 66667 : 48000;
363 case 3:
364 case 4:
365 return alternate ? 100000 : 96000;
366 default:
367 return alternate ? 100000 : 120000;
368 }
369}
370
371static void
372parse_general_features(struct drm_i915_private *dev_priv,
373 const struct bdb_header *bdb)
374{
375 const struct bdb_general_features *general;
376
377 general = find_section(bdb, BDB_GENERAL_FEATURES);
378 if (!general)
379 return;
380
381 dev_priv->vbt.int_tv_support = general->int_tv_support;
382 /* int_crt_support can't be trusted on earlier platforms */
383 if (bdb->version >= 155 &&
384 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
385 dev_priv->vbt.int_crt_support = general->int_crt_support;
386 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
387 dev_priv->vbt.lvds_ssc_freq =
388 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
389 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
390 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
391 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
392 dev_priv->vbt.int_tv_support,
393 dev_priv->vbt.int_crt_support,
394 dev_priv->vbt.lvds_use_ssc,
395 dev_priv->vbt.lvds_ssc_freq,
396 dev_priv->vbt.display_clock_mode,
397 dev_priv->vbt.fdi_rx_polarity_inverted);
398}
399
400static void
401parse_general_definitions(struct drm_i915_private *dev_priv,
402 const struct bdb_header *bdb)
403{
404 const struct bdb_general_definitions *general;
405
406 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
407 if (general) {
408 u16 block_size = get_blocksize(general);
409 if (block_size >= sizeof(*general)) {
410 int bus_pin = general->crt_ddc_gmbus_pin;
411 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
412 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
413 dev_priv->vbt.crt_ddc_pin = bus_pin;
414 } else {
415 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
416 block_size);
417 }
418 }
419}
420
421static const union child_device_config *
422child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
423{
424 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
425}
426
427static void
428parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
429 const struct bdb_header *bdb)
430{
431 struct sdvo_device_mapping *p_mapping;
432 const struct bdb_general_definitions *p_defs;
433 const struct old_child_dev_config *child; /* legacy */
434 int i, child_device_num, count;
435 u16 block_size;
436
437 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
438 if (!p_defs) {
439 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
440 return;
441 }
442
443 /*
444 * Only parse SDVO mappings when the general definitions block child
445 * device size matches that of the *legacy* child device config
446 * struct. Thus, SDVO mapping will be skipped for newer VBT.
447 */
448 if (p_defs->child_dev_size != sizeof(*child)) {
449 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
450 return;
451 }
452 /* get the block size of general definitions */
453 block_size = get_blocksize(p_defs);
454 /* get the number of child device */
455 child_device_num = (block_size - sizeof(*p_defs)) /
456 p_defs->child_dev_size;
457 count = 0;
458 for (i = 0; i < child_device_num; i++) {
459 child = &child_device_ptr(p_defs, i)->old;
460 if (!child->device_type) {
461 /* skip the device block if device type is invalid */
462 continue;
463 }
464 if (child->slave_addr != SLAVE_ADDR1 &&
465 child->slave_addr != SLAVE_ADDR2) {
466 /*
467 * If the slave address is neither 0x70 nor 0x72,
468 * it is not a SDVO device. Skip it.
469 */
470 continue;
471 }
472 if (child->dvo_port != DEVICE_PORT_DVOB &&
473 child->dvo_port != DEVICE_PORT_DVOC) {
474 /* skip the incorrect SDVO port */
475 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
476 continue;
477 }
478 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
479 " %s port\n",
480 child->slave_addr,
481 (child->dvo_port == DEVICE_PORT_DVOB) ?
482 "SDVOB" : "SDVOC");
483 p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]);
484 if (!p_mapping->initialized) {
485 p_mapping->dvo_port = child->dvo_port;
486 p_mapping->slave_addr = child->slave_addr;
487 p_mapping->dvo_wiring = child->dvo_wiring;
488 p_mapping->ddc_pin = child->ddc_pin;
489 p_mapping->i2c_pin = child->i2c_pin;
490 p_mapping->initialized = 1;
491 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
492 p_mapping->dvo_port,
493 p_mapping->slave_addr,
494 p_mapping->dvo_wiring,
495 p_mapping->ddc_pin,
496 p_mapping->i2c_pin);
497 } else {
498 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
499 "two SDVO device.\n");
500 }
501 if (child->slave2_addr) {
502 /* Maybe this is a SDVO device with multiple inputs */
503 /* And the mapping info is not added */
504 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
505 " is a SDVO device with multiple inputs.\n");
506 }
507 count++;
508 }
509
510 if (!count) {
511 /* No SDVO device info is found */
512 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
513 }
514 return;
515}
516
517static void
518parse_driver_features(struct drm_i915_private *dev_priv,
519 const struct bdb_header *bdb)
520{
521 const struct bdb_driver_features *driver;
522
523 driver = find_section(bdb, BDB_DRIVER_FEATURES);
524 if (!driver)
525 return;
526
527 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
528 dev_priv->vbt.edp_support = 1;
529
530 if (driver->dual_frequency)
531 dev_priv->render_reclock_avail = true;
532
533 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
534 /*
535 * If DRRS is not supported, drrs_type has to be set to 0.
536 * This is because, VBT is configured in such a way that
537 * static DRRS is 0 and DRRS not supported is represented by
538 * driver->drrs_enabled=false
539 */
540 if (!driver->drrs_enabled)
541 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
542}
543
544static void
545parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
546{
547 const struct bdb_edp *edp;
548 const struct edp_power_seq *edp_pps;
549 const struct edp_link_params *edp_link_params;
550
551 edp = find_section(bdb, BDB_EDP);
552 if (!edp) {
553 if (dev_priv->vbt.edp_support)
554 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
555 return;
556 }
557
558 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
559 case EDP_18BPP:
560 dev_priv->vbt.edp_bpp = 18;
561 break;
562 case EDP_24BPP:
563 dev_priv->vbt.edp_bpp = 24;
564 break;
565 case EDP_30BPP:
566 dev_priv->vbt.edp_bpp = 30;
567 break;
568 }
569
570 /* Get the eDP sequencing and link info */
571 edp_pps = &edp->power_seqs[panel_type];
572 edp_link_params = &edp->link_params[panel_type];
573
574 dev_priv->vbt.edp_pps = *edp_pps;
575
576 switch (edp_link_params->rate) {
577 case EDP_RATE_1_62:
578 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
579 break;
580 case EDP_RATE_2_7:
581 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
582 break;
583 default:
584 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
585 edp_link_params->rate);
586 break;
587 }
588
589 switch (edp_link_params->lanes) {
590 case EDP_LANE_1:
591 dev_priv->vbt.edp_lanes = 1;
592 break;
593 case EDP_LANE_2:
594 dev_priv->vbt.edp_lanes = 2;
595 break;
596 case EDP_LANE_4:
597 dev_priv->vbt.edp_lanes = 4;
598 break;
599 default:
600 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
601 edp_link_params->lanes);
602 break;
603 }
604
605 switch (edp_link_params->preemphasis) {
606 case EDP_PREEMPHASIS_NONE:
607 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
608 break;
609 case EDP_PREEMPHASIS_3_5dB:
610 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
611 break;
612 case EDP_PREEMPHASIS_6dB:
613 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
614 break;
615 case EDP_PREEMPHASIS_9_5dB:
616 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
617 break;
618 default:
619 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
620 edp_link_params->preemphasis);
621 break;
622 }
623
624 switch (edp_link_params->vswing) {
625 case EDP_VSWING_0_4V:
626 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
627 break;
628 case EDP_VSWING_0_6V:
629 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
630 break;
631 case EDP_VSWING_0_8V:
632 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
633 break;
634 case EDP_VSWING_1_2V:
635 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
636 break;
637 default:
638 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
639 edp_link_params->vswing);
640 break;
641 }
642
643 if (bdb->version >= 173) {
644 uint8_t vswing;
645
646 /* Don't read from VBT if module parameter has valid value*/
647 if (i915.edp_vswing) {
648 dev_priv->edp_low_vswing = i915.edp_vswing == 1;
649 } else {
650 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
651 dev_priv->edp_low_vswing = vswing == 0;
652 }
653 }
654}
655
656static void
657parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
658{
659 const struct bdb_psr *psr;
660 const struct psr_table *psr_table;
661
662 psr = find_section(bdb, BDB_PSR);
663 if (!psr) {
664 DRM_DEBUG_KMS("No PSR BDB found.\n");
665 return;
666 }
667
668 psr_table = &psr->psr_table[panel_type];
669
670 dev_priv->vbt.psr.full_link = psr_table->full_link;
671 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
672
673 /* Allowed VBT values goes from 0 to 15 */
674 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
675 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
676
677 switch (psr_table->lines_to_wait) {
678 case 0:
679 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
680 break;
681 case 1:
682 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
683 break;
684 case 2:
685 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
686 break;
687 case 3:
688 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
689 break;
690 default:
691 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
692 psr_table->lines_to_wait);
693 break;
694 }
695
696 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
697 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
698}
699
700static void
701parse_mipi_config(struct drm_i915_private *dev_priv,
702 const struct bdb_header *bdb)
703{
704 const struct bdb_mipi_config *start;
705 const struct mipi_config *config;
706 const struct mipi_pps_data *pps;
707
708 /* parse MIPI blocks only if LFP type is MIPI */
709 if (!dev_priv->vbt.has_mipi)
710 return;
711
712 /* Initialize this to undefined indicating no generic MIPI support */
713 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
714
715 /* Block #40 is already parsed and panel_fixed_mode is
716 * stored in dev_priv->lfp_lvds_vbt_mode
717 * resuse this when needed
718 */
719
720 /* Parse #52 for panel index used from panel_type already
721 * parsed
722 */
723 start = find_section(bdb, BDB_MIPI_CONFIG);
724 if (!start) {
725 DRM_DEBUG_KMS("No MIPI config BDB found");
726 return;
727 }
728
729 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
730 panel_type);
731
732 /*
733 * get hold of the correct configuration block and pps data as per
734 * the panel_type as index
735 */
736 config = &start->config[panel_type];
737 pps = &start->pps[panel_type];
738
739 /* store as of now full data. Trim when we realise all is not needed */
740 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
741 if (!dev_priv->vbt.dsi.config)
742 return;
743
744 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
745 if (!dev_priv->vbt.dsi.pps) {
746 kfree(dev_priv->vbt.dsi.config);
747 return;
748 }
749
750 /* We have mandatory mipi config blocks. Initialize as generic panel */
751 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
752}
753
754/* Find the sequence block and size for the given panel. */
755static const u8 *
756find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
757 u16 panel_id, u32 *seq_size)
758{
759 u32 total = get_blocksize(sequence);
760 const u8 *data = &sequence->data[0];
761 u8 current_id;
762 u32 current_size;
763 int header_size = sequence->version >= 3 ? 5 : 3;
764 int index = 0;
765 int i;
766
767 /* skip new block size */
768 if (sequence->version >= 3)
769 data += 4;
770
771 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
772 if (index + header_size > total) {
773 DRM_ERROR("Invalid sequence block (header)\n");
774 return NULL;
775 }
776
777 current_id = *(data + index);
778 if (sequence->version >= 3)
779 current_size = *((const u32 *)(data + index + 1));
780 else
781 current_size = *((const u16 *)(data + index + 1));
782
783 index += header_size;
784
785 if (index + current_size > total) {
786 DRM_ERROR("Invalid sequence block\n");
787 return NULL;
788 }
789
790 if (current_id == panel_id) {
791 *seq_size = current_size;
792 return data + index;
793 }
794
795 index += current_size;
796 }
797
798 DRM_ERROR("Sequence block detected but no valid configuration\n");
799
800 return NULL;
801}
802
803static int goto_next_sequence(const u8 *data, int index, int total)
804{
805 u16 len;
806
807 /* Skip Sequence Byte. */
808 for (index = index + 1; index < total; index += len) {
809 u8 operation_byte = *(data + index);
810 index++;
811
812 switch (operation_byte) {
813 case MIPI_SEQ_ELEM_END:
814 return index;
815 case MIPI_SEQ_ELEM_SEND_PKT:
816 if (index + 4 > total)
817 return 0;
818
819 len = *((const u16 *)(data + index + 2)) + 4;
820 break;
821 case MIPI_SEQ_ELEM_DELAY:
822 len = 4;
823 break;
824 case MIPI_SEQ_ELEM_GPIO:
825 len = 2;
826 break;
827 case MIPI_SEQ_ELEM_I2C:
828 if (index + 7 > total)
829 return 0;
830 len = *(data + index + 6) + 7;
831 break;
832 default:
833 DRM_ERROR("Unknown operation byte\n");
834 return 0;
835 }
836 }
837
838 return 0;
839}
840
841static int goto_next_sequence_v3(const u8 *data, int index, int total)
842{
843 int seq_end;
844 u16 len;
845 u32 size_of_sequence;
846
847 /*
848 * Could skip sequence based on Size of Sequence alone, but also do some
849 * checking on the structure.
850 */
851 if (total < 5) {
852 DRM_ERROR("Too small sequence size\n");
853 return 0;
854 }
855
856 /* Skip Sequence Byte. */
857 index++;
858
859 /*
860 * Size of Sequence. Excludes the Sequence Byte and the size itself,
861 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
862 * byte.
863 */
864 size_of_sequence = *((const uint32_t *)(data + index));
865 index += 4;
866
867 seq_end = index + size_of_sequence;
868 if (seq_end > total) {
869 DRM_ERROR("Invalid sequence size\n");
870 return 0;
871 }
872
873 for (; index < total; index += len) {
874 u8 operation_byte = *(data + index);
875 index++;
876
877 if (operation_byte == MIPI_SEQ_ELEM_END) {
878 if (index != seq_end) {
879 DRM_ERROR("Invalid element structure\n");
880 return 0;
881 }
882 return index;
883 }
884
885 len = *(data + index);
886 index++;
887
888 /*
889 * FIXME: Would be nice to check elements like for v1/v2 in
890 * goto_next_sequence() above.
891 */
892 switch (operation_byte) {
893 case MIPI_SEQ_ELEM_SEND_PKT:
894 case MIPI_SEQ_ELEM_DELAY:
895 case MIPI_SEQ_ELEM_GPIO:
896 case MIPI_SEQ_ELEM_I2C:
897 case MIPI_SEQ_ELEM_SPI:
898 case MIPI_SEQ_ELEM_PMIC:
899 break;
900 default:
901 DRM_ERROR("Unknown operation byte %u\n",
902 operation_byte);
903 break;
904 }
905 }
906
907 return 0;
908}
909
910static void
911parse_mipi_sequence(struct drm_i915_private *dev_priv,
912 const struct bdb_header *bdb)
913{
914 const struct bdb_mipi_sequence *sequence;
915 const u8 *seq_data;
916 u32 seq_size;
917 u8 *data;
918 int index = 0;
919
920 /* Only our generic panel driver uses the sequence block. */
921 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
922 return;
923
924 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
925 if (!sequence) {
926 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
927 return;
928 }
929
930 /* Fail gracefully for forward incompatible sequence block. */
931 if (sequence->version >= 4) {
932 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
933 sequence->version);
934 return;
935 }
936
937 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
938
939 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
940 if (!seq_data)
941 return;
942
943 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
944 if (!data)
945 return;
946
947 /* Parse the sequences, store pointers to each sequence. */
948 for (;;) {
949 u8 seq_id = *(data + index);
950 if (seq_id == MIPI_SEQ_END)
951 break;
952
953 if (seq_id >= MIPI_SEQ_MAX) {
954 DRM_ERROR("Unknown sequence %u\n", seq_id);
955 goto err;
956 }
957
958 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
959
960 if (sequence->version >= 3)
961 index = goto_next_sequence_v3(data, index, seq_size);
962 else
963 index = goto_next_sequence(data, index, seq_size);
964 if (!index) {
965 DRM_ERROR("Invalid sequence %u\n", seq_id);
966 goto err;
967 }
968 }
969
970 dev_priv->vbt.dsi.data = data;
971 dev_priv->vbt.dsi.size = seq_size;
972 dev_priv->vbt.dsi.seq_version = sequence->version;
973
974 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
975 return;
976
977err:
978 kfree(data);
979 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
980}
981
982static u8 translate_iboost(u8 val)
983{
984 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
985
986 if (val >= ARRAY_SIZE(mapping)) {
987 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
988 return 0;
989 }
990 return mapping[val];
991}
992
993static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
994 const struct bdb_header *bdb)
995{
996 union child_device_config *it, *child = NULL;
997 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
998 uint8_t hdmi_level_shift;
999 int i, j;
1000 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1001 uint8_t aux_channel, ddc_pin;
1002 /* Each DDI port can have more than one value on the "DVO Port" field,
1003 * so look for all the possible values for each port and abort if more
1004 * than one is found. */
1005 int dvo_ports[][3] = {
1006 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1007 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1008 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1009 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1010 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
1011 };
1012
1013 /* Find the child device to use, abort if more than one found. */
1014 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1015 it = dev_priv->vbt.child_dev + i;
1016
1017 for (j = 0; j < 3; j++) {
1018 if (dvo_ports[port][j] == -1)
1019 break;
1020
1021 if (it->common.dvo_port == dvo_ports[port][j]) {
1022 if (child) {
1023 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1024 port_name(port));
1025 return;
1026 }
1027 child = it;
1028 }
1029 }
1030 }
1031 if (!child)
1032 return;
1033
1034 aux_channel = child->raw[25];
1035 ddc_pin = child->common.ddc_pin;
1036
1037 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1038 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1039 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1040 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1041 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1042
1043 info->supports_dvi = is_dvi;
1044 info->supports_hdmi = is_hdmi;
1045 info->supports_dp = is_dp;
1046
1047 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1048 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1049
1050 if (is_edp && is_dvi)
1051 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1052 port_name(port));
1053 if (is_crt && port != PORT_E)
1054 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1055 if (is_crt && (is_dvi || is_dp))
1056 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1057 port_name(port));
1058 if (is_dvi && (port == PORT_A || port == PORT_E))
1059 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
1060 if (!is_dvi && !is_dp && !is_crt)
1061 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1062 port_name(port));
1063 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1064 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
1065
1066 if (is_dvi) {
1067 if (port == PORT_E) {
1068 info->alternate_ddc_pin = ddc_pin;
1069 /* if DDIE share ddc pin with other port, then
1070 * dvi/hdmi couldn't exist on the shared port.
1071 * Otherwise they share the same ddc bin and system
1072 * couldn't communicate with them seperately. */
1073 if (ddc_pin == DDC_PIN_B) {
1074 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1075 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1076 } else if (ddc_pin == DDC_PIN_C) {
1077 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1078 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1079 } else if (ddc_pin == DDC_PIN_D) {
1080 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1081 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1082 }
1083 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
1084 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
1085 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
1086 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
1087 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
1088 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1089 }
1090
1091 if (is_dp) {
1092 if (port == PORT_E) {
1093 info->alternate_aux_channel = aux_channel;
1094 /* if DDIE share aux channel with other port, then
1095 * DP couldn't exist on the shared port. Otherwise
1096 * they share the same aux channel and system
1097 * couldn't communicate with them seperately. */
1098 if (aux_channel == DP_AUX_A)
1099 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1100 else if (aux_channel == DP_AUX_B)
1101 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1102 else if (aux_channel == DP_AUX_C)
1103 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1104 else if (aux_channel == DP_AUX_D)
1105 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1106 }
1107 else if (aux_channel == DP_AUX_A && port != PORT_A)
1108 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
1109 else if (aux_channel == DP_AUX_B && port != PORT_B)
1110 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
1111 else if (aux_channel == DP_AUX_C && port != PORT_C)
1112 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
1113 else if (aux_channel == DP_AUX_D && port != PORT_D)
1114 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1115 }
1116
1117 if (bdb->version >= 158) {
1118 /* The VBT HDMI level shift values match the table we have. */
1119 hdmi_level_shift = child->raw[7] & 0xF;
1120 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1121 port_name(port),
1122 hdmi_level_shift);
1123 info->hdmi_level_shift = hdmi_level_shift;
1124 }
1125
1126 /* Parse the I_boost config for SKL and above */
1127 if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) {
1128 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1129 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1130 port_name(port), info->dp_boost_level);
1131 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1132 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1133 port_name(port), info->hdmi_boost_level);
1134 }
1135}
1136
1137static void parse_ddi_ports(struct drm_i915_private *dev_priv,
1138 const struct bdb_header *bdb)
1139{
1140 enum port port;
1141
1142 if (!HAS_DDI(dev_priv))
1143 return;
1144
1145 if (!dev_priv->vbt.child_dev_num)
1146 return;
1147
1148 if (bdb->version < 155)
1149 return;
1150
1151 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1152 parse_ddi_port(dev_priv, port, bdb);
1153}
1154
1155static void
1156parse_device_mapping(struct drm_i915_private *dev_priv,
1157 const struct bdb_header *bdb)
1158{
1159 const struct bdb_general_definitions *p_defs;
1160 const union child_device_config *p_child;
1161 union child_device_config *child_dev_ptr;
1162 int i, child_device_num, count;
1163 u8 expected_size;
1164 u16 block_size;
1165
1166 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1167 if (!p_defs) {
1168 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1169 return;
1170 }
1171 if (bdb->version < 106) {
1172 expected_size = 22;
1173 } else if (bdb->version < 109) {
1174 expected_size = 27;
1175 } else if (bdb->version < 195) {
1176 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
1177 expected_size = sizeof(struct old_child_dev_config);
1178 } else if (bdb->version == 195) {
1179 expected_size = 37;
1180 } else if (bdb->version <= 197) {
1181 expected_size = 38;
1182 } else {
1183 expected_size = 38;
1184 BUILD_BUG_ON(sizeof(*p_child) < 38);
1185 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1186 bdb->version, expected_size);
1187 }
1188
1189 /* Flag an error for unexpected size, but continue anyway. */
1190 if (p_defs->child_dev_size != expected_size)
1191 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1192 p_defs->child_dev_size, expected_size, bdb->version);
1193
1194 /* The legacy sized child device config is the minimum we need. */
1195 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1196 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1197 p_defs->child_dev_size);
1198 return;
1199 }
1200
1201 /* get the block size of general definitions */
1202 block_size = get_blocksize(p_defs);
1203 /* get the number of child device */
1204 child_device_num = (block_size - sizeof(*p_defs)) /
1205 p_defs->child_dev_size;
1206 count = 0;
1207 /* get the number of child device that is present */
1208 for (i = 0; i < child_device_num; i++) {
1209 p_child = child_device_ptr(p_defs, i);
1210 if (!p_child->common.device_type) {
1211 /* skip the device block if device type is invalid */
1212 continue;
1213 }
1214 count++;
1215 }
1216 if (!count) {
1217 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1218 return;
1219 }
1220 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1221 if (!dev_priv->vbt.child_dev) {
1222 DRM_DEBUG_KMS("No memory space for child device\n");
1223 return;
1224 }
1225
1226 dev_priv->vbt.child_dev_num = count;
1227 count = 0;
1228 for (i = 0; i < child_device_num; i++) {
1229 p_child = child_device_ptr(p_defs, i);
1230 if (!p_child->common.device_type) {
1231 /* skip the device block if device type is invalid */
1232 continue;
1233 }
1234
1235 if (p_child->common.dvo_port >= DVO_PORT_MIPIA
1236 && p_child->common.dvo_port <= DVO_PORT_MIPID
1237 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
1238 DRM_DEBUG_KMS("Found MIPI as LFP\n");
1239 dev_priv->vbt.has_mipi = 1;
1240 dev_priv->vbt.dsi.port = p_child->common.dvo_port;
1241 }
1242
1243 child_dev_ptr = dev_priv->vbt.child_dev + count;
1244 count++;
1245
1246 /*
1247 * Copy as much as we know (sizeof) and is available
1248 * (child_dev_size) of the child device. Accessing the data must
1249 * depend on VBT version.
1250 */
1251 memcpy(child_dev_ptr, p_child,
1252 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
1253 }
1254 return;
1255}
1256
1257static void
1258init_vbt_defaults(struct drm_i915_private *dev_priv)
1259{
1260 enum port port;
1261
1262 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1263
1264 /* Default to having backlight */
1265 dev_priv->vbt.backlight.present = true;
1266
1267 /* LFP panel data */
1268 dev_priv->vbt.lvds_dither = 1;
1269 dev_priv->vbt.lvds_vbt = 0;
1270
1271 /* SDVO panel data */
1272 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1273
1274 /* general features */
1275 dev_priv->vbt.int_tv_support = 1;
1276 dev_priv->vbt.int_crt_support = 1;
1277
1278 /* Default to using SSC */
1279 dev_priv->vbt.lvds_use_ssc = 1;
1280 /*
1281 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1282 * clock for LVDS.
1283 */
1284 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1285 !HAS_PCH_SPLIT(dev_priv));
1286 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1287
1288 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1289 struct ddi_vbt_port_info *info =
1290 &dev_priv->vbt.ddi_port_info[port];
1291
1292 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1293
1294 info->supports_dvi = (port != PORT_A && port != PORT_E);
1295 info->supports_hdmi = info->supports_dvi;
1296 info->supports_dp = (port != PORT_E);
1297 }
1298}
1299
1300static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1301{
1302 const void *_vbt = vbt;
1303
1304 return _vbt + vbt->bdb_offset;
1305}
1306
1307/**
1308 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1309 * @buf: pointer to a buffer to validate
1310 * @size: size of the buffer
1311 *
1312 * Returns true on valid VBT.
1313 */
1314bool intel_bios_is_valid_vbt(const void *buf, size_t size)
1315{
1316 const struct vbt_header *vbt = buf;
1317 const struct bdb_header *bdb;
1318
1319 if (!vbt)
1320 return false;
1321
1322 if (sizeof(struct vbt_header) > size) {
1323 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1324 return false;
1325 }
1326
1327 if (memcmp(vbt->signature, "$VBT", 4)) {
1328 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1329 return false;
1330 }
1331
1332 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
1333 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1334 return false;
1335 }
1336
1337 bdb = get_bdb_header(vbt);
1338 if (vbt->bdb_offset + bdb->bdb_size > size) {
1339 DRM_DEBUG_DRIVER("BDB incomplete\n");
1340 return false;
1341 }
1342
1343 return vbt;
1344}
1345
1346static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
1347{
1348 size_t i;
1349
1350 /* Scour memory looking for the VBT signature. */
1351 for (i = 0; i + 4 < size; i++) {
1352 void *vbt;
1353
1354 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1355 continue;
1356
1357 /*
1358 * This is the one place where we explicitly discard the address
1359 * space (__iomem) of the BIOS/VBT.
1360 */
1361 vbt = (void __force *) bios + i;
1362 if (intel_bios_is_valid_vbt(vbt, size - i))
1363 return vbt;
1364
1365 break;
1366 }
1367
1368 return NULL;
1369}
1370
1371/**
1372 * intel_bios_init - find VBT and initialize settings from the BIOS
1373 * @dev_priv: i915 device instance
1374 *
1375 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1376 * to appropriate values.
1377 *
1378 * Returns 0 on success, nonzero on failure.
1379 */
1380int
1381intel_bios_init(struct drm_i915_private *dev_priv)
1382{
1383 struct pci_dev *pdev = dev_priv->dev->pdev;
1384 const struct vbt_header *vbt = dev_priv->opregion.vbt;
1385 const struct bdb_header *bdb;
1386 u8 __iomem *bios = NULL;
1387
1388 if (HAS_PCH_NOP(dev_priv))
1389 return -ENODEV;
1390
1391 init_vbt_defaults(dev_priv);
1392
1393 if (!vbt) {
1394 size_t size;
1395
1396 bios = pci_map_rom(pdev, &size);
1397 if (!bios)
1398 return -1;
1399
1400 vbt = find_vbt(bios, size);
1401 if (!vbt) {
1402 pci_unmap_rom(pdev, bios);
1403 return -1;
1404 }
1405
1406 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
1407 }
1408
1409 bdb = get_bdb_header(vbt);
1410
1411 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1412 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
1413
1414 /* Grab useful general definitions */
1415 parse_general_features(dev_priv, bdb);
1416 parse_general_definitions(dev_priv, bdb);
1417 parse_lfp_panel_data(dev_priv, bdb);
1418 parse_lfp_backlight(dev_priv, bdb);
1419 parse_sdvo_panel_data(dev_priv, bdb);
1420 parse_sdvo_device_mapping(dev_priv, bdb);
1421 parse_device_mapping(dev_priv, bdb);
1422 parse_driver_features(dev_priv, bdb);
1423 parse_edp(dev_priv, bdb);
1424 parse_psr(dev_priv, bdb);
1425 parse_mipi_config(dev_priv, bdb);
1426 parse_mipi_sequence(dev_priv, bdb);
1427 parse_ddi_ports(dev_priv, bdb);
1428
1429 if (bios)
1430 pci_unmap_rom(pdev, bios);
1431
1432 return 0;
1433}
1/*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27#include <linux/dmi.h>
28#include <drm/drm_dp_helper.h>
29#include "drmP.h"
30#include "drm.h"
31#include "i915_drm.h"
32#include "i915_drv.h"
33#include "intel_bios.h"
34
35#define SLAVE_ADDR1 0x70
36#define SLAVE_ADDR2 0x72
37
38static int panel_type;
39
40static void *
41find_section(struct bdb_header *bdb, int section_id)
42{
43 u8 *base = (u8 *)bdb;
44 int index = 0;
45 u16 total, current_size;
46 u8 current_id;
47
48 /* skip to first section */
49 index += bdb->header_size;
50 total = bdb->bdb_size;
51
52 /* walk the sections looking for section_id */
53 while (index < total) {
54 current_id = *(base + index);
55 index++;
56 current_size = *((u16 *)(base + index));
57 index += 2;
58 if (current_id == section_id)
59 return base + index;
60 index += current_size;
61 }
62
63 return NULL;
64}
65
66static u16
67get_blocksize(void *p)
68{
69 u16 *block_ptr, block_size;
70
71 block_ptr = (u16 *)((char *)p - 2);
72 block_size = *block_ptr;
73 return block_size;
74}
75
76static void
77fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
78 const struct lvds_dvo_timing *dvo_timing)
79{
80 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
81 dvo_timing->hactive_lo;
82 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
83 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
84 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
85 dvo_timing->hsync_pulse_width;
86 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
87 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
88
89 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
90 dvo_timing->vactive_lo;
91 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
92 dvo_timing->vsync_off;
93 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
94 dvo_timing->vsync_pulse_width;
95 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
96 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
97 panel_fixed_mode->clock = dvo_timing->clock * 10;
98 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
99
100 if (dvo_timing->hsync_positive)
101 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
102 else
103 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
104
105 if (dvo_timing->vsync_positive)
106 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
107 else
108 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
109
110 /* Some VBTs have bogus h/vtotal values */
111 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
112 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
113 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
114 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
115
116 drm_mode_set_name(panel_fixed_mode);
117}
118
119static bool
120lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
121 const struct lvds_dvo_timing *b)
122{
123 if (a->hactive_hi != b->hactive_hi ||
124 a->hactive_lo != b->hactive_lo)
125 return false;
126
127 if (a->hsync_off_hi != b->hsync_off_hi ||
128 a->hsync_off_lo != b->hsync_off_lo)
129 return false;
130
131 if (a->hsync_pulse_width != b->hsync_pulse_width)
132 return false;
133
134 if (a->hblank_hi != b->hblank_hi ||
135 a->hblank_lo != b->hblank_lo)
136 return false;
137
138 if (a->vactive_hi != b->vactive_hi ||
139 a->vactive_lo != b->vactive_lo)
140 return false;
141
142 if (a->vsync_off != b->vsync_off)
143 return false;
144
145 if (a->vsync_pulse_width != b->vsync_pulse_width)
146 return false;
147
148 if (a->vblank_hi != b->vblank_hi ||
149 a->vblank_lo != b->vblank_lo)
150 return false;
151
152 return true;
153}
154
155static const struct lvds_dvo_timing *
156get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
157 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
158 int index)
159{
160 /*
161 * the size of fp_timing varies on the different platform.
162 * So calculate the DVO timing relative offset in LVDS data
163 * entry to get the DVO timing entry
164 */
165
166 int lfp_data_size =
167 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
168 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
169 int dvo_timing_offset =
170 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
171 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
172 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
173
174 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
175}
176
177/* get lvds_fp_timing entry
178 * this function may return NULL if the corresponding entry is invalid
179 */
180static const struct lvds_fp_timing *
181get_lvds_fp_timing(const struct bdb_header *bdb,
182 const struct bdb_lvds_lfp_data *data,
183 const struct bdb_lvds_lfp_data_ptrs *ptrs,
184 int index)
185{
186 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
187 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
188 size_t ofs;
189
190 if (index >= ARRAY_SIZE(ptrs->ptr))
191 return NULL;
192 ofs = ptrs->ptr[index].fp_timing_offset;
193 if (ofs < data_ofs ||
194 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
195 return NULL;
196 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
197}
198
199/* Try to find integrated panel data */
200static void
201parse_lfp_panel_data(struct drm_i915_private *dev_priv,
202 struct bdb_header *bdb)
203{
204 const struct bdb_lvds_options *lvds_options;
205 const struct bdb_lvds_lfp_data *lvds_lfp_data;
206 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
207 const struct lvds_dvo_timing *panel_dvo_timing;
208 const struct lvds_fp_timing *fp_timing;
209 struct drm_display_mode *panel_fixed_mode;
210 int i, downclock;
211
212 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
213 if (!lvds_options)
214 return;
215
216 dev_priv->lvds_dither = lvds_options->pixel_dither;
217 if (lvds_options->panel_type == 0xff)
218 return;
219
220 panel_type = lvds_options->panel_type;
221
222 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
223 if (!lvds_lfp_data)
224 return;
225
226 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
227 if (!lvds_lfp_data_ptrs)
228 return;
229
230 dev_priv->lvds_vbt = 1;
231
232 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
233 lvds_lfp_data_ptrs,
234 lvds_options->panel_type);
235
236 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
237 if (!panel_fixed_mode)
238 return;
239
240 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
241
242 dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
243
244 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
245 drm_mode_debug_printmodeline(panel_fixed_mode);
246
247 /*
248 * Iterate over the LVDS panel timing info to find the lowest clock
249 * for the native resolution.
250 */
251 downclock = panel_dvo_timing->clock;
252 for (i = 0; i < 16; i++) {
253 const struct lvds_dvo_timing *dvo_timing;
254
255 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
256 lvds_lfp_data_ptrs,
257 i);
258 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
259 dvo_timing->clock < downclock)
260 downclock = dvo_timing->clock;
261 }
262
263 if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) {
264 dev_priv->lvds_downclock_avail = 1;
265 dev_priv->lvds_downclock = downclock * 10;
266 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
267 "Normal Clock %dKHz, downclock %dKHz\n",
268 panel_fixed_mode->clock, 10*downclock);
269 }
270
271 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
272 lvds_lfp_data_ptrs,
273 lvds_options->panel_type);
274 if (fp_timing) {
275 /* check the resolution, just to be sure */
276 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
277 fp_timing->y_res == panel_fixed_mode->vdisplay) {
278 dev_priv->bios_lvds_val = fp_timing->lvds_reg_val;
279 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
280 dev_priv->bios_lvds_val);
281 }
282 }
283}
284
285/* Try to find sdvo panel data */
286static void
287parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
288 struct bdb_header *bdb)
289{
290 struct lvds_dvo_timing *dvo_timing;
291 struct drm_display_mode *panel_fixed_mode;
292 int index;
293
294 index = i915_vbt_sdvo_panel_type;
295 if (index == -2) {
296 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
297 return;
298 }
299
300 if (index == -1) {
301 struct bdb_sdvo_lvds_options *sdvo_lvds_options;
302
303 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
304 if (!sdvo_lvds_options)
305 return;
306
307 index = sdvo_lvds_options->panel_type;
308 }
309
310 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
311 if (!dvo_timing)
312 return;
313
314 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
315 if (!panel_fixed_mode)
316 return;
317
318 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
319
320 dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
321
322 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
323 drm_mode_debug_printmodeline(panel_fixed_mode);
324}
325
326static int intel_bios_ssc_frequency(struct drm_device *dev,
327 bool alternate)
328{
329 switch (INTEL_INFO(dev)->gen) {
330 case 2:
331 return alternate ? 66 : 48;
332 case 3:
333 case 4:
334 return alternate ? 100 : 96;
335 default:
336 return alternate ? 100 : 120;
337 }
338}
339
340static void
341parse_general_features(struct drm_i915_private *dev_priv,
342 struct bdb_header *bdb)
343{
344 struct drm_device *dev = dev_priv->dev;
345 struct bdb_general_features *general;
346
347 general = find_section(bdb, BDB_GENERAL_FEATURES);
348 if (general) {
349 dev_priv->int_tv_support = general->int_tv_support;
350 dev_priv->int_crt_support = general->int_crt_support;
351 dev_priv->lvds_use_ssc = general->enable_ssc;
352 dev_priv->lvds_ssc_freq =
353 intel_bios_ssc_frequency(dev, general->ssc_freq);
354 dev_priv->display_clock_mode = general->display_clock_mode;
355 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n",
356 dev_priv->int_tv_support,
357 dev_priv->int_crt_support,
358 dev_priv->lvds_use_ssc,
359 dev_priv->lvds_ssc_freq,
360 dev_priv->display_clock_mode);
361 }
362}
363
364static void
365parse_general_definitions(struct drm_i915_private *dev_priv,
366 struct bdb_header *bdb)
367{
368 struct bdb_general_definitions *general;
369
370 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
371 if (general) {
372 u16 block_size = get_blocksize(general);
373 if (block_size >= sizeof(*general)) {
374 int bus_pin = general->crt_ddc_gmbus_pin;
375 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
376 if (intel_gmbus_is_port_valid(bus_pin))
377 dev_priv->crt_ddc_pin = bus_pin;
378 } else {
379 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
380 block_size);
381 }
382 }
383}
384
385static void
386parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
387 struct bdb_header *bdb)
388{
389 struct sdvo_device_mapping *p_mapping;
390 struct bdb_general_definitions *p_defs;
391 struct child_device_config *p_child;
392 int i, child_device_num, count;
393 u16 block_size;
394
395 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
396 if (!p_defs) {
397 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
398 return;
399 }
400 /* judge whether the size of child device meets the requirements.
401 * If the child device size obtained from general definition block
402 * is different with sizeof(struct child_device_config), skip the
403 * parsing of sdvo device info
404 */
405 if (p_defs->child_dev_size != sizeof(*p_child)) {
406 /* different child dev size . Ignore it */
407 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
408 return;
409 }
410 /* get the block size of general definitions */
411 block_size = get_blocksize(p_defs);
412 /* get the number of child device */
413 child_device_num = (block_size - sizeof(*p_defs)) /
414 sizeof(*p_child);
415 count = 0;
416 for (i = 0; i < child_device_num; i++) {
417 p_child = &(p_defs->devices[i]);
418 if (!p_child->device_type) {
419 /* skip the device block if device type is invalid */
420 continue;
421 }
422 if (p_child->slave_addr != SLAVE_ADDR1 &&
423 p_child->slave_addr != SLAVE_ADDR2) {
424 /*
425 * If the slave address is neither 0x70 nor 0x72,
426 * it is not a SDVO device. Skip it.
427 */
428 continue;
429 }
430 if (p_child->dvo_port != DEVICE_PORT_DVOB &&
431 p_child->dvo_port != DEVICE_PORT_DVOC) {
432 /* skip the incorrect SDVO port */
433 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
434 continue;
435 }
436 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
437 " %s port\n",
438 p_child->slave_addr,
439 (p_child->dvo_port == DEVICE_PORT_DVOB) ?
440 "SDVOB" : "SDVOC");
441 p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
442 if (!p_mapping->initialized) {
443 p_mapping->dvo_port = p_child->dvo_port;
444 p_mapping->slave_addr = p_child->slave_addr;
445 p_mapping->dvo_wiring = p_child->dvo_wiring;
446 p_mapping->ddc_pin = p_child->ddc_pin;
447 p_mapping->i2c_pin = p_child->i2c_pin;
448 p_mapping->initialized = 1;
449 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
450 p_mapping->dvo_port,
451 p_mapping->slave_addr,
452 p_mapping->dvo_wiring,
453 p_mapping->ddc_pin,
454 p_mapping->i2c_pin);
455 } else {
456 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
457 "two SDVO device.\n");
458 }
459 if (p_child->slave2_addr) {
460 /* Maybe this is a SDVO device with multiple inputs */
461 /* And the mapping info is not added */
462 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
463 " is a SDVO device with multiple inputs.\n");
464 }
465 count++;
466 }
467
468 if (!count) {
469 /* No SDVO device info is found */
470 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
471 }
472 return;
473}
474
475static void
476parse_driver_features(struct drm_i915_private *dev_priv,
477 struct bdb_header *bdb)
478{
479 struct drm_device *dev = dev_priv->dev;
480 struct bdb_driver_features *driver;
481
482 driver = find_section(bdb, BDB_DRIVER_FEATURES);
483 if (!driver)
484 return;
485
486 if (SUPPORTS_EDP(dev) &&
487 driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
488 dev_priv->edp.support = 1;
489
490 if (driver->dual_frequency)
491 dev_priv->render_reclock_avail = true;
492}
493
494static void
495parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
496{
497 struct bdb_edp *edp;
498 struct edp_power_seq *edp_pps;
499 struct edp_link_params *edp_link_params;
500
501 edp = find_section(bdb, BDB_EDP);
502 if (!edp) {
503 if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support) {
504 DRM_DEBUG_KMS("No eDP BDB found but eDP panel "
505 "supported, assume %dbpp panel color "
506 "depth.\n",
507 dev_priv->edp.bpp);
508 }
509 return;
510 }
511
512 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
513 case EDP_18BPP:
514 dev_priv->edp.bpp = 18;
515 break;
516 case EDP_24BPP:
517 dev_priv->edp.bpp = 24;
518 break;
519 case EDP_30BPP:
520 dev_priv->edp.bpp = 30;
521 break;
522 }
523
524 /* Get the eDP sequencing and link info */
525 edp_pps = &edp->power_seqs[panel_type];
526 edp_link_params = &edp->link_params[panel_type];
527
528 dev_priv->edp.pps = *edp_pps;
529
530 dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
531 DP_LINK_BW_1_62;
532 switch (edp_link_params->lanes) {
533 case 0:
534 dev_priv->edp.lanes = 1;
535 break;
536 case 1:
537 dev_priv->edp.lanes = 2;
538 break;
539 case 3:
540 default:
541 dev_priv->edp.lanes = 4;
542 break;
543 }
544 switch (edp_link_params->preemphasis) {
545 case 0:
546 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
547 break;
548 case 1:
549 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
550 break;
551 case 2:
552 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
553 break;
554 case 3:
555 dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
556 break;
557 }
558 switch (edp_link_params->vswing) {
559 case 0:
560 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;
561 break;
562 case 1:
563 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;
564 break;
565 case 2:
566 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;
567 break;
568 case 3:
569 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;
570 break;
571 }
572}
573
574static void
575parse_device_mapping(struct drm_i915_private *dev_priv,
576 struct bdb_header *bdb)
577{
578 struct bdb_general_definitions *p_defs;
579 struct child_device_config *p_child, *child_dev_ptr;
580 int i, child_device_num, count;
581 u16 block_size;
582
583 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
584 if (!p_defs) {
585 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
586 return;
587 }
588 /* judge whether the size of child device meets the requirements.
589 * If the child device size obtained from general definition block
590 * is different with sizeof(struct child_device_config), skip the
591 * parsing of sdvo device info
592 */
593 if (p_defs->child_dev_size != sizeof(*p_child)) {
594 /* different child dev size . Ignore it */
595 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
596 return;
597 }
598 /* get the block size of general definitions */
599 block_size = get_blocksize(p_defs);
600 /* get the number of child device */
601 child_device_num = (block_size - sizeof(*p_defs)) /
602 sizeof(*p_child);
603 count = 0;
604 /* get the number of child device that is present */
605 for (i = 0; i < child_device_num; i++) {
606 p_child = &(p_defs->devices[i]);
607 if (!p_child->device_type) {
608 /* skip the device block if device type is invalid */
609 continue;
610 }
611 count++;
612 }
613 if (!count) {
614 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
615 return;
616 }
617 dev_priv->child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
618 if (!dev_priv->child_dev) {
619 DRM_DEBUG_KMS("No memory space for child device\n");
620 return;
621 }
622
623 dev_priv->child_dev_num = count;
624 count = 0;
625 for (i = 0; i < child_device_num; i++) {
626 p_child = &(p_defs->devices[i]);
627 if (!p_child->device_type) {
628 /* skip the device block if device type is invalid */
629 continue;
630 }
631 child_dev_ptr = dev_priv->child_dev + count;
632 count++;
633 memcpy((void *)child_dev_ptr, (void *)p_child,
634 sizeof(*p_child));
635 }
636 return;
637}
638
639static void
640init_vbt_defaults(struct drm_i915_private *dev_priv)
641{
642 struct drm_device *dev = dev_priv->dev;
643
644 dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
645
646 /* LFP panel data */
647 dev_priv->lvds_dither = 1;
648 dev_priv->lvds_vbt = 0;
649
650 /* SDVO panel data */
651 dev_priv->sdvo_lvds_vbt_mode = NULL;
652
653 /* general features */
654 dev_priv->int_tv_support = 1;
655 dev_priv->int_crt_support = 1;
656
657 /* Default to using SSC */
658 dev_priv->lvds_use_ssc = 1;
659 dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
660 DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq);
661
662 /* eDP data */
663 dev_priv->edp.bpp = 18;
664}
665
666static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
667{
668 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
669 "VBIOS ROM for %s\n",
670 id->ident);
671 return 1;
672}
673
674static const struct dmi_system_id intel_no_opregion_vbt[] = {
675 {
676 .callback = intel_no_opregion_vbt_callback,
677 .ident = "ThinkCentre A57",
678 .matches = {
679 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
680 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
681 },
682 },
683 { }
684};
685
686/**
687 * intel_parse_bios - find VBT and initialize settings from the BIOS
688 * @dev: DRM device
689 *
690 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
691 * to appropriate values.
692 *
693 * Returns 0 on success, nonzero on failure.
694 */
695bool
696intel_parse_bios(struct drm_device *dev)
697{
698 struct drm_i915_private *dev_priv = dev->dev_private;
699 struct pci_dev *pdev = dev->pdev;
700 struct bdb_header *bdb = NULL;
701 u8 __iomem *bios = NULL;
702
703 init_vbt_defaults(dev_priv);
704
705 /* XXX Should this validation be moved to intel_opregion.c? */
706 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) {
707 struct vbt_header *vbt = dev_priv->opregion.vbt;
708 if (memcmp(vbt->signature, "$VBT", 4) == 0) {
709 DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",
710 vbt->signature);
711 bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset);
712 } else
713 dev_priv->opregion.vbt = NULL;
714 }
715
716 if (bdb == NULL) {
717 struct vbt_header *vbt = NULL;
718 size_t size;
719 int i;
720
721 bios = pci_map_rom(pdev, &size);
722 if (!bios)
723 return -1;
724
725 /* Scour memory looking for the VBT signature */
726 for (i = 0; i + 4 < size; i++) {
727 if (!memcmp(bios + i, "$VBT", 4)) {
728 vbt = (struct vbt_header *)(bios + i);
729 break;
730 }
731 }
732
733 if (!vbt) {
734 DRM_DEBUG_DRIVER("VBT signature missing\n");
735 pci_unmap_rom(pdev, bios);
736 return -1;
737 }
738
739 bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
740 }
741
742 /* Grab useful general definitions */
743 parse_general_features(dev_priv, bdb);
744 parse_general_definitions(dev_priv, bdb);
745 parse_lfp_panel_data(dev_priv, bdb);
746 parse_sdvo_panel_data(dev_priv, bdb);
747 parse_sdvo_device_mapping(dev_priv, bdb);
748 parse_device_mapping(dev_priv, bdb);
749 parse_driver_features(dev_priv, bdb);
750 parse_edp(dev_priv, bdb);
751
752 if (bios)
753 pci_unmap_rom(pdev, bios);
754
755 return 0;
756}
757
758/* Ensure that vital registers have been initialised, even if the BIOS
759 * is absent or just failing to do its job.
760 */
761void intel_setup_bios(struct drm_device *dev)
762{
763 struct drm_i915_private *dev_priv = dev->dev_private;
764
765 /* Set the Panel Power On/Off timings if uninitialized. */
766 if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
767 /* Set T2 to 40ms and T5 to 200ms */
768 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
769
770 /* Set T3 to 35ms and Tx to 200ms */
771 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
772 }
773}