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1/*
2 * linux/arch/arm/kernel/irq.c
3 *
4 * Copyright (C) 1992 Linus Torvalds
5 * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
6 *
7 * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
8 * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * This file contains the code used by various IRQ handling routines:
16 * asking for different IRQ's should be done through these routines
17 * instead of just grabbing them. Thus setups with different IRQ numbers
18 * shouldn't result in any weird surprises, and installing new handlers
19 * should be easier.
20 *
21 * IRQ's are in fact implemented a bit like signal handlers for the kernel.
22 * Naturally it's not a 1:1 relation, but there are similarities.
23 */
24#include <linux/kernel_stat.h>
25#include <linux/signal.h>
26#include <linux/ioport.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/irqchip.h>
30#include <linux/random.h>
31#include <linux/smp.h>
32#include <linux/init.h>
33#include <linux/seq_file.h>
34#include <linux/ratelimit.h>
35#include <linux/errno.h>
36#include <linux/list.h>
37#include <linux/kallsyms.h>
38#include <linux/proc_fs.h>
39#include <linux/export.h>
40
41#include <asm/hardware/cache-l2x0.h>
42#include <asm/hardware/cache-uniphier.h>
43#include <asm/outercache.h>
44#include <asm/exception.h>
45#include <asm/mach/arch.h>
46#include <asm/mach/irq.h>
47#include <asm/mach/time.h>
48
49unsigned long irq_err_count;
50
51int arch_show_interrupts(struct seq_file *p, int prec)
52{
53#ifdef CONFIG_FIQ
54 show_fiq_list(p, prec);
55#endif
56#ifdef CONFIG_SMP
57 show_ipi_list(p, prec);
58#endif
59 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
60 return 0;
61}
62
63/*
64 * handle_IRQ handles all hardware IRQ's. Decoded IRQs should
65 * not come via this function. Instead, they should provide their
66 * own 'handler'. Used by platform code implementing C-based 1st
67 * level decoding.
68 */
69void handle_IRQ(unsigned int irq, struct pt_regs *regs)
70{
71 __handle_domain_irq(NULL, irq, false, regs);
72}
73
74/*
75 * asm_do_IRQ is the interface to be used from assembly code.
76 */
77asmlinkage void __exception_irq_entry
78asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
79{
80 handle_IRQ(irq, regs);
81}
82
83void __init init_IRQ(void)
84{
85 int ret;
86
87 if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
88 irqchip_init();
89 else
90 machine_desc->init_irq();
91
92 if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
93 (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
94 if (!outer_cache.write_sec)
95 outer_cache.write_sec = machine_desc->l2c_write_sec;
96 ret = l2x0_of_init(machine_desc->l2c_aux_val,
97 machine_desc->l2c_aux_mask);
98 if (ret && ret != -ENODEV)
99 pr_err("L2C: failed to init: %d\n", ret);
100 }
101
102 uniphier_cache_init();
103}
104
105#ifdef CONFIG_MULTI_IRQ_HANDLER
106void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
107{
108 if (handle_arch_irq)
109 return;
110
111 handle_arch_irq = handle_irq;
112}
113#endif
114
115#ifdef CONFIG_SPARSE_IRQ
116int __init arch_probe_nr_irqs(void)
117{
118 nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
119 return nr_irqs;
120}
121#endif
122
123#ifdef CONFIG_HOTPLUG_CPU
124static bool migrate_one_irq(struct irq_desc *desc)
125{
126 struct irq_data *d = irq_desc_get_irq_data(desc);
127 const struct cpumask *affinity = irq_data_get_affinity_mask(d);
128 struct irq_chip *c;
129 bool ret = false;
130
131 /*
132 * If this is a per-CPU interrupt, or the affinity does not
133 * include this CPU, then we have nothing to do.
134 */
135 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
136 return false;
137
138 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
139 affinity = cpu_online_mask;
140 ret = true;
141 }
142
143 c = irq_data_get_irq_chip(d);
144 if (!c->irq_set_affinity)
145 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
146 else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
147 cpumask_copy(irq_data_get_affinity_mask(d), affinity);
148
149 return ret;
150}
151
152/*
153 * The current CPU has been marked offline. Migrate IRQs off this CPU.
154 * If the affinity settings do not allow other CPUs, force them onto any
155 * available CPU.
156 *
157 * Note: we must iterate over all IRQs, whether they have an attached
158 * action structure or not, as we need to get chained interrupts too.
159 */
160void migrate_irqs(void)
161{
162 unsigned int i;
163 struct irq_desc *desc;
164 unsigned long flags;
165
166 local_irq_save(flags);
167
168 for_each_irq_desc(i, desc) {
169 bool affinity_broken;
170
171 raw_spin_lock(&desc->lock);
172 affinity_broken = migrate_one_irq(desc);
173 raw_spin_unlock(&desc->lock);
174
175 if (affinity_broken)
176 pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
177 i, smp_processor_id());
178 }
179
180 local_irq_restore(flags);
181}
182#endif /* CONFIG_HOTPLUG_CPU */
1/*
2 * linux/arch/arm/kernel/irq.c
3 *
4 * Copyright (C) 1992 Linus Torvalds
5 * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
6 *
7 * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
8 * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * This file contains the code used by various IRQ handling routines:
16 * asking for different IRQ's should be done through these routines
17 * instead of just grabbing them. Thus setups with different IRQ numbers
18 * shouldn't result in any weird surprises, and installing new handlers
19 * should be easier.
20 *
21 * IRQ's are in fact implemented a bit like signal handlers for the kernel.
22 * Naturally it's not a 1:1 relation, but there are similarities.
23 */
24#include <linux/kernel_stat.h>
25#include <linux/signal.h>
26#include <linux/ioport.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/irqchip.h>
30#include <linux/random.h>
31#include <linux/smp.h>
32#include <linux/init.h>
33#include <linux/seq_file.h>
34#include <linux/ratelimit.h>
35#include <linux/errno.h>
36#include <linux/list.h>
37#include <linux/kallsyms.h>
38#include <linux/proc_fs.h>
39#include <linux/export.h>
40
41#include <asm/hardware/cache-l2x0.h>
42#include <asm/hardware/cache-uniphier.h>
43#include <asm/outercache.h>
44#include <asm/exception.h>
45#include <asm/mach/arch.h>
46#include <asm/mach/irq.h>
47#include <asm/mach/time.h>
48
49unsigned long irq_err_count;
50
51int arch_show_interrupts(struct seq_file *p, int prec)
52{
53#ifdef CONFIG_FIQ
54 show_fiq_list(p, prec);
55#endif
56#ifdef CONFIG_SMP
57 show_ipi_list(p, prec);
58#endif
59 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
60 return 0;
61}
62
63/*
64 * handle_IRQ handles all hardware IRQ's. Decoded IRQs should
65 * not come via this function. Instead, they should provide their
66 * own 'handler'. Used by platform code implementing C-based 1st
67 * level decoding.
68 */
69void handle_IRQ(unsigned int irq, struct pt_regs *regs)
70{
71 __handle_domain_irq(NULL, irq, false, regs);
72}
73
74/*
75 * asm_do_IRQ is the interface to be used from assembly code.
76 */
77asmlinkage void __exception_irq_entry
78asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
79{
80 handle_IRQ(irq, regs);
81}
82
83void __init init_IRQ(void)
84{
85 int ret;
86
87 if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
88 irqchip_init();
89 else
90 machine_desc->init_irq();
91
92 if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
93 (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
94 if (!outer_cache.write_sec)
95 outer_cache.write_sec = machine_desc->l2c_write_sec;
96 ret = l2x0_of_init(machine_desc->l2c_aux_val,
97 machine_desc->l2c_aux_mask);
98 if (ret && ret != -ENODEV)
99 pr_err("L2C: failed to init: %d\n", ret);
100 }
101
102 uniphier_cache_init();
103}
104
105#ifdef CONFIG_MULTI_IRQ_HANDLER
106void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
107{
108 if (handle_arch_irq)
109 return;
110
111 handle_arch_irq = handle_irq;
112}
113#endif
114
115#ifdef CONFIG_SPARSE_IRQ
116int __init arch_probe_nr_irqs(void)
117{
118 nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
119 return nr_irqs;
120}
121#endif
122
123#ifdef CONFIG_HOTPLUG_CPU
124static bool migrate_one_irq(struct irq_desc *desc)
125{
126 struct irq_data *d = irq_desc_get_irq_data(desc);
127 const struct cpumask *affinity = irq_data_get_affinity_mask(d);
128 struct irq_chip *c;
129 bool ret = false;
130
131 /*
132 * If this is a per-CPU interrupt, or the affinity does not
133 * include this CPU, then we have nothing to do.
134 */
135 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
136 return false;
137
138 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
139 affinity = cpu_online_mask;
140 ret = true;
141 }
142
143 c = irq_data_get_irq_chip(d);
144 if (!c->irq_set_affinity)
145 pr_debug("IRQ%u: unable to set affinity\n", d->irq);
146 else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
147 cpumask_copy(irq_data_get_affinity_mask(d), affinity);
148
149 return ret;
150}
151
152/*
153 * The current CPU has been marked offline. Migrate IRQs off this CPU.
154 * If the affinity settings do not allow other CPUs, force them onto any
155 * available CPU.
156 *
157 * Note: we must iterate over all IRQs, whether they have an attached
158 * action structure or not, as we need to get chained interrupts too.
159 */
160void migrate_irqs(void)
161{
162 unsigned int i;
163 struct irq_desc *desc;
164 unsigned long flags;
165
166 local_irq_save(flags);
167
168 for_each_irq_desc(i, desc) {
169 bool affinity_broken;
170
171 raw_spin_lock(&desc->lock);
172 affinity_broken = migrate_one_irq(desc);
173 raw_spin_unlock(&desc->lock);
174
175 if (affinity_broken)
176 pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
177 i, smp_processor_id());
178 }
179
180 local_irq_restore(flags);
181}
182#endif /* CONFIG_HOTPLUG_CPU */