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v4.6
  1/*
  2 *  linux/arch/arm/kernel/irq.c
  3 *
  4 *  Copyright (C) 1992 Linus Torvalds
  5 *  Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
  6 *
  7 *  Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
  8 *  Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
  9 *  Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
 10 *
 11 * This program is free software; you can redistribute it and/or modify
 12 * it under the terms of the GNU General Public License version 2 as
 13 * published by the Free Software Foundation.
 14 *
 15 *  This file contains the code used by various IRQ handling routines:
 16 *  asking for different IRQ's should be done through these routines
 17 *  instead of just grabbing them. Thus setups with different IRQ numbers
 18 *  shouldn't result in any weird surprises, and installing new handlers
 19 *  should be easier.
 20 *
 21 *  IRQ's are in fact implemented a bit like signal handlers for the kernel.
 22 *  Naturally it's not a 1:1 relation, but there are similarities.
 23 */
 24#include <linux/kernel_stat.h>
 25#include <linux/signal.h>
 26#include <linux/ioport.h>
 27#include <linux/interrupt.h>
 28#include <linux/irq.h>
 29#include <linux/irqchip.h>
 30#include <linux/random.h>
 31#include <linux/smp.h>
 32#include <linux/init.h>
 33#include <linux/seq_file.h>
 34#include <linux/ratelimit.h>
 35#include <linux/errno.h>
 36#include <linux/list.h>
 37#include <linux/kallsyms.h>
 38#include <linux/proc_fs.h>
 39#include <linux/export.h>
 40
 41#include <asm/hardware/cache-l2x0.h>
 42#include <asm/hardware/cache-uniphier.h>
 43#include <asm/outercache.h>
 44#include <asm/exception.h>
 45#include <asm/mach/arch.h>
 46#include <asm/mach/irq.h>
 47#include <asm/mach/time.h>
 48
 
 
 
 
 
 
 
 49unsigned long irq_err_count;
 50
 51int arch_show_interrupts(struct seq_file *p, int prec)
 52{
 53#ifdef CONFIG_FIQ
 54	show_fiq_list(p, prec);
 55#endif
 56#ifdef CONFIG_SMP
 57	show_ipi_list(p, prec);
 58#endif
 59	seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
 60	return 0;
 61}
 62
 63/*
 64 * handle_IRQ handles all hardware IRQ's.  Decoded IRQs should
 65 * not come via this function.  Instead, they should provide their
 66 * own 'handler'.  Used by platform code implementing C-based 1st
 67 * level decoding.
 68 */
 69void handle_IRQ(unsigned int irq, struct pt_regs *regs)
 70{
 71	__handle_domain_irq(NULL, irq, false, regs);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 72}
 73
 74/*
 75 * asm_do_IRQ is the interface to be used from assembly code.
 76 */
 77asmlinkage void __exception_irq_entry
 78asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
 79{
 80	handle_IRQ(irq, regs);
 81}
 82
 83void __init init_IRQ(void)
 84{
 85	int ret;
 86
 87	if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
 88		irqchip_init();
 89	else
 90		machine_desc->init_irq();
 91
 92	if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
 93	    (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
 94		if (!outer_cache.write_sec)
 95			outer_cache.write_sec = machine_desc->l2c_write_sec;
 96		ret = l2x0_of_init(machine_desc->l2c_aux_val,
 97				   machine_desc->l2c_aux_mask);
 98		if (ret && ret != -ENODEV)
 99			pr_err("L2C: failed to init: %d\n", ret);
100	}
101
102	uniphier_cache_init();
 
 
 
 
 
 
 
103}
104
105#ifdef CONFIG_MULTI_IRQ_HANDLER
106void __init set_handle_irq(void (*handle_irq)(struct pt_regs *))
107{
108	if (handle_arch_irq)
109		return;
110
111	handle_arch_irq = handle_irq;
112}
113#endif
114
115#ifdef CONFIG_SPARSE_IRQ
116int __init arch_probe_nr_irqs(void)
117{
118	nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
119	return nr_irqs;
120}
121#endif
122
123#ifdef CONFIG_HOTPLUG_CPU
 
124static bool migrate_one_irq(struct irq_desc *desc)
125{
126	struct irq_data *d = irq_desc_get_irq_data(desc);
127	const struct cpumask *affinity = irq_data_get_affinity_mask(d);
128	struct irq_chip *c;
129	bool ret = false;
130
131	/*
132	 * If this is a per-CPU interrupt, or the affinity does not
133	 * include this CPU, then we have nothing to do.
134	 */
135	if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
136		return false;
137
138	if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
139		affinity = cpu_online_mask;
140		ret = true;
141	}
142
143	c = irq_data_get_irq_chip(d);
144	if (!c->irq_set_affinity)
145		pr_debug("IRQ%u: unable to set affinity\n", d->irq);
146	else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret)
147		cpumask_copy(irq_data_get_affinity_mask(d), affinity);
148
149	return ret;
150}
151
152/*
153 * The current CPU has been marked offline.  Migrate IRQs off this CPU.
154 * If the affinity settings do not allow other CPUs, force them onto any
155 * available CPU.
156 *
157 * Note: we must iterate over all IRQs, whether they have an attached
158 * action structure or not, as we need to get chained interrupts too.
159 */
160void migrate_irqs(void)
161{
162	unsigned int i;
163	struct irq_desc *desc;
164	unsigned long flags;
165
166	local_irq_save(flags);
167
168	for_each_irq_desc(i, desc) {
169		bool affinity_broken;
170
171		raw_spin_lock(&desc->lock);
172		affinity_broken = migrate_one_irq(desc);
173		raw_spin_unlock(&desc->lock);
174
175		if (affinity_broken)
176			pr_warn_ratelimited("IRQ%u no longer affine to CPU%u\n",
177				i, smp_processor_id());
178	}
179
180	local_irq_restore(flags);
181}
182#endif /* CONFIG_HOTPLUG_CPU */
v3.5.6
  1/*
  2 *  linux/arch/arm/kernel/irq.c
  3 *
  4 *  Copyright (C) 1992 Linus Torvalds
  5 *  Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
  6 *
  7 *  Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
  8 *  Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
  9 *  Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
 10 *
 11 * This program is free software; you can redistribute it and/or modify
 12 * it under the terms of the GNU General Public License version 2 as
 13 * published by the Free Software Foundation.
 14 *
 15 *  This file contains the code used by various IRQ handling routines:
 16 *  asking for different IRQ's should be done through these routines
 17 *  instead of just grabbing them. Thus setups with different IRQ numbers
 18 *  shouldn't result in any weird surprises, and installing new handlers
 19 *  should be easier.
 20 *
 21 *  IRQ's are in fact implemented a bit like signal handlers for the kernel.
 22 *  Naturally it's not a 1:1 relation, but there are similarities.
 23 */
 24#include <linux/kernel_stat.h>
 25#include <linux/signal.h>
 26#include <linux/ioport.h>
 27#include <linux/interrupt.h>
 28#include <linux/irq.h>
 
 29#include <linux/random.h>
 30#include <linux/smp.h>
 31#include <linux/init.h>
 32#include <linux/seq_file.h>
 
 33#include <linux/errno.h>
 34#include <linux/list.h>
 35#include <linux/kallsyms.h>
 36#include <linux/proc_fs.h>
 
 37
 
 
 
 38#include <asm/exception.h>
 39#include <asm/mach/arch.h>
 40#include <asm/mach/irq.h>
 41#include <asm/mach/time.h>
 42
 43/*
 44 * No architecture-specific irq_finish function defined in arm/arch/irqs.h.
 45 */
 46#ifndef irq_finish
 47#define irq_finish(irq) do { } while (0)
 48#endif
 49
 50unsigned long irq_err_count;
 51
 52int arch_show_interrupts(struct seq_file *p, int prec)
 53{
 54#ifdef CONFIG_FIQ
 55	show_fiq_list(p, prec);
 56#endif
 57#ifdef CONFIG_SMP
 58	show_ipi_list(p, prec);
 59#endif
 60	seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
 61	return 0;
 62}
 63
 64/*
 65 * handle_IRQ handles all hardware IRQ's.  Decoded IRQs should
 66 * not come via this function.  Instead, they should provide their
 67 * own 'handler'.  Used by platform code implementing C-based 1st
 68 * level decoding.
 69 */
 70void handle_IRQ(unsigned int irq, struct pt_regs *regs)
 71{
 72	struct pt_regs *old_regs = set_irq_regs(regs);
 73
 74	irq_enter();
 75
 76	/*
 77	 * Some hardware gives randomly wrong interrupts.  Rather
 78	 * than crashing, do something sensible.
 79	 */
 80	if (unlikely(irq >= nr_irqs)) {
 81		if (printk_ratelimit())
 82			printk(KERN_WARNING "Bad IRQ%u\n", irq);
 83		ack_bad_irq(irq);
 84	} else {
 85		generic_handle_irq(irq);
 86	}
 87
 88	/* AT91 specific workaround */
 89	irq_finish(irq);
 90
 91	irq_exit();
 92	set_irq_regs(old_regs);
 93}
 94
 95/*
 96 * asm_do_IRQ is the interface to be used from assembly code.
 97 */
 98asmlinkage void __exception_irq_entry
 99asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
100{
101	handle_IRQ(irq, regs);
102}
103
104void set_irq_flags(unsigned int irq, unsigned int iflags)
105{
106	unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
107
108	if (irq >= nr_irqs) {
109		printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq);
110		return;
 
 
 
 
 
 
 
 
 
 
111	}
112
113	if (iflags & IRQF_VALID)
114		clr |= IRQ_NOREQUEST;
115	if (iflags & IRQF_PROBE)
116		clr |= IRQ_NOPROBE;
117	if (!(iflags & IRQF_NOAUTOEN))
118		clr |= IRQ_NOAUTOEN;
119	/* Order is clear bits in "clr" then set bits in "set" */
120	irq_modify_status(irq, clr, set & ~clr);
121}
122
123void __init init_IRQ(void)
 
124{
125	machine_desc->init_irq();
 
 
 
126}
 
127
128#ifdef CONFIG_SPARSE_IRQ
129int __init arch_probe_nr_irqs(void)
130{
131	nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
132	return nr_irqs;
133}
134#endif
135
136#ifdef CONFIG_HOTPLUG_CPU
137
138static bool migrate_one_irq(struct irq_desc *desc)
139{
140	struct irq_data *d = irq_desc_get_irq_data(desc);
141	const struct cpumask *affinity = d->affinity;
142	struct irq_chip *c;
143	bool ret = false;
144
145	/*
146	 * If this is a per-CPU interrupt, or the affinity does not
147	 * include this CPU, then we have nothing to do.
148	 */
149	if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity))
150		return false;
151
152	if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
153		affinity = cpu_online_mask;
154		ret = true;
155	}
156
157	c = irq_data_get_irq_chip(d);
158	if (!c->irq_set_affinity)
159		pr_debug("IRQ%u: unable to set affinity\n", d->irq);
160	else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret)
161		cpumask_copy(d->affinity, affinity);
162
163	return ret;
164}
165
166/*
167 * The current CPU has been marked offline.  Migrate IRQs off this CPU.
168 * If the affinity settings do not allow other CPUs, force them onto any
169 * available CPU.
170 *
171 * Note: we must iterate over all IRQs, whether they have an attached
172 * action structure or not, as we need to get chained interrupts too.
173 */
174void migrate_irqs(void)
175{
176	unsigned int i;
177	struct irq_desc *desc;
178	unsigned long flags;
179
180	local_irq_save(flags);
181
182	for_each_irq_desc(i, desc) {
183		bool affinity_broken;
184
185		raw_spin_lock(&desc->lock);
186		affinity_broken = migrate_one_irq(desc);
187		raw_spin_unlock(&desc->lock);
188
189		if (affinity_broken && printk_ratelimit())
190			pr_warning("IRQ%u no longer affine to CPU%u\n", i,
191				smp_processor_id());
192	}
193
194	local_irq_restore(flags);
195}
196#endif /* CONFIG_HOTPLUG_CPU */