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1/*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 */
15
16/* this file is part of ehci-hcd.c */
17
18#ifdef CONFIG_DYNAMIC_DEBUG
19
20/*
21 * check the values in the HCSPARAMS register
22 * (host controller _Structural_ parameters)
23 * see EHCI spec, Table 2-4 for each value
24 */
25static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
26{
27 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
28
29 ehci_dbg(ehci,
30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
31 label, params,
32 HCS_DEBUG_PORT(params),
33 HCS_INDICATOR(params) ? " ind" : "",
34 HCS_N_CC(params),
35 HCS_N_PCC(params),
36 HCS_PORTROUTED(params) ? "" : " ordered",
37 HCS_PPC(params) ? "" : " !ppc",
38 HCS_N_PORTS(params));
39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
40 if (HCS_PORTROUTED(params)) {
41 int i;
42 char buf[46], tmp[7], byte;
43
44 buf[0] = 0;
45 for (i = 0; i < HCS_N_PORTS(params); i++) {
46 /* FIXME MIPS won't readb() ... */
47 byte = readb(&ehci->caps->portroute[(i >> 1)]);
48 sprintf(tmp, "%d ",
49 (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
50 strcat(buf, tmp);
51 }
52 ehci_dbg(ehci, "%s portroute %s\n", label, buf);
53 }
54}
55#else
56
57static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) {}
58
59#endif
60
61#ifdef CONFIG_DYNAMIC_DEBUG
62
63/*
64 * check the values in the HCCPARAMS register
65 * (host controller _Capability_ parameters)
66 * see EHCI Spec, Table 2-5 for each value
67 */
68static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
69{
70 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
71
72 if (HCC_ISOC_CACHE(params)) {
73 ehci_dbg(ehci,
74 "%s hcc_params %04x caching frame %s%s%s\n",
75 label, params,
76 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
77 HCC_CANPARK(params) ? " park" : "",
78 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
79 } else {
80 ehci_dbg(ehci,
81 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
82 label,
83 params,
84 HCC_ISOC_THRES(params),
85 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
86 HCC_CANPARK(params) ? " park" : "",
87 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
88 HCC_LPM(params) ? " LPM" : "",
89 HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
90 HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
91 HCC_32FRAME_PERIODIC_LIST(params) ?
92 " 32 periodic list" : "");
93 }
94}
95#else
96
97static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) {}
98
99#endif
100
101#ifdef CONFIG_DYNAMIC_DEBUG
102
103static void __maybe_unused
104dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
105{
106 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
107 hc32_to_cpup(ehci, &qtd->hw_next),
108 hc32_to_cpup(ehci, &qtd->hw_alt_next),
109 hc32_to_cpup(ehci, &qtd->hw_token),
110 hc32_to_cpup(ehci, &qtd->hw_buf[0]));
111 if (qtd->hw_buf[1])
112 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
113 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
114 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
115 hc32_to_cpup(ehci, &qtd->hw_buf[3]),
116 hc32_to_cpup(ehci, &qtd->hw_buf[4]));
117}
118
119static void __maybe_unused
120dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
121{
122 struct ehci_qh_hw *hw = qh->hw;
123
124 ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
125 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
126 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
127}
128
129static void __maybe_unused
130dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
131{
132 ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
133 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
134 itd->urb);
135 ehci_dbg(ehci,
136 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
137 hc32_to_cpu(ehci, itd->hw_transaction[0]),
138 hc32_to_cpu(ehci, itd->hw_transaction[1]),
139 hc32_to_cpu(ehci, itd->hw_transaction[2]),
140 hc32_to_cpu(ehci, itd->hw_transaction[3]),
141 hc32_to_cpu(ehci, itd->hw_transaction[4]),
142 hc32_to_cpu(ehci, itd->hw_transaction[5]),
143 hc32_to_cpu(ehci, itd->hw_transaction[6]),
144 hc32_to_cpu(ehci, itd->hw_transaction[7]));
145 ehci_dbg(ehci,
146 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
147 hc32_to_cpu(ehci, itd->hw_bufp[0]),
148 hc32_to_cpu(ehci, itd->hw_bufp[1]),
149 hc32_to_cpu(ehci, itd->hw_bufp[2]),
150 hc32_to_cpu(ehci, itd->hw_bufp[3]),
151 hc32_to_cpu(ehci, itd->hw_bufp[4]),
152 hc32_to_cpu(ehci, itd->hw_bufp[5]),
153 hc32_to_cpu(ehci, itd->hw_bufp[6]));
154 ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
155 itd->index[0], itd->index[1], itd->index[2],
156 itd->index[3], itd->index[4], itd->index[5],
157 itd->index[6], itd->index[7]);
158}
159
160static void __maybe_unused
161dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
162{
163 ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
164 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
165 sitd->urb);
166 ehci_dbg(ehci,
167 " addr %08x sched %04x result %08x buf %08x %08x\n",
168 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
169 hc32_to_cpu(ehci, sitd->hw_uframe),
170 hc32_to_cpu(ehci, sitd->hw_results),
171 hc32_to_cpu(ehci, sitd->hw_buf[0]),
172 hc32_to_cpu(ehci, sitd->hw_buf[1]));
173}
174
175static int __maybe_unused
176dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
177{
178 return scnprintf(buf, len,
179 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
180 label, label[0] ? " " : "", status,
181 (status & STS_PPCE_MASK) ? " PPCE" : "",
182 (status & STS_ASS) ? " Async" : "",
183 (status & STS_PSS) ? " Periodic" : "",
184 (status & STS_RECL) ? " Recl" : "",
185 (status & STS_HALT) ? " Halt" : "",
186 (status & STS_IAA) ? " IAA" : "",
187 (status & STS_FATAL) ? " FATAL" : "",
188 (status & STS_FLR) ? " FLR" : "",
189 (status & STS_PCD) ? " PCD" : "",
190 (status & STS_ERR) ? " ERR" : "",
191 (status & STS_INT) ? " INT" : "");
192}
193
194static int __maybe_unused
195dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
196{
197 return scnprintf(buf, len,
198 "%s%sintrenable %02x%s%s%s%s%s%s%s",
199 label, label[0] ? " " : "", enable,
200 (enable & STS_PPCE_MASK) ? " PPCE" : "",
201 (enable & STS_IAA) ? " IAA" : "",
202 (enable & STS_FATAL) ? " FATAL" : "",
203 (enable & STS_FLR) ? " FLR" : "",
204 (enable & STS_PCD) ? " PCD" : "",
205 (enable & STS_ERR) ? " ERR" : "",
206 (enable & STS_INT) ? " INT" : "");
207}
208
209static const char *const fls_strings[] = { "1024", "512", "256", "??" };
210
211static int
212dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
213{
214 return scnprintf(buf, len,
215 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
216 "period=%s%s %s",
217 label, label[0] ? " " : "", command,
218 (command & CMD_HIRD) ? " HIRD" : "",
219 (command & CMD_PPCEE) ? " PPCEE" : "",
220 (command & CMD_FSP) ? " FSP" : "",
221 (command & CMD_ASPE) ? " ASPE" : "",
222 (command & CMD_PSPE) ? " PSPE" : "",
223 (command & CMD_PARK) ? " park" : "(park)",
224 CMD_PARK_CNT(command),
225 (command >> 16) & 0x3f,
226 (command & CMD_LRESET) ? " LReset" : "",
227 (command & CMD_IAAD) ? " IAAD" : "",
228 (command & CMD_ASE) ? " Async" : "",
229 (command & CMD_PSE) ? " Periodic" : "",
230 fls_strings[(command >> 2) & 0x3],
231 (command & CMD_RESET) ? " Reset" : "",
232 (command & CMD_RUN) ? "RUN" : "HALT");
233}
234
235static int
236dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
237{
238 char *sig;
239
240 /* signaling state */
241 switch (status & (3 << 10)) {
242 case 0 << 10:
243 sig = "se0";
244 break;
245 case 1 << 10: /* low speed */
246 sig = "k";
247 break;
248 case 2 << 10:
249 sig = "j";
250 break;
251 default:
252 sig = "?";
253 break;
254 }
255
256 return scnprintf(buf, len,
257 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
258 "sig=%s%s%s%s%s%s%s%s%s%s%s",
259 label, label[0] ? " " : "", port, status,
260 status >> 25, /*device address */
261 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
262 " ACK" : "",
263 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
264 " NYET" : "",
265 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
266 " STALL" : "",
267 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
268 " ERR" : "",
269 (status & PORT_POWER) ? " POWER" : "",
270 (status & PORT_OWNER) ? " OWNER" : "",
271 sig,
272 (status & PORT_LPM) ? " LPM" : "",
273 (status & PORT_RESET) ? " RESET" : "",
274 (status & PORT_SUSPEND) ? " SUSPEND" : "",
275 (status & PORT_RESUME) ? " RESUME" : "",
276 (status & PORT_OCC) ? " OCC" : "",
277 (status & PORT_OC) ? " OC" : "",
278 (status & PORT_PEC) ? " PEC" : "",
279 (status & PORT_PE) ? " PE" : "",
280 (status & PORT_CSC) ? " CSC" : "",
281 (status & PORT_CONNECT) ? " CONNECT" : "");
282}
283
284#else
285static inline void __maybe_unused
286dbg_qh(char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
287{}
288
289static inline int __maybe_unused
290dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
291{
292 return 0;
293}
294
295static inline int __maybe_unused
296dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
297{
298 return 0;
299}
300
301static inline int __maybe_unused
302dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
303{
304 return 0;
305}
306
307static inline int __maybe_unused
308dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
309{
310 return 0;
311}
312
313#endif /* CONFIG_DYNAMIC_DEBUG */
314
315static inline void
316dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
317{
318 char buf[80];
319
320 dbg_status_buf(buf, sizeof(buf), label, status);
321 ehci_dbg(ehci, "%s\n", buf);
322}
323
324static inline void
325dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
326{
327 char buf[80];
328
329 dbg_command_buf(buf, sizeof(buf), label, command);
330 ehci_dbg(ehci, "%s\n", buf);
331}
332
333static inline void
334dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
335{
336 char buf[80];
337
338 dbg_port_buf(buf, sizeof(buf), label, port, status);
339 ehci_dbg(ehci, "%s\n", buf);
340}
341
342/*-------------------------------------------------------------------------*/
343
344#ifndef CONFIG_DYNAMIC_DEBUG
345
346static inline void create_debug_files(struct ehci_hcd *bus) { }
347static inline void remove_debug_files(struct ehci_hcd *bus) { }
348
349#else
350
351/* troubleshooting help: expose state in debugfs */
352
353static int debug_async_open(struct inode *, struct file *);
354static int debug_bandwidth_open(struct inode *, struct file *);
355static int debug_periodic_open(struct inode *, struct file *);
356static int debug_registers_open(struct inode *, struct file *);
357
358static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
359static int debug_close(struct inode *, struct file *);
360
361static const struct file_operations debug_async_fops = {
362 .owner = THIS_MODULE,
363 .open = debug_async_open,
364 .read = debug_output,
365 .release = debug_close,
366 .llseek = default_llseek,
367};
368
369static const struct file_operations debug_bandwidth_fops = {
370 .owner = THIS_MODULE,
371 .open = debug_bandwidth_open,
372 .read = debug_output,
373 .release = debug_close,
374 .llseek = default_llseek,
375};
376
377static const struct file_operations debug_periodic_fops = {
378 .owner = THIS_MODULE,
379 .open = debug_periodic_open,
380 .read = debug_output,
381 .release = debug_close,
382 .llseek = default_llseek,
383};
384
385static const struct file_operations debug_registers_fops = {
386 .owner = THIS_MODULE,
387 .open = debug_registers_open,
388 .read = debug_output,
389 .release = debug_close,
390 .llseek = default_llseek,
391};
392
393static struct dentry *ehci_debug_root;
394
395struct debug_buffer {
396 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
397 struct usb_bus *bus;
398 struct mutex mutex; /* protect filling of buffer */
399 size_t count; /* number of characters filled into buffer */
400 char *output_buf;
401 size_t alloc_size;
402};
403
404static inline char speed_char(u32 info1)
405{
406 switch (info1 & (3 << 12)) {
407 case QH_FULL_SPEED:
408 return 'f';
409 case QH_LOW_SPEED:
410 return 'l';
411 case QH_HIGH_SPEED:
412 return 'h';
413 default:
414 return '?';
415 }
416}
417
418static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
419{
420 __u32 v = hc32_to_cpu(ehci, token);
421
422 if (v & QTD_STS_ACTIVE)
423 return '*';
424 if (v & QTD_STS_HALT)
425 return '-';
426 if (!IS_SHORT_READ(v))
427 return ' ';
428 /* tries to advance through hw_alt_next */
429 return '/';
430}
431
432static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
433 char **nextp, unsigned *sizep)
434{
435 u32 scratch;
436 u32 hw_curr;
437 struct list_head *entry;
438 struct ehci_qtd *td;
439 unsigned temp;
440 unsigned size = *sizep;
441 char *next = *nextp;
442 char mark;
443 __le32 list_end = EHCI_LIST_END(ehci);
444 struct ehci_qh_hw *hw = qh->hw;
445
446 if (hw->hw_qtd_next == list_end) /* NEC does this */
447 mark = '@';
448 else
449 mark = token_mark(ehci, hw->hw_token);
450 if (mark == '/') { /* qh_alt_next controls qh advance? */
451 if ((hw->hw_alt_next & QTD_MASK(ehci))
452 == ehci->async->hw->hw_alt_next)
453 mark = '#'; /* blocked */
454 else if (hw->hw_alt_next == list_end)
455 mark = '.'; /* use hw_qtd_next */
456 /* else alt_next points to some other qtd */
457 }
458 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
459 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
460 temp = scnprintf(next, size,
461 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
462 " [cur %08x next %08x buf[0] %08x]",
463 qh, scratch & 0x007f,
464 speed_char (scratch),
465 (scratch >> 8) & 0x000f,
466 scratch, hc32_to_cpup(ehci, &hw->hw_info2),
467 hc32_to_cpup(ehci, &hw->hw_token), mark,
468 (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
469 ? "data1" : "data0",
470 (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f,
471 hc32_to_cpup(ehci, &hw->hw_current),
472 hc32_to_cpup(ehci, &hw->hw_qtd_next),
473 hc32_to_cpup(ehci, &hw->hw_buf[0]));
474 size -= temp;
475 next += temp;
476
477 /* hc may be modifying the list as we read it ... */
478 list_for_each(entry, &qh->qtd_list) {
479 char *type;
480
481 td = list_entry(entry, struct ehci_qtd, qtd_list);
482 scratch = hc32_to_cpup(ehci, &td->hw_token);
483 mark = ' ';
484 if (hw_curr == td->qtd_dma) {
485 mark = '*';
486 } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
487 mark = '+';
488 } else if (QTD_LENGTH(scratch)) {
489 if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
490 mark = '#';
491 else if (td->hw_alt_next != list_end)
492 mark = '/';
493 }
494 switch ((scratch >> 8) & 0x03) {
495 case 0:
496 type = "out";
497 break;
498 case 1:
499 type = "in";
500 break;
501 case 2:
502 type = "setup";
503 break;
504 default:
505 type = "?";
506 break;
507 }
508 temp = scnprintf(next, size,
509 "\n\t%p%c%s len=%d %08x urb %p"
510 " [td %08x buf[0] %08x]",
511 td, mark, type,
512 (scratch >> 16) & 0x7fff,
513 scratch,
514 td->urb,
515 (u32) td->qtd_dma,
516 hc32_to_cpup(ehci, &td->hw_buf[0]));
517 size -= temp;
518 next += temp;
519 if (temp == size)
520 goto done;
521 }
522
523 temp = scnprintf(next, size, "\n");
524 size -= temp;
525 next += temp;
526
527done:
528 *sizep = size;
529 *nextp = next;
530}
531
532static ssize_t fill_async_buffer(struct debug_buffer *buf)
533{
534 struct usb_hcd *hcd;
535 struct ehci_hcd *ehci;
536 unsigned long flags;
537 unsigned temp, size;
538 char *next;
539 struct ehci_qh *qh;
540
541 hcd = bus_to_hcd(buf->bus);
542 ehci = hcd_to_ehci(hcd);
543 next = buf->output_buf;
544 size = buf->alloc_size;
545
546 *next = 0;
547
548 /*
549 * dumps a snapshot of the async schedule.
550 * usually empty except for long-term bulk reads, or head.
551 * one QH per line, and TDs we know about
552 */
553 spin_lock_irqsave(&ehci->lock, flags);
554 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
555 qh_lines(ehci, qh, &next, &size);
556 if (!list_empty(&ehci->async_unlink) && size > 0) {
557 temp = scnprintf(next, size, "\nunlink =\n");
558 size -= temp;
559 next += temp;
560
561 list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
562 if (size <= 0)
563 break;
564 qh_lines(ehci, qh, &next, &size);
565 }
566 }
567 spin_unlock_irqrestore(&ehci->lock, flags);
568
569 return strlen(buf->output_buf);
570}
571
572static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
573{
574 struct ehci_hcd *ehci;
575 struct ehci_tt *tt;
576 struct ehci_per_sched *ps;
577 unsigned temp, size;
578 char *next;
579 unsigned i;
580 u8 *bw;
581 u16 *bf;
582 u8 budget[EHCI_BANDWIDTH_SIZE];
583
584 ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
585 next = buf->output_buf;
586 size = buf->alloc_size;
587
588 *next = 0;
589
590 spin_lock_irq(&ehci->lock);
591
592 /* Dump the HS bandwidth table */
593 temp = scnprintf(next, size,
594 "HS bandwidth allocation (us per microframe)\n");
595 size -= temp;
596 next += temp;
597 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
598 bw = &ehci->bandwidth[i];
599 temp = scnprintf(next, size,
600 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
601 i, bw[0], bw[1], bw[2], bw[3],
602 bw[4], bw[5], bw[6], bw[7]);
603 size -= temp;
604 next += temp;
605 }
606
607 /* Dump all the FS/LS tables */
608 list_for_each_entry(tt, &ehci->tt_list, tt_list) {
609 temp = scnprintf(next, size,
610 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
611 dev_name(&tt->usb_tt->hub->dev),
612 tt->tt_port + !!tt->usb_tt->multi);
613 size -= temp;
614 next += temp;
615
616 bf = tt->bandwidth;
617 temp = scnprintf(next, size,
618 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
619 bf[0], bf[1], bf[2], bf[3],
620 bf[4], bf[5], bf[6], bf[7]);
621 size -= temp;
622 next += temp;
623
624 temp = scnprintf(next, size,
625 "FS/LS budget (us per microframe)\n");
626 size -= temp;
627 next += temp;
628 compute_tt_budget(budget, tt);
629 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
630 bw = &budget[i];
631 temp = scnprintf(next, size,
632 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
633 i, bw[0], bw[1], bw[2], bw[3],
634 bw[4], bw[5], bw[6], bw[7]);
635 size -= temp;
636 next += temp;
637 }
638 list_for_each_entry(ps, &tt->ps_list, ps_list) {
639 temp = scnprintf(next, size,
640 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
641 dev_name(&ps->udev->dev),
642 ps->ep->desc.bEndpointAddress,
643 ps->tt_usecs,
644 ps->bw_phase, ps->phase_uf,
645 ps->bw_period, ps->cs_mask);
646 size -= temp;
647 next += temp;
648 }
649 }
650 spin_unlock_irq(&ehci->lock);
651
652 return next - buf->output_buf;
653}
654
655static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
656 struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
657{
658 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
659 struct ehci_qtd *qtd;
660 char *type = "";
661 unsigned temp = 0;
662
663 /* count tds, get ep direction */
664 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
665 temp++;
666 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
667 case 0:
668 type = "out";
669 continue;
670 case 1:
671 type = "in";
672 continue;
673 }
674 }
675
676 return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
677 speed_char(scratch), scratch & 0x007f,
678 (scratch >> 8) & 0x000f, type, qh->ps.usecs,
679 qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
680}
681
682#define DBG_SCHED_LIMIT 64
683static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
684{
685 struct usb_hcd *hcd;
686 struct ehci_hcd *ehci;
687 unsigned long flags;
688 union ehci_shadow p, *seen;
689 unsigned temp, size, seen_count;
690 char *next;
691 unsigned i;
692 __hc32 tag;
693
694 seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
695 if (!seen)
696 return 0;
697 seen_count = 0;
698
699 hcd = bus_to_hcd(buf->bus);
700 ehci = hcd_to_ehci(hcd);
701 next = buf->output_buf;
702 size = buf->alloc_size;
703
704 temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
705 size -= temp;
706 next += temp;
707
708 /*
709 * dump a snapshot of the periodic schedule.
710 * iso changes, interrupt usually doesn't.
711 */
712 spin_lock_irqsave(&ehci->lock, flags);
713 for (i = 0; i < ehci->periodic_size; i++) {
714 p = ehci->pshadow[i];
715 if (likely(!p.ptr))
716 continue;
717 tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
718
719 temp = scnprintf(next, size, "%4d: ", i);
720 size -= temp;
721 next += temp;
722
723 do {
724 struct ehci_qh_hw *hw;
725
726 switch (hc32_to_cpu(ehci, tag)) {
727 case Q_TYPE_QH:
728 hw = p.qh->hw;
729 temp = scnprintf(next, size, " qh%d-%04x/%p",
730 p.qh->ps.period,
731 hc32_to_cpup(ehci,
732 &hw->hw_info2)
733 /* uframe masks */
734 & (QH_CMASK | QH_SMASK),
735 p.qh);
736 size -= temp;
737 next += temp;
738 /* don't repeat what follows this qh */
739 for (temp = 0; temp < seen_count; temp++) {
740 if (seen[temp].ptr != p.ptr)
741 continue;
742 if (p.qh->qh_next.ptr) {
743 temp = scnprintf(next, size,
744 " ...");
745 size -= temp;
746 next += temp;
747 }
748 break;
749 }
750 /* show more info the first time around */
751 if (temp == seen_count) {
752 temp = output_buf_tds_dir(next, ehci,
753 hw, p.qh, size);
754
755 if (seen_count < DBG_SCHED_LIMIT)
756 seen[seen_count++].qh = p.qh;
757 } else {
758 temp = 0;
759 }
760 tag = Q_NEXT_TYPE(ehci, hw->hw_next);
761 p = p.qh->qh_next;
762 break;
763 case Q_TYPE_FSTN:
764 temp = scnprintf(next, size,
765 " fstn-%8x/%p", p.fstn->hw_prev,
766 p.fstn);
767 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
768 p = p.fstn->fstn_next;
769 break;
770 case Q_TYPE_ITD:
771 temp = scnprintf(next, size,
772 " itd/%p", p.itd);
773 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
774 p = p.itd->itd_next;
775 break;
776 case Q_TYPE_SITD:
777 temp = scnprintf(next, size,
778 " sitd%d-%04x/%p",
779 p.sitd->stream->ps.period,
780 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
781 & 0x0000ffff,
782 p.sitd);
783 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
784 p = p.sitd->sitd_next;
785 break;
786 }
787 size -= temp;
788 next += temp;
789 } while (p.ptr);
790
791 temp = scnprintf(next, size, "\n");
792 size -= temp;
793 next += temp;
794 }
795 spin_unlock_irqrestore(&ehci->lock, flags);
796 kfree(seen);
797
798 return buf->alloc_size - size;
799}
800#undef DBG_SCHED_LIMIT
801
802static const char *rh_state_string(struct ehci_hcd *ehci)
803{
804 switch (ehci->rh_state) {
805 case EHCI_RH_HALTED:
806 return "halted";
807 case EHCI_RH_SUSPENDED:
808 return "suspended";
809 case EHCI_RH_RUNNING:
810 return "running";
811 case EHCI_RH_STOPPING:
812 return "stopping";
813 }
814 return "?";
815}
816
817static ssize_t fill_registers_buffer(struct debug_buffer *buf)
818{
819 struct usb_hcd *hcd;
820 struct ehci_hcd *ehci;
821 unsigned long flags;
822 unsigned temp, size, i;
823 char *next, scratch[80];
824 static char fmt[] = "%*s\n";
825 static char label[] = "";
826
827 hcd = bus_to_hcd(buf->bus);
828 ehci = hcd_to_ehci(hcd);
829 next = buf->output_buf;
830 size = buf->alloc_size;
831
832 spin_lock_irqsave(&ehci->lock, flags);
833
834 if (!HCD_HW_ACCESSIBLE(hcd)) {
835 size = scnprintf(next, size,
836 "bus %s, device %s\n"
837 "%s\n"
838 "SUSPENDED (no register access)\n",
839 hcd->self.controller->bus->name,
840 dev_name(hcd->self.controller),
841 hcd->product_desc);
842 goto done;
843 }
844
845 /* Capability Registers */
846 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
847 temp = scnprintf(next, size,
848 "bus %s, device %s\n"
849 "%s\n"
850 "EHCI %x.%02x, rh state %s\n",
851 hcd->self.controller->bus->name,
852 dev_name(hcd->self.controller),
853 hcd->product_desc,
854 i >> 8, i & 0x0ff, rh_state_string(ehci));
855 size -= temp;
856 next += temp;
857
858#ifdef CONFIG_PCI
859 /* EHCI 0.96 and later may have "extended capabilities" */
860 if (dev_is_pci(hcd->self.controller)) {
861 struct pci_dev *pdev;
862 u32 offset, cap, cap2;
863 unsigned count = 256 / 4;
864
865 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
866 offset = HCC_EXT_CAPS(ehci_readl(ehci,
867 &ehci->caps->hcc_params));
868 while (offset && count--) {
869 pci_read_config_dword(pdev, offset, &cap);
870 switch (cap & 0xff) {
871 case 1:
872 temp = scnprintf(next, size,
873 "ownership %08x%s%s\n", cap,
874 (cap & (1 << 24)) ? " linux" : "",
875 (cap & (1 << 16)) ? " firmware" : "");
876 size -= temp;
877 next += temp;
878
879 offset += 4;
880 pci_read_config_dword(pdev, offset, &cap2);
881 temp = scnprintf(next, size,
882 "SMI sts/enable 0x%08x\n", cap2);
883 size -= temp;
884 next += temp;
885 break;
886 case 0: /* illegal reserved capability */
887 cap = 0;
888 /* FALLTHROUGH */
889 default: /* unknown */
890 break;
891 }
892 temp = (cap >> 8) & 0xff;
893 }
894 }
895#endif
896
897 /* FIXME interpret both types of params */
898 i = ehci_readl(ehci, &ehci->caps->hcs_params);
899 temp = scnprintf(next, size, "structural params 0x%08x\n", i);
900 size -= temp;
901 next += temp;
902
903 i = ehci_readl(ehci, &ehci->caps->hcc_params);
904 temp = scnprintf(next, size, "capability params 0x%08x\n", i);
905 size -= temp;
906 next += temp;
907
908 /* Operational Registers */
909 temp = dbg_status_buf(scratch, sizeof(scratch), label,
910 ehci_readl(ehci, &ehci->regs->status));
911 temp = scnprintf(next, size, fmt, temp, scratch);
912 size -= temp;
913 next += temp;
914
915 temp = dbg_command_buf(scratch, sizeof(scratch), label,
916 ehci_readl(ehci, &ehci->regs->command));
917 temp = scnprintf(next, size, fmt, temp, scratch);
918 size -= temp;
919 next += temp;
920
921 temp = dbg_intr_buf(scratch, sizeof(scratch), label,
922 ehci_readl(ehci, &ehci->regs->intr_enable));
923 temp = scnprintf(next, size, fmt, temp, scratch);
924 size -= temp;
925 next += temp;
926
927 temp = scnprintf(next, size, "uframe %04x\n",
928 ehci_read_frame_index(ehci));
929 size -= temp;
930 next += temp;
931
932 for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
933 temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
934 ehci_readl(ehci,
935 &ehci->regs->port_status[i - 1]));
936 temp = scnprintf(next, size, fmt, temp, scratch);
937 size -= temp;
938 next += temp;
939 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
940 temp = scnprintf(next, size,
941 " debug control %08x\n",
942 ehci_readl(ehci,
943 &ehci->debug->control));
944 size -= temp;
945 next += temp;
946 }
947 }
948
949 if (!list_empty(&ehci->async_unlink)) {
950 temp = scnprintf(next, size, "async unlink qh %p\n",
951 list_first_entry(&ehci->async_unlink,
952 struct ehci_qh, unlink_node));
953 size -= temp;
954 next += temp;
955 }
956
957#ifdef EHCI_STATS
958 temp = scnprintf(next, size,
959 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
960 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
961 ehci->stats.lost_iaa);
962 size -= temp;
963 next += temp;
964
965 temp = scnprintf(next, size, "complete %ld unlink %ld\n",
966 ehci->stats.complete, ehci->stats.unlink);
967 size -= temp;
968 next += temp;
969#endif
970
971done:
972 spin_unlock_irqrestore(&ehci->lock, flags);
973
974 return buf->alloc_size - size;
975}
976
977static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
978 ssize_t (*fill_func)(struct debug_buffer *))
979{
980 struct debug_buffer *buf;
981
982 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
983
984 if (buf) {
985 buf->bus = bus;
986 buf->fill_func = fill_func;
987 mutex_init(&buf->mutex);
988 buf->alloc_size = PAGE_SIZE;
989 }
990
991 return buf;
992}
993
994static int fill_buffer(struct debug_buffer *buf)
995{
996 int ret = 0;
997
998 if (!buf->output_buf)
999 buf->output_buf = vmalloc(buf->alloc_size);
1000
1001 if (!buf->output_buf) {
1002 ret = -ENOMEM;
1003 goto out;
1004 }
1005
1006 ret = buf->fill_func(buf);
1007
1008 if (ret >= 0) {
1009 buf->count = ret;
1010 ret = 0;
1011 }
1012
1013out:
1014 return ret;
1015}
1016
1017static ssize_t debug_output(struct file *file, char __user *user_buf,
1018 size_t len, loff_t *offset)
1019{
1020 struct debug_buffer *buf = file->private_data;
1021 int ret = 0;
1022
1023 mutex_lock(&buf->mutex);
1024 if (buf->count == 0) {
1025 ret = fill_buffer(buf);
1026 if (ret != 0) {
1027 mutex_unlock(&buf->mutex);
1028 goto out;
1029 }
1030 }
1031 mutex_unlock(&buf->mutex);
1032
1033 ret = simple_read_from_buffer(user_buf, len, offset,
1034 buf->output_buf, buf->count);
1035
1036out:
1037 return ret;
1038}
1039
1040static int debug_close(struct inode *inode, struct file *file)
1041{
1042 struct debug_buffer *buf = file->private_data;
1043
1044 if (buf) {
1045 vfree(buf->output_buf);
1046 kfree(buf);
1047 }
1048
1049 return 0;
1050}
1051
1052static int debug_async_open(struct inode *inode, struct file *file)
1053{
1054 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
1055
1056 return file->private_data ? 0 : -ENOMEM;
1057}
1058
1059static int debug_bandwidth_open(struct inode *inode, struct file *file)
1060{
1061 file->private_data = alloc_buffer(inode->i_private,
1062 fill_bandwidth_buffer);
1063
1064 return file->private_data ? 0 : -ENOMEM;
1065}
1066
1067static int debug_periodic_open(struct inode *inode, struct file *file)
1068{
1069 struct debug_buffer *buf;
1070
1071 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
1072 if (!buf)
1073 return -ENOMEM;
1074
1075 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
1076 file->private_data = buf;
1077 return 0;
1078}
1079
1080static int debug_registers_open(struct inode *inode, struct file *file)
1081{
1082 file->private_data = alloc_buffer(inode->i_private,
1083 fill_registers_buffer);
1084
1085 return file->private_data ? 0 : -ENOMEM;
1086}
1087
1088static inline void create_debug_files(struct ehci_hcd *ehci)
1089{
1090 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1091
1092 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
1093 if (!ehci->debug_dir)
1094 return;
1095
1096 if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
1097 &debug_async_fops))
1098 goto file_error;
1099
1100 if (!debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
1101 &debug_bandwidth_fops))
1102 goto file_error;
1103
1104 if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
1105 &debug_periodic_fops))
1106 goto file_error;
1107
1108 if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
1109 &debug_registers_fops))
1110 goto file_error;
1111
1112 return;
1113
1114file_error:
1115 debugfs_remove_recursive(ehci->debug_dir);
1116}
1117
1118static inline void remove_debug_files(struct ehci_hcd *ehci)
1119{
1120 debugfs_remove_recursive(ehci->debug_dir);
1121}
1122
1123#endif /* CONFIG_DYNAMIC_DEBUG */
1/*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 */
15
16/* this file is part of ehci-hcd.c */
17
18#ifdef CONFIG_DYNAMIC_DEBUG
19
20/*
21 * check the values in the HCSPARAMS register
22 * (host controller _Structural_ parameters)
23 * see EHCI spec, Table 2-4 for each value
24 */
25static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
26{
27 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
28
29 ehci_dbg(ehci,
30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
31 label, params,
32 HCS_DEBUG_PORT(params),
33 HCS_INDICATOR(params) ? " ind" : "",
34 HCS_N_CC(params),
35 HCS_N_PCC(params),
36 HCS_PORTROUTED(params) ? "" : " ordered",
37 HCS_PPC(params) ? "" : " !ppc",
38 HCS_N_PORTS(params));
39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
40 if (HCS_PORTROUTED(params)) {
41 int i;
42 char buf[46], tmp[7], byte;
43
44 buf[0] = 0;
45 for (i = 0; i < HCS_N_PORTS(params); i++) {
46 /* FIXME MIPS won't readb() ... */
47 byte = readb(&ehci->caps->portroute[(i >> 1)]);
48 sprintf(tmp, "%d ",
49 (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
50 strcat(buf, tmp);
51 }
52 ehci_dbg(ehci, "%s portroute %s\n", label, buf);
53 }
54}
55
56/*
57 * check the values in the HCCPARAMS register
58 * (host controller _Capability_ parameters)
59 * see EHCI Spec, Table 2-5 for each value
60 */
61static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
62{
63 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
64
65 if (HCC_ISOC_CACHE(params)) {
66 ehci_dbg(ehci,
67 "%s hcc_params %04x caching frame %s%s%s\n",
68 label, params,
69 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
70 HCC_CANPARK(params) ? " park" : "",
71 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
72 } else {
73 ehci_dbg(ehci,
74 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
75 label,
76 params,
77 HCC_ISOC_THRES(params),
78 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
79 HCC_CANPARK(params) ? " park" : "",
80 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
81 HCC_LPM(params) ? " LPM" : "",
82 HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
83 HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
84 HCC_32FRAME_PERIODIC_LIST(params) ?
85 " 32 periodic list" : "");
86 }
87}
88
89static void __maybe_unused
90dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
91{
92 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
93 hc32_to_cpup(ehci, &qtd->hw_next),
94 hc32_to_cpup(ehci, &qtd->hw_alt_next),
95 hc32_to_cpup(ehci, &qtd->hw_token),
96 hc32_to_cpup(ehci, &qtd->hw_buf[0]));
97 if (qtd->hw_buf[1])
98 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
99 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
100 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
101 hc32_to_cpup(ehci, &qtd->hw_buf[3]),
102 hc32_to_cpup(ehci, &qtd->hw_buf[4]));
103}
104
105static void __maybe_unused
106dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
107{
108 struct ehci_qh_hw *hw = qh->hw;
109
110 ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
111 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
112 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
113}
114
115static void __maybe_unused
116dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
117{
118 ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
119 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
120 itd->urb);
121 ehci_dbg(ehci,
122 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
123 hc32_to_cpu(ehci, itd->hw_transaction[0]),
124 hc32_to_cpu(ehci, itd->hw_transaction[1]),
125 hc32_to_cpu(ehci, itd->hw_transaction[2]),
126 hc32_to_cpu(ehci, itd->hw_transaction[3]),
127 hc32_to_cpu(ehci, itd->hw_transaction[4]),
128 hc32_to_cpu(ehci, itd->hw_transaction[5]),
129 hc32_to_cpu(ehci, itd->hw_transaction[6]),
130 hc32_to_cpu(ehci, itd->hw_transaction[7]));
131 ehci_dbg(ehci,
132 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
133 hc32_to_cpu(ehci, itd->hw_bufp[0]),
134 hc32_to_cpu(ehci, itd->hw_bufp[1]),
135 hc32_to_cpu(ehci, itd->hw_bufp[2]),
136 hc32_to_cpu(ehci, itd->hw_bufp[3]),
137 hc32_to_cpu(ehci, itd->hw_bufp[4]),
138 hc32_to_cpu(ehci, itd->hw_bufp[5]),
139 hc32_to_cpu(ehci, itd->hw_bufp[6]));
140 ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
141 itd->index[0], itd->index[1], itd->index[2],
142 itd->index[3], itd->index[4], itd->index[5],
143 itd->index[6], itd->index[7]);
144}
145
146static void __maybe_unused
147dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
148{
149 ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
150 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
151 sitd->urb);
152 ehci_dbg(ehci,
153 " addr %08x sched %04x result %08x buf %08x %08x\n",
154 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
155 hc32_to_cpu(ehci, sitd->hw_uframe),
156 hc32_to_cpu(ehci, sitd->hw_results),
157 hc32_to_cpu(ehci, sitd->hw_buf[0]),
158 hc32_to_cpu(ehci, sitd->hw_buf[1]));
159}
160
161static int __maybe_unused
162dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
163{
164 return scnprintf(buf, len,
165 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
166 label, label[0] ? " " : "", status,
167 (status & STS_PPCE_MASK) ? " PPCE" : "",
168 (status & STS_ASS) ? " Async" : "",
169 (status & STS_PSS) ? " Periodic" : "",
170 (status & STS_RECL) ? " Recl" : "",
171 (status & STS_HALT) ? " Halt" : "",
172 (status & STS_IAA) ? " IAA" : "",
173 (status & STS_FATAL) ? " FATAL" : "",
174 (status & STS_FLR) ? " FLR" : "",
175 (status & STS_PCD) ? " PCD" : "",
176 (status & STS_ERR) ? " ERR" : "",
177 (status & STS_INT) ? " INT" : "");
178}
179
180static int __maybe_unused
181dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
182{
183 return scnprintf(buf, len,
184 "%s%sintrenable %02x%s%s%s%s%s%s%s",
185 label, label[0] ? " " : "", enable,
186 (enable & STS_PPCE_MASK) ? " PPCE" : "",
187 (enable & STS_IAA) ? " IAA" : "",
188 (enable & STS_FATAL) ? " FATAL" : "",
189 (enable & STS_FLR) ? " FLR" : "",
190 (enable & STS_PCD) ? " PCD" : "",
191 (enable & STS_ERR) ? " ERR" : "",
192 (enable & STS_INT) ? " INT" : "");
193}
194
195static const char *const fls_strings[] = { "1024", "512", "256", "??" };
196
197static int
198dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
199{
200 return scnprintf(buf, len,
201 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
202 "period=%s%s %s",
203 label, label[0] ? " " : "", command,
204 (command & CMD_HIRD) ? " HIRD" : "",
205 (command & CMD_PPCEE) ? " PPCEE" : "",
206 (command & CMD_FSP) ? " FSP" : "",
207 (command & CMD_ASPE) ? " ASPE" : "",
208 (command & CMD_PSPE) ? " PSPE" : "",
209 (command & CMD_PARK) ? " park" : "(park)",
210 CMD_PARK_CNT(command),
211 (command >> 16) & 0x3f,
212 (command & CMD_LRESET) ? " LReset" : "",
213 (command & CMD_IAAD) ? " IAAD" : "",
214 (command & CMD_ASE) ? " Async" : "",
215 (command & CMD_PSE) ? " Periodic" : "",
216 fls_strings[(command >> 2) & 0x3],
217 (command & CMD_RESET) ? " Reset" : "",
218 (command & CMD_RUN) ? "RUN" : "HALT");
219}
220
221static int
222dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
223{
224 char *sig;
225
226 /* signaling state */
227 switch (status & (3 << 10)) {
228 case 0 << 10:
229 sig = "se0";
230 break;
231 case 1 << 10: /* low speed */
232 sig = "k";
233 break;
234 case 2 << 10:
235 sig = "j";
236 break;
237 default:
238 sig = "?";
239 break;
240 }
241
242 return scnprintf(buf, len,
243 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
244 "sig=%s%s%s%s%s%s%s%s%s%s%s",
245 label, label[0] ? " " : "", port, status,
246 status >> 25, /*device address */
247 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
248 " ACK" : "",
249 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
250 " NYET" : "",
251 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
252 " STALL" : "",
253 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
254 " ERR" : "",
255 (status & PORT_POWER) ? " POWER" : "",
256 (status & PORT_OWNER) ? " OWNER" : "",
257 sig,
258 (status & PORT_LPM) ? " LPM" : "",
259 (status & PORT_RESET) ? " RESET" : "",
260 (status & PORT_SUSPEND) ? " SUSPEND" : "",
261 (status & PORT_RESUME) ? " RESUME" : "",
262 (status & PORT_OCC) ? " OCC" : "",
263 (status & PORT_OC) ? " OC" : "",
264 (status & PORT_PEC) ? " PEC" : "",
265 (status & PORT_PE) ? " PE" : "",
266 (status & PORT_CSC) ? " CSC" : "",
267 (status & PORT_CONNECT) ? " CONNECT" : "");
268}
269
270static inline void
271dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
272{
273 char buf[80];
274
275 dbg_status_buf(buf, sizeof(buf), label, status);
276 ehci_dbg(ehci, "%s\n", buf);
277}
278
279static inline void
280dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
281{
282 char buf[80];
283
284 dbg_command_buf(buf, sizeof(buf), label, command);
285 ehci_dbg(ehci, "%s\n", buf);
286}
287
288static inline void
289dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
290{
291 char buf[80];
292
293 dbg_port_buf(buf, sizeof(buf), label, port, status);
294 ehci_dbg(ehci, "%s\n", buf);
295}
296
297/*-------------------------------------------------------------------------*/
298
299/* troubleshooting help: expose state in debugfs */
300
301static int debug_async_open(struct inode *, struct file *);
302static int debug_bandwidth_open(struct inode *, struct file *);
303static int debug_periodic_open(struct inode *, struct file *);
304static int debug_registers_open(struct inode *, struct file *);
305
306static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
307static int debug_close(struct inode *, struct file *);
308
309static const struct file_operations debug_async_fops = {
310 .owner = THIS_MODULE,
311 .open = debug_async_open,
312 .read = debug_output,
313 .release = debug_close,
314 .llseek = default_llseek,
315};
316
317static const struct file_operations debug_bandwidth_fops = {
318 .owner = THIS_MODULE,
319 .open = debug_bandwidth_open,
320 .read = debug_output,
321 .release = debug_close,
322 .llseek = default_llseek,
323};
324
325static const struct file_operations debug_periodic_fops = {
326 .owner = THIS_MODULE,
327 .open = debug_periodic_open,
328 .read = debug_output,
329 .release = debug_close,
330 .llseek = default_llseek,
331};
332
333static const struct file_operations debug_registers_fops = {
334 .owner = THIS_MODULE,
335 .open = debug_registers_open,
336 .read = debug_output,
337 .release = debug_close,
338 .llseek = default_llseek,
339};
340
341static struct dentry *ehci_debug_root;
342
343struct debug_buffer {
344 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
345 struct usb_bus *bus;
346 struct mutex mutex; /* protect filling of buffer */
347 size_t count; /* number of characters filled into buffer */
348 char *output_buf;
349 size_t alloc_size;
350};
351
352static inline char speed_char(u32 info1)
353{
354 switch (info1 & (3 << 12)) {
355 case QH_FULL_SPEED:
356 return 'f';
357 case QH_LOW_SPEED:
358 return 'l';
359 case QH_HIGH_SPEED:
360 return 'h';
361 default:
362 return '?';
363 }
364}
365
366static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
367{
368 __u32 v = hc32_to_cpu(ehci, token);
369
370 if (v & QTD_STS_ACTIVE)
371 return '*';
372 if (v & QTD_STS_HALT)
373 return '-';
374 if (!IS_SHORT_READ(v))
375 return ' ';
376 /* tries to advance through hw_alt_next */
377 return '/';
378}
379
380static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
381 char **nextp, unsigned *sizep)
382{
383 u32 scratch;
384 u32 hw_curr;
385 struct list_head *entry;
386 struct ehci_qtd *td;
387 unsigned temp;
388 unsigned size = *sizep;
389 char *next = *nextp;
390 char mark;
391 __le32 list_end = EHCI_LIST_END(ehci);
392 struct ehci_qh_hw *hw = qh->hw;
393
394 if (hw->hw_qtd_next == list_end) /* NEC does this */
395 mark = '@';
396 else
397 mark = token_mark(ehci, hw->hw_token);
398 if (mark == '/') { /* qh_alt_next controls qh advance? */
399 if ((hw->hw_alt_next & QTD_MASK(ehci))
400 == ehci->async->hw->hw_alt_next)
401 mark = '#'; /* blocked */
402 else if (hw->hw_alt_next == list_end)
403 mark = '.'; /* use hw_qtd_next */
404 /* else alt_next points to some other qtd */
405 }
406 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
407 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
408 temp = scnprintf(next, size,
409 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
410 " [cur %08x next %08x buf[0] %08x]",
411 qh, scratch & 0x007f,
412 speed_char (scratch),
413 (scratch >> 8) & 0x000f,
414 scratch, hc32_to_cpup(ehci, &hw->hw_info2),
415 hc32_to_cpup(ehci, &hw->hw_token), mark,
416 (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
417 ? "data1" : "data0",
418 (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f,
419 hc32_to_cpup(ehci, &hw->hw_current),
420 hc32_to_cpup(ehci, &hw->hw_qtd_next),
421 hc32_to_cpup(ehci, &hw->hw_buf[0]));
422 size -= temp;
423 next += temp;
424
425 /* hc may be modifying the list as we read it ... */
426 list_for_each(entry, &qh->qtd_list) {
427 char *type;
428
429 td = list_entry(entry, struct ehci_qtd, qtd_list);
430 scratch = hc32_to_cpup(ehci, &td->hw_token);
431 mark = ' ';
432 if (hw_curr == td->qtd_dma) {
433 mark = '*';
434 } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
435 mark = '+';
436 } else if (QTD_LENGTH(scratch)) {
437 if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
438 mark = '#';
439 else if (td->hw_alt_next != list_end)
440 mark = '/';
441 }
442 switch ((scratch >> 8) & 0x03) {
443 case 0:
444 type = "out";
445 break;
446 case 1:
447 type = "in";
448 break;
449 case 2:
450 type = "setup";
451 break;
452 default:
453 type = "?";
454 break;
455 }
456 temp = scnprintf(next, size,
457 "\n\t%p%c%s len=%d %08x urb %p"
458 " [td %08x buf[0] %08x]",
459 td, mark, type,
460 (scratch >> 16) & 0x7fff,
461 scratch,
462 td->urb,
463 (u32) td->qtd_dma,
464 hc32_to_cpup(ehci, &td->hw_buf[0]));
465 size -= temp;
466 next += temp;
467 if (temp == size)
468 goto done;
469 }
470
471 temp = scnprintf(next, size, "\n");
472 size -= temp;
473 next += temp;
474
475done:
476 *sizep = size;
477 *nextp = next;
478}
479
480static ssize_t fill_async_buffer(struct debug_buffer *buf)
481{
482 struct usb_hcd *hcd;
483 struct ehci_hcd *ehci;
484 unsigned long flags;
485 unsigned temp, size;
486 char *next;
487 struct ehci_qh *qh;
488
489 hcd = bus_to_hcd(buf->bus);
490 ehci = hcd_to_ehci(hcd);
491 next = buf->output_buf;
492 size = buf->alloc_size;
493
494 *next = 0;
495
496 /*
497 * dumps a snapshot of the async schedule.
498 * usually empty except for long-term bulk reads, or head.
499 * one QH per line, and TDs we know about
500 */
501 spin_lock_irqsave(&ehci->lock, flags);
502 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
503 qh_lines(ehci, qh, &next, &size);
504 if (!list_empty(&ehci->async_unlink) && size > 0) {
505 temp = scnprintf(next, size, "\nunlink =\n");
506 size -= temp;
507 next += temp;
508
509 list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
510 if (size <= 0)
511 break;
512 qh_lines(ehci, qh, &next, &size);
513 }
514 }
515 spin_unlock_irqrestore(&ehci->lock, flags);
516
517 return strlen(buf->output_buf);
518}
519
520static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
521{
522 struct ehci_hcd *ehci;
523 struct ehci_tt *tt;
524 struct ehci_per_sched *ps;
525 unsigned temp, size;
526 char *next;
527 unsigned i;
528 u8 *bw;
529 u16 *bf;
530 u8 budget[EHCI_BANDWIDTH_SIZE];
531
532 ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
533 next = buf->output_buf;
534 size = buf->alloc_size;
535
536 *next = 0;
537
538 spin_lock_irq(&ehci->lock);
539
540 /* Dump the HS bandwidth table */
541 temp = scnprintf(next, size,
542 "HS bandwidth allocation (us per microframe)\n");
543 size -= temp;
544 next += temp;
545 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
546 bw = &ehci->bandwidth[i];
547 temp = scnprintf(next, size,
548 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
549 i, bw[0], bw[1], bw[2], bw[3],
550 bw[4], bw[5], bw[6], bw[7]);
551 size -= temp;
552 next += temp;
553 }
554
555 /* Dump all the FS/LS tables */
556 list_for_each_entry(tt, &ehci->tt_list, tt_list) {
557 temp = scnprintf(next, size,
558 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
559 dev_name(&tt->usb_tt->hub->dev),
560 tt->tt_port + !!tt->usb_tt->multi);
561 size -= temp;
562 next += temp;
563
564 bf = tt->bandwidth;
565 temp = scnprintf(next, size,
566 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
567 bf[0], bf[1], bf[2], bf[3],
568 bf[4], bf[5], bf[6], bf[7]);
569 size -= temp;
570 next += temp;
571
572 temp = scnprintf(next, size,
573 "FS/LS budget (us per microframe)\n");
574 size -= temp;
575 next += temp;
576 compute_tt_budget(budget, tt);
577 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
578 bw = &budget[i];
579 temp = scnprintf(next, size,
580 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
581 i, bw[0], bw[1], bw[2], bw[3],
582 bw[4], bw[5], bw[6], bw[7]);
583 size -= temp;
584 next += temp;
585 }
586 list_for_each_entry(ps, &tt->ps_list, ps_list) {
587 temp = scnprintf(next, size,
588 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
589 dev_name(&ps->udev->dev),
590 ps->ep->desc.bEndpointAddress,
591 ps->tt_usecs,
592 ps->bw_phase, ps->phase_uf,
593 ps->bw_period, ps->cs_mask);
594 size -= temp;
595 next += temp;
596 }
597 }
598 spin_unlock_irq(&ehci->lock);
599
600 return next - buf->output_buf;
601}
602
603static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
604 struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
605{
606 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
607 struct ehci_qtd *qtd;
608 char *type = "";
609 unsigned temp = 0;
610
611 /* count tds, get ep direction */
612 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
613 temp++;
614 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
615 case 0:
616 type = "out";
617 continue;
618 case 1:
619 type = "in";
620 continue;
621 }
622 }
623
624 return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
625 speed_char(scratch), scratch & 0x007f,
626 (scratch >> 8) & 0x000f, type, qh->ps.usecs,
627 qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
628}
629
630#define DBG_SCHED_LIMIT 64
631static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
632{
633 struct usb_hcd *hcd;
634 struct ehci_hcd *ehci;
635 unsigned long flags;
636 union ehci_shadow p, *seen;
637 unsigned temp, size, seen_count;
638 char *next;
639 unsigned i;
640 __hc32 tag;
641
642 seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
643 if (!seen)
644 return 0;
645 seen_count = 0;
646
647 hcd = bus_to_hcd(buf->bus);
648 ehci = hcd_to_ehci(hcd);
649 next = buf->output_buf;
650 size = buf->alloc_size;
651
652 temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
653 size -= temp;
654 next += temp;
655
656 /*
657 * dump a snapshot of the periodic schedule.
658 * iso changes, interrupt usually doesn't.
659 */
660 spin_lock_irqsave(&ehci->lock, flags);
661 for (i = 0; i < ehci->periodic_size; i++) {
662 p = ehci->pshadow[i];
663 if (likely(!p.ptr))
664 continue;
665 tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
666
667 temp = scnprintf(next, size, "%4d: ", i);
668 size -= temp;
669 next += temp;
670
671 do {
672 struct ehci_qh_hw *hw;
673
674 switch (hc32_to_cpu(ehci, tag)) {
675 case Q_TYPE_QH:
676 hw = p.qh->hw;
677 temp = scnprintf(next, size, " qh%d-%04x/%p",
678 p.qh->ps.period,
679 hc32_to_cpup(ehci,
680 &hw->hw_info2)
681 /* uframe masks */
682 & (QH_CMASK | QH_SMASK),
683 p.qh);
684 size -= temp;
685 next += temp;
686 /* don't repeat what follows this qh */
687 for (temp = 0; temp < seen_count; temp++) {
688 if (seen[temp].ptr != p.ptr)
689 continue;
690 if (p.qh->qh_next.ptr) {
691 temp = scnprintf(next, size,
692 " ...");
693 size -= temp;
694 next += temp;
695 }
696 break;
697 }
698 /* show more info the first time around */
699 if (temp == seen_count) {
700 temp = output_buf_tds_dir(next, ehci,
701 hw, p.qh, size);
702
703 if (seen_count < DBG_SCHED_LIMIT)
704 seen[seen_count++].qh = p.qh;
705 } else {
706 temp = 0;
707 }
708 tag = Q_NEXT_TYPE(ehci, hw->hw_next);
709 p = p.qh->qh_next;
710 break;
711 case Q_TYPE_FSTN:
712 temp = scnprintf(next, size,
713 " fstn-%8x/%p", p.fstn->hw_prev,
714 p.fstn);
715 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
716 p = p.fstn->fstn_next;
717 break;
718 case Q_TYPE_ITD:
719 temp = scnprintf(next, size,
720 " itd/%p", p.itd);
721 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
722 p = p.itd->itd_next;
723 break;
724 case Q_TYPE_SITD:
725 temp = scnprintf(next, size,
726 " sitd%d-%04x/%p",
727 p.sitd->stream->ps.period,
728 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
729 & 0x0000ffff,
730 p.sitd);
731 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
732 p = p.sitd->sitd_next;
733 break;
734 }
735 size -= temp;
736 next += temp;
737 } while (p.ptr);
738
739 temp = scnprintf(next, size, "\n");
740 size -= temp;
741 next += temp;
742 }
743 spin_unlock_irqrestore(&ehci->lock, flags);
744 kfree(seen);
745
746 return buf->alloc_size - size;
747}
748#undef DBG_SCHED_LIMIT
749
750static const char *rh_state_string(struct ehci_hcd *ehci)
751{
752 switch (ehci->rh_state) {
753 case EHCI_RH_HALTED:
754 return "halted";
755 case EHCI_RH_SUSPENDED:
756 return "suspended";
757 case EHCI_RH_RUNNING:
758 return "running";
759 case EHCI_RH_STOPPING:
760 return "stopping";
761 }
762 return "?";
763}
764
765static ssize_t fill_registers_buffer(struct debug_buffer *buf)
766{
767 struct usb_hcd *hcd;
768 struct ehci_hcd *ehci;
769 unsigned long flags;
770 unsigned temp, size, i;
771 char *next, scratch[80];
772 static char fmt[] = "%*s\n";
773 static char label[] = "";
774
775 hcd = bus_to_hcd(buf->bus);
776 ehci = hcd_to_ehci(hcd);
777 next = buf->output_buf;
778 size = buf->alloc_size;
779
780 spin_lock_irqsave(&ehci->lock, flags);
781
782 if (!HCD_HW_ACCESSIBLE(hcd)) {
783 size = scnprintf(next, size,
784 "bus %s, device %s\n"
785 "%s\n"
786 "SUSPENDED (no register access)\n",
787 hcd->self.controller->bus->name,
788 dev_name(hcd->self.controller),
789 hcd->product_desc);
790 goto done;
791 }
792
793 /* Capability Registers */
794 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
795 temp = scnprintf(next, size,
796 "bus %s, device %s\n"
797 "%s\n"
798 "EHCI %x.%02x, rh state %s\n",
799 hcd->self.controller->bus->name,
800 dev_name(hcd->self.controller),
801 hcd->product_desc,
802 i >> 8, i & 0x0ff, rh_state_string(ehci));
803 size -= temp;
804 next += temp;
805
806#ifdef CONFIG_PCI
807 /* EHCI 0.96 and later may have "extended capabilities" */
808 if (dev_is_pci(hcd->self.controller)) {
809 struct pci_dev *pdev;
810 u32 offset, cap, cap2;
811 unsigned count = 256 / 4;
812
813 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
814 offset = HCC_EXT_CAPS(ehci_readl(ehci,
815 &ehci->caps->hcc_params));
816 while (offset && count--) {
817 pci_read_config_dword(pdev, offset, &cap);
818 switch (cap & 0xff) {
819 case 1:
820 temp = scnprintf(next, size,
821 "ownership %08x%s%s\n", cap,
822 (cap & (1 << 24)) ? " linux" : "",
823 (cap & (1 << 16)) ? " firmware" : "");
824 size -= temp;
825 next += temp;
826
827 offset += 4;
828 pci_read_config_dword(pdev, offset, &cap2);
829 temp = scnprintf(next, size,
830 "SMI sts/enable 0x%08x\n", cap2);
831 size -= temp;
832 next += temp;
833 break;
834 case 0: /* illegal reserved capability */
835 cap = 0;
836 /* FALLTHROUGH */
837 default: /* unknown */
838 break;
839 }
840 temp = (cap >> 8) & 0xff;
841 }
842 }
843#endif
844
845 /* FIXME interpret both types of params */
846 i = ehci_readl(ehci, &ehci->caps->hcs_params);
847 temp = scnprintf(next, size, "structural params 0x%08x\n", i);
848 size -= temp;
849 next += temp;
850
851 i = ehci_readl(ehci, &ehci->caps->hcc_params);
852 temp = scnprintf(next, size, "capability params 0x%08x\n", i);
853 size -= temp;
854 next += temp;
855
856 /* Operational Registers */
857 temp = dbg_status_buf(scratch, sizeof(scratch), label,
858 ehci_readl(ehci, &ehci->regs->status));
859 temp = scnprintf(next, size, fmt, temp, scratch);
860 size -= temp;
861 next += temp;
862
863 temp = dbg_command_buf(scratch, sizeof(scratch), label,
864 ehci_readl(ehci, &ehci->regs->command));
865 temp = scnprintf(next, size, fmt, temp, scratch);
866 size -= temp;
867 next += temp;
868
869 temp = dbg_intr_buf(scratch, sizeof(scratch), label,
870 ehci_readl(ehci, &ehci->regs->intr_enable));
871 temp = scnprintf(next, size, fmt, temp, scratch);
872 size -= temp;
873 next += temp;
874
875 temp = scnprintf(next, size, "uframe %04x\n",
876 ehci_read_frame_index(ehci));
877 size -= temp;
878 next += temp;
879
880 for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
881 temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
882 ehci_readl(ehci,
883 &ehci->regs->port_status[i - 1]));
884 temp = scnprintf(next, size, fmt, temp, scratch);
885 size -= temp;
886 next += temp;
887 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
888 temp = scnprintf(next, size,
889 " debug control %08x\n",
890 ehci_readl(ehci,
891 &ehci->debug->control));
892 size -= temp;
893 next += temp;
894 }
895 }
896
897 if (!list_empty(&ehci->async_unlink)) {
898 temp = scnprintf(next, size, "async unlink qh %p\n",
899 list_first_entry(&ehci->async_unlink,
900 struct ehci_qh, unlink_node));
901 size -= temp;
902 next += temp;
903 }
904
905#ifdef EHCI_STATS
906 temp = scnprintf(next, size,
907 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
908 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
909 ehci->stats.lost_iaa);
910 size -= temp;
911 next += temp;
912
913 temp = scnprintf(next, size, "complete %ld unlink %ld\n",
914 ehci->stats.complete, ehci->stats.unlink);
915 size -= temp;
916 next += temp;
917#endif
918
919done:
920 spin_unlock_irqrestore(&ehci->lock, flags);
921
922 return buf->alloc_size - size;
923}
924
925static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
926 ssize_t (*fill_func)(struct debug_buffer *))
927{
928 struct debug_buffer *buf;
929
930 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
931
932 if (buf) {
933 buf->bus = bus;
934 buf->fill_func = fill_func;
935 mutex_init(&buf->mutex);
936 buf->alloc_size = PAGE_SIZE;
937 }
938
939 return buf;
940}
941
942static int fill_buffer(struct debug_buffer *buf)
943{
944 int ret = 0;
945
946 if (!buf->output_buf)
947 buf->output_buf = vmalloc(buf->alloc_size);
948
949 if (!buf->output_buf) {
950 ret = -ENOMEM;
951 goto out;
952 }
953
954 ret = buf->fill_func(buf);
955
956 if (ret >= 0) {
957 buf->count = ret;
958 ret = 0;
959 }
960
961out:
962 return ret;
963}
964
965static ssize_t debug_output(struct file *file, char __user *user_buf,
966 size_t len, loff_t *offset)
967{
968 struct debug_buffer *buf = file->private_data;
969 int ret = 0;
970
971 mutex_lock(&buf->mutex);
972 if (buf->count == 0) {
973 ret = fill_buffer(buf);
974 if (ret != 0) {
975 mutex_unlock(&buf->mutex);
976 goto out;
977 }
978 }
979 mutex_unlock(&buf->mutex);
980
981 ret = simple_read_from_buffer(user_buf, len, offset,
982 buf->output_buf, buf->count);
983
984out:
985 return ret;
986}
987
988static int debug_close(struct inode *inode, struct file *file)
989{
990 struct debug_buffer *buf = file->private_data;
991
992 if (buf) {
993 vfree(buf->output_buf);
994 kfree(buf);
995 }
996
997 return 0;
998}
999
1000static int debug_async_open(struct inode *inode, struct file *file)
1001{
1002 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
1003
1004 return file->private_data ? 0 : -ENOMEM;
1005}
1006
1007static int debug_bandwidth_open(struct inode *inode, struct file *file)
1008{
1009 file->private_data = alloc_buffer(inode->i_private,
1010 fill_bandwidth_buffer);
1011
1012 return file->private_data ? 0 : -ENOMEM;
1013}
1014
1015static int debug_periodic_open(struct inode *inode, struct file *file)
1016{
1017 struct debug_buffer *buf;
1018
1019 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
1020 if (!buf)
1021 return -ENOMEM;
1022
1023 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
1024 file->private_data = buf;
1025 return 0;
1026}
1027
1028static int debug_registers_open(struct inode *inode, struct file *file)
1029{
1030 file->private_data = alloc_buffer(inode->i_private,
1031 fill_registers_buffer);
1032
1033 return file->private_data ? 0 : -ENOMEM;
1034}
1035
1036static inline void create_debug_files(struct ehci_hcd *ehci)
1037{
1038 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1039
1040 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
1041 if (!ehci->debug_dir)
1042 return;
1043
1044 if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
1045 &debug_async_fops))
1046 goto file_error;
1047
1048 if (!debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
1049 &debug_bandwidth_fops))
1050 goto file_error;
1051
1052 if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
1053 &debug_periodic_fops))
1054 goto file_error;
1055
1056 if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
1057 &debug_registers_fops))
1058 goto file_error;
1059
1060 return;
1061
1062file_error:
1063 debugfs_remove_recursive(ehci->debug_dir);
1064}
1065
1066static inline void remove_debug_files(struct ehci_hcd *ehci)
1067{
1068 debugfs_remove_recursive(ehci->debug_dir);
1069}
1070
1071#else /* CONFIG_DYNAMIC_DEBUG */
1072
1073static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) { }
1074static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) { }
1075
1076static inline void __maybe_unused dbg_qh(const char *label,
1077 struct ehci_hcd *ehci, struct ehci_qh *qh) { }
1078
1079static inline int __maybe_unused dbg_status_buf(const char *buf,
1080 unsigned int len, const char *label, u32 status)
1081{ return 0; }
1082
1083static inline int __maybe_unused dbg_command_buf(const char *buf,
1084 unsigned int len, const char *label, u32 command)
1085{ return 0; }
1086
1087static inline int __maybe_unused dbg_intr_buf(const char *buf,
1088 unsigned int len, const char *label, u32 enable)
1089{ return 0; }
1090
1091static inline int __maybe_unused dbg_port_buf(char *buf,
1092 unsigned int len, const char *label, int port, u32 status)
1093{ return 0; }
1094
1095static inline void dbg_status(struct ehci_hcd *ehci, const char *label,
1096 u32 status) { }
1097static inline void dbg_cmd(struct ehci_hcd *ehci, const char *label,
1098 u32 command) { }
1099static inline void dbg_port(struct ehci_hcd *ehci, const char *label,
1100 int port, u32 status) { }
1101
1102static inline void create_debug_files(struct ehci_hcd *bus) { }
1103static inline void remove_debug_files(struct ehci_hcd *bus) { }
1104
1105#endif /* CONFIG_DYNAMIC_DEBUG */