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1/*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 */
15
16/* this file is part of ehci-hcd.c */
17
18#ifdef CONFIG_DYNAMIC_DEBUG
19
20/*
21 * check the values in the HCSPARAMS register
22 * (host controller _Structural_ parameters)
23 * see EHCI spec, Table 2-4 for each value
24 */
25static void dbg_hcs_params(struct ehci_hcd *ehci, char *label)
26{
27 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
28
29 ehci_dbg(ehci,
30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
31 label, params,
32 HCS_DEBUG_PORT(params),
33 HCS_INDICATOR(params) ? " ind" : "",
34 HCS_N_CC(params),
35 HCS_N_PCC(params),
36 HCS_PORTROUTED(params) ? "" : " ordered",
37 HCS_PPC(params) ? "" : " !ppc",
38 HCS_N_PORTS(params));
39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
40 if (HCS_PORTROUTED(params)) {
41 int i;
42 char buf[46], tmp[7], byte;
43
44 buf[0] = 0;
45 for (i = 0; i < HCS_N_PORTS(params); i++) {
46 /* FIXME MIPS won't readb() ... */
47 byte = readb(&ehci->caps->portroute[(i >> 1)]);
48 sprintf(tmp, "%d ",
49 (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf);
50 strcat(buf, tmp);
51 }
52 ehci_dbg(ehci, "%s portroute %s\n", label, buf);
53 }
54}
55#else
56
57static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) {}
58
59#endif
60
61#ifdef CONFIG_DYNAMIC_DEBUG
62
63/*
64 * check the values in the HCCPARAMS register
65 * (host controller _Capability_ parameters)
66 * see EHCI Spec, Table 2-5 for each value
67 */
68static void dbg_hcc_params(struct ehci_hcd *ehci, char *label)
69{
70 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
71
72 if (HCC_ISOC_CACHE(params)) {
73 ehci_dbg(ehci,
74 "%s hcc_params %04x caching frame %s%s%s\n",
75 label, params,
76 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
77 HCC_CANPARK(params) ? " park" : "",
78 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
79 } else {
80 ehci_dbg(ehci,
81 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
82 label,
83 params,
84 HCC_ISOC_THRES(params),
85 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
86 HCC_CANPARK(params) ? " park" : "",
87 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
88 HCC_LPM(params) ? " LPM" : "",
89 HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
90 HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
91 HCC_32FRAME_PERIODIC_LIST(params) ?
92 " 32 periodic list" : "");
93 }
94}
95#else
96
97static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) {}
98
99#endif
100
101#ifdef CONFIG_DYNAMIC_DEBUG
102
103static void __maybe_unused
104dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
105{
106 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
107 hc32_to_cpup(ehci, &qtd->hw_next),
108 hc32_to_cpup(ehci, &qtd->hw_alt_next),
109 hc32_to_cpup(ehci, &qtd->hw_token),
110 hc32_to_cpup(ehci, &qtd->hw_buf[0]));
111 if (qtd->hw_buf[1])
112 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
113 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
114 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
115 hc32_to_cpup(ehci, &qtd->hw_buf[3]),
116 hc32_to_cpup(ehci, &qtd->hw_buf[4]));
117}
118
119static void __maybe_unused
120dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
121{
122 struct ehci_qh_hw *hw = qh->hw;
123
124 ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
125 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
126 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
127}
128
129static void __maybe_unused
130dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
131{
132 ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n",
133 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
134 itd->urb);
135 ehci_dbg(ehci,
136 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
137 hc32_to_cpu(ehci, itd->hw_transaction[0]),
138 hc32_to_cpu(ehci, itd->hw_transaction[1]),
139 hc32_to_cpu(ehci, itd->hw_transaction[2]),
140 hc32_to_cpu(ehci, itd->hw_transaction[3]),
141 hc32_to_cpu(ehci, itd->hw_transaction[4]),
142 hc32_to_cpu(ehci, itd->hw_transaction[5]),
143 hc32_to_cpu(ehci, itd->hw_transaction[6]),
144 hc32_to_cpu(ehci, itd->hw_transaction[7]));
145 ehci_dbg(ehci,
146 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
147 hc32_to_cpu(ehci, itd->hw_bufp[0]),
148 hc32_to_cpu(ehci, itd->hw_bufp[1]),
149 hc32_to_cpu(ehci, itd->hw_bufp[2]),
150 hc32_to_cpu(ehci, itd->hw_bufp[3]),
151 hc32_to_cpu(ehci, itd->hw_bufp[4]),
152 hc32_to_cpu(ehci, itd->hw_bufp[5]),
153 hc32_to_cpu(ehci, itd->hw_bufp[6]));
154 ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n",
155 itd->index[0], itd->index[1], itd->index[2],
156 itd->index[3], itd->index[4], itd->index[5],
157 itd->index[6], itd->index[7]);
158}
159
160static void __maybe_unused
161dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
162{
163 ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
164 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
165 sitd->urb);
166 ehci_dbg(ehci,
167 " addr %08x sched %04x result %08x buf %08x %08x\n",
168 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
169 hc32_to_cpu(ehci, sitd->hw_uframe),
170 hc32_to_cpu(ehci, sitd->hw_results),
171 hc32_to_cpu(ehci, sitd->hw_buf[0]),
172 hc32_to_cpu(ehci, sitd->hw_buf[1]));
173}
174
175static int __maybe_unused
176dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
177{
178 return scnprintf(buf, len,
179 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
180 label, label[0] ? " " : "", status,
181 (status & STS_PPCE_MASK) ? " PPCE" : "",
182 (status & STS_ASS) ? " Async" : "",
183 (status & STS_PSS) ? " Periodic" : "",
184 (status & STS_RECL) ? " Recl" : "",
185 (status & STS_HALT) ? " Halt" : "",
186 (status & STS_IAA) ? " IAA" : "",
187 (status & STS_FATAL) ? " FATAL" : "",
188 (status & STS_FLR) ? " FLR" : "",
189 (status & STS_PCD) ? " PCD" : "",
190 (status & STS_ERR) ? " ERR" : "",
191 (status & STS_INT) ? " INT" : "");
192}
193
194static int __maybe_unused
195dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
196{
197 return scnprintf(buf, len,
198 "%s%sintrenable %02x%s%s%s%s%s%s%s",
199 label, label[0] ? " " : "", enable,
200 (enable & STS_PPCE_MASK) ? " PPCE" : "",
201 (enable & STS_IAA) ? " IAA" : "",
202 (enable & STS_FATAL) ? " FATAL" : "",
203 (enable & STS_FLR) ? " FLR" : "",
204 (enable & STS_PCD) ? " PCD" : "",
205 (enable & STS_ERR) ? " ERR" : "",
206 (enable & STS_INT) ? " INT" : "");
207}
208
209static const char *const fls_strings[] = { "1024", "512", "256", "??" };
210
211static int
212dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
213{
214 return scnprintf(buf, len,
215 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
216 "period=%s%s %s",
217 label, label[0] ? " " : "", command,
218 (command & CMD_HIRD) ? " HIRD" : "",
219 (command & CMD_PPCEE) ? " PPCEE" : "",
220 (command & CMD_FSP) ? " FSP" : "",
221 (command & CMD_ASPE) ? " ASPE" : "",
222 (command & CMD_PSPE) ? " PSPE" : "",
223 (command & CMD_PARK) ? " park" : "(park)",
224 CMD_PARK_CNT(command),
225 (command >> 16) & 0x3f,
226 (command & CMD_LRESET) ? " LReset" : "",
227 (command & CMD_IAAD) ? " IAAD" : "",
228 (command & CMD_ASE) ? " Async" : "",
229 (command & CMD_PSE) ? " Periodic" : "",
230 fls_strings[(command >> 2) & 0x3],
231 (command & CMD_RESET) ? " Reset" : "",
232 (command & CMD_RUN) ? "RUN" : "HALT");
233}
234
235static int
236dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
237{
238 char *sig;
239
240 /* signaling state */
241 switch (status & (3 << 10)) {
242 case 0 << 10:
243 sig = "se0";
244 break;
245 case 1 << 10: /* low speed */
246 sig = "k";
247 break;
248 case 2 << 10:
249 sig = "j";
250 break;
251 default:
252 sig = "?";
253 break;
254 }
255
256 return scnprintf(buf, len,
257 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
258 "sig=%s%s%s%s%s%s%s%s%s%s%s",
259 label, label[0] ? " " : "", port, status,
260 status >> 25, /*device address */
261 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ?
262 " ACK" : "",
263 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ?
264 " NYET" : "",
265 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ?
266 " STALL" : "",
267 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ?
268 " ERR" : "",
269 (status & PORT_POWER) ? " POWER" : "",
270 (status & PORT_OWNER) ? " OWNER" : "",
271 sig,
272 (status & PORT_LPM) ? " LPM" : "",
273 (status & PORT_RESET) ? " RESET" : "",
274 (status & PORT_SUSPEND) ? " SUSPEND" : "",
275 (status & PORT_RESUME) ? " RESUME" : "",
276 (status & PORT_OCC) ? " OCC" : "",
277 (status & PORT_OC) ? " OC" : "",
278 (status & PORT_PEC) ? " PEC" : "",
279 (status & PORT_PE) ? " PE" : "",
280 (status & PORT_CSC) ? " CSC" : "",
281 (status & PORT_CONNECT) ? " CONNECT" : "");
282}
283
284#else
285static inline void __maybe_unused
286dbg_qh(char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
287{}
288
289static inline int __maybe_unused
290dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
291{
292 return 0;
293}
294
295static inline int __maybe_unused
296dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
297{
298 return 0;
299}
300
301static inline int __maybe_unused
302dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
303{
304 return 0;
305}
306
307static inline int __maybe_unused
308dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
309{
310 return 0;
311}
312
313#endif /* CONFIG_DYNAMIC_DEBUG */
314
315static inline void
316dbg_status(struct ehci_hcd *ehci, const char *label, u32 status)
317{
318 char buf[80];
319
320 dbg_status_buf(buf, sizeof(buf), label, status);
321 ehci_dbg(ehci, "%s\n", buf);
322}
323
324static inline void
325dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command)
326{
327 char buf[80];
328
329 dbg_command_buf(buf, sizeof(buf), label, command);
330 ehci_dbg(ehci, "%s\n", buf);
331}
332
333static inline void
334dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status)
335{
336 char buf[80];
337
338 dbg_port_buf(buf, sizeof(buf), label, port, status);
339 ehci_dbg(ehci, "%s\n", buf);
340}
341
342/*-------------------------------------------------------------------------*/
343
344#ifndef CONFIG_DYNAMIC_DEBUG
345
346static inline void create_debug_files(struct ehci_hcd *bus) { }
347static inline void remove_debug_files(struct ehci_hcd *bus) { }
348
349#else
350
351/* troubleshooting help: expose state in debugfs */
352
353static int debug_async_open(struct inode *, struct file *);
354static int debug_bandwidth_open(struct inode *, struct file *);
355static int debug_periodic_open(struct inode *, struct file *);
356static int debug_registers_open(struct inode *, struct file *);
357
358static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
359static int debug_close(struct inode *, struct file *);
360
361static const struct file_operations debug_async_fops = {
362 .owner = THIS_MODULE,
363 .open = debug_async_open,
364 .read = debug_output,
365 .release = debug_close,
366 .llseek = default_llseek,
367};
368
369static const struct file_operations debug_bandwidth_fops = {
370 .owner = THIS_MODULE,
371 .open = debug_bandwidth_open,
372 .read = debug_output,
373 .release = debug_close,
374 .llseek = default_llseek,
375};
376
377static const struct file_operations debug_periodic_fops = {
378 .owner = THIS_MODULE,
379 .open = debug_periodic_open,
380 .read = debug_output,
381 .release = debug_close,
382 .llseek = default_llseek,
383};
384
385static const struct file_operations debug_registers_fops = {
386 .owner = THIS_MODULE,
387 .open = debug_registers_open,
388 .read = debug_output,
389 .release = debug_close,
390 .llseek = default_llseek,
391};
392
393static struct dentry *ehci_debug_root;
394
395struct debug_buffer {
396 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
397 struct usb_bus *bus;
398 struct mutex mutex; /* protect filling of buffer */
399 size_t count; /* number of characters filled into buffer */
400 char *output_buf;
401 size_t alloc_size;
402};
403
404static inline char speed_char(u32 info1)
405{
406 switch (info1 & (3 << 12)) {
407 case QH_FULL_SPEED:
408 return 'f';
409 case QH_LOW_SPEED:
410 return 'l';
411 case QH_HIGH_SPEED:
412 return 'h';
413 default:
414 return '?';
415 }
416}
417
418static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
419{
420 __u32 v = hc32_to_cpu(ehci, token);
421
422 if (v & QTD_STS_ACTIVE)
423 return '*';
424 if (v & QTD_STS_HALT)
425 return '-';
426 if (!IS_SHORT_READ(v))
427 return ' ';
428 /* tries to advance through hw_alt_next */
429 return '/';
430}
431
432static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh,
433 char **nextp, unsigned *sizep)
434{
435 u32 scratch;
436 u32 hw_curr;
437 struct list_head *entry;
438 struct ehci_qtd *td;
439 unsigned temp;
440 unsigned size = *sizep;
441 char *next = *nextp;
442 char mark;
443 __le32 list_end = EHCI_LIST_END(ehci);
444 struct ehci_qh_hw *hw = qh->hw;
445
446 if (hw->hw_qtd_next == list_end) /* NEC does this */
447 mark = '@';
448 else
449 mark = token_mark(ehci, hw->hw_token);
450 if (mark == '/') { /* qh_alt_next controls qh advance? */
451 if ((hw->hw_alt_next & QTD_MASK(ehci))
452 == ehci->async->hw->hw_alt_next)
453 mark = '#'; /* blocked */
454 else if (hw->hw_alt_next == list_end)
455 mark = '.'; /* use hw_qtd_next */
456 /* else alt_next points to some other qtd */
457 }
458 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
459 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
460 temp = scnprintf(next, size,
461 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)"
462 " [cur %08x next %08x buf[0] %08x]",
463 qh, scratch & 0x007f,
464 speed_char (scratch),
465 (scratch >> 8) & 0x000f,
466 scratch, hc32_to_cpup(ehci, &hw->hw_info2),
467 hc32_to_cpup(ehci, &hw->hw_token), mark,
468 (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
469 ? "data1" : "data0",
470 (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f,
471 hc32_to_cpup(ehci, &hw->hw_current),
472 hc32_to_cpup(ehci, &hw->hw_qtd_next),
473 hc32_to_cpup(ehci, &hw->hw_buf[0]));
474 size -= temp;
475 next += temp;
476
477 /* hc may be modifying the list as we read it ... */
478 list_for_each(entry, &qh->qtd_list) {
479 char *type;
480
481 td = list_entry(entry, struct ehci_qtd, qtd_list);
482 scratch = hc32_to_cpup(ehci, &td->hw_token);
483 mark = ' ';
484 if (hw_curr == td->qtd_dma) {
485 mark = '*';
486 } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) {
487 mark = '+';
488 } else if (QTD_LENGTH(scratch)) {
489 if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
490 mark = '#';
491 else if (td->hw_alt_next != list_end)
492 mark = '/';
493 }
494 switch ((scratch >> 8) & 0x03) {
495 case 0:
496 type = "out";
497 break;
498 case 1:
499 type = "in";
500 break;
501 case 2:
502 type = "setup";
503 break;
504 default:
505 type = "?";
506 break;
507 }
508 temp = scnprintf(next, size,
509 "\n\t%p%c%s len=%d %08x urb %p"
510 " [td %08x buf[0] %08x]",
511 td, mark, type,
512 (scratch >> 16) & 0x7fff,
513 scratch,
514 td->urb,
515 (u32) td->qtd_dma,
516 hc32_to_cpup(ehci, &td->hw_buf[0]));
517 size -= temp;
518 next += temp;
519 if (temp == size)
520 goto done;
521 }
522
523 temp = scnprintf(next, size, "\n");
524 size -= temp;
525 next += temp;
526
527done:
528 *sizep = size;
529 *nextp = next;
530}
531
532static ssize_t fill_async_buffer(struct debug_buffer *buf)
533{
534 struct usb_hcd *hcd;
535 struct ehci_hcd *ehci;
536 unsigned long flags;
537 unsigned temp, size;
538 char *next;
539 struct ehci_qh *qh;
540
541 hcd = bus_to_hcd(buf->bus);
542 ehci = hcd_to_ehci(hcd);
543 next = buf->output_buf;
544 size = buf->alloc_size;
545
546 *next = 0;
547
548 /*
549 * dumps a snapshot of the async schedule.
550 * usually empty except for long-term bulk reads, or head.
551 * one QH per line, and TDs we know about
552 */
553 spin_lock_irqsave(&ehci->lock, flags);
554 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
555 qh_lines(ehci, qh, &next, &size);
556 if (!list_empty(&ehci->async_unlink) && size > 0) {
557 temp = scnprintf(next, size, "\nunlink =\n");
558 size -= temp;
559 next += temp;
560
561 list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
562 if (size <= 0)
563 break;
564 qh_lines(ehci, qh, &next, &size);
565 }
566 }
567 spin_unlock_irqrestore(&ehci->lock, flags);
568
569 return strlen(buf->output_buf);
570}
571
572static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
573{
574 struct ehci_hcd *ehci;
575 struct ehci_tt *tt;
576 struct ehci_per_sched *ps;
577 unsigned temp, size;
578 char *next;
579 unsigned i;
580 u8 *bw;
581 u16 *bf;
582 u8 budget[EHCI_BANDWIDTH_SIZE];
583
584 ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
585 next = buf->output_buf;
586 size = buf->alloc_size;
587
588 *next = 0;
589
590 spin_lock_irq(&ehci->lock);
591
592 /* Dump the HS bandwidth table */
593 temp = scnprintf(next, size,
594 "HS bandwidth allocation (us per microframe)\n");
595 size -= temp;
596 next += temp;
597 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
598 bw = &ehci->bandwidth[i];
599 temp = scnprintf(next, size,
600 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
601 i, bw[0], bw[1], bw[2], bw[3],
602 bw[4], bw[5], bw[6], bw[7]);
603 size -= temp;
604 next += temp;
605 }
606
607 /* Dump all the FS/LS tables */
608 list_for_each_entry(tt, &ehci->tt_list, tt_list) {
609 temp = scnprintf(next, size,
610 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
611 dev_name(&tt->usb_tt->hub->dev),
612 tt->tt_port + !!tt->usb_tt->multi);
613 size -= temp;
614 next += temp;
615
616 bf = tt->bandwidth;
617 temp = scnprintf(next, size,
618 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
619 bf[0], bf[1], bf[2], bf[3],
620 bf[4], bf[5], bf[6], bf[7]);
621 size -= temp;
622 next += temp;
623
624 temp = scnprintf(next, size,
625 "FS/LS budget (us per microframe)\n");
626 size -= temp;
627 next += temp;
628 compute_tt_budget(budget, tt);
629 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
630 bw = &budget[i];
631 temp = scnprintf(next, size,
632 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
633 i, bw[0], bw[1], bw[2], bw[3],
634 bw[4], bw[5], bw[6], bw[7]);
635 size -= temp;
636 next += temp;
637 }
638 list_for_each_entry(ps, &tt->ps_list, ps_list) {
639 temp = scnprintf(next, size,
640 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
641 dev_name(&ps->udev->dev),
642 ps->ep->desc.bEndpointAddress,
643 ps->tt_usecs,
644 ps->bw_phase, ps->phase_uf,
645 ps->bw_period, ps->cs_mask);
646 size -= temp;
647 next += temp;
648 }
649 }
650 spin_unlock_irq(&ehci->lock);
651
652 return next - buf->output_buf;
653}
654
655static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci,
656 struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size)
657{
658 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
659 struct ehci_qtd *qtd;
660 char *type = "";
661 unsigned temp = 0;
662
663 /* count tds, get ep direction */
664 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) {
665 temp++;
666 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) {
667 case 0:
668 type = "out";
669 continue;
670 case 1:
671 type = "in";
672 continue;
673 }
674 }
675
676 return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)",
677 speed_char(scratch), scratch & 0x007f,
678 (scratch >> 8) & 0x000f, type, qh->ps.usecs,
679 qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16));
680}
681
682#define DBG_SCHED_LIMIT 64
683static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
684{
685 struct usb_hcd *hcd;
686 struct ehci_hcd *ehci;
687 unsigned long flags;
688 union ehci_shadow p, *seen;
689 unsigned temp, size, seen_count;
690 char *next;
691 unsigned i;
692 __hc32 tag;
693
694 seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC);
695 if (!seen)
696 return 0;
697 seen_count = 0;
698
699 hcd = bus_to_hcd(buf->bus);
700 ehci = hcd_to_ehci(hcd);
701 next = buf->output_buf;
702 size = buf->alloc_size;
703
704 temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size);
705 size -= temp;
706 next += temp;
707
708 /*
709 * dump a snapshot of the periodic schedule.
710 * iso changes, interrupt usually doesn't.
711 */
712 spin_lock_irqsave(&ehci->lock, flags);
713 for (i = 0; i < ehci->periodic_size; i++) {
714 p = ehci->pshadow[i];
715 if (likely(!p.ptr))
716 continue;
717 tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]);
718
719 temp = scnprintf(next, size, "%4d: ", i);
720 size -= temp;
721 next += temp;
722
723 do {
724 struct ehci_qh_hw *hw;
725
726 switch (hc32_to_cpu(ehci, tag)) {
727 case Q_TYPE_QH:
728 hw = p.qh->hw;
729 temp = scnprintf(next, size, " qh%d-%04x/%p",
730 p.qh->ps.period,
731 hc32_to_cpup(ehci,
732 &hw->hw_info2)
733 /* uframe masks */
734 & (QH_CMASK | QH_SMASK),
735 p.qh);
736 size -= temp;
737 next += temp;
738 /* don't repeat what follows this qh */
739 for (temp = 0; temp < seen_count; temp++) {
740 if (seen[temp].ptr != p.ptr)
741 continue;
742 if (p.qh->qh_next.ptr) {
743 temp = scnprintf(next, size,
744 " ...");
745 size -= temp;
746 next += temp;
747 }
748 break;
749 }
750 /* show more info the first time around */
751 if (temp == seen_count) {
752 temp = output_buf_tds_dir(next, ehci,
753 hw, p.qh, size);
754
755 if (seen_count < DBG_SCHED_LIMIT)
756 seen[seen_count++].qh = p.qh;
757 } else {
758 temp = 0;
759 }
760 tag = Q_NEXT_TYPE(ehci, hw->hw_next);
761 p = p.qh->qh_next;
762 break;
763 case Q_TYPE_FSTN:
764 temp = scnprintf(next, size,
765 " fstn-%8x/%p", p.fstn->hw_prev,
766 p.fstn);
767 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
768 p = p.fstn->fstn_next;
769 break;
770 case Q_TYPE_ITD:
771 temp = scnprintf(next, size,
772 " itd/%p", p.itd);
773 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
774 p = p.itd->itd_next;
775 break;
776 case Q_TYPE_SITD:
777 temp = scnprintf(next, size,
778 " sitd%d-%04x/%p",
779 p.sitd->stream->ps.period,
780 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
781 & 0x0000ffff,
782 p.sitd);
783 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
784 p = p.sitd->sitd_next;
785 break;
786 }
787 size -= temp;
788 next += temp;
789 } while (p.ptr);
790
791 temp = scnprintf(next, size, "\n");
792 size -= temp;
793 next += temp;
794 }
795 spin_unlock_irqrestore(&ehci->lock, flags);
796 kfree(seen);
797
798 return buf->alloc_size - size;
799}
800#undef DBG_SCHED_LIMIT
801
802static const char *rh_state_string(struct ehci_hcd *ehci)
803{
804 switch (ehci->rh_state) {
805 case EHCI_RH_HALTED:
806 return "halted";
807 case EHCI_RH_SUSPENDED:
808 return "suspended";
809 case EHCI_RH_RUNNING:
810 return "running";
811 case EHCI_RH_STOPPING:
812 return "stopping";
813 }
814 return "?";
815}
816
817static ssize_t fill_registers_buffer(struct debug_buffer *buf)
818{
819 struct usb_hcd *hcd;
820 struct ehci_hcd *ehci;
821 unsigned long flags;
822 unsigned temp, size, i;
823 char *next, scratch[80];
824 static char fmt[] = "%*s\n";
825 static char label[] = "";
826
827 hcd = bus_to_hcd(buf->bus);
828 ehci = hcd_to_ehci(hcd);
829 next = buf->output_buf;
830 size = buf->alloc_size;
831
832 spin_lock_irqsave(&ehci->lock, flags);
833
834 if (!HCD_HW_ACCESSIBLE(hcd)) {
835 size = scnprintf(next, size,
836 "bus %s, device %s\n"
837 "%s\n"
838 "SUSPENDED (no register access)\n",
839 hcd->self.controller->bus->name,
840 dev_name(hcd->self.controller),
841 hcd->product_desc);
842 goto done;
843 }
844
845 /* Capability Registers */
846 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
847 temp = scnprintf(next, size,
848 "bus %s, device %s\n"
849 "%s\n"
850 "EHCI %x.%02x, rh state %s\n",
851 hcd->self.controller->bus->name,
852 dev_name(hcd->self.controller),
853 hcd->product_desc,
854 i >> 8, i & 0x0ff, rh_state_string(ehci));
855 size -= temp;
856 next += temp;
857
858#ifdef CONFIG_PCI
859 /* EHCI 0.96 and later may have "extended capabilities" */
860 if (dev_is_pci(hcd->self.controller)) {
861 struct pci_dev *pdev;
862 u32 offset, cap, cap2;
863 unsigned count = 256 / 4;
864
865 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
866 offset = HCC_EXT_CAPS(ehci_readl(ehci,
867 &ehci->caps->hcc_params));
868 while (offset && count--) {
869 pci_read_config_dword(pdev, offset, &cap);
870 switch (cap & 0xff) {
871 case 1:
872 temp = scnprintf(next, size,
873 "ownership %08x%s%s\n", cap,
874 (cap & (1 << 24)) ? " linux" : "",
875 (cap & (1 << 16)) ? " firmware" : "");
876 size -= temp;
877 next += temp;
878
879 offset += 4;
880 pci_read_config_dword(pdev, offset, &cap2);
881 temp = scnprintf(next, size,
882 "SMI sts/enable 0x%08x\n", cap2);
883 size -= temp;
884 next += temp;
885 break;
886 case 0: /* illegal reserved capability */
887 cap = 0;
888 /* FALLTHROUGH */
889 default: /* unknown */
890 break;
891 }
892 temp = (cap >> 8) & 0xff;
893 }
894 }
895#endif
896
897 /* FIXME interpret both types of params */
898 i = ehci_readl(ehci, &ehci->caps->hcs_params);
899 temp = scnprintf(next, size, "structural params 0x%08x\n", i);
900 size -= temp;
901 next += temp;
902
903 i = ehci_readl(ehci, &ehci->caps->hcc_params);
904 temp = scnprintf(next, size, "capability params 0x%08x\n", i);
905 size -= temp;
906 next += temp;
907
908 /* Operational Registers */
909 temp = dbg_status_buf(scratch, sizeof(scratch), label,
910 ehci_readl(ehci, &ehci->regs->status));
911 temp = scnprintf(next, size, fmt, temp, scratch);
912 size -= temp;
913 next += temp;
914
915 temp = dbg_command_buf(scratch, sizeof(scratch), label,
916 ehci_readl(ehci, &ehci->regs->command));
917 temp = scnprintf(next, size, fmt, temp, scratch);
918 size -= temp;
919 next += temp;
920
921 temp = dbg_intr_buf(scratch, sizeof(scratch), label,
922 ehci_readl(ehci, &ehci->regs->intr_enable));
923 temp = scnprintf(next, size, fmt, temp, scratch);
924 size -= temp;
925 next += temp;
926
927 temp = scnprintf(next, size, "uframe %04x\n",
928 ehci_read_frame_index(ehci));
929 size -= temp;
930 next += temp;
931
932 for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) {
933 temp = dbg_port_buf(scratch, sizeof(scratch), label, i,
934 ehci_readl(ehci,
935 &ehci->regs->port_status[i - 1]));
936 temp = scnprintf(next, size, fmt, temp, scratch);
937 size -= temp;
938 next += temp;
939 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
940 temp = scnprintf(next, size,
941 " debug control %08x\n",
942 ehci_readl(ehci,
943 &ehci->debug->control));
944 size -= temp;
945 next += temp;
946 }
947 }
948
949 if (!list_empty(&ehci->async_unlink)) {
950 temp = scnprintf(next, size, "async unlink qh %p\n",
951 list_first_entry(&ehci->async_unlink,
952 struct ehci_qh, unlink_node));
953 size -= temp;
954 next += temp;
955 }
956
957#ifdef EHCI_STATS
958 temp = scnprintf(next, size,
959 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
960 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
961 ehci->stats.lost_iaa);
962 size -= temp;
963 next += temp;
964
965 temp = scnprintf(next, size, "complete %ld unlink %ld\n",
966 ehci->stats.complete, ehci->stats.unlink);
967 size -= temp;
968 next += temp;
969#endif
970
971done:
972 spin_unlock_irqrestore(&ehci->lock, flags);
973
974 return buf->alloc_size - size;
975}
976
977static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
978 ssize_t (*fill_func)(struct debug_buffer *))
979{
980 struct debug_buffer *buf;
981
982 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
983
984 if (buf) {
985 buf->bus = bus;
986 buf->fill_func = fill_func;
987 mutex_init(&buf->mutex);
988 buf->alloc_size = PAGE_SIZE;
989 }
990
991 return buf;
992}
993
994static int fill_buffer(struct debug_buffer *buf)
995{
996 int ret = 0;
997
998 if (!buf->output_buf)
999 buf->output_buf = vmalloc(buf->alloc_size);
1000
1001 if (!buf->output_buf) {
1002 ret = -ENOMEM;
1003 goto out;
1004 }
1005
1006 ret = buf->fill_func(buf);
1007
1008 if (ret >= 0) {
1009 buf->count = ret;
1010 ret = 0;
1011 }
1012
1013out:
1014 return ret;
1015}
1016
1017static ssize_t debug_output(struct file *file, char __user *user_buf,
1018 size_t len, loff_t *offset)
1019{
1020 struct debug_buffer *buf = file->private_data;
1021 int ret = 0;
1022
1023 mutex_lock(&buf->mutex);
1024 if (buf->count == 0) {
1025 ret = fill_buffer(buf);
1026 if (ret != 0) {
1027 mutex_unlock(&buf->mutex);
1028 goto out;
1029 }
1030 }
1031 mutex_unlock(&buf->mutex);
1032
1033 ret = simple_read_from_buffer(user_buf, len, offset,
1034 buf->output_buf, buf->count);
1035
1036out:
1037 return ret;
1038}
1039
1040static int debug_close(struct inode *inode, struct file *file)
1041{
1042 struct debug_buffer *buf = file->private_data;
1043
1044 if (buf) {
1045 vfree(buf->output_buf);
1046 kfree(buf);
1047 }
1048
1049 return 0;
1050}
1051
1052static int debug_async_open(struct inode *inode, struct file *file)
1053{
1054 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
1055
1056 return file->private_data ? 0 : -ENOMEM;
1057}
1058
1059static int debug_bandwidth_open(struct inode *inode, struct file *file)
1060{
1061 file->private_data = alloc_buffer(inode->i_private,
1062 fill_bandwidth_buffer);
1063
1064 return file->private_data ? 0 : -ENOMEM;
1065}
1066
1067static int debug_periodic_open(struct inode *inode, struct file *file)
1068{
1069 struct debug_buffer *buf;
1070
1071 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
1072 if (!buf)
1073 return -ENOMEM;
1074
1075 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE;
1076 file->private_data = buf;
1077 return 0;
1078}
1079
1080static int debug_registers_open(struct inode *inode, struct file *file)
1081{
1082 file->private_data = alloc_buffer(inode->i_private,
1083 fill_registers_buffer);
1084
1085 return file->private_data ? 0 : -ENOMEM;
1086}
1087
1088static inline void create_debug_files(struct ehci_hcd *ehci)
1089{
1090 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1091
1092 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
1093 if (!ehci->debug_dir)
1094 return;
1095
1096 if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
1097 &debug_async_fops))
1098 goto file_error;
1099
1100 if (!debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
1101 &debug_bandwidth_fops))
1102 goto file_error;
1103
1104 if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
1105 &debug_periodic_fops))
1106 goto file_error;
1107
1108 if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
1109 &debug_registers_fops))
1110 goto file_error;
1111
1112 return;
1113
1114file_error:
1115 debugfs_remove_recursive(ehci->debug_dir);
1116}
1117
1118static inline void remove_debug_files(struct ehci_hcd *ehci)
1119{
1120 debugfs_remove_recursive(ehci->debug_dir);
1121}
1122
1123#endif /* CONFIG_DYNAMIC_DEBUG */
1/*
2 * Copyright (c) 2001-2002 by David Brownell
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* this file is part of ehci-hcd.c */
20
21#ifdef CONFIG_DYNAMIC_DEBUG
22
23/* check the values in the HCSPARAMS register
24 * (host controller _Structural_ parameters)
25 * see EHCI spec, Table 2-4 for each value
26 */
27static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
28{
29 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params);
30
31 ehci_dbg (ehci,
32 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
33 label, params,
34 HCS_DEBUG_PORT (params),
35 HCS_INDICATOR (params) ? " ind" : "",
36 HCS_N_CC (params),
37 HCS_N_PCC (params),
38 HCS_PORTROUTED (params) ? "" : " ordered",
39 HCS_PPC (params) ? "" : " !ppc",
40 HCS_N_PORTS (params)
41 );
42 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
43 if (HCS_PORTROUTED (params)) {
44 int i;
45 char buf [46], tmp [7], byte;
46
47 buf[0] = 0;
48 for (i = 0; i < HCS_N_PORTS (params); i++) {
49 // FIXME MIPS won't readb() ...
50 byte = readb (&ehci->caps->portroute[(i>>1)]);
51 sprintf(tmp, "%d ",
52 ((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
53 strcat(buf, tmp);
54 }
55 ehci_dbg (ehci, "%s portroute %s\n",
56 label, buf);
57 }
58}
59#else
60
61static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
62
63#endif
64
65#ifdef CONFIG_DYNAMIC_DEBUG
66
67/* check the values in the HCCPARAMS register
68 * (host controller _Capability_ parameters)
69 * see EHCI Spec, Table 2-5 for each value
70 * */
71static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
72{
73 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params);
74
75 if (HCC_ISOC_CACHE (params)) {
76 ehci_dbg (ehci,
77 "%s hcc_params %04x caching frame %s%s%s\n",
78 label, params,
79 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
80 HCC_CANPARK(params) ? " park" : "",
81 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "");
82 } else {
83 ehci_dbg (ehci,
84 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n",
85 label,
86 params,
87 HCC_ISOC_THRES(params),
88 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024",
89 HCC_CANPARK(params) ? " park" : "",
90 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "",
91 HCC_LPM(params) ? " LPM" : "",
92 HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "",
93 HCC_HW_PREFETCH(params) ? " hw prefetch" : "",
94 HCC_32FRAME_PERIODIC_LIST(params) ?
95 " 32 periodic list" : "");
96 }
97}
98#else
99
100static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
101
102#endif
103
104#ifdef CONFIG_DYNAMIC_DEBUG
105
106static void __maybe_unused
107dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
108{
109 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
110 hc32_to_cpup(ehci, &qtd->hw_next),
111 hc32_to_cpup(ehci, &qtd->hw_alt_next),
112 hc32_to_cpup(ehci, &qtd->hw_token),
113 hc32_to_cpup(ehci, &qtd->hw_buf [0]));
114 if (qtd->hw_buf [1])
115 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n",
116 hc32_to_cpup(ehci, &qtd->hw_buf[1]),
117 hc32_to_cpup(ehci, &qtd->hw_buf[2]),
118 hc32_to_cpup(ehci, &qtd->hw_buf[3]),
119 hc32_to_cpup(ehci, &qtd->hw_buf[4]));
120}
121
122static void __maybe_unused
123dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
124{
125 struct ehci_qh_hw *hw = qh->hw;
126
127 ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
128 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current);
129 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next);
130}
131
132static void __maybe_unused
133dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
134{
135 ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
136 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next),
137 itd->urb);
138 ehci_dbg (ehci,
139 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
140 hc32_to_cpu(ehci, itd->hw_transaction[0]),
141 hc32_to_cpu(ehci, itd->hw_transaction[1]),
142 hc32_to_cpu(ehci, itd->hw_transaction[2]),
143 hc32_to_cpu(ehci, itd->hw_transaction[3]),
144 hc32_to_cpu(ehci, itd->hw_transaction[4]),
145 hc32_to_cpu(ehci, itd->hw_transaction[5]),
146 hc32_to_cpu(ehci, itd->hw_transaction[6]),
147 hc32_to_cpu(ehci, itd->hw_transaction[7]));
148 ehci_dbg (ehci,
149 " buf: %08x %08x %08x %08x %08x %08x %08x\n",
150 hc32_to_cpu(ehci, itd->hw_bufp[0]),
151 hc32_to_cpu(ehci, itd->hw_bufp[1]),
152 hc32_to_cpu(ehci, itd->hw_bufp[2]),
153 hc32_to_cpu(ehci, itd->hw_bufp[3]),
154 hc32_to_cpu(ehci, itd->hw_bufp[4]),
155 hc32_to_cpu(ehci, itd->hw_bufp[5]),
156 hc32_to_cpu(ehci, itd->hw_bufp[6]));
157 ehci_dbg (ehci, " index: %d %d %d %d %d %d %d %d\n",
158 itd->index[0], itd->index[1], itd->index[2],
159 itd->index[3], itd->index[4], itd->index[5],
160 itd->index[6], itd->index[7]);
161}
162
163static void __maybe_unused
164dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
165{
166 ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
167 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next),
168 sitd->urb);
169 ehci_dbg (ehci,
170 " addr %08x sched %04x result %08x buf %08x %08x\n",
171 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep),
172 hc32_to_cpu(ehci, sitd->hw_uframe),
173 hc32_to_cpu(ehci, sitd->hw_results),
174 hc32_to_cpu(ehci, sitd->hw_buf[0]),
175 hc32_to_cpu(ehci, sitd->hw_buf[1]));
176}
177
178static int __maybe_unused
179dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
180{
181 return scnprintf (buf, len,
182 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s",
183 label, label [0] ? " " : "", status,
184 (status & STS_PPCE_MASK) ? " PPCE" : "",
185 (status & STS_ASS) ? " Async" : "",
186 (status & STS_PSS) ? " Periodic" : "",
187 (status & STS_RECL) ? " Recl" : "",
188 (status & STS_HALT) ? " Halt" : "",
189 (status & STS_IAA) ? " IAA" : "",
190 (status & STS_FATAL) ? " FATAL" : "",
191 (status & STS_FLR) ? " FLR" : "",
192 (status & STS_PCD) ? " PCD" : "",
193 (status & STS_ERR) ? " ERR" : "",
194 (status & STS_INT) ? " INT" : ""
195 );
196}
197
198static int __maybe_unused
199dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
200{
201 return scnprintf (buf, len,
202 "%s%sintrenable %02x%s%s%s%s%s%s%s",
203 label, label [0] ? " " : "", enable,
204 (enable & STS_PPCE_MASK) ? " PPCE" : "",
205 (enable & STS_IAA) ? " IAA" : "",
206 (enable & STS_FATAL) ? " FATAL" : "",
207 (enable & STS_FLR) ? " FLR" : "",
208 (enable & STS_PCD) ? " PCD" : "",
209 (enable & STS_ERR) ? " ERR" : "",
210 (enable & STS_INT) ? " INT" : ""
211 );
212}
213
214static const char *const fls_strings [] =
215 { "1024", "512", "256", "??" };
216
217static int
218dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
219{
220 return scnprintf (buf, len,
221 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s "
222 "period=%s%s %s",
223 label, label [0] ? " " : "", command,
224 (command & CMD_HIRD) ? " HIRD" : "",
225 (command & CMD_PPCEE) ? " PPCEE" : "",
226 (command & CMD_FSP) ? " FSP" : "",
227 (command & CMD_ASPE) ? " ASPE" : "",
228 (command & CMD_PSPE) ? " PSPE" : "",
229 (command & CMD_PARK) ? " park" : "(park)",
230 CMD_PARK_CNT (command),
231 (command >> 16) & 0x3f,
232 (command & CMD_LRESET) ? " LReset" : "",
233 (command & CMD_IAAD) ? " IAAD" : "",
234 (command & CMD_ASE) ? " Async" : "",
235 (command & CMD_PSE) ? " Periodic" : "",
236 fls_strings [(command >> 2) & 0x3],
237 (command & CMD_RESET) ? " Reset" : "",
238 (command & CMD_RUN) ? "RUN" : "HALT"
239 );
240}
241
242static int
243dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
244{
245 char *sig;
246
247 /* signaling state */
248 switch (status & (3 << 10)) {
249 case 0 << 10: sig = "se0"; break;
250 case 1 << 10: sig = "k"; break; /* low speed */
251 case 2 << 10: sig = "j"; break;
252 default: sig = "?"; break;
253 }
254
255 return scnprintf (buf, len,
256 "%s%sport:%d status %06x %d %s%s%s%s%s%s "
257 "sig=%s%s%s%s%s%s%s%s%s%s%s",
258 label, label [0] ? " " : "", port, status,
259 status>>25,/*device address */
260 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ACK ?
261 " ACK" : "",
262 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_NYET ?
263 " NYET" : "",
264 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_STALL ?
265 " STALL" : "",
266 (status & PORT_SSTS)>>23 == PORTSC_SUSPEND_STS_ERR ?
267 " ERR" : "",
268 (status & PORT_POWER) ? " POWER" : "",
269 (status & PORT_OWNER) ? " OWNER" : "",
270 sig,
271 (status & PORT_LPM) ? " LPM" : "",
272 (status & PORT_RESET) ? " RESET" : "",
273 (status & PORT_SUSPEND) ? " SUSPEND" : "",
274 (status & PORT_RESUME) ? " RESUME" : "",
275 (status & PORT_OCC) ? " OCC" : "",
276 (status & PORT_OC) ? " OC" : "",
277 (status & PORT_PEC) ? " PEC" : "",
278 (status & PORT_PE) ? " PE" : "",
279 (status & PORT_CSC) ? " CSC" : "",
280 (status & PORT_CONNECT) ? " CONNECT" : "");
281}
282
283#else
284static inline void __maybe_unused
285dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
286{}
287
288static inline int __maybe_unused
289dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
290{ return 0; }
291
292static inline int __maybe_unused
293dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
294{ return 0; }
295
296static inline int __maybe_unused
297dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
298{ return 0; }
299
300static inline int __maybe_unused
301dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
302{ return 0; }
303
304#endif /* CONFIG_DYNAMIC_DEBUG */
305
306/* functions have the "wrong" filename when they're output... */
307#define dbg_status(ehci, label, status) { \
308 char _buf [80]; \
309 dbg_status_buf (_buf, sizeof _buf, label, status); \
310 ehci_dbg (ehci, "%s\n", _buf); \
311}
312
313#define dbg_cmd(ehci, label, command) { \
314 char _buf [80]; \
315 dbg_command_buf (_buf, sizeof _buf, label, command); \
316 ehci_dbg (ehci, "%s\n", _buf); \
317}
318
319#define dbg_port(ehci, label, port, status) { \
320 char _buf [80]; \
321 dbg_port_buf (_buf, sizeof _buf, label, port, status); \
322 ehci_dbg (ehci, "%s\n", _buf); \
323}
324
325/*-------------------------------------------------------------------------*/
326
327#ifdef STUB_DEBUG_FILES
328
329static inline void create_debug_files (struct ehci_hcd *bus) { }
330static inline void remove_debug_files (struct ehci_hcd *bus) { }
331
332#else
333
334/* troubleshooting help: expose state in debugfs */
335
336static int debug_async_open(struct inode *, struct file *);
337static int debug_bandwidth_open(struct inode *, struct file *);
338static int debug_periodic_open(struct inode *, struct file *);
339static int debug_registers_open(struct inode *, struct file *);
340
341static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
342static int debug_close(struct inode *, struct file *);
343
344static const struct file_operations debug_async_fops = {
345 .owner = THIS_MODULE,
346 .open = debug_async_open,
347 .read = debug_output,
348 .release = debug_close,
349 .llseek = default_llseek,
350};
351static const struct file_operations debug_bandwidth_fops = {
352 .owner = THIS_MODULE,
353 .open = debug_bandwidth_open,
354 .read = debug_output,
355 .release = debug_close,
356 .llseek = default_llseek,
357};
358static const struct file_operations debug_periodic_fops = {
359 .owner = THIS_MODULE,
360 .open = debug_periodic_open,
361 .read = debug_output,
362 .release = debug_close,
363 .llseek = default_llseek,
364};
365static const struct file_operations debug_registers_fops = {
366 .owner = THIS_MODULE,
367 .open = debug_registers_open,
368 .read = debug_output,
369 .release = debug_close,
370 .llseek = default_llseek,
371};
372
373static struct dentry *ehci_debug_root;
374
375struct debug_buffer {
376 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
377 struct usb_bus *bus;
378 struct mutex mutex; /* protect filling of buffer */
379 size_t count; /* number of characters filled into buffer */
380 char *output_buf;
381 size_t alloc_size;
382};
383
384#define speed_char(info1) ({ char tmp; \
385 switch (info1 & (3 << 12)) { \
386 case QH_FULL_SPEED: tmp = 'f'; break; \
387 case QH_LOW_SPEED: tmp = 'l'; break; \
388 case QH_HIGH_SPEED: tmp = 'h'; break; \
389 default: tmp = '?'; break; \
390 } tmp; })
391
392static inline char token_mark(struct ehci_hcd *ehci, __hc32 token)
393{
394 __u32 v = hc32_to_cpu(ehci, token);
395
396 if (v & QTD_STS_ACTIVE)
397 return '*';
398 if (v & QTD_STS_HALT)
399 return '-';
400 if (!IS_SHORT_READ (v))
401 return ' ';
402 /* tries to advance through hw_alt_next */
403 return '/';
404}
405
406static void qh_lines (
407 struct ehci_hcd *ehci,
408 struct ehci_qh *qh,
409 char **nextp,
410 unsigned *sizep
411)
412{
413 u32 scratch;
414 u32 hw_curr;
415 struct list_head *entry;
416 struct ehci_qtd *td;
417 unsigned temp;
418 unsigned size = *sizep;
419 char *next = *nextp;
420 char mark;
421 __le32 list_end = EHCI_LIST_END(ehci);
422 struct ehci_qh_hw *hw = qh->hw;
423
424 if (hw->hw_qtd_next == list_end) /* NEC does this */
425 mark = '@';
426 else
427 mark = token_mark(ehci, hw->hw_token);
428 if (mark == '/') { /* qh_alt_next controls qh advance? */
429 if ((hw->hw_alt_next & QTD_MASK(ehci))
430 == ehci->async->hw->hw_alt_next)
431 mark = '#'; /* blocked */
432 else if (hw->hw_alt_next == list_end)
433 mark = '.'; /* use hw_qtd_next */
434 /* else alt_next points to some other qtd */
435 }
436 scratch = hc32_to_cpup(ehci, &hw->hw_info1);
437 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0;
438 temp = scnprintf (next, size,
439 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
440 qh, scratch & 0x007f,
441 speed_char (scratch),
442 (scratch >> 8) & 0x000f,
443 scratch, hc32_to_cpup(ehci, &hw->hw_info2),
444 hc32_to_cpup(ehci, &hw->hw_token), mark,
445 (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token)
446 ? "data1" : "data0",
447 (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f);
448 size -= temp;
449 next += temp;
450
451 /* hc may be modifying the list as we read it ... */
452 list_for_each (entry, &qh->qtd_list) {
453 td = list_entry (entry, struct ehci_qtd, qtd_list);
454 scratch = hc32_to_cpup(ehci, &td->hw_token);
455 mark = ' ';
456 if (hw_curr == td->qtd_dma)
457 mark = '*';
458 else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma))
459 mark = '+';
460 else if (QTD_LENGTH (scratch)) {
461 if (td->hw_alt_next == ehci->async->hw->hw_alt_next)
462 mark = '#';
463 else if (td->hw_alt_next != list_end)
464 mark = '/';
465 }
466 temp = snprintf (next, size,
467 "\n\t%p%c%s len=%d %08x urb %p",
468 td, mark, ({ char *tmp;
469 switch ((scratch>>8)&0x03) {
470 case 0: tmp = "out"; break;
471 case 1: tmp = "in"; break;
472 case 2: tmp = "setup"; break;
473 default: tmp = "?"; break;
474 } tmp;}),
475 (scratch >> 16) & 0x7fff,
476 scratch,
477 td->urb);
478 if (size < temp)
479 temp = size;
480 size -= temp;
481 next += temp;
482 if (temp == size)
483 goto done;
484 }
485
486 temp = snprintf (next, size, "\n");
487 if (size < temp)
488 temp = size;
489 size -= temp;
490 next += temp;
491
492done:
493 *sizep = size;
494 *nextp = next;
495}
496
497static ssize_t fill_async_buffer(struct debug_buffer *buf)
498{
499 struct usb_hcd *hcd;
500 struct ehci_hcd *ehci;
501 unsigned long flags;
502 unsigned temp, size;
503 char *next;
504 struct ehci_qh *qh;
505
506 hcd = bus_to_hcd(buf->bus);
507 ehci = hcd_to_ehci (hcd);
508 next = buf->output_buf;
509 size = buf->alloc_size;
510
511 *next = 0;
512
513 /* dumps a snapshot of the async schedule.
514 * usually empty except for long-term bulk reads, or head.
515 * one QH per line, and TDs we know about
516 */
517 spin_lock_irqsave (&ehci->lock, flags);
518 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
519 qh_lines (ehci, qh, &next, &size);
520 if (!list_empty(&ehci->async_unlink) && size > 0) {
521 temp = scnprintf(next, size, "\nunlink =\n");
522 size -= temp;
523 next += temp;
524
525 list_for_each_entry(qh, &ehci->async_unlink, unlink_node) {
526 if (size <= 0)
527 break;
528 qh_lines(ehci, qh, &next, &size);
529 }
530 }
531 spin_unlock_irqrestore (&ehci->lock, flags);
532
533 return strlen(buf->output_buf);
534}
535
536static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf)
537{
538 struct ehci_hcd *ehci;
539 struct ehci_tt *tt;
540 struct ehci_per_sched *ps;
541 unsigned temp, size;
542 char *next;
543 unsigned i;
544 u8 *bw;
545 u16 *bf;
546 u8 budget[EHCI_BANDWIDTH_SIZE];
547
548 ehci = hcd_to_ehci(bus_to_hcd(buf->bus));
549 next = buf->output_buf;
550 size = buf->alloc_size;
551
552 *next = 0;
553
554 spin_lock_irq(&ehci->lock);
555
556 /* Dump the HS bandwidth table */
557 temp = scnprintf(next, size,
558 "HS bandwidth allocation (us per microframe)\n");
559 size -= temp;
560 next += temp;
561 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
562 bw = &ehci->bandwidth[i];
563 temp = scnprintf(next, size,
564 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
565 i, bw[0], bw[1], bw[2], bw[3],
566 bw[4], bw[5], bw[6], bw[7]);
567 size -= temp;
568 next += temp;
569 }
570
571 /* Dump all the FS/LS tables */
572 list_for_each_entry(tt, &ehci->tt_list, tt_list) {
573 temp = scnprintf(next, size,
574 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n",
575 dev_name(&tt->usb_tt->hub->dev),
576 tt->tt_port + !!tt->usb_tt->multi);
577 size -= temp;
578 next += temp;
579
580 bf = tt->bandwidth;
581 temp = scnprintf(next, size,
582 " %5u%5u%5u%5u%5u%5u%5u%5u\n",
583 bf[0], bf[1], bf[2], bf[3],
584 bf[4], bf[5], bf[6], bf[7]);
585 size -= temp;
586 next += temp;
587
588 temp = scnprintf(next, size,
589 "FS/LS budget (us per microframe)\n");
590 size -= temp;
591 next += temp;
592 compute_tt_budget(budget, tt);
593 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) {
594 bw = &budget[i];
595 temp = scnprintf(next, size,
596 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n",
597 i, bw[0], bw[1], bw[2], bw[3],
598 bw[4], bw[5], bw[6], bw[7]);
599 size -= temp;
600 next += temp;
601 }
602 list_for_each_entry(ps, &tt->ps_list, ps_list) {
603 temp = scnprintf(next, size,
604 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n",
605 dev_name(&ps->udev->dev),
606 ps->ep->desc.bEndpointAddress,
607 ps->tt_usecs,
608 ps->bw_phase, ps->phase_uf,
609 ps->bw_period, ps->cs_mask);
610 size -= temp;
611 next += temp;
612 }
613 }
614 spin_unlock_irq(&ehci->lock);
615
616 return next - buf->output_buf;
617}
618
619#define DBG_SCHED_LIMIT 64
620static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
621{
622 struct usb_hcd *hcd;
623 struct ehci_hcd *ehci;
624 unsigned long flags;
625 union ehci_shadow p, *seen;
626 unsigned temp, size, seen_count;
627 char *next;
628 unsigned i;
629 __hc32 tag;
630
631 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
632 return 0;
633 seen_count = 0;
634
635 hcd = bus_to_hcd(buf->bus);
636 ehci = hcd_to_ehci (hcd);
637 next = buf->output_buf;
638 size = buf->alloc_size;
639
640 temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
641 size -= temp;
642 next += temp;
643
644 /* dump a snapshot of the periodic schedule.
645 * iso changes, interrupt usually doesn't.
646 */
647 spin_lock_irqsave (&ehci->lock, flags);
648 for (i = 0; i < ehci->periodic_size; i++) {
649 p = ehci->pshadow [i];
650 if (likely (!p.ptr))
651 continue;
652 tag = Q_NEXT_TYPE(ehci, ehci->periodic [i]);
653
654 temp = scnprintf (next, size, "%4d: ", i);
655 size -= temp;
656 next += temp;
657
658 do {
659 struct ehci_qh_hw *hw;
660
661 switch (hc32_to_cpu(ehci, tag)) {
662 case Q_TYPE_QH:
663 hw = p.qh->hw;
664 temp = scnprintf (next, size, " qh%d-%04x/%p",
665 p.qh->ps.period,
666 hc32_to_cpup(ehci,
667 &hw->hw_info2)
668 /* uframe masks */
669 & (QH_CMASK | QH_SMASK),
670 p.qh);
671 size -= temp;
672 next += temp;
673 /* don't repeat what follows this qh */
674 for (temp = 0; temp < seen_count; temp++) {
675 if (seen [temp].ptr != p.ptr)
676 continue;
677 if (p.qh->qh_next.ptr) {
678 temp = scnprintf (next, size,
679 " ...");
680 size -= temp;
681 next += temp;
682 }
683 break;
684 }
685 /* show more info the first time around */
686 if (temp == seen_count) {
687 u32 scratch = hc32_to_cpup(ehci,
688 &hw->hw_info1);
689 struct ehci_qtd *qtd;
690 char *type = "";
691
692 /* count tds, get ep direction */
693 temp = 0;
694 list_for_each_entry (qtd,
695 &p.qh->qtd_list,
696 qtd_list) {
697 temp++;
698 switch (0x03 & (hc32_to_cpu(
699 ehci,
700 qtd->hw_token) >> 8)) {
701 case 0: type = "out"; continue;
702 case 1: type = "in"; continue;
703 }
704 }
705
706 temp = scnprintf (next, size,
707 " (%c%d ep%d%s "
708 "[%d/%d] q%d p%d)",
709 speed_char (scratch),
710 scratch & 0x007f,
711 (scratch >> 8) & 0x000f, type,
712 p.qh->ps.usecs,
713 p.qh->ps.c_usecs,
714 temp,
715 0x7ff & (scratch >> 16));
716
717 if (seen_count < DBG_SCHED_LIMIT)
718 seen [seen_count++].qh = p.qh;
719 } else
720 temp = 0;
721 tag = Q_NEXT_TYPE(ehci, hw->hw_next);
722 p = p.qh->qh_next;
723 break;
724 case Q_TYPE_FSTN:
725 temp = scnprintf (next, size,
726 " fstn-%8x/%p", p.fstn->hw_prev,
727 p.fstn);
728 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next);
729 p = p.fstn->fstn_next;
730 break;
731 case Q_TYPE_ITD:
732 temp = scnprintf (next, size,
733 " itd/%p", p.itd);
734 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next);
735 p = p.itd->itd_next;
736 break;
737 case Q_TYPE_SITD:
738 temp = scnprintf (next, size,
739 " sitd%d-%04x/%p",
740 p.sitd->stream->ps.period,
741 hc32_to_cpup(ehci, &p.sitd->hw_uframe)
742 & 0x0000ffff,
743 p.sitd);
744 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next);
745 p = p.sitd->sitd_next;
746 break;
747 }
748 size -= temp;
749 next += temp;
750 } while (p.ptr);
751
752 temp = scnprintf (next, size, "\n");
753 size -= temp;
754 next += temp;
755 }
756 spin_unlock_irqrestore (&ehci->lock, flags);
757 kfree (seen);
758
759 return buf->alloc_size - size;
760}
761#undef DBG_SCHED_LIMIT
762
763static const char *rh_state_string(struct ehci_hcd *ehci)
764{
765 switch (ehci->rh_state) {
766 case EHCI_RH_HALTED:
767 return "halted";
768 case EHCI_RH_SUSPENDED:
769 return "suspended";
770 case EHCI_RH_RUNNING:
771 return "running";
772 case EHCI_RH_STOPPING:
773 return "stopping";
774 }
775 return "?";
776}
777
778static ssize_t fill_registers_buffer(struct debug_buffer *buf)
779{
780 struct usb_hcd *hcd;
781 struct ehci_hcd *ehci;
782 unsigned long flags;
783 unsigned temp, size, i;
784 char *next, scratch [80];
785 static char fmt [] = "%*s\n";
786 static char label [] = "";
787
788 hcd = bus_to_hcd(buf->bus);
789 ehci = hcd_to_ehci (hcd);
790 next = buf->output_buf;
791 size = buf->alloc_size;
792
793 spin_lock_irqsave (&ehci->lock, flags);
794
795 if (!HCD_HW_ACCESSIBLE(hcd)) {
796 size = scnprintf (next, size,
797 "bus %s, device %s\n"
798 "%s\n"
799 "SUSPENDED (no register access)\n",
800 hcd->self.controller->bus->name,
801 dev_name(hcd->self.controller),
802 hcd->product_desc);
803 goto done;
804 }
805
806 /* Capability Registers */
807 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
808 temp = scnprintf (next, size,
809 "bus %s, device %s\n"
810 "%s\n"
811 "EHCI %x.%02x, rh state %s\n",
812 hcd->self.controller->bus->name,
813 dev_name(hcd->self.controller),
814 hcd->product_desc,
815 i >> 8, i & 0x0ff, rh_state_string(ehci));
816 size -= temp;
817 next += temp;
818
819#ifdef CONFIG_PCI
820 /* EHCI 0.96 and later may have "extended capabilities" */
821 if (dev_is_pci(hcd->self.controller)) {
822 struct pci_dev *pdev;
823 u32 offset, cap, cap2;
824 unsigned count = 256/4;
825
826 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
827 offset = HCC_EXT_CAPS(ehci_readl(ehci,
828 &ehci->caps->hcc_params));
829 while (offset && count--) {
830 pci_read_config_dword (pdev, offset, &cap);
831 switch (cap & 0xff) {
832 case 1:
833 temp = scnprintf (next, size,
834 "ownership %08x%s%s\n", cap,
835 (cap & (1 << 24)) ? " linux" : "",
836 (cap & (1 << 16)) ? " firmware" : "");
837 size -= temp;
838 next += temp;
839
840 offset += 4;
841 pci_read_config_dword (pdev, offset, &cap2);
842 temp = scnprintf (next, size,
843 "SMI sts/enable 0x%08x\n", cap2);
844 size -= temp;
845 next += temp;
846 break;
847 case 0: /* illegal reserved capability */
848 cap = 0;
849 /* FALLTHROUGH */
850 default: /* unknown */
851 break;
852 }
853 temp = (cap >> 8) & 0xff;
854 }
855 }
856#endif
857
858 // FIXME interpret both types of params
859 i = ehci_readl(ehci, &ehci->caps->hcs_params);
860 temp = scnprintf (next, size, "structural params 0x%08x\n", i);
861 size -= temp;
862 next += temp;
863
864 i = ehci_readl(ehci, &ehci->caps->hcc_params);
865 temp = scnprintf (next, size, "capability params 0x%08x\n", i);
866 size -= temp;
867 next += temp;
868
869 /* Operational Registers */
870 temp = dbg_status_buf (scratch, sizeof scratch, label,
871 ehci_readl(ehci, &ehci->regs->status));
872 temp = scnprintf (next, size, fmt, temp, scratch);
873 size -= temp;
874 next += temp;
875
876 temp = dbg_command_buf (scratch, sizeof scratch, label,
877 ehci_readl(ehci, &ehci->regs->command));
878 temp = scnprintf (next, size, fmt, temp, scratch);
879 size -= temp;
880 next += temp;
881
882 temp = dbg_intr_buf (scratch, sizeof scratch, label,
883 ehci_readl(ehci, &ehci->regs->intr_enable));
884 temp = scnprintf (next, size, fmt, temp, scratch);
885 size -= temp;
886 next += temp;
887
888 temp = scnprintf (next, size, "uframe %04x\n",
889 ehci_read_frame_index(ehci));
890 size -= temp;
891 next += temp;
892
893 for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
894 temp = dbg_port_buf (scratch, sizeof scratch, label, i,
895 ehci_readl(ehci,
896 &ehci->regs->port_status[i - 1]));
897 temp = scnprintf (next, size, fmt, temp, scratch);
898 size -= temp;
899 next += temp;
900 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
901 temp = scnprintf (next, size,
902 " debug control %08x\n",
903 ehci_readl(ehci,
904 &ehci->debug->control));
905 size -= temp;
906 next += temp;
907 }
908 }
909
910 if (!list_empty(&ehci->async_unlink)) {
911 temp = scnprintf(next, size, "async unlink qh %p\n",
912 list_first_entry(&ehci->async_unlink,
913 struct ehci_qh, unlink_node));
914 size -= temp;
915 next += temp;
916 }
917
918#ifdef EHCI_STATS
919 temp = scnprintf (next, size,
920 "irq normal %ld err %ld iaa %ld (lost %ld)\n",
921 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa,
922 ehci->stats.lost_iaa);
923 size -= temp;
924 next += temp;
925
926 temp = scnprintf (next, size, "complete %ld unlink %ld\n",
927 ehci->stats.complete, ehci->stats.unlink);
928 size -= temp;
929 next += temp;
930#endif
931
932done:
933 spin_unlock_irqrestore (&ehci->lock, flags);
934
935 return buf->alloc_size - size;
936}
937
938static struct debug_buffer *alloc_buffer(struct usb_bus *bus,
939 ssize_t (*fill_func)(struct debug_buffer *))
940{
941 struct debug_buffer *buf;
942
943 buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
944
945 if (buf) {
946 buf->bus = bus;
947 buf->fill_func = fill_func;
948 mutex_init(&buf->mutex);
949 buf->alloc_size = PAGE_SIZE;
950 }
951
952 return buf;
953}
954
955static int fill_buffer(struct debug_buffer *buf)
956{
957 int ret = 0;
958
959 if (!buf->output_buf)
960 buf->output_buf = vmalloc(buf->alloc_size);
961
962 if (!buf->output_buf) {
963 ret = -ENOMEM;
964 goto out;
965 }
966
967 ret = buf->fill_func(buf);
968
969 if (ret >= 0) {
970 buf->count = ret;
971 ret = 0;
972 }
973
974out:
975 return ret;
976}
977
978static ssize_t debug_output(struct file *file, char __user *user_buf,
979 size_t len, loff_t *offset)
980{
981 struct debug_buffer *buf = file->private_data;
982 int ret = 0;
983
984 mutex_lock(&buf->mutex);
985 if (buf->count == 0) {
986 ret = fill_buffer(buf);
987 if (ret != 0) {
988 mutex_unlock(&buf->mutex);
989 goto out;
990 }
991 }
992 mutex_unlock(&buf->mutex);
993
994 ret = simple_read_from_buffer(user_buf, len, offset,
995 buf->output_buf, buf->count);
996
997out:
998 return ret;
999
1000}
1001
1002static int debug_close(struct inode *inode, struct file *file)
1003{
1004 struct debug_buffer *buf = file->private_data;
1005
1006 if (buf) {
1007 vfree(buf->output_buf);
1008 kfree(buf);
1009 }
1010
1011 return 0;
1012}
1013
1014static int debug_async_open(struct inode *inode, struct file *file)
1015{
1016 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
1017
1018 return file->private_data ? 0 : -ENOMEM;
1019}
1020
1021static int debug_bandwidth_open(struct inode *inode, struct file *file)
1022{
1023 file->private_data = alloc_buffer(inode->i_private,
1024 fill_bandwidth_buffer);
1025
1026 return file->private_data ? 0 : -ENOMEM;
1027}
1028
1029static int debug_periodic_open(struct inode *inode, struct file *file)
1030{
1031 struct debug_buffer *buf;
1032 buf = alloc_buffer(inode->i_private, fill_periodic_buffer);
1033 if (!buf)
1034 return -ENOMEM;
1035
1036 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8)*PAGE_SIZE;
1037 file->private_data = buf;
1038 return 0;
1039}
1040
1041static int debug_registers_open(struct inode *inode, struct file *file)
1042{
1043 file->private_data = alloc_buffer(inode->i_private,
1044 fill_registers_buffer);
1045
1046 return file->private_data ? 0 : -ENOMEM;
1047}
1048
1049static inline void create_debug_files (struct ehci_hcd *ehci)
1050{
1051 struct usb_bus *bus = &ehci_to_hcd(ehci)->self;
1052
1053 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root);
1054 if (!ehci->debug_dir)
1055 return;
1056
1057 if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus,
1058 &debug_async_fops))
1059 goto file_error;
1060
1061 if (!debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus,
1062 &debug_bandwidth_fops))
1063 goto file_error;
1064
1065 if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus,
1066 &debug_periodic_fops))
1067 goto file_error;
1068
1069 if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus,
1070 &debug_registers_fops))
1071 goto file_error;
1072
1073 return;
1074
1075file_error:
1076 debugfs_remove_recursive(ehci->debug_dir);
1077}
1078
1079static inline void remove_debug_files (struct ehci_hcd *ehci)
1080{
1081 debugfs_remove_recursive(ehci->debug_dir);
1082}
1083
1084#endif /* STUB_DEBUG_FILES */